Gate drive circuit, motor drive device using same, and electronic apparatus

Abstract

The invention provides a gate drive circuit capable of suppressing through current and transient caused by reverse recovery current of a freewheeling diode. The conduction circuit (410) is configured so as to supply a gate current (IHGON) to the high-side transistor (MH). The first current source (CS1) can switch the output current (Ix) with a first current amount (Ia) and a second current amount (Ib) smaller than the first current amount (Ia). A first switch (SW1) is connected between a first output node (out1) of the first current mirror circuit (CM1) and a gate of the high-side transistor (MH). A second current source (CS2) generates a second current (Iy). The second switch (SW2) is connected between the first output node (out1) of the second current mirror circuit (CM2) and the gate of the high-side transistor (MH).

Description

Technical Field

[0001] The present disclosure relates to a gate drive circuit. Background Art

[0002] In motor drive circuits, DC / DC converters, power conversion devices, and the like, a half-bridge circuit, an H-bridge circuit, or a three-phase bridge circuit (hereinafter collectively referred to as a bridge circuit) using power transistors is often used.

[0003] Figure 1 1 is a circuit diagram of a bridge circuit 10. The bridge circuit 10 includes an upper arm 12 and a lower arm 14 which are connected in series between a power supply terminal and a ground terminal. The upper arm 12 includes a high-side transistor MH and a freewheeling diode Di connected in parallel. The lower arm 14 includes a low-side transistor ML and a freewheeling diode Di connected in parallel. An inductor (coil) L1 as a load is connected to the output terminal of the bridge circuit 10.

[0004] The bridge circuit 10 can be in a state where both the high-side transistor MH and the low-side transistor ML are turned off (high impedance state). The high-side transistor MH is on and the low-side transistor ML is off (high output state) The high-side transistor MH is off and the low-side transistor ML is on. (Low output state). About each state There are two types of currents I discharged from the bridge circuit 10. OUT (flowing to the right in the figure) and the bridge circuit 10 absorbs the current I oUT The current sinking state (flowing to the left in the figure).

[0005] [Prior art literature]

[0006] [Patent Document]

[0007] Patent Document 1: Japanese Patent Application Publication No. 2018-82575 Summary of the invention

[0008] [Problems to be solved by the invention]

[0009] The inventors Figure 1 The following issues were identified as a result of research on bridge circuits.

[0010] Consider switching from a high impedance state in the current sourcing state To high output state In the state In the output current I oUT The current is supplied to the load via the flyback diode Di of the lower arm 14 (current source). The output voltage V OUTis -Vf. Vf is the forward voltage of the freewheeling diode Di.

[0011] In Status In the example, the output current I of the bridge circuit 10 is OUT Flows in the high-side transistor MH. In addition, in the freewheeling diode Di of the lower arm 14, the reverse recovery current Irc flows from the cathode to the anode. Therefore, in the high-side transistor MH, the output current I OUT and reverse recovery current Irc flow. This state is equivalent to the case where a through current flows. If the through current flows, the output voltage V OUT Becoming unstable can produce transients, which are undesirable because they can be the cause of unwanted emissions.

[0012] The present disclosure has been made in view of the above problems, and one exemplary object of one embodiment thereof is to provide a gate drive circuit capable of suppressing a through current and a transient caused by a reverse recovery current of a freewheeling diode.

[0013] [Technical solutions for solving technical problems]

[0014] One embodiment of the present disclosure relates to a gate drive circuit for driving a power transistor constituting a switch circuit. The gate drive circuit includes a conduction circuit configured to pull current to the gate of the power transistor and a cutoff circuit configured to sink current from the gate of the power transistor. The conduction circuit includes: a first current source configured to generate a first current, the first current being switchable between a first current amount and a second current amount less than the first current amount; a first current mirror circuit having an input node and a first output node connected to the first current source; a first switch connected between the first output node of the first current mirror circuit and the gate of the power transistor; a second current source generating a second current; a second current mirror circuit having an input node and a first output node connected to the second current source; a second switch connected between the first output node of the second current mirror circuit and the gate of the power transistor; and a control circuit configured to control the first switch, the second switch, the first current source, and the second current source. The control circuit is configured such that, in response to an indication of conduction of the power transistor, (i) during a first period, the first current is set to a first current amount, the first switch is turned on, and the second switch is turned off; (ii) during a second period, the first current is set to a second current amount, the first switch is turned on, and the second switch is turned off; and (iii) during a third period, the first switch is turned off, and the second switch is turned on.

[0015] In addition, any combination of the above-described constituent elements and any substitution of constituent elements and expressions in methods, apparatuses, systems, and the like of the present disclosure may also be additional modes of the present disclosure.

[0016] [Effects of the invention]

[0017] According to one aspect of the present disclosure, it is possible to suppress a through current caused by a reverse recovery current of a flyback diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is the circuit diagram of a bridge circuit.

[0019] Figure 2 1 is a circuit diagram of a switch circuit according to an embodiment.

[0020] Figure 3 is a circuit diagram of a gate drive circuit according to an embodiment.

[0021] Figure 4 yes Figure 3 The operation waveform of the gate drive circuit.

[0022] Figure 5 This is a circuit diagram of a gate drive circuit according to Modification 1.

[0023] Figure 6 This is a circuit diagram of a gate drive circuit according to Modification Example 2.

[0024] Figure 7 is a circuit diagram of a drive circuit including a gate drive circuit.

[0025] Figure 8 This is a circuit diagram showing a configuration example of a connection circuit.

[0026] Fig. 9 is the circuit diagram of the driving circuit.

[0027] Fig.10 : is a circuit diagram of a motor drive device including a switching circuit according to an embodiment. DETAILED DESCRIPTION

[0028] (Overview of Embodiments)

[0029] This is a summary of several exemplary embodiments of the present disclosure. This summary serves as a prelude to the detailed description that will be described later. It is intended to provide a basic understanding of the embodiments and simplifies several concepts of one or more embodiments. It does not limit the breadth of the invention or disclosure. For convenience, "one embodiment" is sometimes used as a term to indicate one embodiment (example, variation) or multiple embodiments (example, variation) disclosed in this specification.

[0030] This summary is not a comprehensive summary of all contemplated embodiments, nor is it intended to identify the important elements of all embodiments or to delineate the scope of some or all embodiments. Its only purpose is to serve as a prelude to a more detailed description that will be provided later, and to provide several concepts of one or more embodiments in a simplified form.

[0031] A gate drive circuit according to one embodiment drives a power transistor constituting a switch circuit. The gate drive circuit includes a conduction circuit configured to draw current to the gate of the power transistor, and a cutoff circuit configured to sink current from the gate of the power transistor. The conduction circuit includes: a first current source configured to generate a first current, the first current being switchable between a first current amount and a second current amount less than the first current amount; a first current mirror circuit having an input node and a first output node connected to the first current source; a first switch connected between the first output node of the first current mirror circuit and the gate of the power transistor; a second current source generating a second current; a second current mirror circuit having an input node and a first output node connected to the second current source; a second switch connected between the first output node of the second current mirror circuit and the gate of the power transistor; and a control circuit configured to control the first switch, the second switch, the first current source, and the second current source. The control circuit is configured such that, in response to an indication of conduction of the power transistor, (i) during a first period, the first current is set to a first current amount, the first switch is turned on, and the second switch is turned off; (ii) during a second period, the first current is set to a second current amount, the first switch is turned on, and the second switch is turned off; and (iii) during a third period, the first switch is turned off, and the second switch is turned on.

[0032] According to this method, before the power transistor is turned on, a driving current of a first current amount is supplied to the gate of the power transistor to increase the gate voltage. Then, after the power transistor is turned on and the reverse recovery current can flow in the freewheeling diode of the lower arm, the driving current supplied to the gate of the power transistor is reduced and the power transistor is slowly turned on while keeping the on-resistance of the power transistor relatively large. Thus, the through current and transient caused by the reverse recovery current of the freewheeling diode of the lower arm can be suppressed. Then, in the third period when the possibility of reverse recovery current flowing is low, by increasing the current amount supplied to the gate compared to the second period, the conduction time of the power transistor can be shortened, and power consumption can be reduced. Furthermore, in both the first period and the second period, the first current mirror circuit operates to switch the amount of input current of the first current mirror circuit, so when switching to the second period, the current supplied to the gate changes slowly. Thus, power consumption can be further reduced.

[0033] In one embodiment, the current supplied to the gate of the power transistor in the third period may be greater than the current supplied to the gate of the power transistor in the first period and the second period. After the influence of the reverse recovery characteristics of the freewheeling diode of the lower arm is reduced, the on-resistance of the power transistor can be reduced in a short time by increasing the amount of current supplied to the gate of the power transistor, thereby improving the efficiency of the bridge circuit.

[0034] In one embodiment, the first current source may also include: an output node; a first constant current circuit connected to the output node; a seventh switch and a second constant current circuit connected in series between the output node and ground; and an eighth switch and a third constant current circuit connected in series between the output of the second constant current circuit and ground. Since the current generated by the first constant current circuit is always supplied to the first current mirror circuit, the operating point of the first current mirror circuit when the first switch is turned off can be maintained near the operating point in the operation when the first switch is turned on. Thus, when the first switch is switched from off to on, the first current mirror circuit can quickly start to operate.

[0035] In one embodiment, the second current source may also include: an output node; a fourth constant current circuit connected to the output node; and an eighth switch and a fifth constant current circuit connected in series between the output node and the ground. Since the current generated by the fourth constant current circuit is always supplied to the second current mirror circuit, the operating point of the second current mirror circuit when the second switch is turned off can be maintained near the operating point in the operation when the second switch is turned on. Thus, when the second switch is switched from off to on, the second current mirror circuit can quickly start to operate.

[0036] In one embodiment, the conduction circuit may further include a third switch connected between the gate of the power transistor and a high-level line generating a high voltage corresponding to the high level of the gate voltage of the power transistor.

[0037] In one embodiment, the conduction circuit may further include a third switch connected between the first output node of the second current mirror circuit and a high level line generating a high voltage equivalent to the high level of the gate voltage of the power transistor. In this configuration, by configuring the second switch with a high withstand voltage element, the third switch can be configured with a low withstand voltage element in addition to the second current mirror circuit.

[0038] In one embodiment, the first current mirror circuit and the second current mirror circuit may also further have a second output node. The cut-off circuit may also include: a third current mirror circuit having an input node and an output node connected to the second output node of the first current mirror circuit; a fourth switch connected between the output node of the third current mirror circuit and the gate of the power transistor; a fourth current mirror circuit having an input node and an output node connected to the second output node of the second current mirror circuit; and a fifth switch connected between the output node of the fourth current mirror circuit and the gate of the power transistor. According to this configuration, the first current source and the second current source can be shared in the on-circuit and the off-circuit.

[0039] In one embodiment, the cutoff circuit may further include a sixth switch connected between the gate of the power transistor and a low-level line generating a low voltage corresponding to the low level of the gate voltage of the power transistor.

[0040] In one embodiment, the cutoff circuit may further include a sixth switch connected between the output node of the fourth current mirror circuit and a low-level line generating a low voltage equivalent to the low level of the gate voltage of the power transistor. In this configuration, by configuring the fifth switch with a high withstand voltage element, the sixth switch can be configured with a low withstand voltage element in addition to the fourth current mirror circuit.

[0041] In one embodiment, the gate drive circuit may also include a first sensor that compares the gate-source voltage of the power transistor with the first threshold voltage. The control circuit may also shift to the second period in response to the output change of the first sensor during the first period. By monitoring the gate-source voltage of the power transistor, the magnitude of the drive current can be changed in conjunction with the transition of the power transistor from the off state to the on state. The first threshold voltage may be equal to the gate threshold of the MOSFET, may be higher than the threshold, or may be lower than the threshold.

[0042] In one embodiment, the first sensor may be used together with a high-side cutoff sensor that detects that the high-side transistor is cutoff. Thus, the drive current can be reduced before the high-side transistor becomes conductive, and an increase in the circuit area can be suppressed.

[0043] In one embodiment, the gate drive circuit may further include a second sensor that compares the output voltage of the switch circuit with the second threshold voltage. The control circuit may also shift to the third period in response to the output change of the second sensor during the second period. By monitoring the output voltage, it is possible to detect that the influence of the reverse recovery characteristics of the freewheeling diode of the lower arm is reduced.

[0044] In one embodiment, the gate drive circuit may further include a third sensor for comparing the output voltage of the switch circuit with a third threshold voltage. The control circuit may switch on the third switch by shifting to a fourth period in response to a change in the output of the third sensor during the third period.

[0045] In one implementation, the gate driving circuit may also be integrated on a semiconductor substrate.

[0046] A motor drive circuit in one embodiment comprises: a bridge circuit including a high-side transistor and a low-side transistor; a high-side driver, which is a gate drive circuit of any one of the above items for driving the high-side transistor as a power transistor; and a low-side driver, which is a gate drive circuit of any one of the above items for driving the low-side transistor as a power transistor.

[0047] An electronic device according to one embodiment includes a motor and the above-described motor driving device for driving the motor.

[0048] (Implementation Method)

[0049] The preferred embodiments are described below with reference to the accompanying drawings. The same or equivalent components, members, and processes shown in the drawings are marked with the same reference numerals, and repeated descriptions are appropriately omitted. In addition, the embodiments do not limit the invention but are merely illustrative, and all the features and combinations thereof described in the embodiments are not necessarily the essential contents of the invention.

[0050] In this specification, "the state in which component A and component B are connected" includes not only the case in which component A and component B are directly physically connected, but also the case in which component A and component B are indirectly connected via other components that do not substantially affect their electrical connection state or do not impair the functions and effects exerted by their combination.

[0051] Similarly, "the state in which component C is arranged between component A and component B" includes, in addition to the case in which component A and component C or component B and component C are directly connected, the case in which they are indirectly connected via other components that do not substantially affect their electrical connection state or do not impair the functions and effects exerted by their combination.

[0052] Figure 2 1 is a circuit diagram of a switching circuit 100 according to an embodiment. The switching circuit 100 includes a bridge circuit 110 and a drive circuit 200. Here, only a one-phase configuration of the switching circuit 100 is shown, but the switching circuit 100 may be a three-phase circuit or an H-bridge circuit.

[0053] The bridge circuit 110 includes an upper arm 112 disposed between a power line (input line) 102 and an output terminal (output line) 104, and a lower arm 114 disposed between the output line 104 and a ground line 106. The upper arm 112 includes a high-side transistor MH and a flyback diode (return diode) Di connected in parallel. The lower arm 114 includes a low-side transistor ML and a flyback diode Di connected in parallel. In the present embodiment, the high-side transistor MH and the low-side transistor ML are N-channel MOSFETs, and their respective body diodes also serve as the flyback diode Di.

[0054] The drive circuit 200 controls the upper arm 112 and the lower arm 114 of the bridge circuit 110. The drive circuit 200 can switch the high impedance state in which both the upper arm 112 and the lower arm 114 are disconnected. High output state where the upper arm 112 is on and the lower arm 114 is off and a low output state in which the upper arm 112 is disconnected and the lower arm 114 is connected These three states. About the output current I OU T, the direction of the current flowing from the output line 104 of the bridge circuit 110 toward the inductor L1 as the load is defined as positive, and the opposite direction is defined as negative. There is an output current I OUT Positive (current source) state And the output current I OUT Negative (current sinking) state

[0055] The drive circuit 200 includes a control circuit 210, a high-side drive circuit 220, and a low-side drive circuit 260, and is a functional IC integrated on a semiconductor substrate. The control circuit 210 selects a state according to the state of the load of the bridge circuit 110. Generation and each state The corresponding control signals HGCTL and LGCTL. In the state, both the high-side control signal HGCTL and the low-side control signal LGCTL are at the cut-off level (e.g., low). In the state, the high-side control signal HGCTL is at the on level (eg, high), and the low-side control signal LGCTL is at the off level. In the embodiment, the high-side control signal HGCTL is at a cut-off level, and the low-side control signal LGCTL is at a cut-off level.

[0056] The high-side driving circuit 220 receives the high-side control signal HGCTL at the input node IN, and the output node OUT is connected to the gate of the high-side transistor MH via the high-side gate pin HG. If the high-side control signal HGCTL changes from the off level to the on level, the high-side driving circuit 220 supplies a driving current I to the gate of the high-side transistor MH.HG_ON , so that the gate-source voltage V Gs In addition, if the high-side control signal HGCTL changes from the on level to the off level, the high-side drive circuit 220 draws the drive current I from the gate of the high-side transistor MH. HG_OFF , so that the gate-source voltage V GS decreases, causing the high-side transistor MH to be cut off.

[0057] The high-side driver circuit 220 can select a plurality of operation modes when the high-side transistor MH is turned on, one of which is referred to as the first mode. In the first mode, the high-side driver circuit 220 supplies a drive current I to the gate of the high-side transistor MH according to the state of the bridge circuit 110. HG_ON Changes in multiple stages.

[0058] In the first mode, the high-side driving circuit 220 outputs a driving current I1 of a first current amount during a first period T1 after the high-side control signal HGCTL changes from an off level to an on level. HG_ON In the second period T2 following the first period T1, a driving current I having a second current amount I2 which is smaller than the first current amount I1 is output. HG_ON Then, in the third period T3 following the second period T2, a driving current I having a third current amount I3 greater than the first current amount I1 and the second current amount I2 is output. HGON .

[0059] The high-side drive circuit 220 is configured to be operable in a second mode in addition to the first mode. In the second mode, the drive current I generated by the high-side drive circuit 220 HG _ ON The waveform of the drive current I is different from that of the first mode. Specifically, in the second mode, during the period from when the high-side control signal HGCTL changes from the off-level to the on-level until the state transition of the bridge circuit 110 is completed, the drive current I HG_ON The certain amount Ic is greater than the second current amount I2. The certain amount Ic may be greater than any one of the first current amount I1 to the third current amount I3.

[0060] The low-side drive circuit 260 receives the low-side control signal LGCTL at the input node IN, and the output node OUT is connected to the gate of the low-side transistor ML via the low-side gate pin LG. If the low-side control signal LGCTL changes from the off level (e.g., low) to the on level (high), the low-side drive circuit 260 supplies a drive current I to the gate of the low-side transistor ML. LG_ON , so that the gate-source voltage V GSIn addition, if the low-side control signal LGCTL changes from the on level to the off level, the low-side drive circuit 260 draws the drive current I from the gate of the low-side transistor ML. LG_OFF , so that the gate-source voltage V GS Going low, the low-side transistor ML is turned off.

[0061] Similar to the high-side drive circuit 220 , the low-side drive circuit 260 is configured to be switchable between the first mode and the second mode.

[0062] In the first mode, the low-side drive circuit 260 supplies a drive current I to the gate of the low-side transistor ML according to the state of the bridge circuit 110. LG_ON Changes in multiple stages.

[0063] In the first mode, the low-side driving circuit 260 outputs a driving current I of a fourth current amount I4 in a fourth period T4 after the low-side control signal LGCTL changes from an off level to an on level. LG_ON In the fifth period T5 following the fourth period T4, a driving current I having a fifth current amount I5 which is less than the fourth current amount I4 is output. LG_ON Then, in the sixth period T6 following the fifth period T5, a driving current I having a sixth current amount I6 which is larger than the fourth current amount I4 and the fifth current amount I5 is output. LG_ON .

[0064] In the second mode, the driving current I generated by the low-side driving circuit 260 LG_ON The waveform of the drive current I is different from that of the first mode. Specifically, in the second mode, during the period from when the low-side control signal LGCTL changes from the off-level to the on-level until the state transition of the bridge circuit 110 is completed, the drive current I LG_ON The certain amount Id is greater than the fifth current amount I5. The certain amount Id may be greater than any one of the fourth current amount I4 to the sixth current amount I6.

[0065] The above is the configuration of the switch circuit 100. Next, its operation will be described.

[0066] First, the operation of the high-side drive circuit 220 will be described. The high-side drive circuit 220 operates in the first mode when a reverse recovery current can be generated for the flyback diode of the lower arm 114, and operates in the second mode when a reverse recovery current is not generated for the flyback diode of the lower arm 114.

[0067] Specifically, the high-side drive circuit 220 turns off the high-side transistor MH and the low-side transistor ML, and pulls the current I through the freewheeling diode Di of the lower arm 114. OUT Status When the high-side transistor MH is turned on (sourcerise), the operation is performed in the first mode.

[0068] In addition, the high-side driving circuit 220 turns off the high-side transistor MH, turns on the low-side transistor ML, and sinks the current I OUT In the state where the high-side transistor MH is turned on (sinkrise), the operation is performed in the second mode.

[0069] Figure 3 4 is a circuit diagram of a gate drive circuit 400 according to an embodiment. Figure 2 The high-side driving circuit 220 drives the high-side transistor MH.

[0070] The conduction circuit 410 is configured to draw a conduction current I to the gate of the high-side transistor MH, which is a power transistor. HG_ON The cutoff circuit 420 is configured to sink a current I from the gate of the high-side transistor MH. HG_OFF .

[0071] The conduction circuit 410 includes a first current source CS1 , a second current source CS2 , a first current mirror circuit CM1 , a second current mirror circuit CM2 , a first switch SW1 , a second switch SW2 , and a third switch SW3 .

[0072] The first current source CS1 outputs the first current Ix in an on state. The first current source CS1 is configured so that the current amount of the first current Ix can be switched between a first current amount Ia and a second current amount Ib that is smaller than the first current amount Ia.

[0073] The first current source CS1 can make the first current Ix completely zero in the off state, but is preferably configured to output a very small current amount Ic.

[0074] The first current mirror circuit CM1 is connected to the first current source CS1 at the input node in. The first current mirror circuit CM1 folds back the first current Ix and outputs it from the first output node out1. The first switch SW1 is provided between the first output node out1 of the first current mirror circuit CM1 and the gate of the high-side transistor MH (i.e., the high-side gate pin HG).

[0075] The second current source CS2 outputs the second current Iy of the current amount Ic in the on state. The second current mirror circuit CM2 is connected to the second current source CS2 at the input node in. The second current mirror circuit CM2 folds back the second current Iy and outputs it from the first output node out1. The second switch SW2 is provided between the first output node out1 of the second current mirror circuit CM2 and the gate of the high-side transistor MH (i.e., the high-side gate pin HG).

[0076] The second current source CS2 can make the second current Iy completely zero in the off state, but is preferably configured to output a very small amount of current Id.

[0077] The third switch SW3 is connected between the gate of the high-side transistor MH and the high-level line 412 that generates a high voltage V equivalent to the high level of the gate voltage of the high-side transistor MH. The high voltage V H can be a bootstrap voltage generated by a bootstrap circuit or can be generated by a charge pump circuit. H The control circuit 210 generates a control signal HGCTL indicating the states of the conduction circuit 410 and the cutoff circuit 420. Specifically, the control circuit 210 is configured to control the first current source CS1, the second current source CS2, the first switch SW1, the second switch SW2, and the third switch SW3 for the conduction circuit 410.

[0078] In the first mode, the control circuit 210 operates in the following order in response to an instruction to turn on the high-side transistor MH.

[0079] (i) The first period T1

[0080] Turn on the first current source CS1 and turn off the second current source CS2. The first current Ix of the first current source CS1 is the first current amount Ia. In addition, the first switch SW1 is on, and the second switch SW2 and the third switch SW3 are off.

[0081] During the first period T1, a current I of the first current amount I1 is supplied to the gate of the high-side transistor MH.

[0082] When the mirror ratio of the first current mirror circuit CM1 is set to α, the first current amount I1 is represented by the following formula. HG_ON I1 = Ia × α

[0083] I1 = Ia × α

[0084] (ii) The second period T2

[0085] Keep the first current source CS1 on and reduce the first current Ix to the second current amount Ib. Maintain the states of the first switch SW1, the second switch SW2, the third switch SW3, and the second current source CS2.

[0086] During the second period T2, a current I of the second current amount I2 is supplied to the gate of the high-side transistor MH. HG_ON The second current amount I2 is represented by the following formula.

[0087] I2 = Ib × α

[0088] Since Ib < Ia, I2 < I1.

[0089] (iii) Third period T3

[0090] The first current source CS1 is turned off, and the second current source CS2 is turned on. The second switch SW2 is turned on, and the first switch SW1 and the second switch SW2 are turned off.

[0091] In the third period T3, a current I having a third current amount I3 is supplied to the gate of the high-side transistor MH. HG _ ON When the mirror ratio of the second current mirror circuit CM2 is set to β, the third current amount I3 is expressed by the following equation.

[0092] I3=Ic×β

[0093] Ic and β are determined in such a manner as to satisfy I3>I1.

[0094] (iv) Period 4 T4

[0095] The first current source CS1 and the second current source CS2 are turned off. The first switch SW1 and the second switch SW2 are turned off, and the third switch SW3 is turned on.

[0096] Figure 4 yes Figure 3 The operation waveform diagram of the gate driving circuit 400 is shown in FIG. 1 . The control signal CTRL is a logic signal indicating the state of the bridge circuit 110. The current I MH represents the current flowing in the high-side transistor MH, the current I ML Represents the current flowing in the low-side transistor ML. The current is positive if it flows from the drain to the source. V LG is the gate voltage (gate-source voltage) of the low-side transistor ML. HG is the gate voltage of the high-side transistor MH, V OUT Indicates the output voltage. V HG With V OUT The potential difference is the gate-source voltage of the high-side transistor MH.

[0097] Before time t0, the control signal CTRL is at a low level, the high-side transistor MH is turned off, the low-side transistor ML is turned on, and the output voltage V OUT It is low voltage (0V).

[0098] Figure 4 Indicates the operation of the current sourcing mode. Before time t0, the negative current I ML Flows in the low-side transistor ML.

[0099] At time t0, the control signal CTRL changes to a high level. As a result, the low-side driver circuit 260 causes the gate voltage V LG decreases, causing the low-side transistor ML to become cut off.

[0100] At time t1, if the gate voltage V LG When the voltage Vth4 is lower than the fourth threshold voltage Vth4, the high-side driving circuit 220 becomes active. In the first period T1, the conduction circuit 410 supplies a current I1 of the first current amount I1 to the gate of the high-side transistor MH. HG_ON .

[0101] Then, at time t2, if the gate-source voltage V HG -V OUT When the first threshold voltage Vth1 is exceeded, the second period T2 is entered. In the second period T2, the conduction circuit 410 supplies a current I of the second current amount I2 to the gate of the high-side transistor MH. HG_ON The second current amount I2 is smaller than the first current amount I1.

[0102] Then, at time t3, if the output voltage V OUT When the voltage exceeds the second threshold voltage Vth2, the circuit 410 enters the third period T3. In the third period T3, the conduction circuit 410 supplies a current I of a third current amount I3 to the gate of the high-side transistor MH. HG _ ON The third current amount I3 is greater than the first current amount I1 and the second current amount I2.

[0103] Then, at time t4, if the output voltage V OUT Exceeding the input voltage VI N When the third switch SW3 is turned on, the gate voltage V HG The high-side transistor MH is fixed to a high-level voltage and is strongly fixed to an on state.

[0104] The above is the operation of the switch circuit 100 .

[0105] According to the switch circuit 100, the period until the high-side transistor MH is turned on is defined as the first period, and the drive current I1 having the first current amount I1 is supplied to the gate of the high-side transistor MH. HG_ON , so that the gate voltage V HG Then, in the second period after the high-side transistor MH is turned on and the reverse recovery current can flow through the freewheeling diode of the lower arm, the drive current I supplied to the gate of the high-side transistor MH is HG_ON The current is reduced to the second current amount I2, and the high-side transistor MH is slowly turned on while keeping the on-resistance of the high-side transistor MH large. This can suppress the through current and transient caused by the reverse recovery current of the freewheeling diode of the lower arm.

[0106] Next, in the third period T3 in which the possibility of the reverse recovery current flowing is low, the drive current I supplied to the gate of the high-side transistor MH is increased. HG_ON By increasing the third current amount I3 which is larger than the second period T2 , the on-time of the high-side transistor MH can be shortened, and power consumption can be reduced.

[0107] Furthermore, in both the first period T1 and the second period T2, the first current mirror circuit CM1 operates to change the amount of the input current Ix of the first current mirror circuit CM1. Therefore, when switching from the first period T1 to the second period T2, the driving current I HG_ON The current is gradually changed from the first current amount I1 to the second current amount I2. This can further reduce power consumption.

[0108] Furthermore, in the third period T3, the driving current I supplied to the gate of the high-side transistor MH is HG_ON This is larger than the first current amount I1 in the first period T1. As a result, since the on-resistance of the high-side transistor MH can be reduced in a short time, the efficiency of the bridge circuit can be further improved.

[0109] Figure 5 4 is a circuit diagram of a gate drive circuit 400 of Modification 1. In this modification, the second current mirror circuit CM2 includes a low-pass filter 414 between the PMOS transistor MP11 on the input side and the PMOS transistor MP12 on the output side. The low-pass filter 414 is an RC filter including a resistor R11 and a capacitor C11. By means of this low-pass filter, even in PWM driving, the high voltage V H By changing the current of the second current mirror circuit CM2, it is also possible to obtain the effect of stabilizing the current.

[0110] Figure 6 is a circuit diagram of a gate drive circuit 400 according to Modification 2. Figure 5 Compared with the gate drive circuit 400, Figure 6 The position of the third switch SW3a of the gate driving circuit 400 is different. Specifically, the third switch SW3a is connected between the high level line 412 and the first output node out1 of the second current mirror circuit CM2.

[0111] illustrate Figure 6 Advantages of the modified example. Figure 3 In the configuration of , in applications where the potential difference between the high level line 412 and the high side gate pin HG is large, the second switch SW2 and the third switch SW3 need to be formed of high withstand voltage elements with large areas. Figure 6 In the modified example, the second switch SW2 may be formed of a high withstand voltage element, and the third switch SW3a may be formed of a low withstand voltage element. Therefore, the circuit area can be reduced.

[0112] In addition, Figure 3 In the gate driving circuit 400, a third switch SW3a which is a low withstand voltage element may be provided instead of the third switch SW3.

[0113] Next, a configuration example of the cutoff circuit 420 will be described.

[0114] Figure 7 2 is a circuit diagram of a drive circuit 200A including a gate drive circuit 400A. The gate drive circuit 400A includes an on circuit 410A and an off circuit 420A.

[0115] The basic structure of the conduction circuit 410A is Figure 3 Similarly, it includes a first current source CS1, a second current source CS2, a first current mirror circuit CM1, a second current mirror circuit CM2, a first switch SW1, a second switch SW2, and a third switch SW3.

[0116] The first current mirror circuit CM1 and the second current mirror circuit CM2 each have a second output node out2. The first current mirror circuit CM1 folds back the current Ix and supplies the current Ix' to the cutoff circuit 420A. The second current mirror circuit CM2 folds back the current Iy and supplies the current Iy' to the cutoff circuit 420A.

[0117] The cutoff circuit 420A includes a third current mirror circuit CM3 , a fourth current mirror circuit CM4 , a fourth switch SW4 , a fifth switch SW5 , and a sixth switch SW6 .

[0118] The input node in of the third current mirror circuit CM3 is connected to the second output node out2 of the first current mirror circuit CM1. The third current mirror circuit CM3 folds back the current Ix'. The fourth switch SW4 is provided between the output node out of the third current mirror circuit CM3 and the gate of the high-side transistor MH.

[0119] The input node in of the fourth current mirror circuit CM4 is connected to the second output node out2 of the second current mirror circuit CM2. The fourth current mirror circuit CM4 folds back the current Iy'. The fifth switch SW5 is provided between the output node out of the fourth current mirror circuit CM4 and the gate of the high-side transistor MH.

[0120] The sixth switch SW6 is connected between the gate and source of the high-side transistor MH.

[0121] The fourth switch SW4 to the sixth switch SW6 of the cutoff circuit 420 are controlled according to the control signal HGCTL generated by the control circuit 210 .

[0122] According to the cutoff circuit 420A, when the high-side transistor MH is cut off, the driving current I HG_ON Similarly, the drive current I generated by the cutoff circuit 420A can be HG_OFF Change in stages.

[0123] Next, a more specific configuration example of the conduction circuit 410 will be described.

[0124] Figure 8 : is a circuit diagram showing a configuration example of the conduction circuit 410. The first current source CS1 includes a first constant current circuit CCS1, a second constant current circuit CCS2, a third constant current circuit CCS3, a seventh switch SW7, and an eighth switch SW8.

[0125] The first constant current circuit CCS1 is connected to the output node of the first current source CS1. The seventh switch SW7 and the second constant current circuit CCS2 are connected in series between the output node and the ground. The eighth switch SW8 and the third constant current circuit CCS3 are connected in series between the output of the second constant current circuit CCS2 and the ground.

[0126] When the first current source CS1 is in the off state, the seventh switch SW7 is in the off state. When the first current source CS1 is in the on state, the seventh switch SW7 and the eighth switch SW8 are in the on state in the first period T1. In the second period T2, the seventh switch SW7 is in the on state and the eighth switch SW8 is in the off state.

[0127] The first current source CS1 continuously outputs the output current of the first constant current circuit CCS1 as a current Ix of a small current amount in the off state. Thus, the variation of the operating point of the first current mirror circuit CM1 can be suppressed. The operating speed of the second current mirror circuit CM2 can be increased. Thus, the responsiveness of the conduction circuit 410 can be improved.

[0128] The second current source CS2 includes a fourth constant current circuit CCS4, a fifth constant current circuit CCS5, and a ninth switch SW9. The fourth constant current circuit CCS4 is connected to the output node of the second current source CS2. The ninth switch SW9 and the fifth constant current circuit CCS5 are connected in series between the output node of the second current source CS2 and the ground.

[0129] The ninth switch SW9 is turned off in the off state of the second current source CS2 , and is turned on in the on state.

[0130] When the second current source CS2 is in the off state, the output current of the fourth constant current circuit CCS4 is continuously output as a current Iy of a small current amount. Thus, the variation of the operating point of the second current mirror circuit CM2 can be suppressed. The operating speed of the second current mirror circuit CM2 can be increased, thereby improving the responsiveness of the conduction circuit 410.

[0131] exist Figure 7 and Figure 8 In the second current mirror circuit CM2, Figure 5 (Variation 1) The low-pass filter 414 described above. In addition, the third switch SW3 may be replaced by Figure 6 The third switch SW3a described in (Variant 2).

[0132] Fig. 9 2 is a circuit diagram of the driving circuit 200 . The driving circuit 200 may include a first sensor 202 , a second sensor 204 , a third sensor 206 , and a low-side cutoff sensor 208 .

[0133] The low-side cutoff sensor 208 detects that the low-side transistor ML is turned off. The low-side cutoff sensor 208 compares the gate-source voltage of the low-side transistor ML with the fourth threshold voltage Vth4. If the control circuit 210 detects that the low-side transistor ML is turned off based on the output of the low-side cutoff sensor 208, it shifts to the first period t1.

[0134] The first sensor 202 measures the gate-source voltage V Gs The voltage Vth1 is compared with the first threshold voltage Vth1. The first threshold voltage Vth1 is based on the threshold voltage of the MOSFET. Just decide.

[0135] In many cases, a high-side cutoff sensor for detecting the cutoff of the high-side transistor MH is provided in the driving circuit 200. The output of the high-side cutoff sensor is referred to by the control circuit 210. The control circuit 210 monitors the output of the high-side cutoff sensor, and after the high-side transistor MH is reliably cut off, the low-side control signal LGCTL is converted to the on level. In this way, it is possible to prevent the high-side transistor MH and the low-side transistor ML from being turned on at the same time, thereby preventing a through current.

[0136] When the driving circuit 200 includes a high-side cutoff sensor, the first sensor 202 can be used in common with the high-side cutoff sensor, thereby reducing the circuit area.

[0137] In the first period T1 of the high-side driving circuit 220, if the output of the first sensor 202 changes, that is, the gate-source voltage V GS Exceeds the first threshold voltage V TH1 , it shifts to the second period T2. When the first threshold voltage V TH1 Set higher than the MOSFET threshold voltage V GS(th)When the high-side driving circuit 220 is low, the high-side driving circuit 220 can be shifted to the second period T2 before the high-side transistor MH is turned on. When the response delay is large, the high-side driving circuit 220 shifts to the second period T2 at the same time as or slightly later than the turning on.

[0138] By monitoring the gate-source voltage V of the high-side transistor MH GS , which can be linked with the high-side transistor MH changing from the off state to the on state to make the drive current I HG_ON size changes.

[0139] The second sensor 204 outputs the output voltage V oUT The high-side driver circuit 220 responds to the output change of the second sensor 204 during the second period T2 and shifts to the third period T3. By monitoring the output voltage V oUT , it can be detected that the influence of the reverse recovery characteristics of the freewheeling diode Di of the lower arm 114 is reduced.

[0140] In the driving circuit 200, in order to detect the output voltage V oUT The output voltage V is sometimes set to V OUT Ratio input voltage VI N In this case, by using the voltage monitoring circuit also as the second sensor 204, an increase in the circuit area can be suppressed.

[0141] The third sensor 206 outputs a voltage V OUT The control circuit 210 refers to the output of the third sensor 206 and compares it with the third threshold voltage Vth3 set near the input voltage VIN. OUT When it exceeds Vth3, it shifts to the fourth period T4.

[0142] Next, the configuration and operation of the low-side driving circuit 260 will be described. The low-side driving circuit 260 may be configured similarly to the high-side driving circuit 220 .

[0143] The low-side drive circuit 260 operates in the first mode when a reverse recovery current of the flyback diode of the upper arm 112 can be generated, and operates in the second mode when a reverse recovery current of the flyback diode of the upper arm 112 is not generated.

[0144] Specifically, the low-side drive circuit 260 turns off the high-side transistor MH and the low-side transistor ML, and injects the current I through the freewheeling diode Di of the upper arm 112. OUT Status When the low-side transistor ML is turned on (sinkfall), the operation is performed in the first mode.

[0145] In addition, the low-side driving circuit 260 turns on the high-side transistor MH, turns off the low-side transistor ML, and draws the current I through the high-side transistor MH. OUT In the state where the low-side transistor ML is turned on (source fall: pull-down), the operation is performed in the second mode.

[0146] Next, description will be given of the use of the switch circuit 100. The switch circuit 100 can be suitably used in a drive circuit for a motor.

[0147] Fig.10 1 is a circuit diagram of a motor drive device 300 including the switching circuit 100 according to the embodiment. The motor drive device 300 drives a three-phase motor 302 as a load and controls the rotation state.

[0148] The motor driving device 300 includes a bridge circuit 110 and a driving circuit 200. The bridge circuit 110 is a three-phase inverter having bridge arms of U phase, V phase, and W phase, and each bridge arm of each phase has an upper arm and a lower arm.

[0149] The drive circuit 200 includes a control circuit 210 , high-side drive circuits 220U to 220W, and low-side drive circuits 260U to 260W. The control circuit 210 generates a control signal indicating the state of the six arms constituting the bridge circuit 110 based on the state of the three-phase motor 302 as a load.

[0150] The high-side driving circuits 220U to 220W are configured by the structure of the high-side driving circuit 220 described above. In addition, the low-side driving circuits 260U to 260W are configured by the structure of the low-side driving circuit 260 described above.

[0151] Here, a three-phase motor is taken as an example, but a single-phase motor may also be used. In this case, the bridge circuit 110 is an H bridge circuit.

[0152] Next, the purpose of the motor driving device 300 is described. The motor driving device 300 can be used to control the spindle motor of a hard disk or the lens driving motor of an imaging device. Alternatively, it can be used to drive the driving motor of a printer head or the paper feeding motor. Alternatively, the motor driving device 300 can be used to drive the motor of an electric vehicle, a hybrid vehicle, etc.

[0153] Those skilled in the art should understand that the embodiments are merely illustrative, and that the combinations of the constituent elements and the processing procedures may have various modifications, and such modifications are also within the scope of the present disclosure or the present invention. Such modifications are described below.

[0154] (Variant 1)

[0155] In the implementation, the bridge circuit 110 is composed of discrete components, but is not limited thereto. The bridge circuit 110 may also be integrated into the driving circuit 200 .

[0156] (Variant 2)

[0157] The upper arm 112 and the lower arm 114 may be formed of IGBTs (Insulated Gate Bipolar Transistors).

[0158] (Variant 3)

[0159] In the embodiment, both the high-side driving circuit 220 and the low-side driving circuit 260 can select a plurality of modes, but only one of them may be configured to be capable of mode control.

[0160] (Variant 4)

[0161] The use of the switching circuit 100 is not limited to the motor drive device 300. For example, the switching circuit 100 can be suitably used in a switching regulator (DC / DC converter), various power conversion devices (inverters, converters), an inverter for lighting a discharge lamp, a digital audio amplifier, etc. Therefore, the switching circuit 100 can be used in civil equipment including electronic equipment and home appliances, automobiles and vehicle-mounted parts, industrial vehicles, and industrial machinery.

[0162] The embodiments described using specific terms merely illustrate the principles and applications of the present invention, and various modifications or changes in configuration may be made in the embodiments without departing from the spirit of the present invention defined in the claims.

[0163] (Note)

[0164] The following techniques are disclosed in this specification.

[0165] (Item 1)

[0166] A gate drive circuit is a gate drive circuit for driving a power transistor constituting a switch circuit, comprising:

[0167] a conduction circuit configured to draw current to the gate of the power transistor,

[0168] a cutoff circuit configured to sink current from the gate of the power transistor, and

[0169] A control circuit for controlling the conduction circuit and the cutoff circuit;

[0170] The conduction circuit comprises:

[0171] a first current source configured to generate a first current, the first current being switchable between a first current amount and a second current amount that is smaller than the first current amount,

[0172] a first current mirror circuit having an input node connected to the first current source and a first output node,

[0173] a first switch connected between the first output node of the first current mirror circuit and the gate of the power transistor,

[0174] a second current source generating a second current,

[0175] a second current mirror circuit having an input node connected to the second current source and a first output node, and

[0176] a second switch connected between the first output node of the second current mirror circuit and the gate of the power transistor;

[0177] The control circuit is configured to control the first switch, the second switch, the first current source, and the second current source;

[0178] The control circuit is configured to: in response to an indication of the conduction of the power transistor,

[0179] (i) in a first period, the first current is set to the first current amount, the first switch is turned on, and the second switch is turned off,

[0180] (ii) in a second period, the first current is set to the second current amount, the first switch is turned on, and the second switch is turned off,

[0181] (iii) In the third period, the first switch is turned off and the second switch is turned on.

[0182] (Item 2)

[0183] The gate drive circuit as described in item 1,

[0184] The current supplied to the gate of the power transistor in the third period is larger than the current supplied to the gate of the power transistor in the first period and the second period.

[0185] (Item 3)

[0186] A gate drive circuit as described in item 1 or 2,

[0187] The conduction circuit further includes a third switch connected between the gate of the power transistor and a high-level line generating a high voltage corresponding to the high level of the gate voltage of the power transistor.

[0188] (Item 4)

[0189] A gate drive circuit as described in item 1 or 2,

[0190] The conduction circuit further includes a third switch connected between the first output node of the second current mirror circuit and a high-level line generating a high voltage corresponding to the high level of the gate voltage of the power transistor.

[0191] (Item 5)

[0192] A gate drive circuit as described in any one of items 1 to 4,

[0193] The first current mirror circuit and the second current mirror circuit each further have a second output node;

[0194] The cut-off circuit comprises:

[0195] a third current mirror circuit having an input node connected to the second output node of the first current mirror circuit and an output node,

[0196] a fourth switch connected between the output node of the third current mirror circuit and the gate of the power transistor,

[0197] a fourth current mirror circuit having an input node connected to the second output node of the second current mirror circuit and an output node, and

[0198] A fifth switch is connected between the output node of the fourth current mirror circuit and the gate of the power transistor.

[0199] (Item 6)

[0200] A gate drive circuit as described in any one of items 1 to 5,

[0201] The cutoff circuit further includes a sixth switch connected between the gate of the power transistor and a low-level line generating a low voltage corresponding to a low level of the gate voltage of the power transistor.

[0202] (Item 7)

[0203] The gate drive circuit as described in item 5,

[0204] The cutoff circuit further includes a sixth switch connected between the output node of the fourth current mirror circuit and a low-level line generating a low voltage corresponding to a low level of the gate voltage of the power transistor.

[0205] (Item 8)

[0206] A gate drive circuit as described in any one of items 1 to 7,

[0207] The first current source comprises:

[0208] Output node,

[0209] a first constant current circuit connected to the output node,

[0210] a seventh switch and a second constant current circuit connected in series between the output node and ground, and

[0211] An eighth switch and a third constant current circuit are connected in series between the output of the second constant current circuit and the ground.

[0212] (Item 9)

[0213] A gate drive circuit as described in any one of items 1 to 8,

[0214] The second current source comprises:

[0215] Output node,

[0216] a fourth constant current circuit connected to the output node, and

[0217] The ninth switch and the fifth constant current circuit are connected in series between the output node and the ground.

[0218] (Item 10)

[0219] A gate drive circuit as described in any one of items 1 to 9,

[0220] further comprising a first sensor for comparing a gate-source voltage of the power transistor with a first threshold voltage;

[0221] The control circuit shifts to the second period in response to a change in the output of the first sensor during the first period.

[0222] (Item 11)

[0223] A gate drive circuit as described in any one of items 1 to 10,

[0224] further comprising a second sensor for comparing the output voltage of the switch circuit with a second threshold voltage;

[0225] The control circuit shifts to the third period in response to a change in the output of the second sensor during the second period.

[0226] (Item 12)

[0227] A gate drive circuit as described in item 3 or 4,

[0228] further comprising a third sensor for comparing the output voltage of the switch circuit with a third threshold voltage;

[0229] The control circuit shifts to a fourth period in response to a change in the output of the third sensor during the third period, and turns on the third switch.

[0230] (Item 13)

[0231] A gate drive circuit as described in any one of items 1 to 12,

[0232] It is integrated on a semiconductor substrate.

[0233] (Item 14)

[0234] A motor drive device, comprising:

[0235] A bridge circuit including a high-side transistor and a low-side transistor,

[0236] a high-side driver, which is a gate drive circuit as described in any one of items 1 to 13 for driving the high-side transistor as the power transistor, and

[0237] A low-side driver is a gate drive circuit as described in any one of items 1 to 13, which drives the low-side transistor as the power transistor.

[0238] (Item 15)

[0239] An electronic device comprising:

[0240] Motor, and

[0241] A motor driving device as described in item 14 for driving the motor.

[0242] [Explanation of Reference Numerals]

[0243] 100 switch circuit

[0244] 102 power cord

[0245] 104 output lines

[0246] 106 ground wire

[0247] 110 bridge circuit

[0248] 112 Upper arm

[0249] 114 lower arm

[0250] MH high side transistor

[0251] ML low-side transistor

[0252] Di freewheeling diode

[0253] 200 drive circuit

[0254] 202 No.1 Sensor

[0255] 204 2nd sensor

[0256] 206 3rd sensor

[0257] 208 Low Side Cutoff Sensor

[0258] 210 control circuit

[0259] 220 high side drive circuit

[0260] 260 low side drive circuit

[0261] 300 motor drive

[0262] 302 three-phase motor

[0263] 400 gate drive circuit

[0264] 410 conduction circuit

[0265] 412 high level line

[0266] CS1 1st current source

[0267] CS2 Second current source

[0268] CM1 1st current mirror circuit

[0269] CM2 Second Current Mirror Circuit

[0270] SW1 1st switch

[0271] SW2 2nd switch

[0272] SW3 3rd switch

[0273] 420 cut-off circuit

[0274] CM3 3rd current mirror circuit

[0275] CM4 4th current mirror circuit

[0276] SW4 4th switch

[0277] SW5 5th switch

[0278] SW6 6th switch

[0279] CCS1 1st constant current circuit

[0280] CCS2 Second constant current circuit

[0281] CCS3 3rd constant current circuit

[0282] CCS4 4th constant current circuit

[0283] CCS5 No. 5 Constant Current Circuit

[0284] SW7 7th switch

[0285] SW8 8th switch

[0286] SW9 9th switch.

Claims

1. A gate drive circuit is a gate drive circuit for driving a power transistor constituting a switch circuit, comprising: a conduction circuit configured to draw current to the gate of the power transistor, a cutoff circuit configured to sink current from the gate of the power transistor, and A control circuit for controlling the conduction circuit and the cutoff circuit; The conduction circuit comprises: a first current source configured to generate a first current, the first current being switchable between a first current amount and a second current amount that is smaller than the first current amount, a first current mirror circuit having an input node connected to the first current source and a first output node, a first switch connected between the first output node of the first current mirror circuit and the gate of the power transistor, a second current source generating a second current, a second current mirror circuit having an input node connected to the second current source and a first output node, and a second switch connected between the first output node of the second current mirror circuit and the gate of the power transistor; The control circuit is configured to control the first switch, the second switch, the first current source, and the second current source; The control circuit is configured to: in response to an instruction of turning on the power transistor, (i) in a first period, the first current is set to the first current amount, the first switch is turned on, and the second switch is turned off, (ii) in a second period, the first current is set to the second current amount, the first switch is turned on, and the second switch is turned off, (iii) In the third period, the first switch is turned off and the second switch is turned on.

2. The gate drive circuit according to claim 1, The current supplied to the gate of the power transistor in the third period is larger than the current supplied to the gate of the power transistor in the first period and the second period.

3. The gate drive circuit according to claim 1 or 2, The conduction circuit further includes a third switch connected between the gate of the power transistor and a high-level line generating a high voltage corresponding to the high level of the gate voltage of the power transistor.

4. The gate drive circuit according to claim 1 or 2, The conduction circuit further includes a third switch connected between the first output node of the second current mirror circuit and a high-level line generating a high voltage corresponding to the high level of the gate voltage of the power transistor.

5. The gate drive circuit according to claim 1 or 2, The first current mirror circuit and the second current mirror circuit each further have a second output node; The cut-off circuit comprises: a third current mirror circuit having an input node connected to the second output node of the first current mirror circuit and an output node, a fourth switch connected between the output node of the third current mirror circuit and the gate of the power transistor, a fourth current mirror circuit having an input node connected to the second output node of the second current mirror circuit and an output node, and A fifth switch is connected between the output node of the fourth current mirror circuit and the gate of the power transistor.

6. The gate drive circuit according to claim 1 or 2, The cutoff circuit further includes a sixth switch connected between the gate of the power transistor and a low-level line generating a low voltage corresponding to a low level of the gate voltage of the power transistor.

7. The gate driving circuit according to claim 5, The cutoff circuit further includes a sixth switch connected between the output node of the fourth current mirror circuit and a low-level line generating a low voltage corresponding to a low level of the gate voltage of the power transistor.

8. The gate drive circuit according to claim 1 or 2, The first current source comprises: Output node, a first constant current circuit connected to the output node, a seventh switch and a second constant current circuit connected in series between the output node and ground, and An eighth switch and a third constant current circuit are connected in series between the output of the second constant current circuit and the ground.

9. The gate drive circuit according to claim 1 or 2, The second current source comprises: Output node, a fourth constant current circuit connected to the output node, and The ninth switch and the fifth constant current circuit are connected in series between the output node and the ground.

10. The gate drive circuit according to claim 1 or 2, further comprising a first sensor for comparing a gate-source voltage of the power transistor with a first threshold voltage; The control circuit shifts to the second period in response to a change in the output of the first sensor during the first period.

11. The gate drive circuit according to claim 1 or 2, further comprising a second sensor for comparing the output voltage of the switch circuit with a second threshold voltage; The control circuit shifts to the third period in response to a change in the output of the second sensor during the second period.

12. The gate driving circuit according to claim 3, further comprising a third sensor for comparing the output voltage of the switch circuit with a third threshold voltage; The control circuit shifts to a fourth period in response to a change in the output of the third sensor during the third period, and turns on the third switch.

13. The gate drive circuit according to claim 1 or 2, It is integrated on a semiconductor substrate.

14. A motor drive device comprising: A bridge circuit including a high-side transistor and a low-side transistor, A high-side driver, which is the gate drive circuit according to claim 1 or 2 that drives the high-side transistor as the power transistor, and A low-side driver is the gate drive circuit according to claim 1 or 2, which drives the low-side transistor as the power transistor.

15. An electronic device comprising: Motor, and The motor driving device according to claim 14 drives the motor.

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