A chip configuration method, apparatus, computer device, and storage medium

Abstract

This application relates to a chip configuration method, apparatus, computer device, and storage medium. The method includes: receiving a trigger instruction sent by an external host, the trigger instruction being used to trigger a configuration proxy module; batch acquiring configuration instructions from external memory through the configuration proxy module and storing the configuration instructions in a buffer of the configuration proxy module; reading the configuration instructions one by one from the buffer, the configuration instructions including control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence; and sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of a target module. This method enables the configuration proxy module to acquire and execute control instructions, replacing the processor in performing tedious, fixed, or repetitive functional module configuration work, thus freeing up processor computing power.

Description

Technical Field

[0001] This application relates to the field of chip integration technology, and in particular to a chip configuration method, apparatus, computer device, and storage medium. Background Technology

[0002] In a System-on-Chip (SoC), a processor, bus network, memory, and various peripherals, interfaces, and hardware acceleration modules are typically integrated. When the SoC chip is working, the processor not only undertakes the task of accessing on-chip memory to perform data operations, but also needs to be responsible for global management and precise control of the functions of each module on the chip. This control is usually achieved by the processor accessing the programmable registers of each functional module and configuring them.

[0003] As the number of on-chip functional modules increases and their functions become more complex, the number of programmable registers that the processor needs to configure also increases. This results in the processor consuming more computing power when performing configuration tasks. Furthermore, some functional modules have a large number of programmable registers, but only require batch configuration once after chip startup; other functional modules require configuring multiple different programmable registers sequentially, or waiting for certain state changes along the way, but this configuration process is fixed. Although these configuration tasks are simple and repetitive, they consume a significant amount of the processor's computing power, affecting the execution efficiency of other critical tasks. Summary of the Invention

[0004] Therefore, it is necessary to provide a chip configuration method, apparatus, computer device, and storage medium that can replace the processor in configuring the execution module, in order to address the above-mentioned technical problems.

[0005] On the one hand, a chip configuration method is provided, the method comprising:

[0006] Receive a trigger command sent by an external host, the trigger command being used to trigger the configuration agent module;

[0007] The configuration proxy module retrieves configuration instructions from external storage in batches and stores the configuration instructions in the buffer of the configuration proxy module.

[0008] The configuration instructions are read one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0009] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0010] In one embodiment, before receiving the trigger command sent by the external host, the method further includes:

[0011] Deploy the configuration agent module;

[0012] The external host writes the boot address into the programmable register of the configuration agent module.

[0013] In one embodiment, after reading the configuration instructions one by one from the buffer, the method further includes:

[0014] In response to reading a control instruction from the buffer, the command type of the control instruction is determined, and the command type includes configuration commands, polling commands, and jump commands;

[0015] In response to the control command being a configuration command or a jump command, the number of configuration instructions in the expression sequence is determined according to the control command, and the number of configuration instructions is read sequentially from the buffer.

[0016] In one embodiment, after reading the configuration instructions one by one from the buffer, the method further includes:

[0017] In response to reading an expression instruction from the buffer, the expression type of the expression instruction is determined, and the expression type includes target address, data strobe, permutation strobe, and configuration data;

[0018] In response to the expression instruction being a target address, data strobe, or permutation strobe, the expression instruction is temporarily stored for later use, and the next expression instruction is read from the buffer;

[0019] In response to the expression instruction being configuration data, the configuration data is combined with the data gating or the permutation gating to determine the final configuration data.

[0020] In one embodiment, the step of sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module includes:

[0021] In response to gating configuration of the first target module, a first configuration command, a first target address, a first data gating and first configuration data constitute a first expression sequence, wherein the first data gating is used to indicate the bits that need to be configured in the first configuration data;

[0022] Read the current data value from the first target address, perform a bitwise AND operation between the first data strobe and the current data value, and obtain the first data value.

[0023] Perform a bitwise AND operation between the first data strobe and the first configuration data to obtain the second data value;

[0024] Perform a bitwise OR operation between the first data value and the second data value to obtain the first final configuration data;

[0025] Write the first final configuration data to the first target address to configure the programmable register of the first target module.

[0026] In one embodiment, the step of sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module further includes:

[0027] In response to the permutation configuration of the second target module, the second configuration command, the second target address, the permutation strobe, and the second configuration data constitute a second expression sequence, wherein the permutation strobe is used to indicate the bits in the second configuration data that need to be replaced;

[0028] In response to the presence of multiple permutation gates in the second expression sequence, the values ​​to be permuted corresponding to the multiple permutation gates are sequentially filled into the target buffer from low to high;

[0029] The target buffer number is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number;

[0030] The value to be replaced is sequentially bitwise ANDed with the plurality of permutation gates to obtain the first permutation value;

[0031] The bitwise NOT operation of the permutation gating is then performed with the bitwise AND operation of the second configuration data to obtain the second permutation value;

[0032] Perform a bitwise OR operation between the first permutation value and the second permutation value to obtain the second final configuration data;

[0033] Write the second final configuration data to the second target address to configure the programmable registers of the second target module.

[0034] In one embodiment, the step of determining the command type of the control instruction in response to reading a control instruction from the buffer further includes:

[0035] In response to the control command being a polling command, the polling command, the third target address, the second data gating, and the desired data constitute a third expression sequence;

[0036] The current status value is periodically read from the third target address, and the current status value is compared with the strobe bits of the expected data;

[0037] In response to the current state value not being equal to the strobe bit of the desired data and the maximum number of polling attempts not being reached, the polling process returns after a waiting interval, wherein the maximum number of polling attempts is determined by the polling command.

[0038] The polling ends when the current state value is equal to the strobe bit of the desired data, or when the maximum number of polling iterations is reached.

[0039] On the other hand, a chip configuration apparatus is provided, the apparatus comprising:

[0040] The triggering module is used to receive triggering instructions sent by an external host, and the triggering instructions are used to trigger the configuration agent module;

[0041] A caching module is used to retrieve configuration instructions from external storage in batches through the configuration proxy module and store the configuration instructions in the buffer of the configuration proxy module;

[0042] The acquisition module is used to read the configuration instructions one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0043] An execution module is used to execute the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

[0044] In another aspect, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0045] Receive a trigger command sent by an external host, the trigger command being used to trigger the configuration agent module;

[0046] The configuration proxy module retrieves configuration instructions from external storage in batches and stores the configuration instructions in the buffer of the configuration proxy module.

[0047] The configuration instructions are read one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0048] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0049] In another aspect, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, performs the following steps:

[0050] Receive a trigger command sent by an external host, the trigger command being used to trigger the configuration agent module;

[0051] The configuration proxy module retrieves configuration instructions from external storage in batches and stores the configuration instructions in the buffer of the configuration proxy module.

[0052] The configuration instructions are read one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0053] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0054] The aforementioned chip configuration method, apparatus, computer equipment, and storage medium, through the configuration agent module, obtain and execute control instructions, extract the configuration intent and calculated configuration values ​​of the external host, and send them sequentially to the target modules to complete the configuration of the programmable registers of each target module. This can be executed in a pipelined manner to improve the configuration speed, replace the chip processor in performing tedious, fixed, or repetitive functional module configuration work, and free up processor computing power. Attached Figure Description

[0055] Figure 1 This is a flowchart illustrating a chip configuration method in one embodiment;

[0056] Figure 2 This is a schematic diagram of the configuration of the proxy module in one embodiment;

[0057] Figure 3 This is a schematic diagram of the configuration flow of a chip configuration method in one embodiment;

[0058] Figure 4 This is a schematic diagram of the structure of the expressed sequence in one embodiment;

[0059] Figure 5 This is a schematic diagram of the configuration pair structure in a typical configuration scenario of one embodiment;

[0060] Figure 6 This is a schematic diagram of the configuration pair structure for a gated configuration scenario in one embodiment;

[0061] Figure 7 This is a schematic diagram of the configuration pair structure in a permutation configuration scenario of one embodiment;

[0062] Figure 8 This is a schematic diagram of the configuration pair structure in a compressed permutation configuration scenario of one embodiment;

[0063] Figure 9 This is a schematic diagram of the configuration pair structure for a state polling scenario in one embodiment;

[0064] Figure 10 This is a schematic diagram of multiple configuration pairs in a continuously configured scenario in one embodiment;

[0065] Figure 11 This is a structural block diagram of a chip configuration device in one embodiment;

[0066] Figure 12 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0067] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0068] In one embodiment, such as Figure 1-3 As shown, a chip configuration method is provided, including the following steps:

[0069] Step S1: Receive a trigger command sent by an external host. The trigger command is used to trigger the configuration agent module.

[0070] In one embodiment, before receiving the trigger instruction sent by the external host, the method further includes: deploying the configuration agent module; and writing the startup address into the programmable register of the configuration agent module through the external host.

[0071] Specifically, the configuration agent module is triggered by an external host (e.g., a processor), actively retrieving and executing configuration instructions from memory to control and monitor various programmable registers of different functional modules. The configuration instructions in memory support various configuration methods, including full-word configuration, strobed configuration, random configuration, continuous configuration, and status polling, catering to diverse operating scenarios. The configuration agent module comprises:

[0072] Trigger APB Slave: An external host (e.g., a processor) configures the programmable registers of the trigger APB slave to start the configuration agent module to perform a series of configuration actions, including instruction fetching, instruction analysis, instruction scheduling, instruction expression, and finally configuring the programmable registers of the destination module.

[0073] Fetch AXI Master: After obtaining the start address given by the external host, starting from that address, the agent module is configured as the host to retrieve a batch of data from the external storage through the AXI host interface. Each 32-bit data is used as an instruction.

[0074] Configuration Instructions Buffer: In order to reduce the time to retrieve configuration instructions from external memory, the configuration agent module uses burst transmission for instruction fetching, that is, a batch of instructions will be read back in one read command. The batch of instructions read back is temporarily stored in the internal buffer of the configuration agent module and will be retrieved and processed one by one in subsequent links.

[0075] Sequencer: The core control module of the configuration agent module. It retrieves configuration commands one by one from the buffer, identifies the command type, calculates the final configuration data, assembles the configuration sequence, starts polling, and issues configuration access.

[0076] Configure AXI-Lite Master: Controlled by the sequence controller, it uses the AXI-Lite protocol to access the programmable registers of the destination function module and perform write or read operations.

[0077] Based on the above steps, deploying a configuration agent module can replace the chip processor in performing tedious, fixed, or repetitive functional module configuration tasks, thereby freeing up processor capabilities.

[0078] Step S2: The configuration agent module acquires configuration instructions from the external memory in batches and stores the configuration instructions in the buffer of the configuration agent module.

[0079] like Figure 3 As shown, this is a configuration stream of the configuration agent module. The external host (e.g., the processor) writes the address of the first configuration instruction into the programmable register of the configuration agent module. Based on this, the configuration agent module starts a configuration stream operation, retrieves configuration instructions in batches from the instruction storage address, temporarily stores them in the internal buffer, and then reads and executes the instructions sequentially from the buffer through the sequence controller, ultimately forming a series of AXI read and write operations reflected on the configuration AXI-Lite host.

[0080] like Figure 4 As shown, the configuration instructions used by the configuration agent module have a width of 32 bits. Based on their impact on the configuration process, they can be divided into control instructions that affect process scheduling and expression instructions that only affect the final configuration. Control instructions include control commands, while expression instructions include target addresses, data strobes, substitution strobes, and configuration data. Data strobes, substitution strobes, and configuration data can all use the full 32-bit width. Each control instruction, along with a specified number of subsequent expression instructions, forms an expression sequence. A target address and a set of expression instructions that define the configuration data together constitute a configuration pair.

[0081] The control command (CMD) is used to manage the configuration process and identify subsequent instruction types. The functions of its various bit fields are shown in Table 1. The target address (ADDR) is the address information of a configuration pair. The data strobe (STRB) indicates which bits in the configuration data need to be configured by a high logic and which bits in the original data of the target address need to be kept in their original values ​​by a low logic. The replacement strobe (REPL) indicates which bits in the configuration data need to be replaced with additional data received from the external host from the configuration agent module, rather than configuration instructions, by a high logic. The configuration data (DATA) is the 32-bit original data to be configured to the target address. This data is not the final value that can be implemented at the target address; it still needs to be strobed and replaced.

[0082] Table 1 Bit-field Functions of Control Commands

[0083]

[0084]

[0085] Step S3: Read the configuration instructions one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0086] In one embodiment, after reading the configuration instructions one by one from the buffer, the method further includes: in response to reading a control instruction from the buffer, determining the command type of the control instruction, the command type including configuration commands, polling commands, and jump commands; in response to the control instruction being a configuration command or a jump command, determining the configuration number of expression instructions in the expression sequence according to the control instruction, and sequentially reading the configuration number of expression instructions from the buffer.

[0087] As shown in Table 1, the control commands include configuration commands, polling commands, and jump commands, identified by bits [31:30] of the instruction. A control command is generally followed by several expression instructions, the number of which is identified by bits [15:0] of the control command. After processing the expression instructions for the configured quantity, the configuration agent module will identify the next instruction as a control command.

[0088] For example, the configuration pair format in a typical configuration scenario is as follows: Figure 5As shown, the type is determined by analyzing the control instructions. Instruction bit[31:30] is 2'b01, indicating that the instruction is a configuration command; instruction bit

[29] is 0, indicating that the configuration data will be completely written to the target address; instruction bit

[28] is 0, indicating that it is a non-contiguous configuration, and each subsequent configuration pair needs to provide the target address independently; instruction bit

[27] is 0, indicating that the configuration data does not need to be modified; instruction bit[15:0] specifies how many configuration pairs follow this control instruction, and each configuration pair contains two instructions: the target address and the configuration data.

[0089] Based on the above steps, the types and number of instructions included in the configuration pair vary depending on the configuration scenario. By intelligently identifying different instruction types and executing corresponding operations, and by obtaining the configuration quantity of the expression instructions through control instructions, the complexity of instruction processing can be reduced, configuration efficiency can be improved, and different configuration scenarios can be adapted.

[0090] In one embodiment, after reading the configuration instructions one by one from the buffer, the method further includes: in response to reading an expression instruction from the buffer, determining the expression type of the expression instruction, wherein the expression type includes a target address, a data strobe, a permutation strobe, and configuration data; in response to the expression instruction being a target address, a data strobe, or a permutation strobe, temporarily storing the expression instruction for later use, and reading the next expression instruction from the buffer; and in response to the expression instruction being configuration data, combining the configuration data with the data strobe or the permutation strobe to determine the final configuration data.

[0091] Based on the above steps, different configuration scenarios can be flexibly handled through various expression commands, and different processing operations can be performed according to the command type to obtain the final configuration data, ensuring the accuracy of the configuration task while reducing resource consumption.

[0092] Step S4: Execute the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

[0093] In one embodiment, the step of sequentially executing configuration instructions in the expression sequence to configure the programmable register of the target module includes: in response to strobe configuration of the first target module, a first configuration command, a first target address, a first data strobe, and first configuration data constitute a first expression sequence, wherein the first data strobe is used to indicate the bits that need to be configured in the first configuration data; reading the current data value from the first target address; performing a bitwise AND operation between the first data strobe and the current data value after bitwise NOT operation to obtain a first data value; performing a bitwise AND operation between the first data strobe and the first configuration data to obtain a second data value; performing a bitwise OR operation between the first data value and the second data value to obtain first final configuration data; and writing the first final configuration data to the first target address to configure the programmable register of the first target module.

[0094] For example, the configuration pair format in the gating configuration scenario is as follows: Figure 6 As shown, there are three instructions: the first target address, the first data strobe, and the first configuration data. Each bit in the first data strobe instruction indicates whether the corresponding bit of the subsequent configuration data needs to be configured; a high logic value indicates that it needs to be configured, and a low logic value indicates that it does not need to be configured. For the read control instructions, instruction bits [31:30] are 2'b01, indicating that the instruction is a configuration command; instruction bit

[29] is 1, indicating that the configuration data needs to be strobed before it can be written to the target address; instruction bit

[28] is 0, indicating that it is a non-contiguous configuration, and each subsequent configuration pair needs to provide a target address independently; instruction bit

[27] is 0, indicating that the configuration data does not need to be modified; instruction bits [15:0] specify how many configuration pairs follow this control instruction.

[0095] After the configuration agent module obtains the first data strobe (denoted as strobe), it reads the current data value (denoted as rd_data) from the first target address, performs a bitwise AND operation with the data after the first data strobe is bitwise NOTed, and thus filters out the part that remains unchanged after configuration; after obtaining the first configuration data (denoted as cfg_data), it performs a bitwise AND operation with the first data strobe and the first configuration data, and then performs a bitwise OR operation with the current data value after the above filtering, to obtain the first final configuration data to be written to the first target address: wr_data = (rd_data & (~strobe)) | (cfg_data & strobe).

[0096] Based on the above steps, by using data strobe instructions, it is possible to flexibly control which bits need to be configured and which bits need to remain unchanged, rather than configuring the entire data field. Therefore, the number of configuration instructions that need to be sent can be reduced, the configuration process can be simplified, and the flexibility and accuracy of configuration can be improved.

[0097] In one embodiment, the step of sequentially executing configuration instructions in the expression sequence to configure the programmable registers of the target module further includes: in response to performing a permutation configuration on the second target module, a second expression sequence is formed by a second configuration command, a second target address, a permutation strobe, and second configuration data, wherein the permutation strobe is used to indicate the bits in the second configuration data that need to be replaced; in response to the existence of multiple permutation strobes in the second expression sequence, the values ​​to be replaced corresponding to the multiple permutation strobes are sequentially filled into a target buffer from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is sequentially bitwise ANDed with the multiple permutation strobes to obtain a first permutation value; the permutation strobe is bitwise NOTed and then bitwise ANDed with the second configuration data to obtain a second permutation value; the first permutation value and the second permutation value are bitwise ORed to obtain second final configuration data; and the second final configuration data is written to the second target address to configure the programmable registers of the second target module.

[0098] For example, the configuration pair format in the replacement configuration scenario is as follows: Figure 7 As shown, there are three instructions: the second target address, the permutation strobe, and the second configuration data. If data strobe is also required, it should appear before the permutation strobe. There are a total of four commands for the configuration pair. For the read control instructions, instruction bits [31:30] are 2'b01, indicating that the instruction is a configuration command; instruction bit

[29] is 0, indicating that the configuration data will be completely written to the target address; instruction bit

[28] is 0, indicating non-contiguous configuration, meaning that each subsequent configuration pair needs to provide the target address independently; instruction bit

[27] is 1, indicating that the configuration data needs to be modified; instruction bits [15:0] specify how many configuration pairs follow this control instruction.

[0099] The configuration agent module needs to prepare several buffers for the configuration stream. When replacing the configuration, it retrieves a replacement value (denoted as replace) from the corresponding buffer according to the buffer number specified by the command bit[23:20] at the beginning of the expression sequence. After obtaining the replacement strobe (denoted as rep_strobe) and the second configuration data (denoted as cfg_data), the replacement value filtered by the replacement strobe is replaced with the corresponding bit of the second configuration data to obtain the second final configuration data wr_data = (cfg_data&(~rep_strobe))|(replace&rep_strobe) to be written to the second target address.

[0100] Furthermore, the replacement source during replacement configuration comes from the buffer in the configuration agent module, and the data in this buffer is also obtained from the external host. Therefore, each replacement configuration needs to obtain a 32-bit value to be replaced from the buffer as the replacement source (buffer). When there are multiple replacement configuration requirements, the external host needs to send the required replacement source data multiple times.

[0101] like Figure 8 As shown, permutation strobe 1 requires only 4 bits (bits [3:0]), permutation strobe 2 requires only 3 bits (bits [0] and [27:26]), and permutation strobe 3 requires only 4 bits (bits [19:16]). Under the conventional permutation method, the above three permutation configurations, totaling 11 bits of permutation source data, require the external host to send three write operations to the configuration agent module, occupying three buffer slots. This contradicts the goal of reducing the configuration work of the external host. Therefore, compressed permutation can be achieved through the configuration agent module, that is, the valid permutation source data required for multiple permutation strobes in the sequence are sequentially filled into the same buffer slot from low to high, leaving no invalid bits.

[0102] Based on the above steps, by using permutation configuration and compressed permutation configuration, multiple data used for permutation can be compressed by eliminating invalid bits and concatenating them. This allows for flexible modification of part of the bit range of each configuration value in each configuration sequence with the fewest possible processor configurations, thereby reducing the number of processor configurations.

[0103] In one embodiment, the step of determining the command type of the control instruction in response to reading a control instruction from the buffer further includes: in response to the control instruction being a polling command, wherein the polling command, a third target address, a second data strobe, and expected data constitute a third expression sequence; periodically reading the current state value from the third target address and comparing the current state value with the strobe bits of the expected data; in response to the current state value not being equal to the strobe bits of the expected data and the maximum number of polling attempts not being reached, returning to polling after a waiting interval, wherein the maximum number of polling attempts is determined by the polling command; and in response to the current state value being equal to the strobe bits of the expected data, or the maximum number of polling attempts being reached, polling ends.

[0104] For example, the configuration pair format in a state polling scenario is as follows: Figure 9As shown, it includes a third target address, a second data strobe, and expected data, where the third target address is the target address for status query. For the read control instructions, instruction bits [31:30] are 2'b10, indicating that the instruction is a polling command; instruction bit

[29] indicates whether the read current status value needs to be filtered; instruction bit

[28] is invalid; instruction bit

[25] indicates whether to terminate the entire configuration stream after polling timeout failure; instruction bits [23:20] indicate which buffer the read current status value should be temporarily stored in; instruction bits [19:16] indicate how many device clock cycles the polling interval is; instruction bits [15:0] indicate the maximum number of polling times.

[0105] The configuration proxy module will periodically read the current status value (denoted as rd_data) from the third target address. It will compare the strobe bits of the current status value and the expected data (denoted as targ_data). If they are equal, the polling ends; otherwise, if they are not equal and the maximum number of polling times has not been reached, it will wait for the polling interval before continuing to query. Finally, the polling success rate is determined by pass = ((rd_data&strobe) == (targ_data&strobe)).

[0106] Furthermore, in response to successful polling, the polling status value is stored in the buffer according to the buffer position selected by instruction bit[23:20] in the polling command; the polling status value is extracted from the buffer as configuration data for the replacement configuration; according to the replacement configuration instruction, the value to be replaced is obtained from the selected buffer position, and the value to be replaced after replacement gating is replaced in the corresponding bit of the polling status value, thereby realizing the write-back of the polling status value.

[0107] Preferably, by default, the configuration command will not be blocked by the preceding polling command in the same expression sequence. However, when bits [19:16] of the configuration command are non-zero (e.g., N), the configuration command will be affected by the Nth polling state preceding it, and the configuration command and its configuration sequence can only continue to be executed after the Nth polling state preceding it has been completed.

[0108] Preferably, such as Figure 10 As shown, in order to reduce the storage footprint of configuration instructions, the target address can be provided only in the first configuration pair of the expression sequence. The target address of subsequent configuration pairs will be incremented by the configuration agent module. If there are addresses that need to be skipped in the middle, a 32-bit all-1 identifier is used to achieve continuous configuration.

[0109] Based on the above steps, by using polling commands, read operations on the target address are automatically initiated at regular intervals, and the specified bit range of the read results is compared with the expected value, which can realize automatic status query. Furthermore, by combining polling commands with replacement configuration, status write-back can also be achieved.

[0110] It should be understood that, although Figure 2-3 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 2-3 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0111] In one embodiment, such as Figure 11 As shown, a chip configuration device is provided, including: a trigger module, a cache module, an acquisition module, and an execution module, wherein:

[0112] The triggering module is used to receive triggering instructions sent by an external host, and the triggering instructions are used to trigger the configuration agent module;

[0113] A caching module is used to retrieve configuration instructions from external storage in batches through the configuration proxy module and store the configuration instructions in the buffer of the configuration proxy module;

[0114] The acquisition module is used to read the configuration instructions one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0115] An execution module is used to execute the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

[0116] In one embodiment, a deployment module is further included, which is used to deploy the configuration agent module and write the startup address into the programmable register of the configuration agent module through the external host.

[0117] In one embodiment, the system further includes an analysis module, which is configured to, in response to reading a control instruction from the buffer, determine the command type of the control instruction, the command type including configuration commands, polling commands, and jump commands; in response to the control instruction being a configuration command or a jump command, determine the number of configuration instructions in the expression sequence based on the control instruction, and sequentially read the number of configuration instructions from the buffer.

[0118] In one embodiment, the analysis module is further configured to, in response to reading an expression instruction from the buffer, determine the expression type of the expression instruction, the expression type including target address, data strobe, permutation strobe, and configuration data; in response to the expression instruction being a target address, data strobe, or permutation strobe, temporarily store the expression instruction for later use and read the next expression instruction from the buffer; and in response to the expression instruction being configuration data, combine the configuration data with the data strobe or the permutation strobe to determine the final configuration data.

[0119] In one embodiment, the execution module is further configured to, in response to gating and configuring a first target module, form a first expression sequence consisting of a first configuration command, a first target address, a first data gating, and first configuration data, wherein the first data gating is used to indicate the bits that need to be configured in the first configuration data; read the current data value from the first target address; perform a bitwise AND operation between the first data gating and the current data value after bitwise NOT operation to obtain a first data value; perform a bitwise AND operation between the first data gating and the first configuration data to obtain a second data value; perform a bitwise OR operation between the first data value and the second data value to obtain first final configuration data; and write the first final configuration data to the first target address to configure the programmable register of the first target module.

[0120] In one embodiment, the execution module is further configured to, in response to performing a permutation configuration on the second target module, form a second expression sequence consisting of a second configuration command, a second target address, a permutation strobe, and second configuration data, wherein the permutation strobe is used to indicate the bits in the second configuration data that need to be replaced; in response to the existence of multiple permutation strobes in the second expression sequence, fill the target buffer with the values ​​to be replaced corresponding to the multiple permutation strobes in ascending order; obtain the number of the target buffer through the second configuration command, and obtain the value to be replaced from the target buffer according to the number; perform a bitwise AND operation on the value to be replaced with the multiple permutation strobes in sequence to obtain a first permutation value; perform a bitwise NOT operation on the permutation strobe and then perform a bitwise AND operation on the second configuration data to obtain a second permutation value; perform a bitwise OR operation on the first permutation value and the second permutation value to obtain second final configuration data; and write the second final configuration data to the second target address to configure the programmable register of the second target module.

[0121] In one embodiment, the analysis module is further configured to: respond to the control command being a polling command, wherein the polling command, the third target address, the second data strobe, and the desired data constitute a third expression sequence; periodically read the current state value from the third target address and compare the current state value with the strobe bit of the desired data; respond to the current state value not being equal to the strobe bit of the desired data and the maximum polling count not being reached, return to polling after a waiting interval, wherein the maximum polling count is determined by the polling command; and respond to the current state value being equal to the strobe bit of the desired data, or the maximum polling count being reached, end polling.

[0122] Specific limitations regarding the chip configuration device can be found in the limitations of the chip configuration method described above, and will not be repeated here. Each module in the aforementioned chip configuration device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in hardware or independently of the processor in the computer device, or stored in software in the memory of the computer device, so that the processor can call and execute the operations corresponding to each module.

[0123] In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 12 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores control instruction data. The network interface communicates with external terminals via a network connection. When the computer program is executed by the processor, it implements a chip configuration method.

[0124] Those skilled in the art will understand that Figure 12 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0125] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to perform the following steps:

[0126] Receive a trigger command sent by an external host, the trigger command being used to trigger the configuration agent module;

[0127] The configuration proxy module retrieves configuration instructions from external storage in batches and stores the configuration instructions in the buffer of the configuration proxy module.

[0128] The configuration instructions are read one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0129] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0130] In one embodiment, when the processor executes a computer program, it further performs the following steps: deploying the configuration agent module; and writing the boot address into the programmable register of the configuration agent module via the external host.

[0131] In one embodiment, when the processor executes a computer program, it further performs the following steps: in response to reading a control instruction from the buffer, determining the command type of the control instruction, the command type including configuration commands, polling commands, and jump commands; in response to the control instruction being a configuration command or a jump command, determining the number of configuration instructions in the expression sequence according to the control instruction, and sequentially reading the number of configuration instructions from the buffer.

[0132] In one embodiment, when the processor executes a computer program, it further performs the following steps: in response to reading an expression instruction from the buffer, determining the expression type of the expression instruction, the expression type including a target address, a data strobe, a permutation strobe, and configuration data; in response to the expression instruction being a target address, a data strobe, or a permutation strobe, temporarily storing the expression instruction for later use, and reading the next expression instruction from the buffer; in response to the expression instruction being configuration data, combining the configuration data with the data strobe or the permutation strobe to determine the final configuration data.

[0133] In one embodiment, when the processor executes the computer program, it further implements the following steps: in response to strobe configuration of a first target module, a first configuration command, a first target address, a first data strobe, and first configuration data constitute a first expression sequence, wherein the first data strobe is used to indicate the bits that need to be configured in the first configuration data; read the current data value from the first target address; perform a bitwise AND operation between the first data strobe and the current data value after bitwise NOT operation to obtain a first data value; perform a bitwise AND operation between the first data strobe and the first configuration data to obtain a second data value; perform a bitwise OR operation between the first data value and the second data value to obtain first final configuration data; and write the first final configuration data to the first target address to configure the programmable register of the first target module.

[0134] In one embodiment, when the processor executes the computer program, it further implements the following steps: in response to permutation configuration of the second target module, a second configuration command, a second target address, a permutation strobe, and second configuration data constitute a second expression sequence, wherein the permutation strobe is used to indicate the bits in the second configuration data that need to be replaced; in response to the existence of multiple permutation strobes in the second expression sequence, the values ​​to be replaced corresponding to the multiple permutation strobes are sequentially filled into a target buffer from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is sequentially bitwise ANDed with the multiple permutation strobes to obtain a first permutation value; the permutation strobe is bitwise NOTed and then bitwise ANDed with the second configuration data to obtain a second permutation value; the first permutation value and the second permutation value are bitwise ORed to obtain second final configuration data; the second final configuration data is written to the second target address to configure the programmable register of the second target module.

[0135] In one embodiment, when the processor executes the computer program, it further performs the following steps: in response to the control instruction being a polling command, wherein the polling command, a third target address, a second data strobe, and desired data constitute a third expression sequence; periodically reading the current state value from the third target address and comparing the current state value with the strobe bit of the desired data; in response to the current state value not being equal to the strobe bit of the desired data and the maximum number of polling attempts not being reached, returning to polling after a waiting interval, wherein the maximum number of polling attempts is determined by the polling command; and in response to the current state value being equal to the strobe bit of the desired data, or the maximum number of polling attempts being reached, polling ends.

[0136] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon, the computer program performing the following steps when executed by a processor:

[0137] Receive a trigger command sent by an external host, the trigger command being used to trigger the configuration agent module;

[0138] The configuration proxy module retrieves configuration instructions from external storage in batches and stores the configuration instructions in the buffer of the configuration proxy module.

[0139] The configuration instructions are read one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0140] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0141] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: deploying the configuration agent module; and writing the boot address into the programmable register of the configuration agent module via the external host.

[0142] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: in response to reading a control instruction from the buffer, determining the command type of the control instruction, the command type including configuration commands, polling commands, and jump commands; in response to the control instruction being a configuration command or a jump command, determining the configuration number of expression instructions in the expression sequence according to the control instruction, and sequentially reading the configuration number of expression instructions from the buffer.

[0143] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: in response to reading an expression instruction from the buffer, determining the expression type of the expression instruction, the expression type including a target address, a data strobe, a permutation strobe, and configuration data; in response to the expression instruction being a target address, a data strobe, or a permutation strobe, temporarily storing the expression instruction for later use, and reading the next expression instruction from the buffer; in response to the expression instruction being configuration data, combining the configuration data with the data strobe or the permutation strobe to determine the final configuration data.

[0144] In one embodiment, when the computer program is executed by a processor, it further implements the following steps: in response to strobe configuration of a first target module, a first configuration command, a first target address, a first data strobe, and first configuration data constitute a first expression sequence, wherein the first data strobe is used to indicate the bits that need to be configured in the first configuration data; read the current data value from the first target address; perform a bitwise AND operation between the first data strobe and the current data value after bitwise NOT operation to obtain a first data value; perform a bitwise AND operation between the first data strobe and the first configuration data to obtain a second data value; perform a bitwise OR operation between the first data value and the second data value to obtain first final configuration data; and write the first final configuration data to the first target address to configure the programmable register of the first target module.

[0145] In one embodiment, when the computer program is executed by the processor, it further implements the following steps: in response to the permutation configuration of the second target module, a second configuration command, a second target address, a permutation strobe, and second configuration data constitute a second expression sequence, wherein the permutation strobe is used to indicate the bits in the second configuration data that need to be replaced; in response to the existence of multiple permutation strobes in the second expression sequence, the values ​​to be replaced corresponding to the multiple permutation strobes are sequentially filled into a target buffer from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is sequentially bitwise ANDed with the multiple permutation strobes to obtain a first permutation value; the permutation strobe is bitwise NOTed and then bitwise ANDed with the second configuration data to obtain a second permutation value; the first permutation value and the second permutation value are bitwise ORed to obtain second final configuration data; the second final configuration data is written to the second target address to configure the programmable register of the second target module.

[0146] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: in response to the control instruction being a polling command, wherein the polling command, a third target address, a second data strobe, and desired data constitute a third expression sequence; periodically reading the current state value from the third target address and comparing the current state value with the strobe bit of the desired data; in response to the current state value not being equal to the strobe bit of the desired data and the maximum number of polling attempts not being reached, returning to polling after a waiting interval, wherein the maximum number of polling attempts is determined by the polling command; and in response to the current state value being equal to the strobe bit of the desired data, or the maximum number of polling attempts being reached, polling ends.

[0147] In one embodiment, a computer product is provided that stores a computer program, which, when executed by a processor, performs the following steps:

[0148] Receive a trigger command sent by an external host, the trigger command being used to trigger the configuration agent module;

[0149] The configuration proxy module retrieves configuration instructions from external storage in batches and stores the configuration instructions in the buffer of the configuration proxy module.

[0150] The configuration instructions are read one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence.

[0151] The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module.

[0152] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: deploying the configuration agent module; and writing the boot address into the programmable register of the configuration agent module via the external host.

[0153] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: in response to reading a control instruction from the buffer, determining the command type of the control instruction, the command type including configuration commands, polling commands, and jump commands; in response to the control instruction being a configuration command or a jump command, determining the configuration number of expression instructions in the expression sequence according to the control instruction, and sequentially reading the configuration number of expression instructions from the buffer.

[0154] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: in response to reading an expression instruction from the buffer, determining the expression type of the expression instruction, the expression type including a target address, a data strobe, a permutation strobe, and configuration data; in response to the expression instruction being a target address, a data strobe, or a permutation strobe, temporarily storing the expression instruction for later use, and reading the next expression instruction from the buffer; in response to the expression instruction being configuration data, combining the configuration data with the data strobe or the permutation strobe to determine the final configuration data.

[0155] In one embodiment, when the computer program is executed by a processor, it further implements the following steps: in response to strobe configuration of a first target module, a first configuration command, a first target address, a first data strobe, and first configuration data constitute a first expression sequence, wherein the first data strobe is used to indicate the bits that need to be configured in the first configuration data; read the current data value from the first target address; perform a bitwise AND operation between the first data strobe and the current data value after bitwise NOT operation to obtain a first data value; perform a bitwise AND operation between the first data strobe and the first configuration data to obtain a second data value; perform a bitwise OR operation between the first data value and the second data value to obtain first final configuration data; and write the first final configuration data to the first target address to configure the programmable register of the first target module.

[0156] In one embodiment, when the computer program is executed by the processor, it further implements the following steps: in response to the permutation configuration of the second target module, a second configuration command, a second target address, a permutation strobe, and second configuration data constitute a second expression sequence, wherein the permutation strobe is used to indicate the bits in the second configuration data that need to be replaced; in response to the existence of multiple permutation strobes in the second expression sequence, the values ​​to be replaced corresponding to the multiple permutation strobes are sequentially filled into a target buffer from low to high; the number of the target buffer is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; the value to be replaced is sequentially bitwise ANDed with the multiple permutation strobes to obtain a first permutation value; the permutation strobe is bitwise NOTed and then bitwise ANDed with the second configuration data to obtain a second permutation value; the first permutation value and the second permutation value are bitwise ORed to obtain second final configuration data; the second final configuration data is written to the second target address to configure the programmable register of the second target module.

[0157] In one embodiment, when the computer program is executed by the processor, it further performs the following steps: in response to the control instruction being a polling command, wherein the polling command, a third target address, a second data strobe, and desired data constitute a third expression sequence; periodically reading the current state value from the third target address and comparing the current state value with the strobe bit of the desired data; in response to the current state value not being equal to the strobe bit of the desired data and the maximum number of polling attempts not being reached, returning to polling after a waiting interval, wherein the maximum number of polling attempts is determined by the polling command; and in response to the current state value being equal to the strobe bit of the desired data, or the maximum number of polling attempts being reached, polling ends.

[0158] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0159] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0160] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A chip configuration method, characterized in that, include: Receive a trigger command sent by an external host, the trigger command being used to trigger the configuration agent module; The configuration proxy module retrieves configuration instructions from external storage in batches and stores the configuration instructions in the buffer of the configuration proxy module. The configuration instructions are read one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence. The configuration instructions in the expression sequence are executed sequentially to configure the programmable registers of the target module; After reading the configuration instructions one by one from the buffer, the process also includes: In response to reading an expression instruction from the buffer, the expression type of the expression instruction is determined, and the expression type includes target address, data strobe, permutation strobe, and configuration data; In response to the expression instruction being a target address, data strobe, or permutation strobe, the expression instruction is temporarily stored for later use, and the next expression instruction is read from the buffer; In response to the expression instruction being configuration data, the configuration data is combined with the data gating or the permutation gating to determine the final configuration data; The step of sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module includes: In response to gating configuration of the first target module, a first configuration command, a first target address, a first data gating and first configuration data constitute a first expression sequence, wherein the first data gating is used to indicate the bits that need to be configured in the first configuration data; Read the current data value from the first target address, perform a bitwise AND operation between the first data strobe and the current data value, and obtain the first data value. Perform a bitwise AND operation between the first data strobe and the first configuration data to obtain the second data value; Perform a bitwise OR operation between the first data value and the second data value to obtain the first final configuration data; Write the first final configuration data to the first target address to configure the programmable register of the first target module.

2. The chip configuration method according to claim 1, characterized in that, Before receiving the trigger command sent by the external host, the method further includes: Deploy the configuration agent module; The external host writes the boot address into the programmable register of the configuration agent module.

3. The chip configuration method according to claim 1, characterized in that, After reading the configuration instructions one by one from the buffer, the method further includes: In response to reading a control instruction from the buffer, the command type of the control instruction is determined, and the command type includes configuration commands, polling commands, and jump commands; In response to the control command being a configuration command or a jump command, the number of configuration instructions in the expression sequence is determined according to the control command, and the number of configuration instructions is read sequentially from the buffer.

4. The chip configuration method according to claim 1, characterized in that, The step of sequentially executing the configuration instructions in the expression sequence to configure the programmable registers of the target module further includes: In response to the permutation configuration of the second target module, a second configuration command, a second target address, a permutation strobe, and second configuration data constitute a second expression sequence, wherein the permutation strobe is used to indicate the bits in the second configuration data that need to be replaced; In response to the presence of multiple permutation gates in the second expression sequence, the values ​​to be permuted corresponding to the multiple permutation gates are sequentially filled into the target buffer from low to high; The target buffer number is obtained through the second configuration command, and the value to be replaced is obtained from the target buffer according to the number; The value to be replaced is sequentially bitwise ANDed with the plurality of permutation gates to obtain the first permutation value; The bitwise NOT operation of the permutation gating is then performed with the bitwise AND operation of the second configuration data to obtain the second permutation value; Perform a bitwise OR operation between the first permutation value and the second permutation value to obtain the second final configuration data; Write the second final configuration data to the second target address to configure the programmable registers of the second target module.

5. The chip configuration method according to claim 1, characterized in that, The step of responding to reading a control instruction from the buffer and determining the command type of the control instruction further includes: In response to the control command being a polling command, the polling command, the third target address, the second data gating, and the desired data constitute a third expression sequence; The current status value is periodically read from the third target address, and the current status value is compared with the strobe bits of the expected data; In response to the current state value not being equal to the strobe bit of the desired data and the maximum number of polling attempts not being reached, the polling process returns after a waiting interval, wherein the maximum number of polling attempts is determined by the polling command. The polling ends when the current state value is equal to the strobe bit of the desired data, or when the maximum number of polling iterations is reached.

6. A chip configuration apparatus for implementing the chip configuration method as described in any one of claims 1 to 5, characterized in that, The device includes: The triggering module is used to receive triggering instructions sent by an external host, and the triggering instructions are used to trigger the configuration agent module; A caching module is used to retrieve configuration instructions from external storage in batches through the configuration proxy module and store the configuration instructions in the buffer of the configuration proxy module; The acquisition module is used to read the configuration instructions one by one from the buffer. The configuration instructions include control instructions and expression instructions, wherein one control instruction and several expression instructions form an expression sequence. An execution module is used to execute the configuration instructions in the expression sequence in sequence to configure the programmable registers of the target module.

7. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 5.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 5.

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