Communication method, related apparatus, and storage medium

By triggering the CPU to perform page scheduling and update the page table mapping in the PCIe system by the RC, the problem of multiple interactions when the EP accesses the IOVA is solved, achieving more efficient address translation and reducing resource consumption and latency.

CN121000699BActive Publication Date: 2026-01-06ZHONGHAO XINYING (HANGZHOU) TECHNOLOGY CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202511510844.5
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-10-22
Publication Date
2026-01-06
Estimated Expiration
2045-10-22

AI Technical Summary

Technical Problem

In a PCIe system, when an end device (EP) accesses an input/output virtual address (IOVA) that has not yet been mapped, it needs to go through multiple interaction processes to obtain the host physical address (HPA), resulting in high resource consumption and high latency.

Method used

If the RC does not find a valid mapping for the IOVA, it does not send a failure response to the EP. Instead, it triggers the CPU to perform page scheduling, loads the required page from external memory and updates the page table mapping. If the HPA of the IOVA mapping is successfully updated within a preset time, it returns a success response to the EP.

Benefits of technology

This reduces the number of interactions with the RC, streamlines the process, lowers latency, and improves address translation efficiency.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121000699B_ABST
    Figure CN121000699B_ABST
Patent Text Reader

Abstract

Embodiments of the present application relate to the technical field of communication, and provide a communication method, related devices and storage media. The method comprises: receiving an address translation service (ATS) request from an endpoint (EP). Querying an address translation protection table (ATPT) according to an input / output virtual address (IOVA) to be translated. If the HPA corresponding to the IOVA to be translated does not exist in the ATPT, sending a page scheduling request to a central processing unit (CPU), the page scheduling request being used to instruct the CPU to allocate an HPA for the IOVA to be translated. Querying the ATPT according to the IOVA to be translated again to obtain the HPA corresponding to the IOVA to be translated. Sending an ATS response to the EP. In the embodiments of the present application, when the RC receives the ATS request initiated by the EP and does not query the valid mapping of the IOVA, the RC does not send a failure response to the EP, but triggers the CPU to perform page scheduling, loads the required page from the external storage and updates the page table mapping. The EP can receive a successful response and obtain the HPA mapped by the IOVA, implement address access, thereby reducing the number of interactions with the RC, saving the process, reducing the delay, and improving the address translation efficiency.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of communications, and more specifically to a communication method, related apparatus, and storage medium. Background Technology

[0002] The Peripheral Component Interconnect Express (PCIe) standard is a high-speed serial computer expansion bus standard used for connecting internal computer components. PCIe systems employ a tree topology, with key components including the root complex (RC), endpoints (EPs), switches, and bridging devices. EPs can request and obtain the Host Physical Address (HPA) through Address Translation Services (ATS). However, when an EP accesses an Input / Output Virtual Address (IOVA) that has not yet been mapped, it typically requires three interactions with the RC to obtain the corresponding HPA. This process is cumbersome and resource-intensive. Summary of the Invention

[0003] This application provides a communication method, related apparatus, and storage medium, which can save the process required for EP to access IOVA and reduce resource consumption.

[0004] In a first aspect, embodiments of this application provide a communication method, the method comprising: receiving an ATS request from an EP, the ATS request including an Input / Output Virtual Address (IOVA) to be translated; querying an Address Translation Protection Table (ATPT) based on the IOVA to be translated, wherein the ATPT includes a Host Physical Address (HPA) corresponding to the IOVA; if the ATPT does not contain an HPA corresponding to the IOVA to be translated, sending a page scheduling request to a CPU, the page scheduling request instructing the CPU to allocate an HPA for the IOVA to be translated; querying the ATPT again based on the IOVA to be translated to obtain the HPA corresponding to the IOVA to be translated; and sending an ATS response to the EP, the ATS response including the HPA corresponding to the IOVA to be translated.

[0005] In one possible design, sending an ATS response to the EP includes: if the HPA corresponding to the IOVA to be converted is obtained within a preset time, then an ATS response is sent to the EP.

[0006] In one possible design, the method further includes: if the HPA corresponding to the IOVA to be converted is not obtained within a preset time, a failure response is sent to the EP, the failure response indicating that the IOVA to be converted does not have a corresponding HPA.

[0007] In one possible design, if there is no HPA corresponding to the IOVA to be converted in the ATPT, the method does not include: sending a failure response to the EP, the failure response indicating that there is no HPA corresponding to the IOVA to be converted in the ATPT; receiving a Page Request Service (PRS) request message sent by the EP; and sending a PRS response message to the EP.

[0008] In one possible design, receiving an Address Translation Service (ATS) request from an EP includes: receiving a first ATS request from a first EP within a first time period, the first ATS request including a first IOVA to be translated; receiving a second ATS request from a second EP within the first time period, the second ATS request including a second IOVA to be translated; receiving a third ATS request from a third EP within the first time period, the third ATS request including a third IOVA to be translated; if the ATPT does not contain an HPA corresponding to the first IOVA to be translated, an HPA corresponding to the second IOVA to be translated, or an HPA corresponding to the third IOVA to be translated, and the first IOVA to be translated and the second IOVA to be translated are the same but different from the third IOVA to be translated, then a page scheduling request is sent to the CPU, including: first sending a first page scheduling request to the CPU, and then sending a second page scheduling request to the CPU, the first page scheduling request being used to instruct the CPU to allocate an HPA for the first IOVA to be translated; the second page scheduling request being used to instruct the CPU to allocate an HPA for the second IOVA to be translated.

[0009] In one possible design, the first EP, the second EP, and the third EP are all different.

[0010] Secondly, embodiments of this application provide a communication device having functions corresponding to the communication method provided in the first aspect above. These functions can be implemented in hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions, and these modules can be software and / or hardware.

[0011] In one embodiment, the communication device includes: an input / output module configured to receive an Address Translation Service (ATS) request from an EP (Electronic Programming Interface), the ATS request including an Input / Output Virtual Address (IOVA) to be translated; a processing module configured to query an Address Translation Protection Table (ATPT) based on the IOVA to be translated, the ATPT including a Host Physical Address (HPA) corresponding to the IOVA; the input / output module is further configured to send a page scheduling request to a CPU if the ATPT does not contain an HPA corresponding to the IOVA to be translated, the page scheduling request instructing the CPU to allocate an HPA for the IOVA to be translated; the input / output module is further configured to query the ATPT again based on the IOVA to be translated to obtain the HPA corresponding to the IOVA to be translated; the input / output module is further configured to send an ATS response to the EP, the ATS response including the HPA corresponding to the IOVA to be translated.

[0012] Thirdly, embodiments of this application provide a computing device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method described in any of the first aspects.

[0013] Fourthly, embodiments of this application provide a computer-readable storage medium including instructions that, when executed on a computer, cause the computer to perform the method described in any of the first aspects.

[0014] Fifthly, embodiments of this application provide a chip system comprising: a communication interface for inputting and / or outputting information; and a processor for executing a computer-executable program, causing a device equipped with the chip system to perform the method described in any of the first aspects. The processor obtains the data and / or information from the communication interface, processes the data and / or information, and outputs the processing result through the communication interface. The communication interface may be an input / output interface.

[0015] In one possible design, the aforementioned chip system also includes a memory connected to the processor via a circuit structure. This memory is used to store program instructions and data necessary for the terminal. The chip system can be composed of chips or may include chips and other discrete components.

[0016] In a sixth aspect, embodiments of this application provide a computer program product including computer instructions that, when executed by a processor, implement the method described in any of the first aspects.

[0017] Compared to existing technologies, in this embodiment, when the RC receives an ATS request from the EP and fails to find a valid mapping for the IOVA, it does not send a failure response to the EP. Instead, it triggers the CPU to perform page scheduling, loads the required page from secondary storage, and updates the page table mapping. If the HPA of the IOVA mapping is successfully updated within a preset time, a success response is returned to the EP. The EP can receive the success response and obtain the HPA of the IOVA mapping, thus enabling address access. This reduces the number of interactions with the RC, saves time, reduces latency, and improves address translation efficiency. Attached Figure Description

[0018] The objectives, features, and advantages of the embodiments of this application will become readily understood by referring to the accompanying drawings and the detailed description of the embodiments. Wherein:

[0019] Figure 1 This is a schematic diagram illustrating the interaction between the EP and RC when the EP accesses an IOVA for which no mapping has yet been established.

[0020] Figure 2 This is a schematic flowchart of a communication method according to an embodiment of this application;

[0021] Figure 3 This is a schematic diagram of the structure of a communication device according to an embodiment of this application;

[0022] Figure 4 This is another schematic diagram of the communication device according to an embodiment of this application;

[0023] Figure 5 This is a schematic diagram of the structure of a mobile phone in one embodiment of this application;

[0024] Figure 6 This is a schematic diagram of a server structure in one embodiment of this application.

[0025] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts. Detailed Implementation

[0026] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects (e.g., the first EP and the second EP are respectively represented as different EPs, and so on), and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in a sequence other than that illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or modules is not necessarily limited to those steps or modules explicitly listed, but may include other steps or modules not explicitly listed or inherent to these processes, methods, products, or devices. The division of modules appearing in the embodiments of this application is merely a logical division; in actual applications, there may be other division methods. For example, multiple modules may be combined into or integrated into another system, or some features may be ignored or not performed. Additionally, the shown or discussed mutual coupling or direct coupling or communication connection may be through some interface, indirect coupling between modules, or electrical or other similar forms of communication connection, none of which are limited in the embodiments of this application. Furthermore, the modules or sub-modules described as separate components may or may not be physically separated, may or may not be physical modules, or may be distributed among multiple circuit modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the embodiments of this application.

[0027] First, let me introduce the relevant content involved in this application.

[0028] PCIe is a high-speed serial computer expansion bus standard used for connecting internal computer components. The PCIe protocol adopts a three-layer structure: the transaction layer (TL) is responsible for the generation and parsing of transaction layer packets (TLPs); the data link layer (DLL) is responsible for the generation and parsing of data link layer packets (DLLPs) and implements the Ack / Nak mechanism; and the physical layer (PL) handles electrical characteristics, encoding, and clock recovery, etc.

[0029] The PCIe system adopts a tree topology, and its main components include RC, EP, switches, and bridging devices.

[0030] The RC (Regulator) is located at the root of the PCIe topology, through which the PCIe topology connects to the computer's CPU. It is responsible for address mapping, interrupt routing, and device enumeration.

[0031] An EP (Engineer) is a leaf node device in a PCIe topology that can actively initiate direct memory access (DMA) read / write requests (such as a network card reading memory) or respond to configuration operations from the RC (Control Center). DMA refers to the EP directly exchanging data with the computer's main memory (such as random access memory, RAM) without the full involvement of the central processing unit (CPU). Before initiating DMA, the EP needs to request an HPA (Hypergrid Access Point) through the ATS (Automatic Transfer Switch). For example, an EP can be a graphics processing unit (GPU), a solid-state drive (SSD), a network card, a sound card, a data acquisition card, etc.

[0032] Switch: As a branch node in a tree topology (similar to a tree branch), it extends the connectivity of the RC. It contains one uplink port (connecting to the RC or the upper-level switch) and multiple downlink ports (connecting to the EP or the lower-level switch), and internally implements TLP routing through a virtual PCI-PCI bridge.

[0033] Bridging devices: As grafting interfaces connecting different types of trees in a tree topology, they connect PCIe to other buses (such as PCI-X) or protocols (such as CXL).

[0034] An ATS request is an address translation query initiated by the EP (Entity Transfer) to the translation agent (TA) within the RC (Regulator-Controller) to retrieve the mapping from IOVA to HPA (Hyperaddress). HPA can be a physical address in main memory. Subsequently, the EP can directly use the cached HPA via DMA, avoiding repeated translation requests and reducing latency. For example, if the computer system is an x86 system, the TA is implemented as an Input-Output Memory Management Unit (IOMMU). If the computer system is an Advanced RISC Machine (ARM) system, the TA is implemented as a System Memory Management Unit (SMMU).

[0035] When an EP accesses an IOVA that has not yet been mapped, it typically needs to go through three interactions with the RC to obtain the HPA corresponding to that IOVA. (See reference...) Figure 1 The interaction process includes steps 1 to 8. Steps 1 to 4 constitute the first interaction, steps 5 to 7 constitute the second interaction, and steps 8 to 10 constitute the third interaction.

[0036] Step 1: The EP initiates an ATS request. Correspondingly, the RC receives the ATS request.

[0037] An ATS request is used to translate the address to an RC request, or in other words, to request the first HPA mapped to the first IOVA. The type of the ATS request is Memory Read. The ATS request carries several key information fields, such as IOVA, a No Write (NW) flag, and device identification information. The NW flag indicates whether the request is read-only. The device identification information identifies the device that initiated the ATS request.

[0038] Step 2: RC queries the page table based on the first IOVA.

[0039] The page table is an Address Translation Protection Table (ATPT). For example, if the TA is implemented as an IOMMU, then the page table is an IOMMU page table. If the TA is implemented as an SMMU, then the page table is an SMMU page table. The page table is used to store the HPA mapped to IOVA.

[0040] If the RC detects the first HPA mapped to the first IOVA, proceed to step 3. If the RC detects an EP permission error or a missing page table (e.g., no first HPA mapped to the first IOVA is found), proceed to step 4. If the page storing the mapping relationship of the first IOVA has not yet been loaded into computer memory and still resides on external storage (e.g., SSD), then the page table is missing.

[0041] Step 3: RC sends a successful response. Correspondingly, EP receives a successful response.

[0042] Among them, a successful response includes the first HPA mapped to the first IOVA.

[0043] Step 4: RC sends a failure response. Correspondingly, EP receives a failure response.

[0044] Step 5: When the EP receives a failure response, it initiates a Page Request Service (PRS) request message. Correspondingly, the RC receives the PRS request message.

[0045] The PRS request message includes the first IOVA address, event type, function number, and verification signal. The event type identifies the reason for the PRS request, guiding the computer to adopt different processing strategies. An event type of PRG response failure is represented by 00. The function number identifies the PCIe function that initiated the request and is used for request isolation of multifunction devices. The verification signal confirms the validity of the event type and function number, ensuring message synchronization.

[0046] Step 6: RC replies with a PRS response message.

[0047] Step 7: RC triggers the CPU to perform page scheduling, loads the required pages from external memory, and updates the page table mapping.

[0048] The RC (Regulator) forwards the PRS (Page Request) request to the CPU via the PCIe TLP (Telegraphic Transfer Level). The CPU triggers a page fault and performs the following operations: allocates the HPA (Page Panel); updates the page table, for example, adding a mapping from the first IOVA (Page Entity Object) to the HPA; and sends a PRS response to the EP (Page Executor) via the RC, confirming that the page table has been updated.

[0049] Step 8: EP initiates the ATS request again.

[0050] The ATS request is the same as the ATS request in step 1.

[0051] Step 9: RC queries the page table based on IOVA.

[0052] At this point, the RC has completed the page table mapping update and can query the HPA mapped to the IOVA.

[0053] Step 10: RC sends a successful response. Correspondingly, EP receives a successful response.

[0054] The successful response includes the HPA mapped to IOVA.

[0055] Therefore, EP can complete the access operation after obtaining the physical address.

[0056] The aforementioned ATS requests, success responses, failure responses, PRS request messages, etc., can be implemented using LTP.

[0057] As can be seen from steps 1 to 10 above, when the RC does not find the HPA mapped to IOVA in step 2, the EP and RC need to interact three times to return the HPA mapped to IOVA. This results in a large number of interactions, a lengthy process, high overall latency, and complex states.

[0058] Based on this, embodiments of this application provide a communication method, related apparatus, and storage medium. In this method, after receiving an ATS request initiated by an EP, if the RC cannot find a valid mapping for the IOVA, it does not send a failure response to the EP. Instead, it triggers the CPU to execute page scheduling, load the required page from secondary storage, and update the page table mapping. If the HPA of the IOVA mapping is successfully updated within a preset time, a success response is returned to the EP. The EP can receive the success response and obtain the HPA of the IOVA mapping, enabling address access, thereby reducing the number of interactions with the RC, saving time, reducing latency, and improving address translation efficiency.

[0059] Reference Figure 2 , Figure 2 This is a flowchart illustrating a communication method provided in an embodiment of this application. The method can be executed by an RC and an EP in a computing device. The computing device can be a mobile phone, tablet computer, personal digital assistant (PDA), point-of-sale (POS) device, computer, etc. The method includes steps 101-104:

[0060] Step 101: The EP sends an ATS request to the RC. Correspondingly, the RC receives the ATS request from the EP.

[0061] The ATS request includes the IOVA to be converted.

[0062] Understandably, based on relevant technologies, ATS requests may also include multiple key information fields, such as the NW flag and device identification information.

[0063] Step 102: RC queries ATPT based on the IOVA to be converted.

[0064] Among them, ATPT includes the HPA corresponding to IOVA.

[0065] When the RC queries the ATPT for the HPA corresponding to the IOVA to be converted, there are two possible outcomes. The first outcome is that the HPA corresponding to the IOVA to be converted is found. The second outcome is that the HPA corresponding to the IOVA to be converted is not found. If the HPA corresponding to the IOVA to be converted is found, the RC can send a success response message to the RP, so that the EP receives the HPA corresponding to the IOVA to be converted. The success response message includes the HPA corresponding to the IOVA to be converted. If the HPA corresponding to the IOVA to be converted is not found, that is, if the HPA corresponding to the IOVA to be converted does not exist in the ATPT, then step 103 is executed.

[0066] Step 103: The RC sends a page scheduling request to the CPU. Correspondingly, the CPU receives the page scheduling request.

[0067] The page scheduling request is used to instruct the CPU to allocate an HPA for the IOVA to be converted, that is, to allocate the HPA corresponding to the IOVA to be converted.

[0068] For example, page scheduling requests are implemented as TLP packets.

[0069] After receiving a page scheduling request, the CPU can allocate a free HPA and map the IOVA to be converted to that allocated HPA. The CPU updates the ATPT, which includes the HPA corresponding to the IOVA to be converted.

[0070] Step 104: RC queries ATPT again based on the IOVA to be converted to obtain the HPA corresponding to the IOVA to be converted.

[0071] After sending a page scheduling request to the CPU, the RC can query the ATPT again based on the IOVA to be converted, thus including the HPA corresponding to the IOVA in the updated ATPT. This allows the RC to obtain the HPA corresponding to the IOVA to be converted.

[0072] Step 105: The RC sends an ATS response to the EP. Correspondingly, the EP receives the ATS response from the RC.

[0073] The ATS response includes the HPA corresponding to the IOVA to be converted.

[0074] After obtaining the HPA corresponding to the IOVA to be converted, the RC can send the HPA corresponding to the IOVA to be converted to the EP, so that the EP can obtain the HPA corresponding to the IOVA to be converted.

[0075] In this embodiment, if the RC does not find the HPA corresponding to the IOVA requested by the EP in the ATPT, it does not directly return a failure response to the EP. Instead, it sends a page scheduling request to the CPU, requesting the CPU to load the page table, so that the RC can obtain the HPA corresponding to the IOVA and then send the HPA to the EP. This saves the EP from the process of obtaining the HPA when the HPA corresponding to the IOVA is not loaded in the ATPT, improving efficiency and saving system resources.

[0076] In some embodiments of this application, sending the ATS response in step 105 is implemented as step 201.

[0077] Step 201: If the RC obtains the HPA corresponding to the IOVA to be converted within a preset time, it sends an ATS response to the EP.

[0078] The preset start time can be set when the RC queries the ATPT based on the IOVA to be converted but does not find the corresponding HPA for that IOVA. For example, the preset time is 100 clock cycles. By setting the preset time to 100 clock cycles, the CPU can receive a page scheduling request within 100 clock cycles and update the ATPT accordingly, ensuring that the updated ATPT includes the HPA corresponding to the IOVA to be converted. This allows the RC to find the corresponding HPA in the ATPT when it queries the ATPT again based on the IOVA to be converted. After the RC obtains the HPA corresponding to the IOVA to be converted within a preset time, it sends the HPA corresponding to the IOVA to be converted to the EP. This allows the RC to query the ATPT again within the preset time and send the HPA corresponding to the IOVA to be converted to the EP when the EP initiates an ATS request to the RC. Instead of immediately sending a failure response to the EP after the RC fails to find the HPA corresponding to the IOVA to be converted, the process of the EP querying the HPA corresponding to the IOVA to be converted is saved, thus saving communication resources.

[0079] For example, the preset time is 80 clock cycles or 200 clock cycles, etc.

[0080] In some embodiments, the RC can query the ATPT multiple times based on the IOVA to be converted within a preset time period. After the CPU updates the ATPT, the RC can query the updated ATPT and obtain the HPA corresponding to the IOVA to be converted. The RC can query the ATPT once every 40 clock cycles. If the HPA corresponding to the IOVA to be converted is found, the RC can stop querying the ATPT; if the HPA corresponding to the IOVA to be converted is not found, the RC can continue querying the ATPT until the preset time is reached, at which point the RC can stop querying the ATPT. Thus, the RC can send the HPA corresponding to the IOVA to be converted to the EP immediately after finding it, without having to wait until the preset time, which can reduce the EP's waiting time.

[0081] In some embodiments, the RC may query the ATPT only once within a preset time period. For example, when the preset time is approaching, such as when the preset time is 100 clock cycles, the RC queries the ATPT based on the IOVA to be converted at the 95th or 98th clock cycle. This can save the number of queries by the RC and conserve communication resources.

[0082] In some embodiments of this application, the above method further includes step 202.

[0083] Step 202: If the RC does not obtain the HPA corresponding to the IOVA to be converted within a preset time, it sends a failure response to the EP.

[0084] The failure response indicates that the IOVA to be converted does not have a corresponding HPA.

[0085] For example, the specific content of the failure response can refer to the failure response of the ATS request sent by the RC in the prior art.

[0086] For example, if the RC repeatedly queries the ATPT based on the IOVA to be converted within a preset time period, and if the preset time is reached but the RC still cannot obtain the HPA corresponding to the IOVA to be converted after querying the ATPT, then the RC sends a failure response to the EP.

[0087] Taking the example of querying the ATPT based on the IOVA to be converted near the preset time within a preset time period. If no HPA corresponding to the IOVA to be converted is found during this ATPT query, the RC sends a failure response to the EP.

[0088] After receiving a failure response, the EP can continue with subsequent processing steps, such as initiating a PRS or ATS request, instead of remaining stuck in the current process. This enhances the operational stability of the EP.

[0089] In some embodiments of this application, if there is no HPA corresponding to the IOVA to be converted in ATPT, the method does not include steps 301 to 303.

[0090] Step 301: RC sends a failure response to EP. The failure response is used to indicate that there is no HPA corresponding to the IOVA to be converted in ATPT.

[0091] Step 302: The RC receives the Page Request Service (PRS) request message sent by the EP.

[0092] Step 303: RC sends a PRS response message to EP.

[0093] Compared to existing technologies, if the RC fails to find the HPA corresponding to the IOVA to be converted, it executes steps 301 to 303 and sends a failure response to the EP. However, this embodiment does not send a failure response to the EP, reducing the number of times the EP requests the HPA.

[0094] In some embodiments, the RC counts the ATS requests received from the EP within the first time period, determines the IOVA with the most requests, and prioritizes acquiring the HPA corresponding to that IOVA. The RC receiving the ATS request from the EP in step 101 can be implemented as steps 401 to 403. Step 103, where the RC sends a page scheduling request to the CPU, can be implemented as step 404.

[0095] Step 401: Receive a first ATS request from the first EP within a first time period. The first ATS request includes a first IOVA to be converted.

[0096] Step 402: Receive a second ATS request from the second EP during a first time period. The second ATS request includes a second IOVA to be converted.

[0097] Step 403: Receive a third ATS request from the third EP within the first time period. The third ATS request includes a third IOVA to be converted.

[0098] The first time period can be a preset time period, such as 1 millisecond per first time period. Within the first time period, the RC can receive multiple ATS requests sent by the EP. The RC can then analyze the received multiple IOVAs to be converted and determine the IOVAs to be converted that have been requested the most frequently.

[0099] In this embodiment of the application, the scheme is described using the first to third EPs sending ATS requests as an example. It is understood that this embodiment of the application does not limit the number of EPs. As long as an EP sends an ATS request to the RC within the first time period, the IOVA of that EP's request can be counted.

[0100] If there is no HPA corresponding to the first IOVA to be converted, the second IOVA to be converted, or the third IOVA to be converted in ATPT, and the first IOVA to be converted is the same as the second IOVA to be converted, but different from the third IOVA to be converted, then proceed to step 404.

[0101] In other words, if there are a total of 3 EP requests to RC within the first time period, the number of IOVAs to be converted requested by these 3 EPs is counted. The count shows that the number of IOVAs to be converted in the first time period is greater than the number of IOVAs to be converted in the second time period.

[0102] In step 404, the RC first sends a first page scheduling request to the CPU, and then sends a second page scheduling request to the CPU.

[0103] The first page scheduling request instructs the CPU to allocate an HPA for the first IOVA to be converted. The second page scheduling request instructs the CPU to allocate an HPA for the second IOVA to be converted.

[0104] When the number of requests for the first IOVA to be converted is the highest, the RC prioritizes sending requests for the first IOVA to be converted. This allows the first EP and the third EP to obtain the HPA allocated to the IOVA more quickly, enabling more EPs to obtain the HPA allocated to the IOVA more quickly and improving the working efficiency of the EPs.

[0105] In other embodiments, the RC counts the ATS requests received from EPs within the first time period and determines the HPA corresponding to the IOVA based on the priority of the EPs. In step 101 above, the RC receiving the ATS request from the EP can be implemented as steps 401 to 403. Assuming the priority of the first EP is higher than the second EP, which is higher than the third EP, then step 103, where the RC sends a page scheduling request to the CPU, can be implemented as step 405.

[0106] In step 405, the RC first sends a first page scheduling request to the CPU, and then sends a second page scheduling request to the CPU.

[0107] In some embodiments, the priority of an EP can be preset. For example, the RC can store a dictionary of EP priorities and query the priority of the EP when it receives an ATS request from the EP to determine the priority of the EP.

[0108] In other embodiments, the priority of an EP is determined based on its frequency of operation within a second time period. For example, if the first EP initiates 10 ATS requests, the second EP initiates 15 ATS requests, and the third EP initiates 23 ATS requests within the second time period, then the second EP has a higher priority than the third EP, which in turn has a higher priority than the first EP. Therefore, when the RC receives ATS requests from the first to the third EP during the first time period, it prioritizes querying the IOVA of the second EP's requests, and then queries the IOVA of the third EP's requests and the IOVA of the first EP's requests. Frequent ATS requests from an EP indicate that the EP is used frequently; prioritizing the querying of the IOVA of that EP's requests allows the EP to operate faster, improving the efficiency of the computing device.

[0109] The second time period can be a preset time, such as 1 second, 3 seconds, etc.

[0110] The above describes a communication method in the embodiments of this application. The following describes the communication device (e.g., server) that performs the above communication method.

[0111] See Figure 3 ,like Figure 3 The diagram shows the structure of a communication device. The communication device in this embodiment can achieve the functions described above. Figure 2The steps of the communication method executed in the corresponding embodiments are described above. The functions implemented by the communication device can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above functions, and the modules can be software and / or hardware. The communication device may include an input / output module 601 and a processing module 602. The functional implementation of the processing module 602 and the input / output module 601 can be found in [reference]. Figure 2 The operations performed in the corresponding embodiments will not be described in detail here. For example, the processing module 602 can be used to control the sending, receiving, and acquiring operations of the input / output module 601.

[0112] The input / output module 601 is configured to receive an Address Translation Service (ATS) request from the EP, the ATS request including the Input / Output Virtual Address (IOVA) to be translated.

[0113] The processing module 602 is configured to query the Address Translation Protection Table (ATPT) based on the IOVA to be translated. The ATPT includes the host physical address (HPA) corresponding to the IOVA.

[0114] The input / output module 601 is further configured to send a page scheduling request to the CPU if there is no HPA corresponding to the IOVA to be converted in the ATPT. The page scheduling request is used to instruct the central processing unit (CPU) to allocate an HPA for the IOVA to be converted.

[0115] The input / output module 601 is also configured to query ATPT again based on the IOVA to be converted to obtain the HPA corresponding to the IOVA to be converted.

[0116] The input / output module 601 is also configured to send an ATS response to the EP, the ATS response including the HPA corresponding to the IOVA to be converted.

[0117] In some implementations, the input / output module 601 is further configured to send an ATS response to the EP if the HPA corresponding to the IOVA to be converted is obtained within a preset time.

[0118] In some implementations, the input / output module 601 is further configured to send a failure response to the EP if it does not obtain the HPA corresponding to the IOVA to be converted within a preset time. The failure response indicates that the IOVA to be converted does not have a corresponding HPA.

[0119] In some implementations, the input / output module 601 is further configured to, if there is no HPA corresponding to the IOVA to be converted in the ATPT, then the input / output module 601 will not perform the following operations: send a failure response to the EP, the failure response being used to indicate that there is no HPA corresponding to the IOVA to be converted in the ATPT; receive a Page Request Service (PRS) request message sent by the EP; and send a PRS response message to the EP.

[0120] In some implementations, the input / output module 601 is further configured to receive a first ATS request from the first EP during a first time period, receive a second ATS request from the second EP during the first time period, and receive a third ATS request from the third EP during the first time period. If the HPA corresponding to the first IOVA to be converted, the HPA corresponding to the second IOVA to be converted, and the HPA corresponding to the third IOVA to be converted do not exist in the ATPT, and the first IOVA to be converted and the second IOVA to be converted are the same but different from the third IOVA to be converted, then a first page scheduling request is first sent to the CPU, and then a second page scheduling request is sent to the CPU.

[0121] In this embodiment, the processing module 602 is configured so that after receiving an ATS request from the EP, if the RC cannot find a valid mapping for the IOVA, it does not send a failure response to the EP. Instead, it triggers the CPU to perform page scheduling, load the required page from secondary storage, and update the page table mapping. The EP can receive a success response and obtain the HPA of the IOVA mapping, thus enabling address access. This reduces the number of interactions with the RC, saves time, reduces latency, and improves address translation efficiency.

[0122] The communication device 60 in the embodiments of this application has been described above from the perspective of modular functional entities. The communication device in the embodiments of this application will be described below from the perspective of hardware processing.

[0123] It should be noted that, Figure 3 The physical device corresponding to the input / output module 601 shown can be a transceiver, radio frequency circuit, communication module, and input / output (I / O) interface, etc., and the physical device corresponding to the processing module 602 can be a processor.

[0124] Figure 3 The devices shown can all have the following characteristics: Figure 4 The structure shown, when Figure 3 The communication device 60 shown has, for example Figure 4 When the structure shown is used, Figure 4 The processor and transceiver in the device can perform the same or similar functions as the processing module 602 and input / output module 601 provided in the aforementioned device embodiments. Figure 4The memory stores the computer programs that the processor needs to call when executing the above communication methods.

[0125] This application also relates to a chip system including at least one processor and an interface circuit. The processor includes a plurality of vector storage units. The processor is used to perform instruction and / or data interaction through the interface circuit, causing the chip system to perform the methods of any of the above embodiments.

[0126] In one possible implementation, the chip system may also directly include a memory in which computer programs or computer instructions are stored.

[0127] For example, the memory can be volatile or non-volatile, or may include both. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be RAM, which serves as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DRRAM).

[0128] This application also relates to a processor, which includes a plurality of storage units for calling computer programs or computer instructions stored in the memory to cause the processor to execute the methods described in any of the above embodiments.

[0129] For example, in the embodiments of this application, the processor is an integrated circuit chip with signal processing capabilities. For instance, the processor may be an FPGA, a general-purpose processor, a DSP, an ASIC, or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, a SoC, a CPU, a network processor (NP), a microcontroller unit (MCU), a PLD, or other integrated chips, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this application. In one possible implementation, the embodiments of this application also provide a computer-readable storage medium storing program code, which, when executed on the computer, causes the computer to perform the above-described method embodiments.

[0130] This application also provides a mobile terminal, such as... Figure 5 As shown, for ease of explanation, only the parts related to the embodiments of this application are shown. For specific technical details not disclosed, please refer to the method section of the embodiments of this application. The mobile terminal can be any mobile terminal including mobile phones, tablets, personal digital assistants (PDAs), point-of-sale (POS) terminals, in-vehicle computers, etc. Taking a mobile phone as an example:

[0131] Figure 5 This diagram illustrates a partial structure of a mobile phone related to the mobile terminal provided in the embodiments of this application. (Reference) Figure 5 The mobile phone includes components such as a radio frequency (RF) circuit 1010, a memory 1020, an input unit 1030, a display unit 1040, a sensor 1050, an audio circuit 1060, a wireless fidelity (WiFi) module 1070, a processor 1080, and a power supply 1090. Those skilled in the art will understand that... Figure 5 The mobile phone structure shown does not constitute a limitation on the mobile phone and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0132] The following is combined Figure 5 A detailed introduction to each component of a mobile phone:

[0133] The RF circuit 1010 can be used for receiving and transmitting signals during information transmission or calls. Specifically, it receives downlink information from the base station and processes it with the processor 1080; additionally, it transmits uplink data to the base station. Typically, the RF circuit 1010 includes, but is not limited to, an antenna, at least one amplifier, a transceiver, a coupler, a low-noise amplifier (LNA), a duplexer, etc. Furthermore, the RF circuit 1010 can also communicate wirelessly with networks and other devices. The aforementioned wireless communication can use any communication standard or protocol, including but not limited to Global System for Mobile Communications (GSM), General Packet Radio Service (GPRS), Code Division Multiple Access (CDMA), Wideband Code Division Multiple Access (WCDMA), Long Term Evolution (LTE), email, and Short Messaging Service (SMS).

[0134] The memory 1020 can be used to store software programs and modules. The processor 1080 executes various mobile phone functions and data processing by running the software programs and modules stored in the memory 1020. The memory 1020 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, applications required for at least one function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, phonebook, etc.). In addition, the memory 1020 may include high-speed random access memory, and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0135] The input unit 1030 can be used to receive input numerical or character information, and to generate key signal inputs related to user settings and function control of the mobile phone. Specifically, the input unit 1030 may include a touch panel 1031 and other input devices 1032. The touch panel 1031, also known as a touch screen, can collect touch operations performed by the user on or near it (such as operations performed by the user using a finger, stylus, or any suitable object or accessory on or near the touch panel 1031), and drive the corresponding connection devices according to a pre-set program. Optionally, the touch panel 1031 may include two parts: a touch detection device and a touch controller. The touch detection device detects the user's touch position and the signal generated by the touch operation, and transmits the signal to the touch controller; the touch controller receives touch information from the touch detection device, converts it into touch point coordinates, and sends it to the processor 1080, and can also receive and execute commands sent by the processor 1080. In addition, the touch panel 1031 can be implemented using various types such as resistive, capacitive, infrared, and surface acoustic wave. In addition to the touch panel 1031, the input unit 1030 may also include other input devices 1032. Specifically, other input devices 1032 may include, but are not limited to, one or more of the following: physical keyboard, function keys (such as volume control buttons, power buttons, etc.), trackball, mouse, joystick, etc.

[0136] The display unit 1040 can be used to display information input by the user or information provided to the user, as well as various menus of the mobile phone. The display unit 1040 may include a display panel 1041, which may optionally be configured as a liquid crystal display (LCD), organic light-emitting diode (OLED), or similar display. Further, a touch panel 1031 may cover the display panel 1041. When the touch panel 1031 detects a touch operation on or near it, it transmits the information to the processor 1080 to determine the type of touch event. Subsequently, the processor 1080 provides corresponding visual output on the display panel 1041 based on the type of touch event. Although in Figure 5 In this embodiment, the touch panel 1031 and the display panel 1041 are two separate components to realize the input and output functions of the mobile phone. However, in some embodiments, the touch panel 1031 and the display panel 1041 can be integrated to realize the input and output functions of the mobile phone.

[0137] The mobile phone may also include at least one sensor 1050, such as a light sensor, a motion sensor, and other sensors. Specifically, the light sensor may include an ambient light sensor and a proximity sensor. The ambient light sensor can adjust the brightness of the display panel 1041 according to the ambient light level, and the proximity sensor can turn off the display panel 1041 and / or the backlight when the phone is moved to the ear. As a type of motion sensor, an accelerometer sensor can detect the magnitude of acceleration in various directions (generally three axes). When stationary, it can detect the magnitude and direction of gravity and can be used for applications that recognize the phone's posture (such as landscape / portrait switching, related games, magnetometer posture calibration), vibration recognition-related functions (such as pedometer, taps), etc. Other sensors that may be configured in the mobile phone, such as gyroscopes, barometers, hygrometers, thermometers, and infrared sensors, will not be described in detail here.

[0138] The audio circuit 1060, speaker 1061, and microphone 1062 provide an audio interface between the user and the mobile phone. The audio circuit 1060 converts the received audio data into electrical signals and transmits them to the speaker 1061, where the speaker 1061 converts them into sound signals for output. On the other hand, the microphone 1062 converts the collected sound signals into electrical signals, which are then received by the audio circuit 1060, converted into audio data, and then processed by the processor 1080 before being transmitted via the RF circuit 1010 to, for example, another mobile phone, or the audio data can be output to the memory 1020 for further processing.

[0139] Wi-Fi is a short-range wireless transmission technology. Through the Wi-Fi module 1070, mobile phones can help users send and receive emails, browse web pages, and access streaming media, providing users with wireless broadband internet access. Although Figure 5 The Wi-Fi module 1070 is shown, but it is understood that it is not an essential component of a mobile phone and can be omitted as needed without changing the essence of the invention.

[0140] The processor 1080 is the control center of the mobile phone, connecting various parts of the phone through various interfaces and lines. It executes software programs and / or modules stored in the memory 1020 and calls data stored in the memory 1020 to perform various functions and process data, thereby providing overall monitoring of the phone. Optionally, the processor 1080 may include one or more processing units; optionally, the processor 1080 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operating system, user interface, and applications, and the modem processor mainly handles wireless communication. It is understood that the aforementioned modem processor may also not be integrated into the processor 1080.

[0141] The mobile phone also includes a power supply 1090 (such as a battery) that supplies power to various components. Optionally, the power supply can be logically connected to the processor 1080 through a power management system, thereby enabling functions such as charging, discharging, and power consumption management through the power management system.

[0142] Although not shown, mobile phones may also include a camera, Bluetooth module, etc., which will not be described in detail here.

[0143] In this embodiment of the application, the processor 1080 included in the mobile phone also has a process for controlling the execution of the communication method executed by the communication device.

[0144] This application also provides a server; please refer to [link / reference]. Figure 6 , Figure 6 This is a schematic diagram of a server structure provided in an embodiment of this application. The server 1100 can vary significantly due to different configurations or performance. It may include one or more central processing units (CPUs) 1122 (e.g., one or more processors) and memory 1132, and one or more storage media 1130 (e.g., one or more mass storage devices) for storing application programs 1142 or data 1144. The memory 1132 and storage media 1130 may be temporary or persistent storage. The program stored in the storage media 1130 may include one or more modules (not shown in the figure), each module may include a series of instruction operations on the server. Furthermore, the CPU 1122 may be configured to communicate with the storage media 1130 and execute the series of instruction operations in the storage media 1130 on the server 1100.

[0145] Server 1100 may also include one or more power supplies 1126, one or more wired or wireless network interfaces 1150, one or more input / output interfaces 1158, and / or one or more operating systems 1141, such as Windows Server, Mac OS X, Unix, Linux, FreeBSD, etc.

[0146] The steps performed by the server in the above embodiments can be based on this Figure 6 The structure of server 1100 shown. For example, as in the above embodiment, by Figure 6 The steps performed by the data processing device 60 or the image processing device 70 shown can be based on this Figure 6 The server structure is shown. For example, the central processing unit 1122 performs the following operations by calling instructions from memory 1132:

[0147] The CPU receives an Address Translation Service (ATS) request from the EP via input / output interface 1158. The ATS request includes the Input / Output Virtual Address (IOVA) to be translated. If the HPA corresponding to the IOVA to be translated does not exist in the ATPT (Application Programmable Page Request), a Page Scheduling Request is sent to the CPU. The ATPT is queried again based on the IOVA to be translated to obtain the corresponding HPA. An ATS response is sent to the EP, which includes the HPA corresponding to the IOVA to be translated.

[0148] If the HPA corresponding to the IOVA to be converted is obtained within the preset time, an ATS response can also be sent to the EP through the input / output interface 1158.

[0149] If the HPA corresponding to the IOVA to be converted is not obtained within the preset time, a failure response can also be sent to the EP through the input / output interface 1158. The failure response indicates that the IOVA to be converted does not have a corresponding HPA.

[0150] If there is no HPA corresponding to the IOVA to be converted in the ATPT, then the input / output interface 1158 does not perform the following operations: send a failure response to the EP, the failure response being used to indicate that there is no HPA corresponding to the IOVA to be converted in the ATPT; receive a Page Request Service (PRS) request message sent by the EP; and send a PRS response message to the EP.

[0151] It can also receive a first ATS request from the first EP, a second ATS request from the second EP, and a third ATS request from the third EP within the first time period through the input / output interface 1158. If the HPA corresponding to the first IOVA to be converted, the HPA corresponding to the second IOVA to be converted, and the HPA corresponding to the third IOVA to be converted do not exist in the ATPT, and the first IOVA to be converted and the second IOVA to be converted are the same, but different from the third IOVA to be converted, then a first page scheduling request is sent to the CPU first, and then a second page scheduling request is sent to the CPU.

[0152] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0153] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and modules described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0154] In the embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, apparatuses, or modules, and may be electrical, mechanical, or other forms.

[0155] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0156] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium.

[0157] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product.

[0158] The computer program product includes one or more computer instructions. When the computer program is loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium may be any available medium that a computer can store or a data storage device such as a server or data center that integrates one or more available media. The available medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., a solid-state disk (SSD)).

[0159] The technical solutions provided in the embodiments of this application have been described in detail above. Specific examples have been used in the embodiments of this application to illustrate the principles and implementation methods of the embodiments of this application. The description of the above embodiments is only for the purpose of helping to understand the methods and core ideas of the embodiments of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the embodiments of this application. Therefore, the content of this specification should not be construed as a limitation on the embodiments of this application.

Claims

1. A communication method characterized by comprising: The method is performed by a root complex RC, and the method comprises: receiving an address translation service ATS request from a terminal device EP, the ATS request comprising an input / output virtual address IOVA to be translated; querying an address translation protection table ATPT according to the IOVA to be translated, wherein the ATPT comprises a host physical address HPA corresponding to the IOVA; if the HPA corresponding to the IOVA to be translated does not exist in the ATPT, sending a page scheduling request to a central processing unit CPU, the page scheduling request being used to instruct the CPU to allocate the HPA for the IOVA to be translated; querying the ATPT according to the IOVA to be translated again to obtain the HPA corresponding to the IOVA to be translated; sending an ATS response to the EP, the ATS response comprising the HPA corresponding to the IOVA to be translated.

2. The communication method according to claim 1, characterized by, The sending of the ATS response to the EP comprises: if the HPA corresponding to the IOVA to be translated is obtained within a preset time, sending the ATS response to the EP.

3. The communication method according to claim 1, wherein Further comprising: if the HPA corresponding to the IOVA to be translated is not obtained within a preset time, sending a failure response to the EP, the failure response indicating that the IOVA to be translated does not have a corresponding HPA.

4. The communication method according to any one of claims 1-3, characterized by, If the HPA corresponding to the IOVA to be translated does not exist in the ATPT, the method does not comprise: sending a failure response to the EP, the failure response being used to indicate that the HPA corresponding to the IOVA to be translated does not exist in the ATPT; receiving a page request service PRS request message sent by the EP; sending a PRS response message to the EP.

5. The communication method according to any one of claims 1-3, wherein, The receiving of the ATS request from the EP comprises: receiving a first ATS request from a first EP within a first time period, the first ATS request comprising a first IOVA to be translated; receiving a second ATS request from a second EP within the first time period, the second ATS request comprising a second IOVA to be translated; receiving a third ATS request from a third EP within the first time period, the third ATS request comprising a third IOVA to be translated; if the HPA corresponding to the first IOVA to be translated, the HPA corresponding to the second IOVA to be translated and the HPA corresponding to the third IOVA to be translated do not exist in the ATPT, and the first IOVA to be translated and the second IOVA to be translated are the same and different from the third IOVA to be translated, the sending of the page scheduling request to the CPU comprises: first sending a first page scheduling request to the CPU, and then sending a second page scheduling request to the CPU, the first page scheduling request being used to instruct the CPU to allocate the HPA for the first IOVA to be translated; and the second page scheduling request being used to instruct the CPU to allocate the HPA for the second IOVA to be translated.

6. A communication device, characterized by The apparatus comprises: an input / output module configured to receive an address translation service ATS request from a terminal device EP, the ATS request comprising an input / output virtual address IOVA to be translated; The processing module is configured to query an IOVA address translation protection table (ATPT) according to the IOVA to be converted; the ATPT includes a host physical address (HPA) corresponding to the IOVA; The input / output module is further configured to send a page scheduling request to a central processing unit (CPU) if the HPA corresponding to the IOVA to be converted does not exist in the ATPT, and the page scheduling request is used to instruct the CPU to allocate the HPA to the IOVA to be converted; The input / output module is further configured to query the ATPT according to the IOVA to be converted again to obtain the HPA corresponding to the IOVA to be converted; The input / output module is further configured to send an ATS response to the EP, and the ATS response includes the HPA corresponding to the IOVA to be converted.

7. A computing device, comprising: It comprises a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor executes the computer program to implement the method of any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, It comprises instructions which, when executed on a computer, cause the computer to perform the method of any one of claims 1-5.

9. A chip system, characterized by The chip system comprises: a communication interface for inputting and / or outputting information; a processor for executing a computer executable program, so that the device installed with the chip system performs the method of any one of claims 1-5.

10. A computer program product comprising computer instructions, characterized in that, The computer instructions are executed by the processor to implement the method of any one of claims 1-5. The computer instructions are executed by the processor to implement the method of any one of claims 1-5.

Citation Information

Patent Citations

  • Systems, methods, and apparatuses for heterogeneous computing

    CN110121698A

  • Secure address translation services using cryptographically protected host physical addresses

    CN113934656A