Chip verification method and device based on test case
By automating the generation of target folders corresponding to functional points using test scripts based on the UVM framework, the problem of high time complexity in existing chip verification methods is solved, achieving efficient and low-cost chip verification.
Patent Information
- Application Number
- CN202411031480.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-30
- Publication Date
- 2025-12-09
- Estimated Expiration
- 2044-07-30
AI Technical Summary
Existing chip verification methods are time-consuming, costly, and difficult to perform comprehensive verification efficiently.
By generating test scripts based on the UVM framework, the system automatically generates target folders corresponding to function points and runs simulation commands, simplifying the creation process of simulation folders for multiple test cases.
It improves the efficiency and coverage collection speed of chip verification, reduces costs, reduces human error, and shortens verification time.
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Figure CN119292911B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of chip verification, and in particular to a chip verification method and device based on test cases. BACKGROUND
[0002] Chip verification automation is a key step in the chip design and production process, specifically involving the use of computer programs to replace manual testing and verification during chip production to ensure that the chip works according to the established specifications and performance requirements. This technology can improve the reliability and quality of chips, reduce human error and improve productivity. The necessity of chip verification automation lies in: it can improve reliability, through automated verification process, it can avoid errors caused by subjective judgment of people, thereby improving the reliability of products. At the same time, it can reduce costs, and automated verification can save manpower, time and resources, and reduce production costs. At the same time, automated verification can also improve efficiency, shorten product launch time and reduce inventory backlog.
[0003] With the increasing complexity of integrated circuit chip design, it is necessary to provide development efficiency. In order to avoid the high cost of reflow, the developer needs to verify as comprehensively as possible. However, due to the pressure of cost and time to market, the developer cannot always run the verification and debugging cycle repeatedly. With the increase of design complexity, the workload and difficulty of chip verification are increasing.
[0004] In the chip verification process, the developer needs to analyze the function points to write multiple verification cases, and implement system-level verification through simulation of the verification cases. When the verification cases are running, the code coverage is collected. After obtaining the coverage report, the code not covered in the report is analyzed. For the code that should be covered but is not covered, specific verification cases are written, and then re-run, collect, and analyze until the coverage rate meets the requirements.
[0005] In the prior art, the simulation of the verification process is usually manually run by the developer or repeatedly run the simulation command using the list of test cases. This way of testing not only consumes a lot of time and manpower, but also is not conducive to the management of test cases, and may miss some things. If a large number of test cases need to be modified, the repeated simulation test process is more troublesome.
[0006] In summary, the existing chip verification method has the problem of high time complexity. SUMMARY
[0007] The present application provides a chip verification method and device based on test cases to solve the defect of high time complexity in the prior art, and to realize efficient and low-cost chip verification.
[0008] The application provides a chip verification method based on test cases, comprising the following steps:
[0009] generating a script based on a folder to be verified;
[0010] based on the script generated based on the folder and test case keyword input, obtaining at least one target folder by using a pre-constructed test case folder; wherein the test case folder comprises script files of multiple test cases, and the target folder is a test case folder of a function point related to the test case keyword or a default function point;
[0011] running a simulation command based on the target folder to obtain a test result.
[0012] According to the chip verification method based on test cases provided by the application, when the test case keyword input is not obtained, based on the script generated based on the folder and the test case keyword input, at least one target folder is obtained by using a pre-constructed test case folder, and the method specifically comprises the following steps:
[0013] extracting test cases under the test case folder based on the script generated based on the folder to obtain a text file storing function point names of the test cases;
[0014] copying a template folder based on the script generated based on the folder; wherein the template folder comprises an automatic compilation file and a default simulation command;
[0015] renaming the copied template folder and the default simulation command under the template folder based on the function point names stored in the text file to obtain a target folder.
[0016] According to the chip verification method based on test cases provided by the application, when the test case keyword input is obtained, based on the script generated based on the folder and the test case keyword input, at least one target folder is obtained by using a pre-constructed test case folder, and the method specifically comprises the following steps:
[0017] searching under the test case folder based on the script generated based on the folder and the test case keyword;
[0018] when a folder corresponding to the test case keyword exists under the test case folder, the folder corresponding to the test case keyword is taken as a target folder.
[0019] According to the chip verification method based on test cases provided by the application, the folder generation script searches under the test case folder according to the test case keyword, and then further comprises:
[0020] In the case that there is no folder with the name corresponding to the test case keyword under the test case folder, a folder corresponding to the test case keyword is generated, and the name of the default simulation command in the folder is modified according to the test case keyword to obtain a target folder.
[0021] According to the chip verification method based on test cases provided by the application, the target folder supports repeated running of multiple simulation commands.
[0022] According to the chip verification method based on test cases provided by the application, the folder generation script is a test script based on a UVM framework.
[0023] The application further provides a chip verification device based on test cases, comprising the following modules:
[0024] A starting unit is configured to run a folder generation script based on a chip to be verified;
[0025] A folder unit is configured to obtain at least one target folder by using a pre-constructed test case folder based on the folder generation script and test case keyword input, wherein the test case folder comprises script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder;
[0026] A simulation unit is configured to run a simulation command based on the target folder to obtain a test result.
[0027] The application further provides an electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the chip verification method based on test cases according to any of the above when executing the program.
[0028] The application further provides a non-transitory computer readable storage medium having a computer program stored thereon, wherein the computer program is executable by a processor to implement the chip verification method based on test cases according to any of the above.
[0029] The application further provides a computer program product comprising a computer program, wherein the computer program is executable by a processor to implement the chip verification method based on test cases according to any of the above.
[0030] The chip verification method and device based on test cases provided by the application generate a script based on a folder to be verified; at least one target folder is obtained by using a test case folder constructed in advance based on the folder generation script and test case keyword input; the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder; a simulation command is run based on the target folder to obtain a test result. The script can generate multiple test-related function point test case folders at a time, and the simulation command is run by making the folder correspond to the function point test case one by one, which simplifies the creation process of the multiple test case simulation folder, is low in cost, facilitates improvement of the simulation efficiency, solves the problem that multiple folders need to be created for different test cases in the chip verification simulation test, and effectively improves the simulation efficiency and the speed of coverage collection. BRIEF DESCRIPTION OF DRAWINGS
[0031] In order to more clearly illustrate the technical solutions in the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the application, and those skilled in the art can obtain other drawings according to these drawings without creative effort.
[0032] Figure 1 is one of the flowcharts of the chip verification method based on test cases provided by the application.
[0033] Figure 2 is another flowchart of the chip verification method based on test cases provided by the application.
[0034] Figure 3 is a test case folder structure diagram of the chip verification method based on test cases provided by the application.
[0035] Figure 4 is a third flowchart of the chip verification method based on test cases provided by the application.
[0036] Figure 5 is a structural diagram of the chip verification device based on test cases provided by the application.
[0037] Figure 6 is a structural diagram of the electronic device provided by the application. DETAILED DESCRIPTION
[0038] In order to make the objects, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described clearly and completely below in combination with the drawings in the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort belong to the scope of protection of the present application.
[0039] The present application will be described below in combination with Figures 1-4 The present application provides a test case-based chip verification method, Figure 1 is one of flowcharts of the test case-based chip verification method provided by the present application, as shown in the figure, the method comprises steps 110, 120 and 130, Figure 1
[0040] Step 110: generating a script based on a running folder of a chip to be verified.
[0041] It should be noted that the running folder of the chip to be verified is used to generate the script. It should be noted that the folder generation script referred to in the embodiments of the present application comprises the following functions: automatically generating a specified number of target folders, parsing test case function point keywords, replacing the default simulation command in the generated simulation folder with the instruction of selecting the corresponding test case file from the folder containing all test cases, and running the simulation command in the target folder corresponding to the function point.
[0042] Further, in some embodiments, the folder generation script is a test script based on the UVM framework. Specifically, the present application uses a test and script based on a verification platform development framework (UVM platform) based on SystemVerilog.
[0043] Step 120: based on the folder generation script and the test case keyword input, at least one target folder is obtained by using a pre-constructed test case folder; wherein the test case folder comprises a plurality of script files of test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder.
[0044] In step 120, the target folder is generated based on the folder generation script. Specifically, this step can be divided into two cases according to the test case keyword input: the test case keyword input is not obtained and the test case keyword input is obtained.
[0045] According to different cases, the test case folder is used to generate the target folder.
[0046] It should be explained that, asFigure 3 As shown, the test case folder is a pre-constructed script file including multiple function point test cases related to the verification of the chip to be verified, and each script file of the function point test case corresponds to a corresponding test case, and the modification of the test case can be directly performed in the folder. In some embodiments, the script file of the test case is a cshell script file, that is, its format is.csh file. That is, the existing test case is named as a.csh file by a function point and integrated into the test case folder, such as Figure 3 As shown, point1-pointn refer to different function point names, and in actual use, they are named as xx.csh.
[0047] Further, the target folder is a function point test case folder related to the test case keyword or a default function point test case folder. Specifically, when the test case keyword input condition is not obtained, the target folder is a default function point test case folder generated by the test case folder, which includes an automatically compiled file and a corresponding function point simulation command. When the test case keyword input condition is obtained, the target folder is a function point test case folder related to the test case keyword.
[0048] Step 130: running the simulation command based on the target folder to obtain the test result.
[0049] In step 130, the simulation command in the target folder obtained in step 120 is run in the target folder to call the test case in the corresponding function point test case folder to perform the running test to obtain the final test result.
[0050] In the case where multiple target folders are generated, step 130 is performed for each target folder to obtain the final test result.
[0051] The chip verification method based on the test case provided by the application simplifies the creation process of the multiple test case simulation folder and the manual operation of the simulation command, facilitates to improve the simulation efficiency, solves the process of creating multiple different folders for different test cases for simulation test in the existing chip verification simulation test, improves the simulation efficiency and the speed of coverage collection, and performs more comprehensive and clear test in a shorter time. The reliability of the verification is improved, the errors caused by the subjective judgment of the person can be reduced through the automatic verification process, thereby increasing the reliability of the product. The cost of chip development can be reduced, the manpower, time and resources can be saved through the automatic verification, and the production cost is reduced. At the same time, the automatic verification can also improve the development efficiency and shorten the chip verification time.
[0052] The step 120 is further explained as follows. In some embodiments, when the test case keyword input condition is not acquired, at least one target folder is obtained from the test case folder based on the folder generation script and the test case keyword input condition, specifically including:
[0053] Step 210: extracting test cases under the test case folder based on the folder generation script to obtain a text file storing the function point names of the test cases;
[0054] Step 220: copying the template folder based on the folder generation script; wherein the template folder includes an automatic compilation file and a default simulation command;
[0055] Step 230: renaming the copied template folder and the default simulation command under the template folder based on the function point names stored in the text file to obtain a target folder.
[0056] Specifically, as shown in Figure 2 and Figure 4 If the test case keyword is not acquired or the test case keyword is not input, in this case, in step 210, the folder generation script extracts the names of the test cases under the test case folder by default and generates a text file storing the names. The specific format of the text file is not limited by the present application and can be selected according to actual conditions.
[0057] It is emphasized that the text file stores the names of the function points in the test cases. That is, in the process of generating the text file, if a test case includes more than one function point, the names of the multiple function points included therein are stored in the text file. If a test case includes only one function point, the name of the function point is stored in the text file. The order of the function point names in the text file can be arranged according to the order of identification, which is not limited by the present application.
[0058] In one specific embodiment, the format of the text file is.txt file.
[0059] Then, in step 220, the template folder is copied based on the folder generation script. It is noted that the template folder is a simulation folder with a default name, including an automatic compilation file (such as a makefile file) and a default simulation command, which is a simulation template folder with a default name provided for copying and modification by the script. In the copying process, the number of the copied template folders is preferably the same as the number of the function point names in the text file.
[0060] In step 230, the folder generation script renames the name of the template folder copied according to the text file and the name of the default simulation command under the template folder directory. That is, the copied template folder is renamed in turn according to the function point name stored in the text file, and the name of the default simulation command under the directory is also replaced with the corresponding function point name. The obtained target folder can also be called a function point simulation folder, which is generated after the script copies the template folder and modifies the default name, and has an automatic compilation file and a corresponding function point simulation command under the directory, which is used to run the script file of the corresponding function point test case extracted by the script.
[0061] Then step 130 can be performed, that is, the modified simulation command is directly run under the folder. As shown in Figure 4 The embodiment of the present application includes a folder generation script, a template (template folder), a test case folder, and a template folder group of test_point1-test_pointn which is the template folder copied and renamed by the script.
[0062] The present application can automatically create simulation folders corresponding to different function point cases through a script, and can automatically modify the default name and replace the simulation command.
[0063] In some embodiments, in the case where the test case keyword input condition has been obtained, at least one target folder is obtained from a pre-constructed test case folder based on the folder generation script and the test case keyword input condition, specifically including:
[0064] The test case keyword is searched under the test case folder based on the folder generation script.
[0065] In the case where the folder with the name corresponding to the test case keyword exists under the test case folder, the folder with the name corresponding to the test case keyword is taken as the target folder.
[0066] Specifically, if the test case keyword is obtained, the test case folder is loaded by default, as shown in Figure 2 First, it is searched whether the folder with the name corresponding to the test case keyword exists under the test directory, and if it exists, the relevant folder is directly taken as the target folder, and then step 130 is performed, that is, simulation is performed under the corresponding folder.
[0067] Further, based on the above embodiment, in the case where the folder with the name corresponding to the test case keyword does not exist under the test case folder, a folder corresponding to the test case keyword is generated, and the name of the default simulation command in the folder is modified according to the test case keyword, to obtain the target folder.
[0068] That is, in the process of searching under the test directory whether there is a folder corresponding to the test case keyword, if the folder corresponding to the test case keyword is not searched, a folder corresponding to the test case keyword is generated under the test case folder, and the default simulation command is modified according to the test case keyword to obtain the target folder.
[0069] More specifically, the process of generating a folder corresponding to the test case keyword under the test case folder and modifying the default simulation command according to the test case keyword is similar to steps 220-230, and the present application will not be described here.
[0070] In one embodiment, the test case keyword is first split by function points, and then the template folder is copied based on the folder generation script. In the copying process, the number of copied template folders is preferably the same as the number of function points split by the test case keyword.
[0071] Then, the template folder name and the default simulation command name under the template folder directory obtained by copying are renamed according to the function points split by the test case keyword based on the folder generation script. That is, the copied template folder is renamed according to the function point name split by the test case keyword in turn, and the default simulation command name under the directory is also replaced with the corresponding function point name to obtain the target folder, which can also be called a function point simulation folder. The directory has an automatic compilation file and a corresponding function point simulation command for running the script file of the corresponding function point test case extracted by the script.
[0072] The present application can generate new simulation folders by inputting the function point name of the retest through the script and performing the retest without affecting the simulation results of other tests.
[0073] In summary, the present application extracts the simulation test case file through the script, copies the template simulation folder that can be automatically compiled and modifies the default name of the template simulation folder as the corresponding function point in the.csh file, so that the folder and the function point test case correspond one-to-one to run the simulation command. Multiple folders and corresponding function point test case folders can be generated at a time. In this way, the creation process of multiple test case simulation folders is simplified, the cost is low, and the efficiency of simulation is improved. The existing chip verification simulation test needs to create multiple folders for different test cases one by one to effectively improve the simulation efficiency and the speed of coverage collection.
[0074] Based on the above embodiment, in some embodiments, the target folder supports repeated running of multiple simulation commands.
[0075] It needs to be explained that the target folder is essentially a function point test case folder, that is, a simulation folder named by a function point generated by a script, and the running of the simulation command can be repeated under the folder.
[0076] The chip verification method based on test cases provided by the application generates a script based on a folder for running a chip to be verified; at least one target folder is obtained by using a test case folder constructed in advance based on the script generated by the folder and the input condition of a test case keyword; the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder; a simulation command is run based on the target folder to obtain a test result. The script can generate multiple function point test case folders related to tests at a time, and the simulation command is run by making the folder correspond to the function point test case one by one, which simplifies the creation process of the multiple test case simulation folder, is low in cost, facilitates the improvement of the simulation efficiency, solves the problem that multiple folders need to be created for different test cases in the existing chip verification simulation test, and effectively improves the simulation efficiency and the speed of coverage collection.
[0077] The chip verification device based on test cases provided by the application is described below, and the chip verification device based on test cases described below can be correspondingly referred to the chip verification method based on test cases described above. Figure 5 The chip verification device based on test cases provided by the application is described below, and the chip verification device based on test cases described below can be correspondingly referred to the chip verification method based on test cases described above. Figure 5 As shown in the figure, the device includes the following modules:
[0078] The starting unit 510 is configured to generate a script based on a folder for running a chip to be verified;
[0079] The folder unit 520 is configured to obtain at least one target folder by using a test case folder constructed in advance based on the script generated by the folder and the input condition of a test case keyword; the test case folder includes script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder;
[0080] The simulation unit 530 is configured to run a simulation command based on the target folder to obtain a test result.
[0081] According to the chip verification device based on test cases provided by the application, in the case that the input condition of the test case keyword is not obtained, at least one target folder is obtained by using a test case folder constructed in advance based on the script generated by the folder and the input condition of a test case keyword, and specifically includes:
[0082] generating test cases under the test case folder based on the folder generation script to obtain a text file storing the function point name of the test cases;
[0083] copying the template folder based on the folder generation script, wherein the template folder comprises an automatic compilation file and a default simulation command;
[0084] renaming the copied template folder and the default simulation command under the template folder based on the function point name stored in the text file to obtain a target folder.
[0085] According to the chip verification device based on test cases provided by the application, when the test case keyword input condition is obtained, at least one target folder is obtained from the test case folder based on the folder generation script and the test case keyword input condition, and the folder generation script comprises the following steps:
[0086] searching under the test case folder based on the test case keyword according to the folder generation script;
[0087] when the folder with the name corresponding to the test case keyword exists under the test case folder, the folder with the name corresponding to the test case keyword is taken as the target folder.
[0088] According to the chip verification device based on test cases provided by the application, searching under the test case folder based on the test case keyword according to the folder generation script, and the following steps are further included:
[0089] when the folder with the name corresponding to the test case keyword does not exist under the test case folder, a folder corresponding to the test case keyword is generated, and the name of the default simulation command in the folder is modified according to the test case keyword to obtain the target folder.
[0090] According to the chip verification device based on test cases provided by the application, the target folder supports repeated running of multiple simulation commands.
[0091] According to the chip verification device based on test cases provided by the application, the folder generation script is a test script based on the UVM framework.
[0092] The application provides a chip verification device based on test cases, which comprises the following steps: generating a script based on a folder to be verified; obtaining at least one target folder by using a test case folder pre-constructed based on the script of the folder to be verified and input conditions of a test case keyword; wherein the test case folder comprises script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder; and running a simulation command based on the target folder to obtain a test result. The application can generate multiple function point test case folders related to tests by using a script once, and makes the folder and the function point test case one-to-one corresponding to run the simulation command, thereby simplifying the creation process of the multiple test case simulation folder, reducing the cost, facilitating the improvement of the simulation efficiency, solving the problem that multiple folders need to be created for different test cases one by one in the existing chip verification simulation test, and effectively improving the simulation efficiency and the speed of coverage collection.
[0093] Figure 6 An example of a schematic diagram of a physical structure of an electronic device is shown in Figure 6 The electronic device can include a processor 610, a communications interface 620, a memory 630 and a communications bus 640, wherein the processor 610, the communications interface 620 and the memory 630 can communicate with each other through the communications bus 640. The processor 610 can call logical instructions in the memory 630 to execute a chip verification method based on test cases, which comprises the following steps: generating a script based on a folder to be verified; obtaining at least one target folder by using a test case folder pre-constructed based on the script of the folder to be verified and input conditions of a test case keyword; wherein the test case folder comprises script files of multiple test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder; and running a simulation command based on the target folder to obtain a test result.
[0094] In addition, the logic instructions in the memory 630 described above can be implemented in the form of a software function unit and sold or used as an independent product, and can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.
[0095] In another aspect, the present application also provides a computer program product, which comprises a computer program, the computer program can be stored on a non-transitory computer readable storage medium, and the computer program is executed by a processor, so that the computer can execute the chip verification method based on test cases provided by the above-mentioned methods. The method comprises: generating a script based on a folder to be verified; based on the folder generation script and the test case keyword input condition, at least one target folder is obtained by using a pre-constructed test case folder; wherein the test case folder comprises a plurality of script files of test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder; running a simulation command based on the target folder to obtain a test result.
[0096] In another aspect, the present application also provides a computer program product, which comprises a computer program, the computer program can be stored on a non-transitory computer readable storage medium, and the computer program is executed by a processor, so that the computer can execute the chip verification method based on test cases provided by the above-mentioned methods. The method comprises: generating a script based on a folder to be verified; based on the folder generation script and the test case keyword input condition, at least one target folder is obtained by using a pre-constructed test case folder; wherein the test case folder comprises a plurality of script files of test cases, and the target folder is a function point test case folder related to the test case keyword or a default function point test case folder; running a simulation command based on the target folder to obtain a test result.
[0097] The device embodiments described above are merely illustrative, wherein the units described as separate components can or can not be physically separate, and the components displayed as units can or can not be physical units, i.e., can be located in one place, or can be distributed to multiple network units. Part or all of the modules can be selected to achieve the purposes of the embodiments according to actual needs. Those skilled in the art can understand and implement without creative labor.
[0098] Through the description of the above embodiments, those skilled in the art can clearly understand that the embodiments can be realized by means of software and the necessary general hardware platform, and of course can also be realized by hardware. Based on such understanding, the above technical solutions can be embodied in the form of a software product, which can be stored in a computer readable storage medium, such as a ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the methods described in each embodiment or some parts of the embodiments.
[0099] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A chip verification method based on test cases, characterized in that, include: Scripts are generated based on the folder containing the chip to be verified; Based on the folder generation script and the input of test case keywords, at least one target folder is obtained using a pre-built test case folder; wherein, the test case folder includes script files for multiple test cases, and the target folder is a function point test case folder related to the test case keywords or a default function point test case folder; wherein, the target folder corresponds one-to-one with the function point test case; The simulation command was run based on the target folder to obtain the test results.
2. The chip verification method based on test cases according to claim 1, characterized in that, If the test case keyword input is not obtained, based on the folder generation script and the test case keyword input, at least one target folder is obtained using the pre-built test case folder, specifically including: Based on the folder, a script is generated to extract the test cases under the test case folder, resulting in a text file containing the function point names of the test cases; The template folder is copied based on the folder generation script; wherein, the template folder includes automatically compiled files and default simulation commands; Based on the function point names stored in the text file, the copied template folder and the default simulation commands under the template folder are renamed sequentially to obtain the target folder.
3. The chip verification method based on test cases according to claim 1, characterized in that, If the test case keyword input information has been obtained, based on the folder generation script and the test case keyword input information, at least one target folder is obtained using the pre-built test case folder, specifically including: Based on the folder, a script is generated to search the test case folder according to the test case keywords. If a folder with the name corresponding to the test case keyword exists under the test case folder, the folder with the name corresponding to the test case keyword shall be used as the target folder.
4. The chip verification method based on test cases according to claim 1, characterized in that, Based on the folder, a script is generated to search the test case folder according to the test case keywords, and then includes: If no folder with the name corresponding to the test case keyword exists in the test case folder, a folder corresponding to the test case keyword is generated, and the name of the default simulation command in the folder is modified according to the test case keyword to obtain the target folder.
5. The chip verification method based on test cases according to claim 1, characterized in that, The target folder supports repeated execution of simulation commands.
6. The chip verification method based on test cases according to claim 1, characterized in that, The folder generation script is a test script based on the UVM framework.
7. A chip verification device based on test cases, characterized in that, include: The start unit is used to generate scripts based on the folder containing the chip to be verified. A folder unit is used to generate scripts based on the folder and the input of test case keywords, and to obtain at least one target folder using a pre-built test case folder; wherein, the test case folder includes script files for multiple test cases, and the target folder is a function point test case folder related to the test case keywords or a default function point test case folder; wherein, the target folder corresponds one-to-one with the function point test case; The simulation unit is used to run simulation commands based on the target folder to obtain test results.
8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the chip verification method based on test cases as described in any one of claims 1 to 6.
9. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the chip verification method based on test cases as described in any one of claims 1 to 6.
10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the chip verification method based on test cases as described in any one of claims 1 to 6.
Citation Information
Patent Citations
Chip test case processing method and related device
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Simulation verification method and device of chip, computer equipment and storage medium
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