Logic lock encryption method and circuit based on tree and tree locking unit of tree

Abstract

The application discloses a logic locking encryption method based on tree and or tree tree locking units, relates to the technical field of integrated circuit design security, and comprises the following steps: obtaining a gate level netlist and analyzing the same to obtain the specific positions of and trees and or trees and equivalent and trees and or trees in a circuit and circuit gates; selecting trees according to the positional relationship between the trees, so that the number and positional relationship of the trees can meet the expected security requirements as far as possible; according to the selected trees, corresponding circuit gate positions are found, specific gates are inserted, corresponding connection relationships and circuit structures are modified, and a tree locking unit is constructed to construct an encrypted circuit. The application constructs the encrypted circuit by constructing the tree locking unit which is more coupled with the original logic in the circuit, significantly improves the resistance of the integrated circuit to reverse engineering and unauthorized modification, improves the security, the tree locking unit is mapped to different original functions according to different keys, the confusion of the circuit is increased, and different design requirements and security levels are adapted.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuit design security, and more particularly, to a logic locking encryption method and circuit based on tree locking units. BACKGROUND

[0002] In the field of integrated circuit design, with the globalization and decentralization of the supply chain, hardware security issues have become increasingly prominent. Fabless companies outsource their designs to foundries and test / assembly companies, which increases the risk of security threats such as IP piracy, hardware trojans, reverse engineering, etc. To counter these threats, logic locking technology has emerged. Logic locking involves making moderate modifications to the original circuit and inserting additional logic, and then locking and restoring the original design by introducing a key. When the correct key is not known or the original circuit structure cannot be inferred, the encrypted design is difficult for malicious actors in the supply chain to understand.

[0003] Existing logic locking techniques, especially provably secure logic locking (PSLL), make the number of iterations of SAT attacks exponentially related to the number of key bits, thereby improving security. However, PSLL has shown structural deficiencies in the face of advanced removal attacks such as GNNUnlock. This is because traditional PSLL usually places the encryption structure on the periphery of the original circuit, resulting in a low degree of coupling between the encryption circuit and the original circuit, making it easy for attackers to identify and remove. SUMMARY

[0004] The purpose of the present application is to overcome the problem of low degree of coupling between the encryption circuit and the original circuit in the prior art, which makes it easy for attackers to identify and remove, and to provide a logic locking encryption method and circuit based on tree locking units of and trees and or trees.

[0005] To achieve the above-mentioned purpose, the technical solutions of the present application are as follows:

[0006] The present application provides a logic locking encryption method based on tree locking units of and trees and or trees, comprising the following steps:

[0007] Obtain the gate-level netlist of the original circuit;

[0008] Perform circuit analysis according to the gate-level netlist to obtain the specific location and specific circuit gate of the and tree and or tree and equivalent and tree and or tree in the original circuit;

[0009] After obtaining all the trees, select trees according to the positional relationship between all the and trees and or trees, so that the number and positional relationship of the trees meet the desired security requirements as much as possible;

[0010] According to the selected tree, a corresponding circuit gate position is found in the gate netlist, a specific gate is inserted, and the corresponding connection relationship and circuit structure are modified to construct a tree locking unit;

[0011] According to the tree locking unit constructed, an encryption circuit is constructed.

[0012] Further, before the tree is selected according to the position relationship between the tree and the tree, the expected encryption strength of each single tree and the encryption strength between the tree and the tree need to be obtained.

[0013] Further, the step of obtaining the expected encryption strength of each single tree includes stripping each single tree and its fan-in cone, performing point function encryption on each single tree, and performing SAT attack on each single tree to obtain the expected encryption strength of each single tree.

[0014] Further, after obtaining the expected encryption strength of each single tree, the single tree with encryption strength not meeting the expectation is excluded, and in the remaining single trees, SAT attack is used to calculate the encryption strength between the tree and the tree.

[0015] Further, the tree is selected according to the position relationship between the tree and the tree, so that the number and position relationship of the tree can meet the expected security requirement as much as possible, specifically: according to the position relationship between the tree and the tree, the tree is selected one by one using a heuristic algorithm, and the encryption strength between the tree and the tree is used to estimate the encryption strength that can be achieved by the combination of multiple trees in real time, so as to ensure reasonable selection of the tree, so that the number and position relationship of the tree can meet the expected security requirement as much as possible.

[0016] Another aspect of the present application also provides a logic locking encryption circuit based on the tree locking unit of the tree and the tree, the encryption circuit is located in the original circuit, the encryption circuit includes at least one tree locking unit, the tree locking unit includes a bypass circuit and an or tree or an and tree selected in the original circuit, the input of the tree locking unit includes the original input of the or tree or the and tree and the key input, and the final circuit output is obtained by performing exclusive or operation on the protected circuit output through the exclusive or gate.

[0017] Further, the and tree and the or tree selected in the original circuit are at least three-input trees.

[0018] Further, each original input of the tree corresponds to one key input and jointly controls the input of the bypass circuit.

[0019] Further, in each of the tree locking units, all outputs obtained by performing XOR operation on each of the original inputs of the tree and the corresponding key inputs respectively through an XOR gate and then performing AND operation on the outputs through an AND gate are bypass circuit outputs of the tree locking unit.

[0020] Further, the encryption circuit comprises a tree locking unit and an or tree locking unit, the bypass circuit of the tree locking unit further comprises a NOT gate, after all outputs obtained by performing XOR operation on each of the original inputs of the tree and the corresponding key inputs respectively through an XOR gate and then performing AND operation on the outputs through an AND gate, the final bypass circuit output of the tree locking unit is obtained through the NOT gate, and the final bypass circuit output of the tree locking unit and the original output of the tree are obtained through an AND gate to obtain the present output of the tree.

[0021] The bypass circuit output of the or tree locking unit and the original output of the or tree are obtained through an OR gate to obtain the present output of the or tree.

[0022] The bypass circuit output of the tree locking unit before the NOT gate and the bypass circuit output of the or tree locking unit are obtained through an AND gate to obtain the encryption circuit output, and the encryption circuit output is obtained through an XOR gate with the protected circuit output to obtain the final circuit output.

[0023] Compared with the prior art, the present application has the following beneficial effects:

[0024] The present application provides a logic locking encryption method based on tree locking units of and trees and or trees in a circuit, which has high flexibility. It can be used as an independent mechanism, a security enhancement mechanism of a traditional provably secure logic locking structure, and a combination with some advanced locking mechanisms to adapt to different design requirements and security levels. By constructing tree locking units that are more coupled with original logic inside the circuit, the present application significantly improves the resistance of integrated circuits to reverse engineering and unauthorized modification. Compared with traditional peripheral encryption structures, the tree locking units are more difficult to be identified and removed by malicious objects. The tree locking units can be mapped to different original functions according to different keys, which increases the confusion of the circuit and makes it difficult for malicious objects to infer the real function and effect of the tree locking units even if they find them. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is a flowchart of a logic locking encryption method based on tree locking units of and trees and or trees according to the present application;

[0026] Figure 2 is a schematic diagram of a traditional provably secure logic locking structure;

[0027] Figure 3 is an internal structure diagram of a primitive circuit of Embodiment 1 of the present application;

[0028] Figure 4 is a diagram of a tree-locked unit using a three-input AND tree of Embodiment 1 of the present application;

[0029] Figure 5 is a diagram of an overall structure of a circuit encrypted by a simple logic-locked encryption method based on a tree-locked unit of the present application;

[0030] Figure 6 is a diagram of a construction method of a tree-locked unit with confusion of Embodiment 2 of the present application;

[0031] Figure 7 is a diagram of a specific structure of a logic-locked encryption circuit based on a tree-locked unit of an AND tree and an OR tree of Embodiment 3 of the present application. DETAILED DESCRIPTION

[0032] In order to more clearly understand the above-mentioned purposes, features and advantages of the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other without conflict.

[0033] In the following description, a large number of specific details are set forth in order to facilitate a thorough understanding of the present application, however, the present application can also be implemented in other ways different from those described herein, and therefore, the protection scope of the present application is not limited by the specific embodiments disclosed below.

[0034] Embodiment 1

[0035] Please refer to Figure 2 , Figure 2 is a diagram of a traditional provably secure logic-locked structure, primitive circuit / modified circuit: the primitive circuit is a designed circuit owned by the intellectual property of the designer, which needs to be completed by a third party for production and testing. The primitive circuit may be modified to deal with some security threats, or it may not be modified at all, relying only on the protection of the peripheral encryption circuit. Among them, the input and output of the primitive circuit are circuit input and circuit output. Encryption circuit: a circuit used to realize the encryption function in the traditional provably secure logic-locked. The input of the encryption circuit is the protected input and the key input. The protected input is selected by the designer himself according to the security requirements in the circuit input. The output of the encryption circuit and the original circuit output are operated by an XOR gate. Whether the key is correct or not determines whether the circuit output is correct or not. The external encryption circuit is convenient for resisting SAT attack, but it is vulnerable to removal attack. Removal attack refers to deleting the encryption part of the circuit directly by analysis.

[0036] There are often many small circuits in the original circuit, which are constructed only by AND gates and only by OR gates, which can be called AND trees and OR trees. At the same time, there are many equivalent AND trees and OR trees in logic. If the original circuit structure allows, the desired security performance can be achieved. By reasonably selecting a specified number of trees inside the original circuit to construct a specified number of tree locked units (TLUs), and constructing an encryption circuit through the tree locked units, the defense performance of provably secure logic locking against SAT attacks can be achieved, while improving their defects of not resisting removal attacks.

[0037] Referring to Figure 1 The embodiment of the present application provides a tree locked unit logic locking encryption method based on AND trees and OR trees, comprising the following steps:

[0038] S1: Obtain the gate-level netlist of the original circuit.

[0039] The gate-level netlist is a description file in circuit design, which contains all the information of the circuit design. The gate-level netlist describes the connection relationship between each logic gate (such as AND gate, OR gate, NOT gate, etc.) in the circuit, which is the basic unit of digital circuit.

[0040] S2: According to the gate-level netlist, the circuit is analyzed to obtain the specific position and specific circuit gate of the AND tree and OR tree and the equivalent AND tree and OR tree in the original circuit.

[0041] S3: After obtaining all the trees, the trees are selected according to the positional relationship between the trees, so that the number and positional relationship of the trees can meet the desired security requirements as much as possible.

[0042] After obtaining all the trees, the trees need to be screened and selected. First, the single tree and its fan-in cone are stripped, then the single tree is simply point function encrypted in the circuit, and SAT attack is performed, which can know the expected encryption strength of the single tree. After judging the expected encryption strength of all single trees in the same way, the single trees with encryption strength not meeting the expectation are excluded. In the remaining single trees, the encryption strength between the trees is calculated two by two using SAT attack. Use heuristic algorithm to select trees one by one, and use the encryption strength between the trees to estimate the encryption strength that the combination of the multiple trees can achieve in real time, to ensure the reasonable selection of the trees, so that the number and positional relationship of the trees can meet the desired security requirements as much as possible.

[0043] S4: According to the selected trees, find the corresponding circuit gate position in the gate-level netlist, insert the specific gate, and modify the corresponding connection relationship and circuit structure to construct the tree locked unit.

[0044] S5: Construct the encryption circuit according to the constructed tree locking unit.

[0045] As shown in Figure 3 A circuit composed of multiple gates is called a tree. A circuit composed of only AND gates is called an AND tree. A circuit composed of only OR gates is called an OR tree. The output of an AND tree is only 1 in one input case, while the output of an OR tree is only 0 in one input case. Meanwhile, small circuits that are functionally equivalent to AND trees and OR trees are also classified as AND trees and OR trees, and the number of inputs of AND trees and OR trees is not necessarily 3. Small logic trees that are often ubiquitous in the internal structure of original circuits include AND trees, OR trees, and equivalent AND trees and OR trees (equivalent representation that the output is still only 1 or 0 in one input case), and the dashed lines indicate that these trees are part of the original circuit rather than existing independently, and their inputs and outputs are often connected to other gates in the internal structure of the original circuit. The present application uses the ubiquitous small logic trees in the internal structure of the original circuit to construct tree locking units and encryption circuits. One construction method of the tree locking unit is shown in Figure 4 Please refer to Figure 5 , Figure 5 The overall structure of the encrypted circuit after the circuit is encrypted by the tree locking unit (TLU) based logic encryption method proposed in Embodiment 1 is shown in the figure. The dashed line indicates that the encryption circuit is part of the internal structure of the circuit, and it works together with other parts to realize the function of the original circuit. The output of the encryption circuit is XORed with the output of the protected circuit to obtain the final circuit output. The encryption structure constructed by the logic locking encryption method proposed in Embodiment 1 is different from the traditional provably secure logic locking of Figure 2 Instead of directly adding a large encryption structure to the periphery of the original circuit, the tree locking unit is constructed based on the trees in the internal structure of the original circuit, and the encryption circuit is constructed according to the tree locking unit. This increases the coupling degree of the encryption circuit and the original circuit, making it more difficult to distinguish compared to the traditional structure, and increasing the difficulty of removing attacks.

[0046] Through reasonable tree selection strategy, the structure of the encryption circuit constructed by the encryption method of Embodiment 1 can achieve the same order of magnitude of SAT attack resistance as the traditional provably secure logic locking, as long as the original circuit structure itself allows.

[0047] In the design of the tree locking unit, the present embodiment 1 adopts a concept of a confusing tree locking unit. Through careful selection and modification of the tree and specific design of the locking unit, the confusing tree locking unit can exist in multiple different original logic function possibilities under the same local structure, which increases the difficulty of maliciously inferring the original circuit function, so that the malicious behavior object is difficult to restore the original design by removing or modifying the locking unit without knowing the correct key or the original circuit structure, further increasing the difficulty of implementing the removal attack.

[0048] The logic locking encryption method of the present embodiment 1 has good compatibility with the traditional provably secure logic locking, can be combined with it, so that it obtains the ability to resist advanced removal attacks such as GNNUnlock, and still retains the security features of the original encryption mechanism.

[0049] Embodiment 2

[0050] The present embodiment 2 further describes a confusing tree locking unit of embodiment 1 based on embodiment 1, as follows:

[0051] Please refer to Figure 6 , Figure 6 is a schematic diagram of a simple tree locking unit with confusion of the present embodiment 2. The tree locking unit itself is located inside the circuit, and is more coupled with the original circuit compared to the traditional provably secure logic locking. Through careful structural modification of the original tree structure and specific adaptation of the encryption circuit, a locking unit with confusion can be realized. As shown in Figure 6 , for a small AND tree composed of two AND gates, one of the AND gates is modified to an OR gate. Then, a small tree composed of one AND gate and one OR gate can be found in the original circuit, but no structural modification is performed. For the two trees with consistent current structure but inconsistent original circuit structure, the same encryption circuit can be used for encryption to form a tree locking unit with confusion, and the only difference between the two locking units is the correct key value. A small tree composed of one OR gate and one AND gate can also be constructed in the same way to form a confusing locking unit. This makes the locally identical circuit structure can map different original circuit functions, and such unit structure can exist in large quantities in the circuit. This increases the difficulty of maliciously inferring the original circuit function, so that the malicious behavior object will have great risk every time the encryption structure in the tree locking unit is removed without knowing the correct key or the original circuit structure.

[0052] Embodiment 3

[0053] This embodiment 3 is based on embodiment 1, and applies the logical locking encryption method based on the tree locking unit of the AND tree and OR tree in embodiment 1 to provide a logical locking encryption circuit based on the tree locking unit of the AND tree and OR tree, which is specifically as follows:

[0054] Please refer to Figure 7 , Figure 7 This is a specific structure diagram of the logical locking encryption circuit based on the tree locking unit of the AND tree and OR tree in this embodiment 3.

[0055] An AND tree with three inputs and one output is found in the original circuit, and a small bypass circuit and an AND gate are added to the tree locking unit based on the AND tree compared with the original circuit.

[0056] The bypass circuit is jointly controlled by the original inputs of the AND tree and key inputs KI1, KI2 and KI3, and includes three XOR gates, a three-input AND gate and a NOT gate. The output of the bypass circuit and the original output of the AND tree are subjected to AND operation through an AND gate to obtain the present output of the AND tree. The inverter (NOT gate) in the bypass circuit of the AND tree tree locking unit makes the circuit output 0 instead of 1 when the AND tree input and KI satisfy the comparison relationship.

[0057] As for the single OR tree, the tree locking unit based thereon is as shown in the lower half Figure 7 The lower half shows that the structure of the tree locking unit based on the AND tree is similar to that of the tree locking unit based on the OR tree, and the final encryption effects of the two types of trees are basically the same. Finally, the bypass circuit outputs of the AND tree tree locking unit and the OR tree tree locking unit pass through an AND gate to form the encryption circuit identified by the dashed line. The encryption circuit will finally still pass through the XOR gate to perform XOR operation with the output of the protected circuit, i.e., the present output of the AND tree and the present output of the OR tree, to achieve the expected SAT attack resistance. It should be noted that the encryption circuit in this embodiment 3 includes an AND tree tree locking unit and an OR tree tree locking unit, and a plurality of tree locking units can be set in the actual circuit according to the needs.

[0058] In this embodiment 3, the structure of the encryption circuit is basically the same as that of the comparison structure in the conventional provably secure logical locking. In addition, the small bypass circuit only injects errors in a few cases and almost does not affect the operation of the comparison structure. In the case where the original circuit structure itself allows, after reasonable tree selection, the structure can achieve almost the same expected resistance as the conventional provably secure logical locking.

[0059] In summary, the present application proposes a logical locking encryption method and encryption circuit based on the tree locking unit of the AND tree and OR tree, which has the following advantages:

[0060] 1) Improved security: By building lock cells that are more tightly coupled to the original logic within the circuit, the invention significantly improves the resistance of integrated circuits to reverse engineering and unauthorized modifications. Compared to traditional peripheral encryption structures, tree lock cells are more difficult to identify and remove by malicious actors.

[0061] 2) Enhanced obfuscation: Tree lock cells can be mapped to different original functions depending on different keys. This design increases the obfuscation of the circuit, making it difficult for malicious actors to infer the true function and role of the lock cells even if they are discovered.

[0062] 3) Improved flexibility and adaptability: The technical solution of the invention has high flexibility and can be combined with traditional logic locking techniques and some advanced locking mechanisms to adapt to different design requirements and security levels.

[0063] Obviously, the above embodiments of the invention are only examples for clearly illustrating the invention, and are not a limitation on the embodiments of the invention. Based on the above description, other different forms of changes or variations can be made by those skilled in the art. Here, it is not necessary and impossible to exhaust all the embodiments. Any modification, equivalent replacement and improvement made within the spirit and principle of the invention shall be included in the protection scope of the claims of the invention.

Claims

1. A logic locking encryption method based on a tree and or tree locking unit of a tree, characterized by, The method comprises the following steps: obtaining a gate-level netlist of an original circuit; performing circuit analysis according to the gate-level netlist to obtain specific locations of and trees and equivalent and trees in the original circuit and specific circuit gates; after obtaining all and trees and or trees, selecting trees according to the positional relationship between the and trees and or trees so that the number and positional relationship of the trees meet the desired security requirements as much as possible; finding corresponding circuit gate locations in the gate-level netlist according to the selected trees, inserting specific gates, modifying corresponding connection relationships and circuit structures, and constructing tree locking units; constructing an encrypted circuit according to the constructed tree locking units; before selecting the trees according to the positional relationship between the and trees and or trees, the expected encryption strength of each tree and the encryption strength between trees are obtained; the step of obtaining the expected encryption strength of each tree comprises: stripping each single tree and its fan-in cone, performing point function encryption on each single tree, and performing SAT attack on each single tree to obtain the expected encryption strength of each tree; after obtaining the expected encryption strength of each tree, the single trees with encryption strength not meeting the expected encryption strength are excluded, and the encryption strength between trees is calculated by using SAT attack in the remaining single trees; the selection of the trees according to the positional relationship between the and trees and or trees is performed by using a heuristic algorithm to select the trees one by one, and the encryption strength between the trees is used to estimate the encryption strength that can be achieved by the combination of multiple trees in real time, so as to ensure the reasonable selection of the trees and make the number and positional relationship of the trees meet the desired security requirements as much as possible.

2. A logic locking encryption circuit based on tree and or tree locking unit of tree, for applying the logic locking encryption method based on tree and or tree locking unit of tree as claimed in claim 1, characterized in that, The encrypted circuit is located inside the original circuit, and the encrypted circuit comprises at least one tree locking unit, the tree locking unit comprises a bypass circuit and an or tree or an and tree selected from the original circuit, the input of the tree locking unit comprises the original input and the key input of the or tree or the and tree, and the output of the encrypted circuit is obtained by performing XOR operation on the output of the protected circuit.

3. The logic locking encryption circuit based on tree and or tree locking unit of a tree lock cell according to claim 2, wherein, The and tree and the or tree selected from the original circuit are at least three-input trees.

4. The logic locking encryption circuit based on tree and or tree locking unit of a tree lock cell according to claim 3, wherein, Each original input of the tree corresponds to a key input and jointly controls the input of the bypass circuit.

5. The logic locking encryption circuit based on tree and or tree locking unit of a tree lock cell according to claim 4, wherein, In each tree locking unit, all outputs obtained by performing XOR operation on each original input of the tree and the corresponding key input through an XOR gate are subjected to AND operation through an AND gate to obtain the bypass circuit output of the tree locking unit.

6. The logic locking encryption circuit based on tree and or tree locking unit of a tree lock cell according to claim 5, wherein, The encryption circuit comprises an AND-tree lock unit and an OR-tree lock unit, the bypass circuit of the AND-tree lock unit further comprises a NOT gate, all outputs obtained by performing XOR operation on each original input of the AND-tree and a corresponding key input respectively through an XOR gate and then performing AND operation on the outputs through an AND gate are input into the NOT gate to obtain the final bypass circuit output of the AND-tree lock unit, the final bypass circuit output of the AND-tree lock unit and the original output of the AND-tree are input into an AND gate to obtain the present output of the AND-tree; the bypass circuit output of the OR-tree lock unit and the original output of the OR-tree are input into an OR gate to obtain the present output of the OR-tree; the bypass circuit output of the AND-tree lock unit before the NOT gate and the bypass circuit output of the OR-tree lock unit are input into an AND gate to obtain the output of the encryption circuit, the output of the encryption circuit is input into an XOR gate to perform XOR operation on the protected circuit output to obtain the final circuit output.

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