A manufacturing method of a display panel, a display panel and a display device

Abstract

The application discloses a manufacturing method of a display panel, the display panel and a display device. The display panel comprises a plurality of patterned film layers formed on a substrate. The method comprises: taking the coordinate information of the substrate as a reference coordinate system, forming a first layer of patterned film layer on the substrate; forming a material layer of an Nth layer of patterned film layer (N>=2) on the side of the first layer of patterned film layer away from the substrate; performing a first test exposure process on the Nth layer of patterned film layer to obtain a first mark and first coordinate information of the first mark; performing a second test exposure process on the Nth layer of patterned film layer to obtain a second mark and second coordinate information of the second mark; using the first coordinate information and the second coordinate information to obtain an adjacent film layer deviation between the (N-1)th layer of patterned film layer and the Nth layer of patterned film layer; and using the adjacent film layer deviation to perform a material exposure process and an etching process on the material layer of the Nth layer of patterned film layer to form the Nth layer of patterned film layer.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display. More particularly, it relates to a manufacturing method of display panel, display panel and display device. BACKGROUND

[0002] At present, with the demand of customers for high-definition, multi-functional display function of display products, the process precision between adjacent film layers at AA area position of large-size product directly determines whether the display product can meet the performance requirement.

[0003] The existing large-size display product cannot effectively design the test cover layer precision pattern at the AA area position, so it cannot accurately measure the cover layer precision at the AA area center position. For low-resolution products, the influence is not great, but for high-PPi, high-precision products, the influence is fatal. Therefore, how to increase the process precision between adjacent film layers at AA area position of large-size product is one of the problems to be solved. SUMMARY

[0004] The present application aims to provide a manufacturing method of display panel, display panel and display device to solve at least one of the problems in the prior art.

[0005] To achieve the above-mentioned purpose, the present application adopts the following technical scheme:

[0006] The first aspect of the present application provides a manufacturing method of display panel, the display panel comprising a plurality of patterned film layers formed on a substrate, the method comprising:

[0007] forming a first layer of patterned film layer on the substrate with the coordinate information of the substrate as the reference coordinate system;

[0008] forming a material layer of the Nth layer of patterned film layer (N≥2) on the side of the first layer of patterned film layer away from the substrate;

[0009] performing a first test exposure process on the Nth layer of patterned film layer to obtain a first mark and first coordinate information of the first mark;

[0010] performing a second test exposure process on the Nth layer of patterned film layer to obtain a second mark and second coordinate information of the second mark;

[0011] using the first coordinate information and the second coordinate information to obtain the adjacent film layer deviation between the (N-1)th layer of patterned film layer and the Nth layer of patterned film layer;

[0012] using the adjacent film layer deviation to perform material exposure process and etching process on the material layer of the Nth layer of patterned film layer to form the Nth layer of patterned film layer.

[0013] In an optional embodiment, a first patterned film layer is formed on the substrate, further comprising:

[0014] A material layer on which a first patterned film layer is formed in the substrate;

[0015] A first sacrificial layer is formed on the material layer of the first patterned film layer;

[0016] The first sacrificial layer is subjected to a deformation exposure process to obtain the deformation data of the material layer of the first patterned film layer;

[0017] The deformation data is used to compensate for the material layer (N=2) forming the second patterned film layer.

[0018] In an optional embodiment, the orthographic projections of the first identifier on the substrate and the second identifier on the substrate are located in the display area of ​​the substrate.

[0019] The first and second marks at the same location have at least overlapping projections in their orthographic projections on the substrate.

[0020] In an optional embodiment, before performing the first test exposure process on the Nth patterned film layer, the method further includes forming an Nth test sacrificial layer on the material layer of the Nth patterned film layer (N≥2);

[0021] The first test exposure process for the Nth patterned film layer further includes:

[0022] Using the coordinate information of the (N-2)th patterned film layer, a first test exposure process is performed on the Nth test sacrificial layer to form a first identifier. Using the coordinate information of the (N-2)th patterned film layer as a reference coordinate system, the first coordinate information of the first identifier is obtained.

[0023] When N=2, the second test sacrificial layer is subjected to a first test exposure process using the coordinate information of the substrate to form a first identifier, and the first coordinate information of the first identifier is obtained using the coordinate information of the substrate as a reference coordinate system.

[0024] In an optional embodiment, the Nth patterned film layer undergoes a second test exposure process, further comprising:

[0025] The Nth test sacrificial layer is subjected to a second test exposure process using the coordinate information of the (N-1)th patterned film layer to form a second identifier, and the second coordinate information of the second identifier is obtained using the coordinate information of the (N-1)th layer as a reference coordinate system.

[0026] In an optional embodiment, the material exposure and etching process for the Nth patterned film layer using the adjacent film layer deviation further includes:

[0027] The Nth test sacrificial layer at the second marked position is etched to expose the material layer of the Nth patterned film layer.

[0028] An Nth process sacrificial layer is formed on the material layer through which the Nth patterned film layer is exposed;

[0029] The Nth process sacrificial layer and the material layer of the Nth patterned film layer are exposed and etched using the adjacent film layer deviation to form the Nth patterned film layer.

[0030] In an optional embodiment, the orthographic projection of the first mark on the substrate does not coincide with the orthographic projection of the first patterned film layer on the substrate, and the orthographic projection of the Nth patterned film layer on the substrate does not coincide.

[0031] The orthographic projection of the second identifier on the substrate does not coincide with the orthographic projection of the first patterned film layer on the substrate, and the orthographic projection of the Nth patterned film layer on the substrate does not coincide.

[0032] In an optional embodiment, the substrate includes a test substrate and a process substrate, and the method further includes:

[0033] A first patterned film layer is formed on the test substrate;

[0034] A material layer with an Nth patterned film layer (N≥2) is formed on the side of the first patterned film layer away from the test substrate;

[0035] A first test exposure process is performed on the Nth patterned film layer to obtain a first identifier and the first coordinate information of the first identifier;

[0036] A second test exposure process is performed on the Nth patterned film layer to obtain the second identifier and the second coordinate information of the second identifier;

[0037] The first coordinate information and the second coordinate information are used to obtain the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer;

[0038] The material layer of the Nth patterned film layer is subjected to material exposure and etching processes using the deviation between adjacent film layers to form the Nth patterned film layer, until all film layers of the display panel are completed;

[0039] The entire film layer of the display panel is formed on the process substrate by utilizing the adjacent film layer deviation of the entire film layer of the display panel obtained on the test substrate.

[0040] In an optional embodiment, the plurality of patterned film layers include a metal shielding layer, a metal trace layer, various conductive layers for driving transistors formed on a substrate, and a plurality of interlayer insulating film layers that pattern the conductive layers to insulate them.

[0041] In an optional embodiment, when the Nth patterned film layer and the (N+1)th patterned film layer are conductive layers, after forming the Nth patterned film layer, the method further includes:

[0042] An interlayer insulating film layer is formed on the side of the Nth patterned film layer away from the substrate to insulate the (N+1)th patterned film layer;

[0043] The (N+1)th patterned film layer is formed on the side away from the substrate of the interlayer insulating film layer that insulates the (N+1)th patterned film layer;

[0044] Wherein, when N is 2 and both the first patterned film layer and the second patterned film layer are conductive film layers, the step of forming the first patterned film layer on the substrate includes:

[0045] An interlayer insulating film layer is formed on the side of the first patterned film layer away from the substrate, which is insulated from the second patterned film layer;

[0046] A second patterned film layer is formed on the side of the interlayer insulating film layer that is insulated from the substrate.

[0047] In an optional embodiment, a plurality of display panels are formed at different locations on the same substrate, the plurality of display panels being arranged in an array in a first direction or a second direction, and adjacent display panels having gaps in their orthographic projection onto the substrate.

[0048] In an optional embodiment, the first and second identifiers are projected onto the substrate in the gap between adjacent display panels or at the respective boundary edges of the substrate.

[0049] A second aspect of the present invention provides a display panel, including the method for manufacturing the display panel described in the first aspect of the present invention.

[0050] A third aspect of the present invention provides a display device, including the display panel described in the first aspect of the present invention.

[0051] The beneficial effects of this invention are as follows:

[0052] The manufacturing method of this invention is applied to the exposure process of each patterned film layer of a display panel. The exposure process is divided into a test exposure process and a material exposure process. The first test exposure process and the second test exposure process are used to obtain the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer. Then, in the material exposure process of formal production, the adjacent film layer deviation is used to manufacture each patterned film layer of the display panel to reduce the process deviation between adjacent film layers and improve the yield and accuracy of the display panel. Attached Figure Description

[0053] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0054] Figure 1 This diagram illustrates the distribution of alignment marks in the manufacturing process of a display panel using related technologies.

[0055] Figure 2 A schematic diagram illustrating the manufacturing process of the display panel according to the first embodiment of the present invention is shown.

[0056] Figure 3 A schematic diagram of the layer structure of the driving transistors of the display panel according to an embodiment of the present invention is shown;

[0057] Figure 4 A flowchart illustrating the film layer fabrication process of a display panel according to an embodiment of the present invention is shown.

[0058] Figure 5 This diagram illustrates the structure of the first and second identifiers according to an embodiment of the present invention.

[0059] Figure 6 This diagram shows the process flow chart for fabricating an N=4 patterned film layer, where the fourth patterned film layer is the source / drain electrode layer, according to an embodiment of the present invention.

[0060] Figure 7 This diagram illustrates the distribution of a first identifier and a second identifier according to an embodiment of the present invention.

[0061] Figure 8 This diagram illustrates the arrangement of a display panel according to an embodiment of the present invention.

[0062] Figure 9 This diagram illustrates another arrangement of the display panel according to an embodiment of the present invention;

[0063] Figure 10 A schematic diagram illustrating the manufacturing process of a display panel according to another embodiment of the present invention is shown.

[0064] Figure 11 Show Figure 10 A schematic diagram of the arrangement of the first identifier in step S1005 of the method shown;

[0065] Figure 12 Show Figure 11 A schematic diagram of the arrangement of the second identifier in step S1007 of the method shown. Detailed Implementation

[0066] To more clearly illustrate the present invention, the following description, in conjunction with embodiments and accompanying drawings, further explains the invention. Similar components in the drawings are indicated by the same reference numerals. Those skilled in the art should understand that the specific description below is illustrative rather than restrictive and should not be construed as limiting the scope of protection of the present invention.

[0067] Figure 1 This illustrates the distribution of alignment marks 30 on the substrate to ensure process precision when multiple display panels 20 are simultaneously formed on the same substrate 10 for existing large-size display products. Figure 1 As can be seen, the alignment mark 30 is set on the outside of the display panel 20. However, due to the large size of the display panel 20, it is not possible to effectively design the alignment mark 30 at the AA area of ​​the display panel 20 to ensure the film layer deviation between each film layer of each display panel.

[0068] Therefore, embodiments of the present invention disclose a method for manufacturing a display panel, a display panel, and a display device to solve the above-mentioned problems.

[0069] The first embodiment of the present invention proposes a method for manufacturing a display panel, the display panel comprising a plurality of patterned film layers formed on a substrate. In this embodiment, each patterned film layer of the display panel can be formed using a laser direct writing exposure process.

[0070] In an optional embodiment, the plurality of patterned film layers include a metal shielding layer, a metal trace layer, various conductive layers for driving transistors formed on a substrate, and a plurality of interlayer insulating film layers that pattern the conductive layers to insulate them.

[0071] For example, each conductive layer of the driving transistor may include an active layer, a gate layer, and source / drain electrode layers. The metal trace layer may include a gate signal line electrically connected to the gate layer; a source signal line or drain signal line, or other signal transmission line, etc., electrically connected to the source / drain electrode layers; and an interlayer insulating layer may include a first insulating layer, a second insulating layer, or a third insulating layer, etc. Those skilled in the art design according to actual applications, and will not be elaborated here.

[0072] In embodiments of the present invention, such as Figure 2 As shown, the method includes:

[0073] S10. Using the coordinate information of the substrate 10 as a reference coordinate system, a first patterned film layer is formed on the substrate 10.

[0074] S30. A material layer of Nth patterned film layer (N≥2) is formed on the side of the first patterned film layer away from the substrate 10;

[0075] S50. Perform a first test exposure process on the Nth patterned film layer to obtain a first identifier and the first coordinate information of the first identifier;

[0076] S70. Perform a second test exposure process on the Nth patterned film layer to obtain the second identifier and the second coordinate information of the second identifier;

[0077] S90. Using the first coordinate information and the second coordinate information, the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer is obtained;

[0078] S110. Using the deviation between adjacent film layers, perform material exposure and etching processes on the material layer of the Nth patterned film layer to form the Nth patterned film layer.

[0079] The manufacturing method of this invention is applied to the exposure process of each patterned film layer in a display panel, dividing the exposure process into a test exposure process and a material exposure process.

[0080] In the test exposure process stage, the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer is obtained using the first test exposure process and the second test exposure process. In the material exposure process stage of formal production, the adjacent film layer deviation is used to fabricate each patterned film layer of the display panel. Through the above steps, the manufacturing method of this embodiment can effectively reduce the process deviation between adjacent film layers in the manufacturing process, thereby improving the yield and accuracy of the display panel.

[0081] The manufacturing method of this invention will now be described:

[0082] S10, A first patterned film layer 211 is formed on the substrate 10.

[0083] In an optional embodiment, step S10, "forming a first patterned film layer 211 on the substrate 10," further includes:

[0084] S11, A material layer for forming a first patterned film layer 211 on the substrate 10;

[0085] S13. A first sacrificial layer is formed on the material layer of the first patterned film layer 211;

[0086] S15. Perform a deformation exposure process on the first sacrificial layer to obtain the deformation data of the material layer of the first patterned film layer 211.

[0087] S17. The material layer of the second patterned film layer when N is 2 is compensated using the deformation data.

[0088] In this embodiment of the invention, the first patterned film layer 211 is the first patterned film layer formed by the exposure process in the manufacturing process of the display panel. After obtaining the deformation data of the first test sacrificial layer after the deformation exposure process, the deformation data of the material layer caused by the exposure energy in the laser processing process can be obtained. The deformation data is then used to compensate in subsequent processes to reduce process errors and improve processing accuracy, thereby improving the product yield and process accuracy of the display panel.

[0089] In this embodiment, the coordinates of the first patterned film layer 211 obtained in step S10 are based on the coordinates of the substrate 10 as a reference coordinate system. In other words, the coordinates of the first patterned film layer 211 are based on the coordinates of the laser processing equipment as a reference system, thus forming the coordinates of the first patterned film layer 211 itself, which serve as the coordinate basis for subsequent patterned film layers.

[0090] When both the (N-1)th patterned film layer and the Nth patterned film layer are conductive layers, before forming the material layer of the Nth patterned film layer (N≥2) on the side of the first patterned film layer 211 away from the substrate 10, the method further includes:

[0091] S21. An interlayer insulating film layer is formed on the side of the (N-1)th patterned film layer away from the substrate 10 to insulate the Nth patterned film layer;

[0092] S22. A material layer of the Nth patterned film is formed on the side of the interlayer insulating layer that insulates the (N-1)th patterned film layer and the Nth patterned film layer away from the substrate 10;

[0093] In an optional embodiment, when N is 2 and both the first patterned film layer 211 and the second patterned film layer 222 are conductive films, step S10, "forming the first patterned film layer 211 on the substrate 10," includes: forming an interlayer insulating film layer on the side of the first patterned film layer 211 away from the substrate 10 to insulate the second patterned film layer 222, i.e., forming a first insulating layer 241 on the first patterned film layer. Step S30 is then performed after step S20, i.e., forming a material layer for the second patterned film layer 222 on the side of the first insulating layer 241 away from the substrate 10.

[0094] In a specific example, such as Figure 3As shown, taking a first patterned film layer 211 as a metal shielding layer 211 formed on the substrate 10 and a second patterned film layer 222 as an active layer 222 formed on the metal shielding layer 211 as an example, after the metal shielding layer 211 is formed on the substrate 10, a first insulating layer 241 is formed on the metal shielding layer 211, and then a material layer of the active layer 222 is formed on the first insulating layer 241. A second insulating layer 242 is formed on the active layer 222, a gate layer 223 is formed on the second insulating layer 242, and a third insulating layer 243 is formed on the gate layer 223.

[0095] S30. A material layer of Nth patterned film layer (N≥2) is formed on the side of the first patterned film layer 211 away from the substrate 10.

[0096] It is worth noting that in this embodiment of the invention, N≥2, meaning that the manufacturing method of this embodiment is applicable to each patterned film layer formed in subsequent processes of the first patterned film layer 211, such as the second patterned film layer 222 when N=2, the third patterned film layer 223 when N=3, and the fourth patterned film layer 224 when N=4, etc. That is, the phrase "on the side of the first patterned film layer 211 away from the substrate 10" in this embodiment of the invention does not limit it to being adjacent to the first patterned film layer 211, but rather, it can be disposed above the first patterned film layer 211, and can all serve as the Nth patterned film layer (N≥2) in this embodiment.

[0097] In this step, the Nth patterned film layer (N≥2) formed in this embodiment is not the final Nth patterned film layer (N≥2). Instead, the entire material layer needs to be coated first, and then the material layer needs to be exposed to form the final Nth patterned film layer (N≥2).

[0098] In an optional embodiment, before step S50 "performing the first test exposure process on the Nth patterned film layer", the method further includes step S40: forming the Nth test sacrificial layer on the material layer of the Nth patterned film layer (N≥2).

[0099] In step S30, a material layer for forming a second patterned film layer 222 is formed over the first insulating layer 241 on the first patterned film layer 211, for example, as... Figure 4 As shown, after the active layer 222 is formed on the first insulating layer 241, step S40 is performed to form a second test sacrificial layer 232 on the active layer 222. For example, the second test sacrificial layer 232 may be a photoresist layer.

[0100] S50. Perform a first test exposure process on the Nth patterned film layer to obtain a first identifier and the first coordinate information of the first identifier.

[0101] In an optional embodiment, step S50, "the first test exposure process for the Nth patterned film layer," further includes:

[0102] The first test exposure process is performed on the Nth test sacrificial layer using the coordinate information of the (N-2)th patterned film layer to form the first identifier, and the first coordinate information of the first identifier is obtained using the coordinate information of the (N-2)th patterned film layer as the reference coordinate system.

[0103] When N=2, the second test sacrificial layer 232 is subjected to a first test exposure process based on the coordinate information of the substrate 10 to form a first identifier 31, and the first coordinate information of the first identifier 31 is obtained by using the coordinate information of the substrate 10 as a reference coordinate system.

[0104] In this embodiment, the first test exposure process patterns the material of the Nth test sacrificial layer, thereby forming a patterned first identifier 31, for example... Figure 5 The logo structure formed by the outer frame of the cross-shaped logo shown.

[0105] In a specific example, such as Figure 3 As shown, the first patterned film layer 211 is a metal shielding layer 211, the second patterned film layer 222 is an active layer 222 when N=2, the third patterned film layer 223 is a gate layer 223 when N=3, and the fourth patterned film layer 224 is a source / drain electrode layer 224 when N=4.

[0106] When N=2, such as Figure 4 As shown, a second test sacrificial layer 232 is formed on the active layer 222. In this step, since the coordinates of the first patterned film layer 211 are formed with the substrate 10 as the reference coordinate system, and the second test sacrificial layer 232 is a full-layer coverage, the coordinate information of the second test sacrificial layer 232 is still formed with the reference coordinate system, such as... Figure 4 As shown, a first test exposure process is performed on the second test sacrificial layer 232 to form a first identifier 31 located on the second test sacrificial layer 232. The first coordinate information of the first identifier 31 located on the second test sacrificial layer 232 is obtained with the coordinate information of the substrate 10 as a reference coordinate system.

[0107] When N=3, a third test sacrificial layer 233 is formed on the side of the gate layer 223 away from the substrate 10. The third test sacrificial layer 233 is subjected to a first test exposure process using the coordinate information of the first patterned film layer 211 to form a first identifier 31 located in the third test sacrificial layer 233. The first coordinate information of the first identifier 31 located in the third test sacrificial layer 233 is obtained with the coordinate system of the first patterned film layer 211 (metal masking layer 211) as a reference.

[0108] When N=4, a fourth test sacrificial layer 234 is formed on the side of the source / drain electrode layer 224 away from the substrate 10. The fourth test sacrificial layer 234 is subjected to a first test exposure process using the coordinate information of the second patterned film layer 222 (active layer 222) to form a first identifier 31 located on the fourth test sacrificial layer 234. The first coordinate information of the first identifier 31 located on the fourth test sacrificial layer 234 is obtained using the coordinate system of the second patterned film layer 222 (active layer 222).

[0109] S70. Perform a second test exposure process on the Nth patterned film layer to obtain a second identifier and the second coordinate information of the second identifier; in an optional embodiment, step S70, "performing a second test exposure process on the Nth patterned film layer," further includes:

[0110] The Nth test sacrificial layer is subjected to a second test exposure process using the coordinate information of the (N-1)th patterned film layer to form a second identifier, and the second coordinate information of the second identifier is obtained using the coordinate information of the (N-1)th layer as a reference coordinate system.

[0111] The second test exposure process in this embodiment performs a second patterning exposure on the first mark 31, thereby forming a patterned second mark 32, for example... Figure 5 The sign structure is formed by the inner frame of the cross-shaped sign shown.

[0112] In a specific example, based on step S50 above, when N = 2, as follows: Figure 4 As shown, with the coordinate system of the first patterned film layer 211 (metal shielding layer 211) as the reference, the first mark 31 located in the second test sacrificial layer 232 is subjected to a second test exposure process, thereby forming the second mark 32 located in the second test sacrificial layer 232, and obtaining the second coordinate information of the second mark 32 located in the second test sacrificial layer 232.

[0113] When N=3, the second test exposure process is performed on the second identifier 32 located in the third test sacrificial layer 233, with the coordinate system of the second patterned film layer 222 (active layer 222) as the reference, thereby forming the second identifier 32 located in the third test sacrificial layer 233 and obtaining the second coordinate information of the second identifier 32 located in the third test sacrificial layer 233.

[0114] When N=4, the second test exposure process is performed on the second identifier 32 located in the fourth test sacrificial layer 234 with the coordinate system of the third patterned film layer (gate layer 223) as the reference, thereby forming the second identifier 32 located in the fourth test sacrificial layer 234 and obtaining the second coordinate information of the second identifier 32 located in the fourth test sacrificial layer 234.

[0115] In an optional embodiment, such as Figure 5 As shown, the orthographic projection of the first identifier 31 onto the substrate 10 and the orthographic projection of the second identifier 32 onto the substrate 10 are located in the display area of ​​the substrate 10.

[0116] The first mark 31 and the second mark 32 at the same location have at least overlapping projections on the substrate 10.

[0117] like Figure 5 As shown, the patterned material layer obtained by exposing the Nth test sacrificial layer 23N is the first mark 31. The first mark 31 is located in the orthographic projection of the substrate 10 as a cross shape. The second mark 32 is formed by performing a second test exposure process on the first mark 31 of the Nth test sacrificial layer 23N. The second mark 32 is located inside the first mark 31. The first mark 31 and the second mark 32 at the same position have at least overlapping projections in the orthographic projection of the substrate 10. After the first test exposure process and the second test exposure process, the reference coordinate system of the first test exposure process and the reference coordinate system of the second test exposure process are different. Therefore, the error accuracy of the different reference coordinate systems during the two test exposure processes can be obtained, that is, the film layer deviation between adjacent film layers.

[0118] Based on the above principle, the first identifier 31 and the second identifier 32 in this embodiment are both located in the display area of ​​the substrate 10. That is, the display area of ​​each display panel can form the first identifier 31 and the second identifier 32, thereby effectively improving the deviation accuracy of the upper and lower stacking of the display area in the manufacturing process.

[0119] S90. Using the first coordinate information and the second coordinate information, the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer is obtained;

[0120] In this embodiment, when N is greater than 2, the first identifier 31 is formed using the first test exposure process and has coordinate information of (N-2) patterned film layers. The second identifier 32 is formed using the second test exposure process and has coordinate information of (N-1) patterned film layers. When N = 2, the first identifier has coordinate information of the substrate, and the second identifier has coordinate information of the first patterned film layer. Therefore, before performing the process for the Nth patterned film layer, the adjacent film layer deviation between the (N-2)th and (N-1)th patterned film layers can be obtained. Using the adjacent film layer deviation, the Nth patterned film layer can be exposed in the material exposure process of formal production.

[0121] S110. Using the deviation between adjacent film layers, perform material exposure and etching processes on the material layer of the Nth patterned film layer to form the Nth patterned film layer.

[0122] like Figure 6 As shown, taking N=4 and the fourth patterned film layer 224 as the source / drain electrode layer 224 as an example, before forming the fourth patterned film layer 224, the adjacent film layer deviation between the second patterned film layer (active layer 222) and the third patterned film layer 223 (gate layer 223) obtained by the first test exposure process is obtained. Then, in the material exposure process, the material layer of the fourth patterned film layer 224 is etched to compensate for the adjacent film layer deviation in the previous steps, thereby improving the alignment accuracy between the formed fourth patterned film layer 224 and the film layer in the aforementioned steps.

[0123] In an optional embodiment, such as Figure 6 As shown, step S110, "using the adjacent film layer deviation to perform material exposure and etching processes on the material layer of the Nth patterned film layer," further includes:

[0124] S1101. Etch the Nth test sacrificial layer at the second marked position to expose the material layer of the Nth patterned film layer.

[0125] S1103. Form the Nth process sacrificial layer on the material layer through which the Nth patterned film layer is exposed;

[0126] S1105. Using the adjacent film layer deviation, the Nth process sacrificial layer and the material layer of the Nth patterned film layer are exposed and etched to form the Nth patterned film layer.

[0127] Taking the formation of N=4 and the fourth patterned film layer 224 as the source / drain electrode layer 224 as an example, before forming the fourth patterned film layer 224, since both the fourth patterned film layer 224 (source / drain electrode layer 224) and the third patterned film layer 223 (gate layer 223) in this embodiment are conductive film layers, step S20 needs to be performed on the gate layer 223 to form the third insulating layer 243. Figure 4 As shown.

[0128] Then, steps S30, S40, S50, S70, and S90 are executed to form a material layer of a fourth patterned film layer 224 on the third insulating layer 243, and a fourth test sacrificial layer 234 on the material layer of the fourth patterned film layer 224. A first test exposure process and a second test exposure process are performed on the fourth test sacrificial layer 234 to obtain the adjacent film layer deviation. Then, step S110 is executed to perform a material exposure process and an etching process on the material layer of the Nth patterned film layer using the adjacent film layer deviation.

[0129] like Figure 4 The last process step is shown in the diagram. Figure 6 As shown in the first process step diagram, after completing step S90, only the fourth test sacrificial layer 234 material layer is retained at the location of the second identifier 32.

[0130] Then, step S1101 is executed to etch the fourth test sacrificial layer 234 at the second identifier 32 position, exposing the material layer of the fourth patterned film layer 224 (source / drain electrode layer 224), ending the test exposure process and starting the material exposure process. Further, step S1103 is executed to form a fourth process sacrificial layer 254 on the material layer exposing the fourth patterned film layer 224 (source / drain electrode layer 224). For example, the fourth process sacrificial layer 254 is a photoresist material. Then, step S1105 is executed to perform exposure and etching processes on the fourth process sacrificial layer 254 and the material layer of the fourth patterned film layer 224 (source / drain electrode layer 224) using the adjacent film layer deviation, to form the fourth patterned film layer 224 (source / drain electrode layer 224).

[0131] Based on the above process, this embodiment incorporates a test exposure process during the fabrication of each patterned film layer of the display panel, such as... Figure 7As shown, the first mark 31 formed by the first test exposure process and the second mark 32 formed by the second test exposure process are located in the display area. The orthographic projection of the first mark 31 onto the substrate 10 can overlap with the orthographic projection of each of the Nth patterned film layers 22N of the display area of ​​the display panel onto the substrate 10. Similarly, the orthographic projection of the second mark 32 onto the substrate 10 can overlap with the orthographic projection of each of the Nth patterned film layers 22N of the display area of ​​the display panel onto the substrate 10. For example, as... Figure 7 The first identifier 31 and the second identifier 32 are shown in the first row. In another example, the orthographic projection of the first identifier 31 onto the substrate 10 avoids the orthographic projection of each of the Nth patterned film layers 22N of the display area of ​​the display panel onto the substrate 10, and the orthographic projection of the second identifier 32 onto the substrate 10 avoids the orthographic projection of each of the Nth patterned film layers 22N of the display area of ​​the display panel onto the substrate 10, such as... Figure 7 The first identifier 31 and the second identifier 32 are shown in the second row.

[0132] based on Figure 7 With the positional and process design of the first identifier 31 and the second identifier 32, this embodiment can effectively improve the deviation accuracy of the upper and lower stacked layers of the display area of ​​the display panel. Furthermore, the manufacturing method of the above embodiment of the present invention can be directly applied to the film layer manufacturing of the display panel, reducing verification time. Moreover, the final display panel can still be lit up, thus reducing the waste of the test substrate 10 for accuracy testing and having broad application prospects.

[0133] In an optional embodiment, such as Figure 8 and Figure 9 As shown, a plurality of display panels 20 are formed at different locations on the same substrate 10. The plurality of display panels 20 are arranged in an array in a first direction or a second direction, and adjacent display panels 20 have gaps in their orthographic projection onto the substrate 10.

[0134] like Figure 8 and Figure 9 As shown, multiple display panels 20 are evenly distributed at different locations on the same substrate 10, for example... Figure 8 As shown, multiple display panels 20 are arranged along a first direction, which is applicable to large-sized display panels 20. In the same process, multiple display panels 20 are simultaneously formed on the same horizontal plane, thereby improving manufacturing efficiency. Figure 8 As shown, all the first identifiers 31 and second identifiers 32 are disposed on the four sides of the entire substrate 10, which can realize the positioning of the four sides of the multiple display panels 20. Combined with the manufacturing method of the display panel 20 of the above embodiment of the present invention, the film layer alignment of the display area of ​​each display panel 20 and the alignment of multiple display panels 20 are realized, thereby improving the manufacturing accuracy.

[0135] In an optional embodiment, such as Figure 8 and Figure 9 As shown, the orthographic projection of the first identifier 31 and the second identifier 32 onto the substrate 10 is also located between adjacent display panels 20 or at the respective boundary edges of the substrate 10.

[0136] like Figure 9 As shown, multiple display panels 20 are arranged in an array along a first direction and a second direction, which is suitable for small-sized display panels 20. In the same process, multiple display panels 20 with film layers on the same horizontal plane are formed simultaneously, thereby improving manufacturing efficiency. Figure 9 As shown, all the first markings 31 and second markings 32 are disposed on the four sides of the entire substrate 10 and in the gaps between adjacent display panels 20, which can realize the positioning of the four sides of multiple display panels 20. Combined with the manufacturing method of display panel 20 of the above embodiment of the present invention, the film layer alignment of the display area of ​​each display panel 20 and the alignment of multiple display panels 20 are realized, thereby improving the manufacturing accuracy.

[0137] Another embodiment of the present invention proposes another method for manufacturing a display panel.

[0138] In another alternative embodiment, the substrate includes a test substrate and a process substrate, such as... Figure 10 As shown, the method further includes:

[0139] S1001. Form a first patterned film layer on the test substrate;

[0140] S1003, A material layer for forming the Nth patterned film layer (N≥2) is formed on the side of the first patterned film layer away from the test substrate;

[0141] S1005. Perform a first test exposure process on the Nth patterned film layer to obtain a first identifier and the first coordinate information of the first identifier;

[0142] S1007. Perform a second test exposure process on the Nth patterned film layer to obtain the second identifier and the second coordinate information of the second identifier;

[0143] S1009. Use the first coordinate information and the second coordinate information to obtain the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer;

[0144] S10011. Using the deviation between adjacent film layers, perform material exposure and etching processes on the material layer of the Nth patterned film layer to form the Nth patterned film layer, until all film layers of the display panel are completed.

[0145] S10013. Using the adjacent film layer deviation of all film layers of the display panel obtained on the test substrate, all film layers of the display panel are formed on the process substrate.

[0146] Unlike the aforementioned embodiments Figure 2 The method can be directly applied to the manufacturing process of display panels. In this embodiment, the testing process and the production process are carried out separately. The test substrate and the process product are separated. The test exposure process performed on the test substrate is used to verify the film layer deviation between each adjacent film layer. The film layer deviation result obtained by the test exposure process is applied to the manufacturing process of the process substrate, thereby improving the manufacturing accuracy of the film layer deviation of each film layer of the display panel.

[0147] Based on the present invention Figure 10 The manufacturing method shown, in another optional embodiment, is as follows: Figure 11 As shown, the orthographic projection of the first identifier 31 on the test substrate 11 does not coincide with the orthographic projection of the first patterned film layer 211 on the test substrate 11, and the orthographic projection of the Nth patterned film layer on the test substrate 11 does not coincide; the orthographic projection of the second identifier 32 on the test substrate 11 does not coincide with the orthographic projection of the first patterned film layer 211 on the test substrate 11, and the orthographic projection of the Nth patterned film layer on the test substrate 11 does not coincide.

[0148] In this embodiment, as Figure 10 As shown, in this embodiment, the Nth patterned film layer of the display area of ​​the display panel is designed to be disconnected. The first identifier 31 is located at the disconnection point of the Nth patterned film layer. The manufacturing method of this embodiment requires the use of a test substrate 11, which is equivalent to cutting the metal traces of the display area. In an optional embodiment, such as Figure 11 As shown, during the first test exposure process of the Nth test sacrificial layer 23N in step S1005, while forming the first mark 31, a pattern mark corresponding to the Nth patterned film layer is formed at the position of the Nth patterned film layer. That is, in this step, in addition to retaining the material layer of the Nth test sacrificial layer 23N at the position of the first mark 31, the material layer of the Nth test sacrificial layer 23N at the position of the Nth patterned film layer is also retained, while the material layers of the Nth test sacrificial layer 23N at other positions are exposed and etched.

[0149] Furthermore, in an optional embodiment, such as Figure 12As shown, in the second test exposure process of step S1007, the material of the Nth test sacrificial layer 23N at the position of the first mark 31 is exposed to form the second mark 32. In this step, based on step S1005, the material layer of the Nth test sacrificial layer 23N at the position of the Nth patterned film layer is not exposed.

[0150] Therefore, the method of this embodiment cannot form a conductive patterned film layer, that is, the test substrate 11 cannot be lit. Therefore, after forming each patterned film layer of the display panel on the test substrate 11, the deviation of adjacent film layers is applied to the process substrate, thereby improving the manufacturing accuracy of the display panel and reducing the stacking deviation.

[0151] It is worth noting that the other steps of steps S1001, S1003, S1005, S1007, S1009, and S10011 in this embodiment can be referred to [the relevant documentation]. Figure 2 The production method shown is for reference only. Figure 2 The manufacturing method shown is then executed, and step S10013 is performed to form all the film layers of the display panel on the process substrate by utilizing the adjacent film layer deviation of all the film layers of the display panel obtained on the test substrate 11.

[0152] It is also worth noting that, Figure 10 The display panel layout shown in the manufacturing method can also be applied to... Figure 8 and Figure 9 The layout of the display panel shown can be used as a reference for design.

[0153] Another embodiment of the present invention provides a display panel, the display panel comprising a display panel formed using the above-described manufacturing method. It is worth noting that the specific layer structure embodiments of the display panel of the present invention can be found in the manufacturing method of the display panel in the foregoing embodiments, and will not be repeated here.

[0154] Another embodiment of the present invention provides a display device, which includes the display panel described in the above embodiments of the present invention. The display device can be applied to any product or component with display function, such as electronic paper, mobile phones, tablet computers, televisions, monitors, laptops, digital photo frames, and navigators; this embodiment does not limit its application to this.

[0155] In the description of this invention, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0156] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. For those skilled in the art, other variations or modifications can be made based on the above description. It is impossible to exhaustively list all the implementation methods here. All obvious variations or modifications derived from the technical solutions of the present invention are still within the protection scope of the present invention.

Claims

1. A method for manufacturing a display panel, the display panel comprising a plurality of patterned film layers formed on a substrate, characterized in that, The method includes: Using the coordinate information of the substrate as a reference coordinate system, a first patterned film layer is formed on the substrate; A material layer for forming an Nth patterned film layer (N≥2) is formed on the side of the first patterned film layer away from the substrate; A first test exposure process is performed on the Nth patterned film layer to obtain a first identifier and the first coordinate information of the first identifier; A second test exposure process is performed on the Nth patterned film layer to obtain the second identifier and the second coordinate information of the second identifier; The first coordinate information and the second coordinate information are used to obtain the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer; The material layer of the Nth patterned film layer is subjected to material exposure and etching processes using the adjacent film layer deviation to form the Nth patterned film layer; Before performing the first test exposure process on the Nth patterned film layer, the method further includes forming an Nth test sacrificial layer on the material layer of the Nth patterned film layer (N≥2); The first test exposure process for the Nth patterned film layer further includes: Using the coordinate information of the (N-2)th patterned film layer, a first test exposure process is performed on the Nth test sacrificial layer to form a first identifier. Using the coordinate information of the (N-2)th patterned film layer as a reference coordinate system, the first coordinate information of the first identifier is obtained. When N=2, the second test sacrificial layer is subjected to a first test exposure process to form a first identifier using the coordinate information of the substrate, and the first coordinate information of the first identifier is obtained using the coordinate information of the substrate as a reference coordinate system. The second test exposure process for the Nth patterned film layer further includes: The second test exposure process is performed on the Nth test sacrificial layer using the coordinate information of the (N-1)th patterned film layer to form the second identifier, and the second coordinate information of the second identifier is obtained using the coordinate information of the (N-1)th layer as the reference coordinate system.

2. The manufacturing method according to claim 1, characterized in that, Forming a first patterned film layer on the substrate further includes: A material layer on which a first patterned film layer is formed in the substrate; A first sacrificial layer is formed on the material layer of the first patterned film layer; The first sacrificial layer is subjected to a deformation exposure process to obtain the deformation data of the material layer of the first patterned film layer; The material layer of the second patterned film layer when N is 2 is compensated using the deformation data.

3. The manufacturing method according to claim 1, characterized in that, The orthographic projections of the first identifier and the second identifier on the substrate are located in the display area of ​​the substrate. The first and second marks at the same location have at least overlapping projections in their orthographic projections on the substrate.

4. The manufacturing method according to claim 1, characterized in that, The process of exposing and etching the material layer of the Nth patterned film layer using the deviation between adjacent film layers further includes: The Nth test sacrificial layer at the second marked position is etched to expose the material layer of the Nth patterned film layer. An Nth process sacrificial layer is formed on the material layer through which the Nth patterned film layer is exposed; The Nth process sacrificial layer and the material layer of the Nth patterned film layer are exposed and etched using the adjacent film layer deviation to form the Nth patterned film layer.

5. The manufacturing method according to claim 1, characterized in that, The orthographic projection of the first mark on the test substrate does not coincide with the orthographic projection of the first patterned film layer on the test substrate, and the orthographic projection of the Nth patterned film layer on the test substrate does not coincide. The orthographic projection of the second identifier on the test substrate does not coincide with the orthographic projection of the first patterned film layer on the test substrate, and the orthographic projection of the Nth patterned film layer on the test substrate does not coincide.

6. The manufacturing method according to claim 5, characterized in that, The substrate includes a test substrate and a process substrate, and the method further includes: A first patterned film layer is formed on the test substrate; A material layer with an Nth patterned film layer (N≥2) is formed on the side of the first patterned film layer away from the test substrate; A first test exposure process is performed on the Nth patterned film layer to obtain a first identifier and the first coordinate information of the first identifier; A second test exposure process is performed on the Nth patterned film layer to obtain the second identifier and the second coordinate information of the second identifier; The first coordinate information and the second coordinate information are used to obtain the adjacent film layer deviation between the (N-1)th patterned film layer and the Nth patterned film layer; The material layer of the Nth patterned film layer is subjected to material exposure and etching processes using the deviation between adjacent film layers to form the Nth patterned film layer, until all film layers of the display panel are completed; The entire film layer of the display panel is formed on the process substrate by utilizing the adjacent film layer deviation of the entire film layer of the display panel obtained on the test substrate.

7. The manufacturing method according to claim 1, characterized in that, The plurality of patterned film layers include a metal shielding layer, a metal trace layer, each conductive layer of the driving transistor, and a plurality of interlayer insulating film layers that are patterned to insulate each conductive layer on the substrate.

8. The manufacturing method according to claim 7, characterized in that, When both the (N-1)th patterned film layer and the Nth patterned film layer are conductive layers, before forming the material layer of the Nth patterned film layer (N≥2) on the side of the first patterned film layer away from the substrate, the method further includes: An interlayer insulating film layer is formed on the side of the (N-1)th patterned film layer away from the substrate to insulate the Nth patterned film layer; A material layer of the Nth patterned film is formed on the side away from the substrate of the interlayer insulating layer that insulates the (N-1)th patterned film layer and the Nth patterned film layer; Wherein, when N is 2 and both the first patterned film layer and the second patterned film layer are conductive film layers, the step of forming the first patterned film layer on the substrate includes: forming an interlayer insulating film layer of the insulating second patterned film layer on the side of the first patterned film layer away from the substrate.

9. The manufacturing method according to any one of claims 1 to 8, characterized in that, Multiple display panels are formed at different locations on the same substrate, and the multiple display panels are arranged in an array in a first direction or a second direction, with adjacent display panels having gaps in their orthographic projection onto the substrate.

10. The manufacturing method according to claim 9, characterized in that, The first and second identifiers are projected onto the substrate in the gap between adjacent display panels or at the edges of the substrate.

11. A display panel, characterized in that, The display panel includes a display panel formed using the manufacturing method according to any one of claims 1 to 10.

12. A display device, characterized in that, The display device includes the display panel as described in claim 11.

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