Data processing method and device, terminal equipment, chip and storage medium

Abstract

This application proposes a data processing method, apparatus, terminal device, chip, and storage medium. The method includes: in response to determining that a physical layer decoder has acquired downlink data, generating downlink data indication information through the physical layer decoder and sending the downlink data indication information to a parser; the parser acquiring downlink data and downlink data control information based on the downlink data indication information, and parsing the downlink data based on the downlink data control information to obtain a parsing result. In this application, the physical layer decoder generates downlink data indication information and sends it to the parser, and the parser acquires downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data. This realizes hardware pipelined processing of downlink data between the physical layer decoder and the parser, improves processing efficiency, reduces the performance requirements of the CPU, and thus reduces power consumption.

Description

Technical Field

[0001] This application relates to the field of wireless communication technology, and in particular to a data processing method, apparatus, terminal device, chip, and storage medium. Background Technology

[0002] The mature 5G technology has become a new focus and trendsetter in the field of wireless communication, and the downlink transmission rate supported by terminal devices has also been rapidly improved.

[0003] In related technologies, downlink data is received through a physical layer decoder, but the parsing of downlink data requires interaction between physical layer software and link layer software before being executed by the link layer software. This software-based data processing method places high demands on the processing performance of the terminal device's central processing unit and consumes a lot of power. Summary of the Invention

[0004] This application aims to at least partially address one of the technical problems in the related art.

[0005] To this end, this application proposes a data processing method, apparatus, terminal device, chip, and storage medium, which realizes pipelined processing of downlink data between the physical layer decoder and parser, reduces the performance requirements of the CPU, improves processing efficiency, and reduces device power consumption.

[0006] One embodiment of this application proposes a data processing method, including:

[0007] In response to determining that the physical layer decoder has acquired downlink data, an indication information for the downlink data is generated through the physical layer decoder;

[0008] The physical layer decoder sends the indication information of the downlink data to the parser.

[0009] The parser obtains the downlink data and its control information based on the indication information of the downlink data.

[0010] The parser parses the downlink data according to the control information of the downlink data to obtain the parsing result.

[0011] Another embodiment of this application proposes a data processing apparatus, including:

[0012] Physical layer decoders and parsers;

[0013] The physical layer decoder is used to generate indication information for the downlink data in response to acquiring downlink data, and send the indication information for the downlink data to the parser.

[0014] The parser is configured to obtain the downlink data and the control information of the downlink data according to the indication information of the downlink data, and parse the downlink data according to the control information of the downlink data to obtain the parsing result.

[0015] Another embodiment of this application proposes a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements the method described in the foregoing embodiment.

[0016] To achieve the above objectives, another embodiment of this application provides a chip including a processing circuit configured to perform the method described in the foregoing embodiment of this application.

[0017] Another embodiment of this application proposes a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described in the foregoing embodiment.

[0018] Another embodiment of this application proposes a computer program product having a computer program stored thereon, which, when executed by a processor, implements the method described in the foregoing embodiment.

[0019] The data processing method, apparatus, terminal device, chip, and storage medium proposed in this application, in response to determining that the physical layer decoder has acquired downlink data, generate downlink data indication information through the physical layer decoder and send the downlink data indication information to the parser. The parser obtains the downlink data and downlink data control information based on the downlink data indication information, and parses the downlink data based on the downlink data control information to obtain the parsing result. In this application, the physical layer decoder generates downlink data indication information and sends it to the parser. The parser obtains the downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data. This realizes hardware pipelined processing of downlink data between the physical layer decoder and the parser, improves processing efficiency, reduces the performance requirements of the CPU, and thus reduces power consumption.

[0020] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0021] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0022] Figure 1 This is a schematic diagram of a downlink data processing architecture proposed in related technologies;

[0023] Figure 2 This is a schematic flowchart illustrating a data processing method provided in an embodiment of this application.

[0024] Figure 3 A flowchart illustrating another data processing method provided in an embodiment of this application;

[0025] Figure 4 A schematic diagram of the architecture of a data processing method provided in an embodiment of this application;

[0026] Figure 5 A flowchart illustrating an interactive data processing method provided in an embodiment of this application;

[0027] Figure 6 This is a schematic diagram of the structure of a data processing device provided in an embodiment of this application;

[0028] Figure 7 This is a schematic diagram of the structure of a terminal device provided in an embodiment of this application;

[0029] Figure 8 This is a schematic diagram of the structure of a chip proposed in an embodiment of this application. Detailed Implementation

[0030] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0031] The data processing method, apparatus, terminal device, chip, and storage medium of this application are described below with reference to the accompanying drawings.

[0032] In related technologies, the receiving of downlink data from the base station and the parsing of the downlink data by the terminal device are performed separately. Figure 1This diagram illustrates a downlink data processing architecture proposed in related technologies, using a 5G (New Radio, NR) system or a 4G Long Term Evolution (LET) system as examples. The physical layer software configures parameters to the physical layer decoder based on the received downlink control information (DCI). The physical layer decoder decodes the received pre-decoding data according to the configured parameters to obtain downlink data and reports the downlink data to the physical layer software. The physical layer software then notifies the link layer (Layer 2, L2) software of the decoding result. The L2 software parses the decoded downlink data according to the Third Generation Partnership Project (3GPP) protocol and submits the parsing result to the upper layer. However, due to the very high downlink data rate, the joint implementation of data parsing by the physical layer software and L2 software places high demands on the performance of the terminal device's central processing unit, resulting in significant power consumption during processing.

[0033] To address this, this application provides a data processing method. In response to determining that the physical layer decoder has acquired downlink data, the physical layer decoder generates downlink data indication information and sends it to the parser. The parser then acquires the downlink data and its control information based on the downlink data indication information and parses the downlink data according to the control information to obtain a parsing result. In this application, the physical layer decoder generates downlink data indication information and sends it to the parser. The parser acquires the downlink data based on the parsing information and completes the parsing of the downlink data. This achieves hardware pipelined processing of downlink data between the physical layer decoder and the parser, improving processing efficiency, reducing the performance requirements of the central processing unit (CPU), and thus reducing power consumption.

[0034] Figure 2 This is a schematic flowchart of a data processing method provided in an embodiment of this application.

[0035] This application embodiment illustrates the data processing method configured in a data processing device, which can be applied to any terminal device to enable the terminal device to perform data processing functions.

[0036] The terminal device can be any device with computing capabilities, such as a mobile terminal, which can be a mobile phone, tablet computer, personal digital assistant, wearable device, or other hardware device with various operating systems, touch screens and / or displays.

[0037] like Figure 2As shown, the method may include the following steps:

[0038] Step 201: In response to determining that the physical layer decoder has acquired downlink data, an indication message for the downlink data is generated through the physical layer decoder.

[0039] Downlink data can be data sent from network-side devices to terminal devices in ad hoc network systems, 5G communication (New Radio, NR) systems, or 4G Long Term Evolution (LET) systems. In ad hoc network scenarios, it can be data sent from one node to another. In wireless communication systems, such as 5G communication (New Radio, NR) systems and 4G Long Term Evolution (LET) systems, downlink data can be data transmitted from base stations to terminal devices, such as transport blocks (TB), which can be user data, control data, etc.

[0040] In this embodiment, the physical layer decoder is physical layer hardware used to implement the physical layer decoding function. During wireless communication, the base station sends raw data to the terminal device. In response, the physical layer decoder receives the raw data sent by the base station and decodes the raw data to obtain downlink data. That is to say, the downlink data in this embodiment is the decoded downlink data.

[0041] In this embodiment, when the physical layer decoder acquires downlink data, it generates downlink data indication information. In one implementation, the downlink data indication information is the location information of the downlink data description information. The downlink data description information includes downlink data location information and control information; that is, the downlink data description information can be obtained based on the location information of the downlink data description information, and the downlink data and its control information can be determined based on the downlink data description information. In another implementation, the downlink data indication information is the location information of the downlink data and its control information; that is, based on this location information, the parser can acquire the downlink data and its control information. The downlink data control information is used by the parser to parse the downlink data.

[0042] Step 202: Send the downlink data indication information to the parser through the physical layer decoder.

[0043] The parser can be either a physical layer parser or a link layer parser.

[0044] In this embodiment of the application, based on the provisions of the transmission protocol between the physical layer and the link layer, the indication information of the generated downlink data is sent to the parser through the physical layer decoder.

[0045] Step 203: The parser obtains the downlink data and its control information based on the downlink data indication information. In this application, when the physical layer decoder generates the downlink data indication information, the physical layer decoder sends the downlink data indication information to the parser. The parser obtains the downlink data and its control information based on the obtained downlink data indication information, and parses the downlink data based on the control information. This realizes pipelined processing of downlink data between the physical layer decoder and the parser, improving the processing efficiency of downlink data. Furthermore, by parsing the downlink data through the parser, both the reception and parsing of downlink data are performed within the parser, eliminating the need for software interaction, reducing processing latency, improving processing efficiency, and reducing power consumption by eliminating the need for a high-performance CPU.

[0046] Step 204: The parser parses the downlink data according to the control information of the downlink data to obtain the parsing result.

[0047] In this embodiment, a parser parses the acquired downlink data based on the control information of the downlink data according to 3GPP protocols to obtain the parsing result. For example, the downlink data is parsed according to the header format specified by the 3GPP protocols, such as Media Access Control (MAC), Radio Link Control (RLC), Packet Data Convergence Protocol (PDCP), or Service Data Adaptation Protocol (SDAP). The parsing result is then sent to the link layer software, which in turn delivers the parsing result to the upper-layer application. Compared to the related technologies where the physical layer software notifies the link layer software of the downlink data, and the link layer software parses the downlink data, this application uses a parser to parse the downlink data. This places higher demands on the CPU performance of the terminal device, which may cause lag during processing. It also increases power consumption and cost. Furthermore, the high performance requirements of the terminal device's CPU mean that the terminal device needs to be equipped with a high-performance CPU; otherwise, processing speed will be affected, thus increasing the hardware cost of the device.

[0048] In the data processing method of this application embodiment, in response to determining that the physical layer decoder has acquired downlink data, the physical layer decoder generates downlink data indication information and sends the downlink data indication information to the parser. The parser obtains downlink data and downlink data control information based on the downlink data indication information, and parses the downlink data based on the downlink data control information to obtain the parsing result. In this application, the physical layer decoder generates downlink data indication information and sends it to the parser. The parser obtains downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data. This realizes hardware pipelined processing of downlink data between the physical layer decoder and the parser, improves processing efficiency, reduces the performance requirements of the CPU, and thus reduces power consumption.

[0049] Based on the above embodiments, Figure 3 A flowchart illustrating another data processing method provided in this application embodiment is shown below. Figure 3 As shown, the method includes the following steps:

[0050] Step 301: In response to determining that the physical layer decoder has acquired downlink data, the downlink data is stored in the memory.

[0051] In one implementation of this application, a checksum is obtained, and the downlink data is checked using the checksum to determine that the downlink data passes the check. The downlink data check can be a CRC check. If the check determines that the downlink data is received completely and there are no data anomalies, the downlink data is stored in the memory through the physical layer decoder. This avoids downlink data rollback caused by downlink data check failure and improves the accuracy of the downlink data to be processed and the description information of the generated downlink data.

[0052] The explanations and descriptions in the foregoing embodiments also apply to this embodiment, and will not be repeated here.

[0053] In one example of an embodiment of this application, the memory can be Static Random Access Memory (SRAM), Synchronous Dynamic Random Access Memory (SDRAM), Dynamic Random Access Memory (DRAM), etc. In order to improve efficiency, the memory is Static Random Access Memory. Since SRAM has a faster read and write speed, storing the downlink data in SRAM can improve the storage and write speed and achieve high efficiency.

[0054] As an example, Figure 4 This is a schematic diagram of the architecture of a data processing method provided in an embodiment of this application, such as... Figure 4 As shown, the physical layer decoder obtains the decoding control information for downlink data from the physical layer software. Based on the decoding control information, it decodes the raw data obtained by the physical layer decoder to obtain the downlink data to be parsed. If the downlink data to be parsed passes the Cyclic Redundancy Check (CRC) verification, the downlink data is written to SRAM.

[0055] Step 302: Generate description information of the downlink data based on the location information of the downlink data in the memory and the control information of the downlink data.

[0056] In this embodiment, downlink data is stored in a memory, allowing for the acquisition of its location information and control information. This control information can be generated based on decoding control information issued by the physical layer software. This control information, including the downlink data length and timeslot information, is used by the link layer decoder to parse the downlink data. The physical layer decoder then generates descriptive information for the downlink data based on its location information in the memory and the control information. In other words, the descriptive information includes the storage location information of the downlink data and the control information used for data parsing.

[0057] Step 303: Store the description information of the downlink data in the queue to obtain the location indication information of the description information of the downlink data.

[0058] In this embodiment, the queue is used to store the description information of the downlink data. To reduce memory usage, the queue is a first-in, first-out (FIFO) queue. After the description information of the downlink data is stored in the queue, the position indication information of the description information in the queue is determined. Figure 4As shown, in one implementation, the position indicator information is the write pointer of the queue. The write pointer refers to the next storable position in the queue, that is, the position where the data to be stored can be written. It can be used to indicate the position information of the downlink data description information in the queue. The write pointer is updated after each data is written to the queue, and the updated write pointer is sent to the parser. Similarly, the parser updates the read pointer when reading data from the queue and sends the updated read pointer to the physical layer decoder, which will be explained in detail later. The width and depth of the queue can be set according to requirements, and are not limited in this embodiment. To reduce memory usage, the queue can be stored cyclically. In one implementation, the current first read pointer and first write pointer of the queue are obtained. Based on the first read pointer and first write pointer, the downlink data description information is stored in the queue. The read pointer is obtained by the parser after each time it reads historical downlink data from the queue. Therefore, the first read pointer is obtained by the parser after reading historical downlink data from the queue before reading downlink data. When the queue is a non-circular queue for reading and writing, the read pointer is not necessarily required. However, when the queue requires circular reading and writing, the value of the read pointer can be used to identify whether the current queue is full, so as to ensure that the data in the queue is written correctly.

[0059] In this process, new downlink data is stored in the queue. The value of the write pointer in the queue is increased, thereby updating the first write pointer in the queue to obtain the second write pointer. In a single-carrier scenario, there can be one downlink data point, while in a multi-carrier scenario, there can be multiple downlink data points. For example, in a multi-carrier scenario, there are N downlink data points. The value of the second write pointer is equal to the value of the first write pointer plus N. The second write pointer is used as the location indicator information for the description information.

[0060] Step 304: Use the location indication information of the description information as the indication information of the downlink data.

[0061] Step 305: Send the downlink data indication information to the parser through the physical layer decoder.

[0062] The explanations and descriptions in the foregoing embodiments also apply to this embodiment, and the principles are the same, so they will not be repeated here.

[0063] Step 306: Read the description information of the downlink data from the queue according to the location indication information of the description information of the downlink data.

[0064] In one implementation of this application, each time the parser reads the description information of downlink data from the queue, it updates the read pointer. That is, the parser stores the read pointers in the current queue, thereby obtaining the first read pointer of the queue. Based on the first read pointer and the second write pointer of the queue, the position information of the description information of the downlink data to be read is determined. Specifically, the values ​​of the first read pointer and the second write pointer are compared. If the position of the first read pointer is before the position of the second write pointer, that is, the value of the first read pointer is less than the value of the second write pointer, it means that the queue stores the description information of the downlink data to be read. If the positions of the first read pointer and the second write pointer are the same, it means that the queue does not contain the description information of the downlink data to be read.

[0065] Based on the location information of the description information of the downlink data to be read, the stored downlink data is read from the queue. According to the number of downlink data read, the first read pointer is updated to obtain the second read pointer, and the second read pointer is sent to the physical layer decoder to realize the update of the read pointer by the physical layer decoder, so as to improve the accuracy of subsequent writing.

[0066] This application utilizes a queue for storing and retrieving downlink data. This enables the generation and storage of downlink data description information in the queue upon receiving the downlink data to be processed in the physical layer decoder. The write pointer is then updated and sent to the parser. The parser retrieves the downlink data description information from the queue based on its own maintained read pointer and the updated write pointer. Since the downlink data description information includes control information and the downlink data's location in memory, the downlink data can be retrieved directly from memory without requiring interaction between the link layer and physical layer software to obtain control information. Furthermore, the parsing of the downlink data based on this control information is not necessary, and the parsing result can be directly sent to the link layer software, improving processing efficiency. Additionally, downlink data is processed in a queue, maintaining the same processing method regardless of whether it's a single-carrier or multi-carrier scenario, and is not perceived by the hardware.

[0067] In another implementation of steps 304 to 306 above, the location indication information refers to the storage location information of the description information of the downlink data currently stored in the queue. Therefore, the parser receives the storage location information of the downlink data description information in the queue, and reads the downlink data description information from the queue based on the storage location information.

[0068] like Figure 4 As shown, the physical layer decoder and parser use a queue to write and read downlink data description information, realizing pipelined processing of downlink data description information between the two hardware components and improving processing efficiency.

[0069] Step 307: Read downlink data from memory based on the downlink data location information included in the downlink data description information, and determine the downlink data control information from the downlink data description information.

[0070] Step 308: Release the storage space for downlink data in the memory.

[0071] In this embodiment, the description information of the downlink data includes the location information and control information of the downlink data. The downlink data is obtained from the SRAM according to the location information of the downlink data, and the storage space occupied by the downlink data in the SRAM is released when the downlink data is obtained. The storage space of the downlink data is requested from the SRAM through the physical layer decoder. After the parser obtains the downlink data from the SRAM, it is responsible for releasing the storage space, thereby realizing the efficient pipelined use of the storage space in the SRAM. In other words, a smaller SRAM can meet the storage requirements, reducing the device cost.

[0072] Step 309: The parser parses the downlink data according to the control information of the downlink data to obtain the parsing result.

[0073] Step 309 can be explained in the previous embodiments, and the principle is the same, so it will not be repeated here.

[0074] like Figure 4 As shown, as one implementation method, the software can flexibly control the power-on and power-off of the hardware. When there is no downlink data reception task, the physical layer software configures the hardware of the physical layer decoder to enter the power-off state. At the same time, the link layer software configures the hardware of the parser to enter the power-off state, reducing the overall power consumption of the terminal device. When the downlink data reception task needs to be resumed, the corresponding software configures the corresponding hardware to quickly enter the power-on state, meeting the needs of different scenarios and reducing the power consumption of the device.

[0075] In the data processing method of this application embodiment, in response to determining that the physical layer decoder has acquired downlink data, the physical layer decoder generates downlink data indication information and sends the downlink data indication information to the parser. The parser obtains downlink data and downlink data control information based on the downlink data indication information, and parses the downlink data based on the downlink data control information to obtain the parsing result. In this application, the physical layer decoder generates downlink data indication information and sends it to the parser. The parser obtains downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data. This realizes hardware pipelined processing of downlink data between the physical layer decoder and the parser, improves processing efficiency, reduces the performance requirements of the CPU, and thus reduces power consumption.

[0076] Based on the above embodiments, Figure 5A flowchart illustrating an interactive data processing method provided in an embodiment of this application is shown below. Figure 5 As shown, the method includes the following steps:

[0077] In this embodiment of the application, the following is an example of a 5G or LET scenario: Step 1, the physical layer software parses the received downlink DCI information into downlink DCI information, configures the physical layer decoder according to the downlink DCI information, so that the physical layer decoder obtains the control information of TB, the physical layer decoder obtains the downlink data, i.e. the TB to be decoded, and decodes the TB to be decoded according to the control information of TB to obtain the downlink TB to be sent to the parser for parsing.

[0078] Step 2: The physical layer decoder requests memory from SRAM to store the downlink TB. Based on the location information of the downlink TB in SRAM and the control information of the TB, it generates the description information of the downlink TB, which is also called a descriptor.

[0079] Step 3: After the physical layer decoder passes the CRC check of the TB, it writes the descriptor of the downlink TB into the queue FIFO, updates the FIFO write pointer, and pushes it to the parser.

[0080] Step 4: After receiving the write pointer push from the FIFO, the parser reads the descriptor of the downlink TB from the FIFO according to the write pointer and read pointer, updates the FIFO read pointer, and then pushes it to the physical layer decoder.

[0081] Step 5: The parser uses the downlink TB's location and control information from the descriptor to release the memory occupied by the downlink TB in SRAM. It then parses the TB according to the MAC / RLC / PDPC / SDAP header format specified in the 3GPP protocol to obtain the parsing result, and finally reports the parsing result to the link layer L2 software.

[0082] In this embodiment, by combining hardware pipelined downlink TB processing with on-chip SRAM, the processing efficiency of downlink TB is greatly improved, the lifecycle of TB memory is shortened, and the use of DDR memory is significantly reduced, thereby lowering the power consumption of the terminal. Hardware pipelined processing of downlink TB reception and parsing between the physical layer decoder and parser reduces the terminal software interaction cost and the implementation complexity of the link layer L2 software, thus reducing the terminal's CPU performance requirements and further reducing power consumption. Simultaneously, it reduces downlink TB processing latency, thereby improving the downlink data transmission performance of the terminal. Furthermore, for single-carrier or multi-carrier scenarios, the hardware is unaware of the problem, resulting in stronger compatibility.

[0083] To implement the above embodiments, this application also proposes a data processing apparatus.

[0084] Figure 6 This is a schematic diagram of the structure of a data processing device provided in an embodiment of this application.

[0085] like Figure 6 As shown, the device may include a physical layer decoder 601 and a parser 602.

[0086] The physical layer decoder 601 is used to generate downlink data indication information in response to the acquisition of downlink data, and send the downlink data indication information to the parser.

[0087] Parser 602 is used to obtain downlink data and downlink control information based on downlink data indication information, and to parse downlink data based on downlink control information to obtain parsing results.

[0088] The explanations and descriptions in the aforementioned method embodiments also apply to this embodiment, as the principles are the same, and will not be repeated here.

[0089] In the data processing method of this application embodiment, in response to determining that the physical layer decoder has acquired downlink data, the physical layer decoder generates downlink data indication information and sends the downlink data indication information to the parser. The parser obtains downlink data and downlink data control information based on the downlink data indication information, parses the downlink data based on the downlink data control information, and sends the parsing result to the link layer software. In this application, the physical layer decoder generates downlink data indication information and sends it to the parser. The parser obtains downlink data based on the parsing information of the downlink data and completes the parsing of the downlink data. This realizes hardware pipelined processing of downlink data between the physical layer decoder and the parser, improves processing efficiency, reduces the performance requirements of the CPU, and thus reduces power consumption.

[0090] Based on the above embodiments, as one implementation, the physical layer decoder 601 is also used for:

[0091] Downlink data is stored in memory. Based on the location information of the downlink data in memory and the control information of the downlink data, description information of the downlink data is generated. The description information of the downlink data is stored in a queue to obtain the location indication information of the description information of the downlink data. The location indication information of the description information is used as the indication information of the downlink data.

[0092] As one implementation, parser 602 is also used for:

[0093] Based on the location indication information of the downlink data description information, the downlink data description information is read from the queue; based on the downlink data location information included in the downlink data description information, the downlink data is read from the memory; and the control information of the downlink data is determined from the downlink data description information.

[0094] As one implementation, parser 602 is also used for:

[0095] Release the storage space occupied by the downlink data in the memory.

[0096] As one implementation, the physical layer decoder 601 is also used for:

[0097] Obtain the current first read pointer and first write pointer of the queue; wherein, the first read pointer is updated by the parser based on historical data before reading the downlink data stored in the queue;

[0098] Based on the first read pointer and the first write pointer, the description information of the downlink data is stored in the queue, and the first write pointer in the queue is updated to obtain the second write pointer;

[0099] The second write pointer is used as the location indication information of the description information.

[0100] As one implementation, parser 602 is also used for:

[0101] Get the current first read pointer of the queue;

[0102] Based on the first read pointer and the second write pointer of the queue, determine the location information of the description information of the downlink data to be read;

[0103] Based on the location information of the description information of the downlink data to be read, the description information of the downlink data stored in the queue is read.

[0104] As one implementation, the physical layer decoder 601 is also used for:

[0105] Get the verification code;

[0106] The downlink data is verified using the verification code to determine that the downlink data passes the verification.

[0107] The explanations and beneficial effects in the aforementioned method embodiments also apply to this embodiment, as the principles are the same, and will not be repeated here.

[0108] To implement the above embodiments, this application also proposes a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements the method described in the foregoing method embodiments.

[0109] Figure 7 This is a schematic diagram of the structure of a terminal device provided in an embodiment of this application. For example, the terminal device 800 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0110] Reference Figure 7 The terminal device 800 may include one or more of the following components: processing component 802, memory 804, power component 806, multimedia component 808, audio component 810, input / output (I / O) interface 812, sensor component 814, and communication component 816.

[0111] Processing component 802 typically controls the overall operation of terminal device 800, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 802 may include one or more processors 820 to execute instructions to complete all or part of the steps of the methods described above. Furthermore, processing component 802 may include one or more modules to facilitate interaction between processing component 802 and other components. For example, processing component 802 may include a multimedia module to facilitate interaction between multimedia component 808 and processing component 802.

[0112] Memory 804 is configured to store various types of data to support operation on terminal device 800. Examples of this data include instructions for any application or method operating on terminal device 800, contact data, phonebook data, messages, pictures, videos, etc. Memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0113] Power component 806 provides power to various components of terminal device 800. Power component 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to terminal device 800.

[0114] Multimedia component 808 includes a screen that provides an output interface between the terminal device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 808 includes a front-facing camera and / or a rear-facing camera. When the terminal device 800 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0115] Audio component 810 is configured to output and / or input audio signals. For example, audio component 810 includes a microphone (MIC) configured to receive external audio signals when terminal device 800 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 804 or transmitted via communication component 816. In some embodiments, audio component 810 also includes a speaker for outputting audio signals.

[0116] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0117] Sensor assembly 814 includes one or more sensors for providing status assessments of various aspects of terminal device 800. For example, sensor assembly 814 can detect the on / off state of terminal device 800, the relative positioning of components such as the display and keypad of terminal device 800, changes in position of terminal device 800 or a component of terminal device 800, the presence or absence of user contact with terminal device 800, orientation or acceleration / deceleration of terminal device 800, and temperature changes of terminal device 800. Sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 814 may also include an accelerometer, gyroscope, magnetometer, pressure sensor, or temperature sensor.

[0118] Communication component 816 is configured to facilitate wired or wireless communication between terminal device 800 and other devices. Terminal device 800 can access wireless networks based on communication standards, such as WiFi, 4G, or 5G, or combinations thereof. In one exemplary embodiment, communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 816 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0119] In an exemplary embodiment, the terminal device 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0120] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, which can be executed by a processor 820 of a terminal device 800 to perform the above-described method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0121] To implement the above embodiments, this application also proposes a chip, including: the chip includes a processing circuit configured to perform the methods provided in the foregoing embodiments.

[0122] Figure 8 This is a schematic diagram of the structure of a chip according to an embodiment of this application. See also... Figure 8 The diagram shown is a schematic representation of the structure of chip 1100, but it is not limited to this.

[0123] Chip 1100 includes processing circuitry 1101, which is configured to perform any of the above methods.

[0124] In some embodiments, chip 1100 further includes one or more interface circuits 1102. Optionally, the interface circuit 1102 is connected to memory 1103, and the interface circuit 1102 can be used to receive signals from memory 1103 or other devices, and the interface circuit 1102 can be used to send signals to memory 1103 or other devices. For example, the interface circuit 1102 can read instructions stored in memory 1103 and send the instructions to processing circuit 1101.

[0125] In some embodiments, the interface circuit 1102 performs at least one of the communication steps such as sending and / or receiving in the above method, while the processing circuit 1101 performs other steps.

[0126] In some embodiments, the terms interface circuit, interface, transceiver pin, transceiver, etc., can be used interchangeably.

[0127] In some embodiments, chip 1100 further includes one or more memories 1103 for storing instructions. Optionally, all or part of the memories 1103 may be located outside of chip 1100.

[0128] To implement the above embodiments, this application also proposes a non-transitory computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the method described in the foregoing method embodiments.

[0129] To implement the above embodiments, this application also proposes a computer program product having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method described in the foregoing method embodiments.

[0130] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0131] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0132] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0133] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0134] It should be understood that various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0135] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0136] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0137] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.

Claims

1. A data processing method, characterized by, include: In response to the determination that the physical layer decoder has acquired downlink data; The downlink data is stored in a memory; Based on the location information of the downlink data in the memory and the control information of the downlink data, description information of the downlink data is generated; wherein, the description information includes the location information and control information of the downlink data; The description information of the downlink data is stored in a queue to obtain the location indication information of the description information of the downlink data; The location indication information of the description information is used as the indication information of the downlink data; The physical layer decoder sends the indication information of the downlink data to the parser. The parser obtains the downlink data and its control information based on the indication information of the downlink data. The parser parses the downlink data according to the control information of the downlink data to obtain the parsing result.

2. The method of claim 1, wherein, The step of obtaining the downlink data and its control information through the parser based on the indication information of the downlink data includes: Based on the location indication information of the downlink data description information, the description information of the downlink data is read from the queue; Based on the location information of the downlink data included in the description information of the downlink data, the downlink data is read from the memory, and the control information of the downlink data is determined from the description information of the downlink data.

3. The method as described in claim 2, characterized in that, After reading the downlink data from the memory based on the location information of the downlink data included in the description information of the downlink data, the process includes: Release the storage space occupied by the downlink data in the memory.

4. The method as described in claim 2, characterized in that, The step of storing the description information of the downlink data in a queue to obtain the location indication information of the description information of the downlink data includes: Obtain the current first read pointer and first write pointer of the queue; wherein, the first read pointer is updated by the parser based on historical data before reading the downlink data stored in the queue; Based on the first read pointer and the first write pointer, the description information of the downlink data is stored in the queue, and the first write pointer in the queue is updated to obtain the second write pointer; The second write pointer is used as the location indication information of the description information.

5. The method as described in claim 4, characterized in that, The step of reading the description information of the downlink data from the queue based on the location indication information of the downlink data description information includes: Get the current first read pointer of the queue; Based on the first read pointer and the second write pointer of the queue, determine the location information of the description information of the downlink data to be read; Based on the location information of the description information of the downlink data to be read, the description information of the downlink data stored in the queue is read.

6. The method as described in claim 1, characterized in that, Before generating the indication information for the downlink data through the physical layer decoder, the method further includes: Get the verification code; The downlink data is verified using the verification code to determine that the downlink data passes the verification.

7. A data processing apparatus, characterized in that, include: Physical layer decoders and parsers; The physical layer decoder is configured to, in response to acquiring downlink data, store the downlink data in a memory; generate description information of the downlink data based on the location information of the downlink data in the memory and the control information of the downlink data; wherein the description information includes the location information and control information of the downlink data; store the description information of the downlink data in a queue to obtain location indication information of the description information of the downlink data; use the location indication information of the description information as indication information of the downlink data; and send the indication information of the downlink data to the parser. The parser is configured to obtain the downlink data and the control information of the downlink data according to the indication information of the downlink data, and parse the downlink data according to the control information of the downlink data to obtain the parsing result.

8. The apparatus as claimed in claim 7, characterized in that, The parser is also used for: Based on the location indication information of the downlink data description information, the downlink data description information is read from the queue; based on the location information of the downlink data included in the downlink data description information, the downlink data is read from the memory; and the control information of the downlink data is determined from the downlink data description information.

9. The apparatus as claimed in claim 8, characterized in that, The parser is also used for: Release the storage space occupied by the downlink data in the memory.

10. A terminal device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, it implements the method as described in any one of claims 1-6.

11. A chip, characterized in that, The chip includes processing circuitry configured to perform the method as described in any one of claims 1-6.

12. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1-6.

13. A computer program product, characterized in that, Includes a computer program, which, when executed by a processor, implements the method of any one of claims 1-6.

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