Data processing method, device and computer program product
By using FPGA to dynamically adjust the correspondence and polling mechanism of forwarding nodes in network devices, the problem of insufficient flexibility of traditional network devices is solved, achieving efficient and flexible data forwarding and improving system stability and reliability.
Patent Information
- Application Number
- CN202411386306.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-30
- Publication Date
- 2026-02-24
- Estimated Expiration
- 2044-09-30
AI Technical Summary
Traditional network equipment has fixed interfaces and functions, making it difficult to adjust flexibly, which leads to the need for replacement when the equipment is damaged or malfunctions.
Using a field-programmable gate array (FPGA), the system dynamically adjusts the correspondence between multiple forwarding nodes, utilizes polling forwarding nodes to achieve efficient and flexible data forwarding, and dynamically reconfigures to bypass damaged nodes when a node fails.
It improves the stability and reliability of network equipment, reduces the need for equipment replacement due to damage to forwarding nodes, and enhances the efficiency and reliability of network data transmission.
Smart Images

Figure CN119299294B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of communication technology, and in particular to a data processing method, apparatus and computer program product. Background Technology
[0002] As networks continue to expand and business demands become increasingly complex, the requirements for data processing technologies are also rising. Data needs to be transmitted and routed through network devices.
[0003] However, traditional network equipment is often relatively fixed in terms of interfaces and functions, making it difficult to make flexible adjustments according to business needs. If some external interfaces are damaged or abnormal due to some unexpected factors, the equipment needs to be replaced. Summary of the Invention
[0004] This disclosure is made in view of the above-mentioned problems. This disclosure provides a data processing method, apparatus, and computer program product.
[0005] According to one aspect of this disclosure, a data processing method is provided, applied to a network device, the method comprising: determining the correspondence between multiple forwarding nodes included in a field-programmable gate array (FPGA) based on an application scenario; polling the multiple forwarding nodes; performing a read operation on a readable forwarding node; and forwarding the read data to a target forwarding node based on the correspondence, wherein the readable forwarding node and the target forwarding node are nodes among the multiple forwarding nodes.
[0006] Furthermore, according to one aspect of the data processing method of this disclosure, the plurality of forwarding nodes includes at least: a cell forwarding node, a built-in forwarding node, an external forwarding node, and a cascaded forwarding node; wherein, the cell forwarding node is used to carry data corresponding to the covered cell, the built-in forwarding node is used to forward the data corresponding to the cell forwarding node to other network devices or terminals, the external forwarding node is used to forward the data corresponding to the cell forwarding node to other network device connections or terminals, and the cascaded forwarding node enables the cascading of the network device with other network devices.
[0007] Furthermore, according to one aspect of the data processing method of this disclosure, determining the correspondence of multiple forwarding nodes contained in a field-programmable gate array (FPGA) based on an application scenario includes: when determining that a cell is covered, connecting the cell forwarding node corresponding to the cell to the built-in forwarding node.
[0008] Furthermore, according to one aspect of the data processing method of this disclosure, determining the correspondence of multiple forwarding nodes contained in the Field Programmable Gate Array (FPGA) based on the application scenario includes: when determining coverage of a first cell and a second cell, connecting the cell forwarding node of the first cell to the built-in forwarding node, and connecting the cell forwarding node of the second cell to the external forwarding node.
[0009] Furthermore, according to one aspect of the data processing method of this disclosure, determining the correspondence of multiple forwarding nodes of the network device based on the application scenario includes: when determining coverage of a first cell and a second cell, connecting the cell forwarding node of the first cell to the cascaded forwarding node, and connecting the cell forwarding node of the second cell to the external forwarding node; wherein, the cascaded forwarding node is used to connect to other network devices or terminals.
[0010] Furthermore, according to one aspect of the data processing method of this disclosure, the plurality of forwarding nodes further includes a first forwarding node and a second forwarding node; the first forwarding node is used for communication connection with the core network, and the second forwarding node is used for communication connection with the central processing unit (CPU) of the network device.
[0011] Furthermore, according to one aspect of the data processing method of this disclosure, polling the plurality of forwarding nodes includes: polling the first-in-first-out (FIFO) queues corresponding to each of the plurality of forwarding nodes based on a state machine.
[0012] Furthermore, according to one aspect of the data processing method of this disclosure, the reading operation for a readable forwarding node includes: when the FIFO is in a non-empty state, the forwarding node corresponding to the FIFO is a readable forwarding node, and the reading operation is performed on the readable forwarding node.
[0013] According to another aspect of this disclosure, a data processing apparatus is provided, comprising: a memory for storing computer-readable instructions; and a processor for executing the computer-readable instructions, causing the data processing apparatus to perform the data processing method as described above.
[0014] According to another aspect of this disclosure, a computer program product is provided, including a computer program that, when executed by a processor, implements the data processing method described above.
[0015] As will be described in detail below, the data processing method, apparatus, and computer program product according to embodiments of this disclosure dynamically adjust the correspondence of multiple forwarding nodes through application scenarios. By polling forwarding nodes, efficient and flexible forwarding of data in network devices is achieved. When a forwarding node in a network device is damaged or abnormal, since the FPGA contains multiple forwarding nodes and the correspondence of multiple forwarding nodes can be dynamically adjusted, the damaged forwarding node can be bypassed by reconfiguring the correspondence of these nodes, and the data can be forwarded to other available forwarding nodes. This reduces the need for equipment replacement due to the damage of forwarding nodes and improves the stability and reliability of the system.
[0016] It should be understood that both the foregoing general description and the following detailed description are exemplary and intended to provide further illustration of the claimed technology. Attached Figure Description
[0017] The above and other objects, features, and advantages of this disclosure will become more apparent from the more detailed description of the embodiments thereof in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the disclosure and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.
[0018] Figure 1 This is a schematic flowchart illustrating a processing method according to an embodiment of the present disclosure.
[0019] Figure 2 This is a schematic diagram of the structure of an FPGA according to an embodiment of the present disclosure.
[0020] Figure 3 This is a further schematic diagram of the structure of an FPGA according to an embodiment of the present disclosure.
[0021] Figure 4 This is a schematic diagram illustrating a queue forwarding module according to an embodiment of the present disclosure.
[0022] Figure 5 This is a schematic diagram illustrating the process of polling forwarding nodes according to an embodiment of the present disclosure.
[0023] Figure 6 This is a functional block diagram of a data processing device according to an embodiment of the present disclosure.
[0024] Figure 7 This is a schematic diagram illustrating the structure of a computer program product according to an embodiment of the present disclosure. Detailed Implementation
[0025] To make the objectives, technical solutions, and advantages of this disclosure more apparent, exemplary embodiments according to this disclosure will now be described in detail with reference to the accompanying drawings. Obviously, the described embodiments are merely some embodiments of this disclosure, and not all embodiments of this disclosure. It should be understood that this disclosure is not limited to the exemplary embodiments described herein.
[0026] Figure 1 This is a schematic flowchart illustrating a data processing method according to an embodiment of the present disclosure.
[0027] like Figure 1 As shown, the data processing method according to an embodiment of this disclosure is executed by a network device, which refers to a device that performs data processing tasks in a network environment and integrates field-programmable gate array (FPGA) technology to support efficient and flexible data forwarding. This network device may be a base station.
[0028] In step S101, based on the application scenario, the correspondence between the multiple forwarding nodes contained in the field programmable gate array (FPGA) is determined.
[0029] In the embodiments of this disclosure, the application scenarios include information such as the network environment in which the network device operates, different signal coverage areas, service requirements, and performance requirements. Through comprehensive analysis of this information, the specific functions and performance indicators that the network device needs to achieve can be clearly defined. Based on the application scenario, the connection relationships between multiple forwarding nodes included in the FPGA can be established. These connection relationships determine the data transmission path and timing within the FPGA. For example, the connection relationships of forwarding nodes can be adjusted according to the complexity of the network environment to optimize data transmission paths and reduce congestion and latency; the connection relationships of forwarding nodes can be adjusted according to signal coverage requirements to increase signal enhancement, ensure signal coverage of the target area, and reduce blind spots; the connection relationships of forwarding nodes can be adjusted according to service requirements to ensure service quality; and the correspondence of forwarding nodes can be dynamically adjusted according to network performance indicators to adapt to changes in the network environment and service requirements.
[0030] Specifically, a forwarding node can refer to a functional module capable of forwarding data. A forwarding node can also correspond to a functional interface of a network device. Here, an interface typically refers to the physical or logical connection point for exchanging data between different functional modules or devices.
[0031] In step S102, multiple forwarding nodes are polled.
[0032] In embodiments of this disclosure, the network device will start polling multiple forwarding nodes in a predetermined order. In each poll, the network device will check the status of the current node, including whether there is readable data.
[0033] In step S103, a read operation is performed on the readable forwarding node, and the read data is forwarded to the target forwarding node based on the correspondence. The readable forwarding node and the target forwarding node are nodes among multiple forwarding nodes.
[0034] In the embodiments of this disclosure, a readable forwarding node refers to a forwarding node that has readable data. When a network device detects that a current node (i.e., a readable forwarding node) has readable data, it reads the data from that forwarding node and, based on the connection relationships between multiple forwarding nodes, forwards the read data to a target node connected to the readable forwarding node. Here, both the readable forwarding node and the target forwarding node are nodes among multiple forwarding nodes within the FPGA.
[0035] In summary, based on the technical solutions provided in the embodiments of this disclosure, this disclosure dynamically adjusts the correspondence of multiple forwarding nodes through application scenarios, and utilizes polling forwarding nodes to achieve efficient and flexible data forwarding in network devices. Furthermore, when a forwarding node in a network device is damaged or malfunctions, since the FPGA contains multiple forwarding nodes and the correspondence of these multiple forwarding nodes can be dynamically adjusted, the damaged forwarding node can be bypassed by reconfiguring the correspondence of these nodes, and the data can be forwarded to other available forwarding nodes. This reduces the need for device replacement due to the damage of forwarding nodes and improves the stability and reliability of the system.
[0036] Figure 2 This is a schematic diagram of the structure of an FPGA according to an embodiment of the present disclosure.
[0037] like Figure 2 As shown, according to the FPGA of this disclosure embodiment, FPGA200 includes multiple forwarding nodes, and the multiple forwarding nodes include at least: cell forwarding node 201, built-in forwarding node 202, external forwarding node 203 and cascaded forwarding node 204.
[0038] Among them, the cell forwarding node 201 is used to carry the data corresponding to the covered cell, the built-in forwarding node 202 is used to forward the data corresponding to the cell forwarding node to other network devices or terminals, the external forwarding node 203 is used to forward the data corresponding to the cell forwarding node to other network device connections or terminals, and the cascaded forwarding node 204 enables the cascading of network devices with other network devices.
[0039] Specifically, cell forwarding node 201 is responsible for collecting, storing, and initially processing data from cells covered by the network device. Here, cell forwarding node 201 is specifically responsible for processing data from a single cell. If the network device covers multiple cells, then the FPGA will contain multiple cell forwarding nodes 201.
[0040] Preferably, there are two cell forwarding nodes 201, corresponding to the first cell and the second cell respectively.
[0041] The built-in forwarding node 202 is configured within the network device and is used to forward the data collected by the cell forwarding node 201 to other network devices or terminals outside the network device. For example, the built-in forwarding node 202 can be a functional module corresponding to the RRU interface of the internal remote radio unit.
[0042] External forwarding node 203 can forward the data collected by cell forwarding node 201 to other network devices or terminals outside the network device. Cascade forwarding node 204 can realize cascaded connections between the network device and other external network devices, allowing data to flow between different network layers or different network devices, thereby expanding the data transmission range.
[0043] In summary, based on the technical solutions provided in the embodiments of this disclosure, the FPGA architecture of this disclosure constructs a highly efficient and flexible network data processing platform by integrating multiple forwarding nodes. This design not only improves the efficiency of network data transmission but also enhances the reliability and scalability of the network, providing strong support for modern communication and Internet of Things applications.
[0044] Furthermore, the multiple forwarding nodes also include a first forwarding node 205 and a second forwarding node 206.
[0045] The first forwarding node 205 is used for communication connection with the core network, and the second forwarding node 206 is used for communication connection with the central processing unit (CPU) of the network equipment.
[0046] Specifically, the first forwarding node 205 acts as a bridge between the network devices and the core network, responsible for receiving data packets from the core network and sending the processed data packets back to the core network.
[0047] Figure 3 This is a further schematic diagram of the structure of an FPGA according to an embodiment of the present disclosure.
[0048] like Figure 3 As shown, according to the FPGA of this disclosure embodiment, FPGA200 includes multiple forwarding nodes, and the multiple forwarding nodes include at least: a first forwarding node a, a cell forwarding node b, a cell forwarding node c, a second forwarding node d, a built-in forwarding node g, an external forwarding node f, and a cascaded forwarding node e.
[0049] Furthermore, based on the application scenario, the correspondence between the multiple forwarding nodes contained in the Field Programmable Gate Array (FPGA) is determined, including:
[0050] When determining the coverage of a cell, connect the cell forwarding node corresponding to the cell to the built-in forwarding node.
[0051] Specifically, when it is necessary to cover a cell, i.e., a small-scale coverage application scenario, the forwarding node corresponding to the cell is connected to the built-in forwarding node.
[0052] For example, see Figure 3 When a network device covers a single cell, cell node b is connected to the built-in forwarding node g as an IQ data link. If multi-level cascading of network devices is required, the first forwarding node a is further connected to the second forwarding node d, and the second forwarding node d is connected to the cascaded forwarding node e.
[0053] Furthermore, based on the application scenario, the correspondence between the multiple forwarding nodes contained in the Field Programmable Gate Array (FPGA) is determined, including:
[0054] When determining coverage for the first and second cells, the cell forwarding node of the first cell is connected to the built-in forwarding node, and the cell forwarding node of the second cell is connected to the external forwarding node.
[0055] Specifically, when it is necessary to cover two cells, namely the first cell and the second cell, the coverage area needs to be expanded by connecting the cell forwarding node of the first cell to the built-in forwarding node, and the cell forwarding node of the second cell to the external forwarding node.
[0056] For example, see Figure 3 When the network devices cover both the first and second cells, the cell forwarding node b corresponding to the first cell can be connected to the built-in forwarding node g to form the IQ data link for the first cell, and the cell forwarding node c corresponding to the second cell can be connected to the external forwarding node f to form the IQ data link for cell 2. Furthermore, to achieve network device cascading, the first forwarding node a is connected to the second forwarding node d, and the second forwarding node d is connected to the cascaded forwarding node e.
[0057] Furthermore, based on the application scenario, the correspondence between multiple forwarding nodes of the network device is determined, including:
[0058] When determining coverage for the first and second cells, the cell forwarding node of the first cell is connected to the cascaded forwarding node, and the cell forwarding node of the second cell is connected to the external forwarding node; wherein, the cascaded forwarding node is used to connect with other network devices or terminals.
[0059] Specifically, when it is necessary to cover two cells, namely the first cell and the second cell, and in scenarios requiring enhanced coverage quality in specific areas and scalable large-scale networks, the cell forwarding node of the first cell is connected to a cascaded forwarding node, and the cell forwarding node of the second cell is connected to an external forwarding node; wherein, the cascaded forwarding node is used to connect with other network devices or terminals.
[0060] For example, see Figure 3 When the network equipment covers both the first and second cells, the cell forwarding node b corresponding to the first cell can be connected to the cascaded forwarding node e as the IQ data link for the first cell, and the cell forwarding node c corresponding to the second cell can be connected to the external forwarding node f as the IQ data link for cell 2. Furthermore, the first forwarding node a and the second forwarding node d can be connected. This enables the connection between the first and second cells to their external optical ports.
[0061] In other scenarios, configurations can be modified online as needed.
[0062] In summary, based on the technical solutions provided in the embodiments of this disclosure, the connection method of forwarding nodes can be quickly adjusted according to different application scenarios without the need for hardware replacement or large-scale modifications. Furthermore, through the design of cascaded forwarding nodes and external forwarding nodes, network coverage can be easily expanded to adapt to network needs of different scales.
[0063] Furthermore, polling multiple forwarding nodes includes: polling the first-in-first-out (FIFO) queues corresponding to each of the multiple forwarding nodes based on a state machine.
[0064] Furthermore, for readable forwarding nodes, read operations are performed, including:
[0065] When the FIFO is not empty, the forwarding node corresponding to the FIFO is a readable forwarding node, and a read operation is performed on the readable forwarding node.
[0066] In one embodiment of this disclosure, a queue forwarding module can be configured for each of the aforementioned multiple forwarding nodes. The queue forwarding module uses a blockram + small FIFO approach. The blockram serves as the main storage area for storing complete data packets, while the FIFO acts as an auxiliary storage area for storing descriptors pointing to these data packets (including the packet length and its base address in the blockram). This design ensures efficient data access while avoiding unnecessary memory waste. For example, as... Figure 4 The diagram shows a queue forwarding module that performs statistics on the data received at each forwarding node. Here, the data length can be counted, and the base address recorded. The length and base address are then written as descriptors into a FIFO. Each descriptor is processed within the polling read control module, and the data queue is transmitted to the 10G port.
[0067] Use a state machine to poll each forwarding node. For example... Figure 5The diagram illustrates the process of polling forwarding nodes. The state machine defaults to an idle state and continuously polls the FIFO of descriptors in each queue of forwarding modules. When the FIFO is empty, it returns to idle; when not empty, it reads the descriptor from the FIFO, obtains the description information, and then searches the corresponding RAM for the base address and length of that descriptor to retrieve the data from the forwarding module in that queue. In other words, data is read from the forwarding node. The polling process continues, repeating the above steps.
[0068] Furthermore, a switch can be enabled at the entry point of each queue forwarding module, allowing for flexible control over the data path by setting the switch to be enabled.
[0069] Furthermore, queue classification information and time information can be added to the descriptor, and the dwell time of each queue can be accurately measured. Queue filtering, modification and other operations can also be performed on this basis.
[0070] In summary, based on the technical solution provided in this disclosure, the technical solution of this disclosure can achieve the following technical effects.
[0071] 1. When a cascade forwarding node is damaged and the external forwarding node on the FPGA is not in use, this external forwarding node can be used as a cascade forwarding node.
[0072] 2. When the cascading function is not required, cascading forwarding nodes and external forwarding nodes can be used to realize the function of extending the fiber optic cable between two cells (such as the first cell and the second cell).
[0073] 3. It can also be configured as two cells and supports multi-level cascading products (i.e., one cell is connected to the built-in forwarding node, and the other cell is connected to the external forwarding node. The cascading forwarding nodes realize the cascading function, thereby realizing multi-level cascading).
[0074] Figure 6 This is a functional block diagram of a data processing device according to an embodiment of the present disclosure.
[0075] like Figure 6 As shown, a data processing apparatus 600 according to an embodiment of the present disclosure includes a memory 601 and a processor 602.
[0076] Specifically, memory 601 is used to store computer-readable instructions.
[0077] Specifically, the processor 602 is configured to execute the computer-readable instructions, causing the data processing device to perform the data processing method described above.
[0078] Figure 7This is a schematic diagram illustrating a computer program product according to an embodiment of the present disclosure. Figure 7 As shown, a computer program product 700 according to an embodiment of this disclosure stores a computer program 701 thereon. When the computer program is executed by a processor, it implements the communication method described in any of the embodiments above. The computer program product includes, but is not limited to, system software, application software, and games. System software is the basic software of a computer, responsible for managing the computer's hardware and applications, including operating systems, device drivers, etc. Application software is software designed to meet specific needs, such as office software, image processing software, etc. Games are software used for entertainment, providing various gaming experiences. In addition, the computer program product may also include embedded software, firmware, etc., for controlling and operating various hardware devices.
[0079] The data processing method, apparatus, and computer program product according to embodiments of this disclosure, described in detail above with reference to the accompanying drawings, dynamically adjusts the correspondence between multiple forwarding nodes through application scenarios. By utilizing polling forwarding nodes, it achieves efficient and flexible data forwarding in network devices. Furthermore, when a forwarding node in the network device is damaged or malfunctions, since the FPGA contains multiple forwarding nodes and their correspondence can be dynamically adjusted, the damaged forwarding node can be bypassed by reconfiguring its correspondence, and data can be forwarded to other available forwarding nodes. This reduces the need for device replacement due to forwarding node damage, improving system stability and reliability. Further, the FPGA architecture of this disclosure, by integrating multiple forwarding nodes, constructs an efficient and flexible network data processing platform. This design not only improves the efficiency of network data transmission but also enhances network reliability and scalability, providing strong support for modern communication and IoT applications. Furthermore, the technical solution disclosed herein can also achieve the following technical effects: 1. When the cascade forwarding node is damaged and the external forwarding node on the FPGA is not used, the external forwarding node can be used as the cascade forwarding node; 2. When the cascading function is not required, the cascade forwarding node and the external forwarding node can be used to realize the function of fiber optic extension between two cells (such as the first cell and the second cell); 3. It can also be configured as two cells and supports multi-level cascading products (i.e., one cell is connected to the built-in forwarding node, one cell is connected to the external forwarding node, the cascade forwarding node realizes the cascading function, and thus realizes multi-level cascading).
[0080] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure.
[0081] The basic principles of this disclosure have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this disclosure are merely examples and not limitations, and should not be considered as essential features of each embodiment of this disclosure. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the scope of this disclosure to the necessity of employing the aforementioned specific details for implementation.
[0082] The block diagrams of devices, apparatuses, devices, and systems disclosed herein are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.
[0083] Additionally, as used herein, the “or” used in a list of items beginning with “at least one” indicates a separate list, such that a list of, for example, “at least one of A, B, or C” means A or B or C, or AB or AC or BC, or ABC (i.e., A and B and C). Furthermore, the word “exemplary” does not imply that the described example is preferred or better than other examples.
[0084] It should also be noted that in the systems and methods of this disclosure, the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered as equivalent solutions to this disclosure.
[0085] Various changes, substitutions, and modifications can be made to the technology herein without departing from the teachings defined by the appended claims. Furthermore, the scope of the claims of this disclosure is not limited to the specific aspects of the processes, machines, manufactures, events, means, methods, and actions described above. Currently existing or later-developed processes, machines, manufactures, events, means, methods, or actions that perform substantially the same function or achieve substantially the same result as the corresponding aspects herein can be utilized. Therefore, the appended claims include such processes, machines, manufactures, events, means, methods, or actions within their scope.
[0086] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of this disclosure. Therefore, this disclosure is not intended to be limited to the aspects shown herein, but rather to be carried out within the widest scope consistent with the principles and novel features disclosed herein.
[0087] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this disclosure to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations therein.
Claims
1. A data processing method, characterized in that, Applied to network devices, the method includes: Based on the application scenario, determine the correspondence between the multiple forwarding nodes contained in the Field Programmable Gate Array (FPGA); Poll the multiple forwarding nodes; For a readable forwarding node, a read operation is performed, and based on the correspondence, the read data is forwarded to the target forwarding node. The readable forwarding node and the target forwarding node are nodes among the plurality of forwarding nodes. The plurality of forwarding nodes includes at least: cell forwarding nodes, built-in forwarding nodes, external forwarding nodes, and cascaded forwarding nodes; The cell forwarding node is used to carry data corresponding to the covered cell; the built-in forwarding node is used to forward the data corresponding to the cell forwarding node to other network devices or terminals; the external forwarding node is used to forward the data corresponding to the cell forwarding node to other network device connections or terminals; and the cascaded forwarding node enables the cascading of the network device with other network devices. The process of determining the correspondence between multiple forwarding nodes contained in a Field Programmable Gate Array (FPGA) based on the application scenario includes: When it is determined that a cell is to be covered, the cell forwarding node corresponding to the cell is connected to the built-in forwarding node; The process of determining the correspondence between multiple forwarding nodes contained in a Field Programmable Gate Array (FPGA) based on the application scenario includes: When determining coverage of the first cell and the second cell, the cell forwarding node of the first cell is connected to the built-in forwarding node, and the cell forwarding node of the second cell is connected to the external forwarding node.
2. The data processing method as described in claim 1, characterized in that, The process of determining the correspondence between multiple forwarding nodes of the network device based on the application scenario includes: When determining coverage of the first cell and the second cell, the cell forwarding node of the first cell is connected to the cascaded forwarding node, and the cell forwarding node of the second cell is connected to the external forwarding node; The cascaded forwarding node is used to connect to other network devices or terminals.
3. The data processing method as described in claim 1, characterized in that, The plurality of forwarding nodes also includes a first forwarding node and a second forwarding node; The first forwarding node is used for communication connection with the core network, and the second forwarding node is used for communication connection with the central processing unit (CPU) of the network device.
4. The data processing method according to any one of claims 1-3, characterized in that, The polling of the plurality of forwarding nodes includes: Based on the state machine, the first-in-first-out (FIFO) queues corresponding to the multiple forwarding nodes are polled.
5. The data processing method as described in claim 4, characterized in that, The read operation for readable forwarding nodes includes: When the FIFO is not empty, the forwarding node corresponding to the FIFO is a readable forwarding node, and a read operation is performed on the readable forwarding node.
6. A data processing device, characterized in that, include: Memory, used to store computer-readable instructions; as well as A processor for executing the computer-readable instructions, causing the data processing device to perform the data processing method as described in any one of claims 1 to 5.
7. A computer program product, characterized in that, It includes a computer program that, when executed by a processor, implements the data processing method as described in any one of claims 1 to 5.
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