Method, apparatus and system for power converter

Abstract

Disclosed embodiments may include high conversion rate hybrid switched capacitor power converters, including components therefor, systems including the same, and methods therefor. The disclosed embodiments may provide power conversion circuits and architectures that may achieve high efficiency and high voltage conversion rates through the operation of a hybrid switched capacitor charge distributor and a multi-phase DC-DC voltage regulator. The circuit may include a magnetic structure and a package that may achieve high performance while providing high voltage conversion rates, while also providing low output current ripples and fast dynamic response. For example, the converter may be used to power a low-voltage high-current microprocessor in a data center.

Description

Technical Field

[0001] The present disclosure relates generally to power electronics and more particularly to DC-DC power converters. Background Art

[0002] Many electronic products, especially mobile computing and / or communication products and components (e.g., notebook computers, ultrabook computers, tablet devices, LCD and LED displays) require multiple DC (direct current) voltage levels. For example, a radio frequency transmitter power amplifier may require a relatively high voltage (e.g., 12V or higher), while a logic circuit may require a low voltage level (e.g., 1V to 2V). Some other circuits may require an intermediate voltage level (e.g., 5V to 10V). Power converters are typically used to generate lower or higher voltages from a common power source (e.g., a battery) in order to meet the power requirements of different components in an electronic product. Summary of the invention

[0003] Embodiments of the present disclosure provide a power converter. The disclosed embodiments may include a power converter circuit, which includes a plurality of charge distributors, which include switches, capacitors, and inductors. The plurality of charge distributors may have a fixed voltage conversion rate. The switches in the plurality of charge distributors may operate at a common frequency. Each of the plurality of charge distributors may include four terminals, one of which is connected to a high voltage, one of which is connected to ground, and two branch terminals have a voltage between the high voltage and ground. The power converter circuit may also include a plurality of voltage regulators, which include switches, inductors, and capacitors. The voltage regulator may adjust the voltage by changing the duty cycle of the switch. The terminal connected to the high voltage of the charge distributor may be connected to the high voltage terminal of the system, and the low voltage side of the voltage regulator may be connected to the low voltage terminal of the system.

[0004] The disclosed embodiments may also be directed to a coupled inductor including a magnetic core having three gaps between two ends forming four lengths of magnetic core material. The coupled inductor may also include a conductive winding wound around the four lengths of magnetic core material.

[0005] The core may include a cap layer (alternatively referred to as a cap structure) and / or two layers made of different materials. The cap layer of the core may include a gap. The windings form a mosaic pattern. The windings may also include pillars extending away from a given face of the core in a common direction.

[0006] The disclosed embodiments may also be directed to a coupled inductor, the coupled inductor comprising a magnetic core having twelve voids arranged in a four-by-three grid, the twelve voids forming four lengths of magnetic core material between two ends. The coupled inductor may also include a conductive winding wound around the four lengths of magnetic core material, the winding looping through at least one of the twelve voids.

[0007] The coupled inductor may have a core including a cap layer and / or two layers made of different materials. The cap layer of the core may include gaps. The windings form a mosaic pattern. The windings may also include legs extending away from a given face of the core in a common direction.

[0008] Additional features and advantages of the disclosed embodiments will be partially set forth in the following description, and in part will become apparent from the description, or may be learned through practice of the embodiments. The features and advantages of the disclosed embodiments may be realized and obtained through the elements and combinations set forth in the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Embodiments and various aspects of the present disclosure are shown in the following detailed description and accompanying drawings. It should be noted that, according to standard industry practice, various features are not necessarily drawn to scale. In fact, the size of various features can be arbitrarily increased or reduced for the sake of clarity of discussion.

[0010] Figure 1 is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0011] Figure 2 is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0012] Figure 3 is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0013] Figure 4A is a diagram illustrating example operations of an example power converter according to some embodiments of the present disclosure.

[0014] Figure 4B is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0015] Figure 4C is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0016] Figure 5A and Figure 5B is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0017] Figure 5C and Figure 5D Some embodiments according to the present disclosure are shown in Figure 5B Schematic diagram of example operation of an example power converter shown in FIG.

[0018] Fig. 6A is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0019] Figure 6B , Figure 6C and Fig.6D is a diagram illustrating an exemplary power conditioner according to some embodiments of the present disclosure.

[0020] Fig. 7A and Figure 7B is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0021] Fig. 8A and Figure 8B is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0022] Fig. 9A and Fig. 9B is a diagram illustrating an exemplary power converter employing coupled inductors according to some embodiments of the present disclosure.

[0023] Fig.10 is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0024] Fig.11 is a diagram illustrating an exemplary power converter employing coupled inductors according to some embodiments of the present disclosure.

[0025] Fig.12 is a diagram illustrating an exemplary power converter employing coupled inductors and MOSFET switches according to some embodiments of the present disclosure.

[0026] Fig.13 is a diagram illustrating an exemplary power converter employing coupled inductors and MOSFET switches according to some embodiments of the present disclosure.

[0027] Fig.14 and Fig.15 Some embodiments according to the present disclosure are shown in Fig.12 Schematic diagram of example operation of an example power converter depicted in FIG.

[0028] Fig.16 is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0029] Fig.17 is a diagram illustrating an exemplary power converter according to some embodiments of the present disclosure.

[0030] Fig.18A and Fig.18B is a diagram illustrating a low voltage dropout implementation for controlling a switch according to some embodiments of the present disclosure.

[0031] Fig.19 is a diagram illustrating an exemplary coupled inductor according to some embodiments of the present disclosure.

[0032] Fig. 20A , Fig. 20B and Fig. 20C An exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0033] Fig.21A , Fig.21B and Fig. 21C An exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0034] Fig. 22 An exemplary coupled inductor having a hybrid core material according to some embodiments of the present disclosure is shown.

[0035] Fig.23 Graph showing simulated performance of an exemplary coupled inductor according to some embodiments of the present disclosure.

[0036] Fig.24 An exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0037] Fig.25 and Fig.26 An example system including an example coupled inductor according to some implementations of the present disclosure is shown.

[0038] Fig.27A , Fig.27B and Fig.27C An exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0039] Fig.28 An exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0040] Fig.29 An exemplary power converter for accommodating a coupled inductor is shown in accordance with some embodiments of the present disclosure.

[0041] Fig.30An exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0042] Fig.31 A schematic diagram of an exemplary voltage regulator module (VRM) embedded in a package with a microprocessor is shown according to some embodiments of the present disclosure.

[0043] Fig.32 A schematic diagram illustrating an exemplary architecture of a microprocessor VRM according to some embodiments of the present disclosure.

[0044] Fig.33 A schematic diagram illustrating the topology of an exemplary architecture of a microprocessor VRM according to some embodiments of the present disclosure.

[0045] Fig.34 Exemplary operating waveforms of a microprocessor VRM based on a multi-stack switched capacitor point-of-load (MSC-PoL) architecture according to some embodiments of the present disclosure are shown.

[0046] Fig.35A , Fig.35B and Fig.35C Schematic diagrams of exemplary coupled inductors with stepped cores, windings, and magnetic plates are shown, respectively, according to some embodiments of the present disclosure.

[0047] Fig.36 A schematic diagram of an exemplary coupled inductor including an air gap is shown according to some embodiments of the present disclosure.

[0048] Fig.37A and Fig.37B Schematic diagrams showing top and bottom assembly views, respectively, of an exemplary MSC-PoL architecture for a microprocessor VRM according to some embodiments of the present disclosure.

[0049] Fig.38A , Fig.38B and Fig.38C A schematic diagram showing an exemplary circuit design for switches in a MSC-PoL architecture for a microprocessor VRM according to some embodiments of the present disclosure.

[0050] Fig.39A and Fig.39B Schematic diagrams showing top and side views, respectively, of the hardware layout of an exemplary VRM according to some embodiments of the present disclosure.

[0051] Fig.40 Graphs of measured inductor current and switch node voltage are shown for an exemplary coupled inductor according to some embodiments of the present disclosure.

[0052] Fig.41 Shown is a graph comparing conversion efficiencies of exemplary coupled inductors according to some embodiments of the present disclosure.

[0053] Fig.42 Hot spot temperature distribution of an exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0054] Fig.43 A schematic diagram of an exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0055] Fig.44 A schematic diagram of an exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0056] Fig.45A and Fig.45B A schematic diagram of an exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0057] Fig.46A and Fig.46B A schematic diagram of an exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0058] Fig.47 A schematic diagram of an exemplary coupled inductor according to some embodiments of the present disclosure is shown.

[0059] Fig.48 Exemplary inductors and efficiency graphs are shown according to some embodiments of the present disclosure.

[0060] Fig.49 An exemplary leakage inductance graph and an exemplary current ripple graph are shown according to some embodiments of the present disclosure.

[0061] Fig.50 An exemplary inductor and flux saturation of the inductor at heavy load according to some embodiments of the present disclosure are shown.

[0062] Fig.51 An exemplary graph illustrating the effect of air gap thickness on efficiency of an inductor according to some embodiments of the present disclosure.

[0063] Fig.52 An exemplary graph illustrating the effect of switch capacity on efficiency according to some embodiments of the present disclosure.

[0064] Fig.53 Exemplary views of inductors with one or more magnetic sheets according to some embodiments of the present disclosure and exemplary graphs showing the effect of the number of magnetic sheets on efficiency.

[0065] Fig.54 Exemplary diagrams and tables are shown according to some embodiments of the present disclosure.

[0066] Fig.55 Exemplary diagrams and inductor cores according to some embodiments of the present disclosure are shown.

[0067] Fig.56 A schematic diagram of an exemplary inductor according to some embodiments of the present disclosure is shown.

[0068] Fig.57 A schematic diagram of an exemplary inductor according to some embodiments of the present disclosure is shown.

[0069] Fig.58 Exemplary circuit diagrams and graphs of inductors according to some embodiments of the present disclosure are shown.

[0070] Fig.59 Exemplary circuit diagrams and graphs of inductors according to some embodiments of the present disclosure are shown.

[0071] Fig.60 Exemplary circuit diagrams and graphs of inductors according to some embodiments of the present disclosure are shown.

[0072] Fig.61 Exemplary diagrams showing some implementations according to the present disclosure are shown.

[0073] Fig.62 An exemplary graph with measured waveforms according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0074] The following disclosure provides many different exemplary embodiments or examples for realizing the different features of the provided subject matter. Specific simplified examples of components and arrangements are described below to illustrate the present disclosure. Of course, these are merely examples and are not intended to be limiting. In addition, the present disclosure may repeat reference numerals and / or letters in various examples. This repetition is for simplicity and clarity and does not itself specify the relationship between the various embodiments and / or configurations discussed.

[0075] The terms used in this specification generally have their ordinary meanings in the prior art and in the specific context in which each term is used. The use of examples in this specification (including examples of any term discussed herein) is merely illustrative and in no way limits the scope and meaning of the present disclosure or any exemplified term. Likewise, the present disclosure is not limited to the various embodiments given in this specification.

[0076] Throughout the drawings, a combination of alphanumeric characters may be used to refer to components, some of which may include subscripts. Within this specification, subscripts may be formatted as plain characters. For example, the "V" in the drawings may be used to refer to components. HIGH " may be referred to as "VHIGH" within this specification. As another example, "Q1" in the figure may be referred to as "Q1" within the specification.

[0077] Although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. For example, without departing from the scope of the embodiments, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the related listed items.

[0078] Additionally, for ease of description, spatially relative terms (e.g., "below," "beneath," "below," "above," "above," etc.) may be used herein to describe the relationship of one element or feature to another element or feature as shown in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may be interpreted similarly accordingly.

[0079] Herein, the term “coupled” may also be referred to as “electrically coupled”, and the term “connected” may be referred to as “electrically connected.” “Coupled” and “connected” may also be used to indicate that two or more elements cooperate or interact with each other.

[0080] Throughout this disclosure, embodiments are discussed with respect to specific electrical components (e.g., capacitors and inductors). Although individual components (e.g., a single capacitor, a single inductor) may be discussed, a combination of multiple components may replace a single component. For example, although a single capacitor may be discussed or depicted, two or more capacitors (e.g., in series, in parallel, or a combination of the two) may be substituted as long as the desired quality remains the same. In this example, an embodiment requiring a single 20 mF capacitor may instead use two 10 mF capacitors in parallel. Similar substitutions may be made for inductors.

[0081] Various embodiments of the present disclosure will be described with respect to embodiments in a specific context, such as a switched capacitor power converter. As used in the present disclosure, the term "switched capacitor converter" may refer to a switched capacitor network configured to convert an input voltage into an output voltage. The network may be changed between two or more circuit configurations using switches to change the voltage between an input terminal and an output terminal. Although not discussed in detail herein, the disclosed embodiments may rely on a level shifter and a gate driver to control the open and closed states of the switches. The disclosed embodiments may operate using different switching frequencies, such as 50kHz to 500MHz.

[0082] The disclosed embodiments may include circuits and techniques for power converters, and more particularly include circuits and techniques for power converters with high voltage conversion rates, requiring small output current ripple, and requiring fast dynamic response. The disclosed embodiments may include converters particularly suitable for powering microprocessors in data centers, telecommunication base stations, and consumer electronics.

[0083] The disclosed embodiments may include power conversion circuits and architectures that can achieve high efficiency and high voltage conversion rates through the operation of a hybrid switched capacitor charge distributor and a multi-phase DC-DC voltage regulator. The circuit may include a magnetic structure and packaging that can achieve high performance and high voltage conversion rates while providing low output current ripple and fast dynamic response. For example, the converter may be used to power low voltage, high current microprocessors in a data center.

[0084] General-purpose and energy-efficient computing can benefit from DC-DC converters with very low output voltages (<2V), high output currents (>50A), and high voltage conversion ratios (>10:1). Power converters that can provide a low voltage output (<2V) regulated with a wide bandwidth while drawing energy from a higher wide-range input voltage (e.g., typically between 40V and 60V) can be useful for supporting high-performance microprocessor and telecommunication processing loads. The size, cost, and performance advantages of integration can be ideal for designing modular and miniaturized DC-DC converters that can be easily scaled in size to meet a variety of applications with different voltage and current requirements.

[0085] Switching mode power converters can be used to reduce voltage. These types of converters can transfer energy from the converter input to the output with the help of an inductor or coupled inductor. Such magnetic-based topologies can include synchronous buck converters, interleaved synchronous buck converters, three-level buck converters, etc. Such designs can efficiently provide regulated outputs from variable input voltages with high bandwidth control of the output. However, such designs may not be suitable for applications with high input voltages. For example, the switches in the buck converter need to handle both high input voltage stress and high output current stress. In order to achieve high conversion rates, the duty cycle of the buck converter needs to be low. Narrow duty cycles and high inductor blocking voltages result in higher core losses and larger inductor sizes. For voltage regulators, increasing the operating frequency is beneficial to reducing the size of passive components and increasing the control bandwidth. However, hard switching operation may limit the switching frequency and the efficiency and power density that can be achieved. They may also include packaging limitations.

[0086] A two-stage intermediate bus architecture (IBA) can provide high voltage conversion rates and high output currents. In a two-stage IBA design, the front-end stage can be implemented as an isolated DC-DC converter based on a 48V to 12V transformer without regulating or switching capacitor circuits. The second stage can be implemented as a multi-phase buck converter. The switches of the front-end stage and the second stage do not necessarily need to handle both high voltage stress and high current stress. However, isolation may not be required in the front-end stage of the IBA, and transformer-based designs may result in low control bandwidth due to inherent resonant characteristics. In addition, the transformers in these architectures may need to handle high flux while carrying large currents, which may challenge efficiency, power density, and dynamic performance.

[0087] Another approach to the front-end stage of the IBA may include a switched capacitor (SC) based DC-DC converter. This family of converters may be suitable for high density designs. The SC circuit may include a network of switches and capacitors, where the switches may be periodically turned on and off to cycle the network through different operating states. However, a limitation of the switched capacitor DC-DC converter may be that it provides relatively poor output voltage regulation in the presence of variations in input voltage or load. Since the conversion ratio is different from the optimal ratio, the efficiency of the switched capacitor converter may be reduced.

[0088] Since both the transformer-based DC-DC converter and the SC-based DC-DC converter are unregulated, a second stage can be used in an IBA for voltage regulation. The second stage can be implemented as a multiphase buck converter that regulates the output voltage from the intermediate bus. Reducing the intermediate bus voltage can reduce switching losses, achieve higher switching frequencies, and improve the dynamic response of the multiphase buck converter. However, the lower the intermediate bus voltage, the higher the voltage conversion rate required by the front-end stage. Since the voltage regulation capability of the SC-based DC-DC converter may be poor, multiple SC converters with a fixed step-down ratio can be cascaded at the front-end stage to meet a higher voltage conversion rate. These methods may not satisfactorily achieve the efficiency and power density levels required for both the front-end stage and the second voltage regulator in the intermediate bus architecture. The disclosed embodiments can address these challenges to achieve high efficiency and fast dynamic response of SC-based power converters while maintaining high bandwidth output regulation and high overall efficiency for point-of-load applications.

[0089] Figure 1 is a diagram illustrating an exemplary power converter 100 according to some embodiments of the present disclosure. The power converter 100 can provide an architecture for high-step voltage conversion with high efficiency and compact size. As shown, the power converter 100 can include a switched capacitor charge distributor 110, a DC-DC voltage regulator 120, and a DC-DC voltage regulator 130. The charge distributor 110 can be connected in series with the voltage regulator 120 and the voltage regulator 130. The voltage regulator 120 can be connected in parallel with the voltage regulator 130.

[0090] In some embodiments, the converter 100 may transfer energy from a high voltage (HV) terminal to a low voltage (LV) terminal. The charge distributor 110 may convert an input voltage at the HV terminal into two intermediate bus voltages VMID1 and VMID2 that are less than the input voltage. The voltage regulators 120 and 130 may receive the intermediate bus voltages VMID1 and VMID2, respectively, and provide a regulated output voltage at the LV terminal, wherein the output terminals thereof are connected in parallel. In some embodiments, the converter 100 may alternatively or additionally transfer energy from the LV terminal to the HV terminal. For example, the voltage regulators 120 and 130 may accept an input voltage at the LV terminal and provide two intermediate bus voltages VMID1 and VMID2 that are higher than the input voltage. The switched capacitor charge distributor 110 may convert the intermediate bus voltage into an output voltage higher than the intermediate bus voltage at the HV terminal. This type of converter may be suitable for providing a low voltage (e.g., 0.5V to 1.8V) from a high voltage level (e.g., 40V to 60V) with a large variation. This type of converter can also be used to power digital circuits with dynamic voltage scaling, or to power low-power IoT devices that require a wide output voltage range.

[0091] Figure 2 2 is a diagram showing an exemplary power converter 200 according to some embodiments of the present disclosure. The converter 200 may include two switched capacitor charge distributors 210 and 215 and four DC-DC voltage regulators 220, 225, 230, and 235. As shown, the converter 200 may be an example structure of two basic converter units connected in parallel for high output current. For example, the converter 200 may be two parallel connected from Figure 1 An example of a power converter 100. This arrangement can support higher output currents.

[0092] Figure 3 is a diagram illustrating an exemplary power converter 300 according to some embodiments of the present disclosure. The converter 300 may include three switched capacitor charge distributors 305, 310, and 315 and four DC-DC voltage regulators 320, 325, 330, and 335. As shown, the converter 300 may be Figure 2An extension of converter 200. For example, converter 300 may include the same two distributors and four voltage regulators as converter 200, but converter 300 may add a third switched capacitor charge distributor (e.g., distributor 305) to drive two switched capacitor charge distributors 310 and 315 to generate four intermediate bus voltages VMID1 to VMID4 for four dc-dc voltage regulators. This extended architecture can support higher voltage levels (e.g., 80V to 120V). This extended architecture can be further extended by cascading switched capacitor charge distributors. For example, there may be one charge distributor at the first stage and two charge distributors at the second stage. Although not shown, this pattern can continue on subsequent stages, for example, at the (n+1)th stage there may be a charge distributor that can be used to generate 2 n 2 of the intermediate bus voltage n A charge distributor.

[0093] Figure 4A is a diagram illustrating an example operation of an exemplary power converter 400A according to some embodiments of the present disclosure. Converter 400A may include an input voltage VHIGH, switches Q1, Q2, Q3, and Q4, capacitor C1, and output nodes VMID1 and VMID2. As shown, converter 400A may form a switched capacitor charge distributor with a voltage conversion ratio of 2:1. For example, by selectively switching switches Q1, Q2, Q3, and Q4, VHIGH may be reduced by half.

[0094] Figure 4B is a diagram showing an exemplary power converter 400B according to some embodiments of the present disclosure. Similar to converter 400A, converter 400B may include an input voltage VHIGH, switches Q1, Q2, Q3, and Q4, and output nodes VMID1 and VMID2. However, converter 400B may include a charge storage block 1A instead of depicting a capacitor. In some embodiments, charge storage block 1A may be a device for storing capacitors. For example, charge storage block 1A may include one or more capacitors. In other examples, charge storage block 1A may also include one or more inductors. The inductor may be placed in parallel or in series with one or more capacitors, which may allow converter 400B to be multi-resonant.

[0095] In some embodiments, ( Figure 4A ) converter 400A and ( Figure 4B Each pair of switches Q1, Q2, Q3 and Q4 in 400B can be controlled together. Figure 4C4 is a diagram illustrating an exemplary power converter circuit operation graph 400C according to some embodiments of the present disclosure. Graph 400C depicts a graph 410 showing the state of control signals for switches Q1 and Q3 over time. Graph 420 shows the state of control signals for switches Q2 and Q4 over time. Graphs 430 and 440 show the resulting voltage VC1 and current IC1 across capacitor C1 of converter 400A (even though labeled with the subscript "C1", or the voltage and current across charge storage block 1A of converter 400B) over time, respectively.

[0096] Figures 410, 420, 430, and 440 depict example operations of converters 400A and 400B. For example, when Q1 and Q3 are turned on, one output terminal voltage VMID2 can be equal to VHIGH-VC1. When Q2 and Q4 are turned on, the other output terminal voltage VMID1 can be equal to VC1. The on-time of Q1 and Q3 can be the same as the on-time of Q2 and Q4, and the combined on-time of each can be less than half of the entire switching cycle. The intermediate bus voltages VMID1 and VMID2 are approximately equal. The voltage across the HV terminal is approximately 2:1 with the intermediate bus voltages VMID1 and VMID2.

[0097] Figure 5A 4 is a diagram showing an exemplary power converter 500A according to some embodiments of the present disclosure. As shown, the converter 500A may include twelve switches Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q9, Q10, Q11 and Q12 and three capacitors C1, C2 and C3. The converter 500A may receive a voltage VHIGH and provide output nodes VMID1, VMID2, VMID3 and VMID4. In fact, these components may implement three instances of the converter 400A. The converter 500A may form a switch capacitor charge distributor with an extended voltage conversion rate. Two 2:1 charge distributors may be directly connected to the two output terminals of the front-end 2:1 charge distributor, and the overall voltage conversion rate is 4:1.

[0098] In some implementations, converter 500A may include a reduced number of switches while providing similar operation. Figure 5B is a diagram illustrating an exemplary power converter circuit 500B according to some embodiments of the present disclosure. Figure 5A The switches in the converter 500A are connected in series and their control signals may be the same. Figure 5A The converter 500A in can be simplified to Figure 5B For example, the converter 500B may be replaced by one switch instead of two switches connected in series, for example, Figure 5BA single switch (e.g., switches Q5 and Q9, respectively) in converter 500B is replaced by Figure 5A Each pair of Q2 and Q5 and Q3 and Q9 in converter 500A. In some embodiments, the switches replaced in converter 500B may need to have a higher voltage rating than when paired switches are used.

[0099] Converter 500A and converter 500B can maintain charge balance of capacitors in the switched capacitor charge distributor by using active control with capacitor voltage feedback. If the following DC-DC voltage regulators share the same current, the switched capacitor charge distributor architecture (e.g., converter 500A and converter 500B) can include automatic charge balancing.

[0100] Figure 5C and Figure 5D Some embodiments according to the present disclosure are shown in Figure 5B FIG. 5 is a diagram of an exemplary operation and configuration of an exemplary power converter 500B. Figure 5C In the configuration shown, converter 500B has switches Q1, Q3, Q6, Q8, and Q11 in a closed (e.g., conductive) position, and switches Q2, Q4, Q7, Q10, and Q12 in an open (e.g., no electrical path) position. Figure 5C and Figure 5D As shown, C1 can be charged through IMID4 and discharged through IMID2. C2 can be charged through IMID2 and discharged through IMID1. C3 can be charged through IMID4 and discharged through IMID3. If the total charge extracted through the four ports VMID1, VMID2, VMID3, and VMID4 is approximately equal, the converter 500B can ensure that each capacitor is charge balanced.

[0101] Fig. 6A is a diagram showing an exemplary power converter 600A according to some embodiments of the present disclosure. As shown, the power converter 600A may include switches S1 and S2, an inductor L1 and a capacitor C1, and nodes VMID and VLOW. The intermediate voltage node VMID may provide an input voltage, and the switch S1 and the inductor L1 are between the node VMID and the node VLOW. The converter 600A may be understood as a single-phase buck converter. For example, the converter 600A may reduce the voltage at a ratio such as 2:1.

[0102] Figure 6Bis a diagram illustrating an exemplary power regulator 600B according to some embodiments of the present disclosure. As shown, the power regulator 600B may include switches S1 to S8, inductors L1 to L4 and capacitor C1, as well as nodes VMID and VLOW. The regulator 600B may be a multi-phase buck voltage regulator.

[0103] Figure 6C is a diagram illustrating an exemplary power regulator 600C according to some embodiments of the present disclosure. As shown, the power regulator 600C may include switches S1 to S6, inductors L1 and L2, and capacitors C1 to C4, as well as nodes VMID and VLOW. The regulator 600C may be a hybrid switched capacitor multi-inductor buck voltage regulator.

[0104] Fig.6D 600D according to some embodiments of the present disclosure. As shown, the power regulator 600C may include switches S1 to S8, inductors L1 to L4, and capacitors C1 to C4, as well as nodes VMID and VLOW. The regulator 600D may be a multi-phase (e.g., four-phase) series capacitor step-down voltage regulator.

[0105] In some embodiments, the regulator 600D can receive an intermediate bus voltage (VMID) and divide the intermediate bus voltage through a plurality of high-side switches (S1 to S4) stacked in series. One terminal of each of the series capacitors (C1, C2, and C3) can be connected to the source of the high-side switch, and the other terminals of the series capacitors can be connected to the drain of the low-side switch of the same phase. The high-side switch and the low-side switch can be controlled by a pair of complementary gate driver signals. The inductor of the series capacitor buck converter can be coupled or uncoupled. Compared with a conventional multi-phase buck converter, the device voltage stress of the multi-phase series capacitor buck converter 600D can be lower. For example, Figure 6B The switches of the multiphase buck regulator 600B in may need to block the entire intermediate bus voltage VMID. Fig.6D In the four-phase series capacitor buck regulator 600D, the voltage stress of switches S1 and S5 to S8 in the regulator 600D is VIB / 4, and the voltage stress of S2 to S4 is VMID / 2.

[0106] In some embodiments, converter 600A, regulator 600B, regulator 600C, and regulator 600D can be used as examples of DC-DC voltage regulators used in the disclosed embodiments. For example, regulators 120 and 130 of converter 100 can be any one of converter 600A, regulator 600B, regulator 600C, and regulator 600D. The same can be applied to DC-DC voltage regulators 220, 225, 230, and 235 of converter 200, and regulators 320, 325, 330, and 335 of converter 300.

[0107] Fig. 7A and Figure 7B are diagrams illustrating exemplary power converters 700A and 700B, respectively, according to some embodiments of the present disclosure. Power converter 700A may include switches Q1 to Q4, switches S1 to S4, capacitors C1 and C2, and inductors L1 and L2. Power converter 700A may also include nodes VHIGH (positive and negative), VMID1, VMID2, and VLOW. Power converter 700A may include an embodiment of a basic unit of a high conversion rate architecture, namely a 2:1 switched capacitor charge distributor driving two single-phase buck converters.

[0108] In some embodiments, power converter 700B may include switches Q1 and Q4, switches S1 to S4, capacitors C1 and C2, and inductors L1 and L2. Power converter 700B may represent a simplified version of the circuit shown in power converter 700A. For example, in converter 700A, switches Q2 and S1 are connected in series, and switches Q3 and S3 are connected in series. Each of these switch pairs can be combined and reduced to a single switch, which forms the circuit shown in converter 700B.

[0109] Fig. 8A and Figure 8B 800A and 800B, respectively, according to some embodiments of the present disclosure. Power converter 800A may include nodes VHIGH and VLOW, switches Q1 to Q14, capacitors C1 to C8, and inductors L1 to L4. As shown, converter 800A may form a 2:1 switched capacitor charge distributor that drives two hybrid switched capacitor multi-inductor buck converters (e.g., Figure 6CThe power converter 800B may include nodes VHIGH and VLOW, switches Q1 to Q18, capacitors C1 to C8, and inductors L1 to L8. As shown, the converter 800A may form a 2:1 switched capacitor charge divider that drives two four-phase series capacitor buck converters (e.g., from Fig.6D The converters 800A and 800B may be adapted for a 48V to 1V conversion rate.

[0110] Fig. 9A and Fig. 9B 1 and 10 are diagrams respectively illustrating exemplary power converters 900A and 900B employing coupled inductors according to some embodiments of the present disclosure. Converters 900A and 900B may generally include Figure 8B The components arranged in converter 800B are the same as the components arranged in converter 800A. The inductors of converter 900A and converter 900B can be coupled. In converter 900A, the coupled inductors can use one magnetic core to couple all the step-down phases in the same unit. For example, inductors L1 to L4 can be coupled together, and inductors L5 to L8 can be coupled together. In this example, the total number of magnetic cores can be equal to the number of series capacitor step-down units. In converter 900B, the coupled inductors can use only one magnetic core to couple all 8 step-down phases. For example, as Fig. 9B As shown, the inductors L1 to L8 can all be coupled together. Here, coupling can be performed between the inductors of multiple buck converters, which can further increase the power density compared to using uncoupled inductors.

[0111] Fig.10 is a diagram illustrating an exemplary power converter 1000 according to some embodiments of the present disclosure. Converter 1000 may include an example topology of a 48V to 1V converter, wherein two basic units are connected in parallel for higher output currents. As shown, all 16 inductors of converter 1000 are coupled together. In this manner, converter 1000 may include coupled inductors that couple all 16 series capacitor step-down phases together.

[0112] Fig.111 is a diagram showing an exemplary power converter 1100 using coupled inductors according to some embodiments of the present disclosure. Converter 1000 provides an example topology of a 96V to 1V converter. Converter 100 may include a front-end 2:1 switched capacitor charge distributor, two 2:1 switched capacitor charge distributors, and four series capacitor buck voltage regulators. The front-end 2:1 switched capacitor charge distributor may drive two 2:1 switched capacitor charge distributors. Each of the two 2:1 switched capacitor charge distributors may drive two of the four series capacitor buck voltage regulators. The architecture of converter 1100 may provide the following advantages: providing a 96:1 buck capability, i.e., twice the buck capability (48:1) of converter 1000, with only two additional switches added.

[0113] Fig.12 1 is a diagram showing an exemplary power converter 1200 using coupled inductors and MOSFET switches according to some embodiments of the present disclosure. The converter 1200 provides a 48V to 1V basic conversion unit (e.g., Fig. 9A All switches may be implemented as MOSFETs, gallium nitride high electron mobility transistors (GaN HEMTs), and / or other semiconductor switches.

[0114] Fig.13 1 is a diagram showing an exemplary power converter 1300 using coupled inductors and MOSFET switches according to some embodiments of the present disclosure. The converter 1300 can provide an example topology of two 48V to 1V basic conversion units connected in parallel. For example, the converter 1300 can provide Fig.10 Example implementations of converter 1000 of FIG. 1000. All switches may be implemented as MOSFETs, gallium nitride high electron mobility transistors (GaN HEMTs), and / or other semiconductor switches. In one implementation, the rated voltages of the high-side switches of power converter 1300 may be asymmetric. In another implementation, the rated voltages of the high-side switches of power converter 1300 may be symmetric. Power converter 1300 may provide the advantage of a reduced number of components compared to a buck converter with comparable ratios and / or automatic current sharing.

[0115] Fig.14 and Fig.15 They are respectively showing some embodiments according to the present disclosure. Fig.12Figures 1400 and 1500 of example operations of an exemplary power converter 1200 are shown. Continuous time-dependent curve graphs indicate when the switch is in the "on" or conductive state and when the switch is in the "off" or open state. As shown in Figure 1400 of Figure 4, all switches can operate at the same switching frequency. In order to reduce output voltage and current ripple, Figure 1400 includes four buck phases operating in a staggered mode with a 90° phase shift in one series capacitor buck voltage regulator. In addition, two series capacitor buck voltage regulators can also operate in a staggered mode with a 180° phase shift. The gate driver signals of S0A and S0B of the 2:1 switched capacitor charge distributor can be synchronized with the gate driver signals of S1A and S1B.

[0116] Graph 1500 may illustrate different dead times between activations of each switch. As shown in graph 1500, setting appropriate dead times may enable zero current switching for reduced switching losses.

[0117] The disclosed embodiments can solve the voltage ripple. Fig.13 As an example of the circuit topology of the converter 1300, the DC rated voltage of capacitors C1 and C2 in the 2:1 switched capacitor charge distributor may be VHIGH / 2, and the DC rated voltage of the series capacitors may be:

[0118] C1A to C1D: 0.375*VHIGH;

[0119] C2A to C2D: 0.25*VHIGH; and

[0120] C3A to C3D: 0.125*VHIGH.

[0121] The average value of VIB may be approximately half of the input voltage VHIGH. During normal operation, the capacitor may have a voltage ripple, and the magnitude of the voltage ripple may depend on the capacitance and operating state of the capacitor. Fig.13 Including example DC voltage ratings for switches in converter 1300, assume VHIGH=48V.

[0122] Fig.16 is a diagram illustrating an exemplary power converter 1600 according to some embodiments of the present disclosure. Converter 1600 includes example voltage ratings for its switches. Fig.13 similar, Fig.16 The voltage ratings of all switches in an example topology of a 96V to 1V converter are shown.

[0123] Fig.17is a diagram illustrating an exemplary power converter 1700 according to some embodiments of the present disclosure. Converter 1700 provides an example gate driver implementation for a 48V to 1V basic conversion unit. Converter 1700 may include power transmission paths for each gate driver and diode bootstrap chain, which are derived from the VDRIVE node. Converter 1700 may also include gate driver control signals G0A to G8B for each switch, which are referenced to ground. Converter 1700 may include a level shifter (LS) to convert the signal voltage level of a switch with a floating source.

[0124] The bootstrap diode may have a forward voltage drop. This voltage drop may accumulate in a long diode chain. To address this issue, the disclosed embodiments may modify the original gate driver voltage supply (referenced to ground) to boost it. This may allow the gate driver voltage supply to have sufficient gate driver voltage supply for the top switch in converter 1700. To avoid overvoltage of Vgs (e.g., for GaN switches), an LDO may be inserted before the gate driver.

[0125] Fig.18A and Fig.18B 1800A and 1800B are schematic diagrams respectively illustrating low voltage dropout implementations 1800A and 1800B for controlling a switch according to some embodiments of the present disclosure. Implementations 1800A and 1800B may provide example methods of providing switches with floating sources and grounded sources, respectively.

[0126] Fig.19 1 is a diagram showing exemplary coupled inductors 1900 and 1910 according to some embodiments of the present disclosure. The disclosed embodiments may include a DC-DC converter that may include a magnetic component (e.g., an inductor). In order to improve the overall power density of the converter, the disclosed embodiments may employ an inductor coupled to a common magnetic core. Inductor 1900 provides an example coupled inductor having a four-phase ladder structure (e.g., 4×1). Inductor 1910 provides an example coupled inductor having a 16-phase matrix structure (e.g., 4×4). Although example sizes of 4×1 and 4×4 are used, other ladder lengths and matrix sizes, such as 16×16, 4×8, and 1×16, may also be used. Although not explicitly listed, other variations in the ratio of matrix and ladder sizes may also be formed. Such a flat 2D structure may be attractive for implementations that require low heights, such as laptop computers and data centers.

[0127] For example, the magnetic core may include a first gap forming two lengths of core material between the two ends and a conductive winding wound around the two lengths of core material. In some embodiments, the magnetic core may include a second gap and a third gap combined with the first gap, wherein the first gap, the second gap, and the third gap form four lengths of core material between the two ends. In some embodiments, the magnetic core may include a plurality of first gaps arranged along a first direction (e.g., along the length of the magnetic core) and at least one second gap arranged along a second direction perpendicular to the first direction. The plurality of first gaps may form a plurality of lengths of the magnetic core between the two ends in the first direction, and the conductive winding may be wound around the plurality of lengths of the core material.

[0128] Fig. 20A , Fig. 20B and Fig. 20C An exemplary coupled inductor according to some embodiments of the present disclosure is shown. Fig. 20A A three-dimensional model of an example ladder core 2000A is provided. For example, as shown, the ladder core 2000A can include various length and width dimensions that can be used to identify various areas. As an example, the dimensions can be: H = 3 mm, LH = 6 mm, WH = 4 mm, LV = 1.2 mm, WV = 3 mm. In this example, the core area is 19.6 mm × 12 mm = 235.2 mm 2 , and the volume is 19.6mm×12mm×3mm=705.6mm 3 The core material may be ferrite 3F4 with μr=900.

[0129] Fig. 20B A coupled inductor 2000B is shown. As shown, the inductor 2000B may include four windings 2010 that may be wound around the "rungs" of a stepped core 2020. In some embodiments, the windings 2010 may extend below the bottom surface of the core 2020. For example, the windings 2010 may extend 1 mm to 10 mm below the bottom surface of the core 2020. In other examples, the windings 2010 may extend less than 1 mm. Fig. 20C Shows Fig. 20A and Fig. 20B An example reluctance model of a four-phase ladder-structure coupled inductor depicted in 2000C.

[0130] Fig.21A 、, Fig.21B and Fig. 21C An exemplary coupled inductor according to some embodiments of the present disclosure is shown. Fig.21A Depicted Fig. 20B An example inductor model 2100A for coupled inductor 2000B can be obtained by converting Fig. 20CThe magnetic resistance model 2000C is used to form the inductance model 2100A. The magnetic resistance value is extracted through ANSYS simulation: H1 =1.2×10 6 H -1 , P L1 =65.4×10 6 H -1 , P H2 =0.8×10 6 H -1 , P L2 =73×10 6 H -1 , P H3 =0.8×10 6 H -1 , P L3 =76.1×10 6 H -1 , P H4 =1.2×10 6 H -1 , P L4 =66.05×10 6 H -1 , P V =0.236×10 6 H -1 The inductor dual model can be used in circuit simulation to verify the design. Fig.21B A simulation of phase current and flux density in a balanced current situation is shown in Figure 2100. Figure 2100B includes: a graph 2110 showing current versus time; a graph 2120 showing magnetic B field strength (e.g., magnetic flux density) versus time for regions corresponding to the "steps" of a ladder inductor; and a graph 2130 showing magnetic B field strength versus time for regions along the two "side rails" of the ladder inductor. Fig. 21C Example ANSYS FEA simulations 2101C and 2102C are shown with unbalanced phase currents. The darker shading around the gaps between the rungs indicates an increase in magnetic flux density. The simulations and calculations show that the design performs well with balanced phase currents. For example, the number of "hot spots" in simulation 2102C is relatively small. However, the inductor may saturate with unbalanced phase currents. For example, simulation 2101C includes an upper region where flux density is concentrated.

[0131] In some embodiments, the coupled inductor may include one or more of the following variations: hybrid core materials, windings that form legs extending orthogonal to the bottom of the core, a core that includes a cap covering (partially or fully) the windings, a cap that includes gaps (e.g., to control leakage inductance), tesselated windings, and / or adjacent tesselated windings. Although not necessarily explicitly depicted in the figures, the disclosed embodiments may include all combinations, subcombinations, and permutations of these features. For example, the disclosed embodiments may include a hybrid core and a cap on top of the core (e.g., with or without gaps) and no tesselated windings, even if this particular combination of features is not explicitly shown together in a given figure.

[0132] Fig. 22 An exemplary coupled inductor 2200 with mixed core materials is shown in accordance with some embodiments of the present disclosure. Inductor 2200 may include a first layer 2220, a second layer 2225, and a winding 2210. The materials of both the first layer 2220 and the second layer 2225 may be magnetic, but comprise different materials. In some embodiments, one of the layers may comprise a material having a high magnetic permeability and a low saturation capability (e.g., ferrite), while the other layer may comprise a material having a lower magnetic permeability but a higher saturation capability (e.g., iron powder). Using multiple or different materials may prevent or reduce the likelihood of the inductor becoming completely saturated (e.g., material 1 saturates at a higher / lower current than material 2). Coupled inductor 2200 may be similar in other respects to other four-by-one ladder inductors previously discussed (e.g., such as Fig.19 (Inductor 1900), Fig. 20A , Fig. 20B The first layer 2220 and the second layer 2225 can be formed by stacking two thinner plates, and the total height that the two thinner plates can form is 3 mm. As an example, the thickness of the powder material can be 1.2 mm. The first layer 2220 and the second layer 2225 can have the same thickness or different thicknesses. As an example of layers with different thicknesses, the thickness of the first layer 2220 and the thickness of the second layer 2225 can form a ratio of 3:1 (for example, the first layer 2220 can have a thickness of 3 mm, and the second layer 2224 can have a thickness of 1 mm), or vice versa, a ratio of 1:3 can be formed.

[0133] Fig.23Graph 2300 showing simulated performance of an exemplary coupled inductor according to some embodiments of the present disclosure. Graph 2300 may be generated by a PSIM simulation with unbalanced phase currents (e.g., I1=46A, I2=34A, I3=42A, I4=36A). Graph 2300 may include: a graph 2310 of a 3F4 (e.g., soft ferrite) material core (only one layer); a graph 2320 of a double-layer core made of 3F4 material and Ni-Fe (high flux) powder; and a graph 2330 of a double-layer code made of 3F4 material and Ni-Fe-Mo powder (e.g., from metal powder products). These simulated graphs are based on a total height of 3 mm. For the double-layer graphs, a thickness of 1.2 mm is used for the powder material. In addition to these example dimensions, the simulation may also use the electromagnetic permeability of high flux (Ni-Fe) powder (e.g., μr=160) and MPP (Ni-Fe-Mo) powder (e.g., μr=300). Comparing graphs 2310 , 2320 , and 2330 , indicates that the double-layer design utilizing hybrid materials can reduce current ripple in the case of unbalanced phase currents.

[0134] Fig.24 2400 according to some embodiments of the present disclosure. Inductor 2400 may be a 16-phase matrix structure coupled inductor (e.g., Fig.10 Converter 1000, Fig.11 Converter 1100, Fig.13 The converter 1300 and Fig.16 16-phase inductor used in converter 1600). As shown, core 2420 may include openings or gaps forming a 3 by 4 grid. This allows 16 independent windings 2410 to form a four by four winding grid.

[0135] Fig.25 and Fig.26 Example systems 2500 and 2600 , respectively, are shown including example coupled inductors according to some implementations of the present disclosure.

[0136] Fig.25 A side view of system 2500 is shown, which shows its vertical power transmission structure. System 2500 may include a voltage regulator module (VRM) 2510, a core 2520, and a substrate 2530. As shown, VRM 2510 may be mounted directly under the substrate of the CPU. This arrangement may allow power to be transmitted from the bottom to the top. The PCB area of ​​VRM 2510 may be reduced or saved by the vertical power transmission structure.

[0137] Fig.26A cross-sectional view of an example VRM 2600, such as VRM 2510, is shown. As shown, VRM 2600 may include windings 2510, a magnetic core 2520, and switches 2530. The relatively flat design of the magnetic core 2520 and windings 2510 allows for a thin overall package, which may enable an improved overall power delivery structure.

[0138] Fig.27A , Fig.27B and Fig.27C An exemplary coupled inductor 2700 according to some embodiments of the present disclosure is shown. As shown, coupled inductor 2700 provides an example of a coupled inductor winding that forms a pillar extending orthogonally to the bottom of the core. The coupled inductor may include a magnetic core 2720 and a winding 2710. In some embodiments, magnetic core 2720 may include a mixture of materials as previously discussed. In some embodiments, winding 2710 may form a pillar 2715. Pillar 2715 may extend orthogonally from the bottom of magnetic core 2720. For example, pillar 2715 may extend 1 mm to 10 mm from the bottom of magnetic core 2720. Pillar 2715 may advantageously allow coupled inductor 2700 to be attached above a circuit board. For example, pillar 2715 may be connected to a printed circuit board (PCB) while also allowing coupled inductor 2700 to be offset from the printed circuit board so that other components may be attached to the PCB between the PCB and the body of coupled inductor 2700. This may be particularly advantageous in applications where the PCB footprint allowed is limited and / or vertical displacement is more desirable than horizontal footprint.

[0139] Fig.28 An exemplary coupled inductor 2800 according to some embodiments of the present disclosure is shown. As shown, coupled inductor 2800 provides an example of a coupled inductor that includes a cap layer (alternatively referred to as a cap structure) on a magnetic core. In some embodiments, coupled inductor 2800 can include a magnetic core 2820 and a winding 2810. As shown, winding 2810 can form a pillar 2815. Pillar 2815 can extend orthogonally from the bottom of magnetic core 2820, as previously described with respect to Fig.27A , Fig.27B and Fig.27C2810. The core 2820 may include a cap 2830 that may cover the windings 2810. The cap 2830 may be made of the same material as the core 2820. In some embodiments, the cap 2830 may include a gap 2840 that may be a void or absence of material across the cap 2830. The gap 2840 may allow the coupled inductor 2800 to be tuned to a desired performance characteristic. For example, the width of the gap 2840 may be varied to adjust the leakage current of the coupled inductor 2800.

[0140] In some embodiments, coupled inductor 2800 may not include gap 2840. For example, cap 2830 of magnetic core 2820 may form a continuous cap without gaps, breaks, or voids. Cap 2830 may advantageously allow coupled inductor 2800 to have a high coupling coefficient and low leakage inductance. These properties may allow coupled inductor 2800 to facilitate a large amount of filtering while avoiding slowing down the system (e.g., a power converter).

[0141] Fig.29 An example power converter 2900 for receiving a coupled inductor according to some embodiments of the present disclosure is shown. As shown, the power converter includes capacitors C_OUT, C_fly, and C_in attached to a PCB. The power converter may include ground connections on the upper and lower edges, and an output voltage is generated on a pad extending horizontally across the middle of the PCB. The power converter 2900 may include one or more coupled inductors marked by a footprint outline 2920. The coupled inductor may include a winding with a pillar design, shown as having a winding pillar attachment point 2930. The pillar design with the winding may allow the coupled inductor to deviate from the PCB and be placed on top of the PCB, so that other components (e.g., C_OUT) may be attached to the PCB between the PCB and the body of the coupled inductor. This may be particularly advantageous in applications where the PCB allows limited floor space and / or vertical displacement is more desirable than horizontal footprint.

[0142] Fig.30 An exemplary coupled inductor 3000 according to some embodiments of the present disclosure is shown. Coupled inductor 3000 may include a magnetic core 3020 and a winding 3010. Winding 3010 may include a pillar 3015 (as shown) and / or include additional material (not shown) for wrapping around and covering the bottom surface of magnetic core 3020. For example, pillar 3015 may extend 1 mm to 10 mm from the bottom of magnetic core 3020. Pillar 3015 may advantageously allow coupled inductor 3000 to be attached above a circuit board.

[0143] As shown, coupled inductor 3000 provides an example of a coupled inductor including non-interleaved windings. Fig.27B and Fig.27C The layout of the pillars 2715 and Fig.29 In contrast, windings 3010 of coupled inductor 3000 may extend the entire length of the void in core 3020, separated by lateral spacing 3017. This arrangement of windings 3010 may advantageously allow for alternative leg mounting points, thereby providing desirable alternative layout possibilities for an associated PCB.

[0144] The design of winding 3010 can be combined with other combinations and arrangements of features previously discussed with respect to other embodiments. For example, although not shown, magnetic core 3020 can include a cap layer (e.g., with or without a gap). Magnetic core 3020 can also include a mix of materials, as previously discussed.

[0145] As cloud computing and AI applications develop, computing power consumption has increased significantly. High-performance microprocessors with billions of transistors can consume hundreds of amps of current at very low voltages (e.g., <1V). Ultra-thin voltage regulator modules with miniaturized z-heights may be ideal for implementing ultra-compact power systems on packages, reducing interconnect lengths, improving signal integrity, and increasing efficiency, density, and control bandwidth.

[0146] Fig.31 A schematic diagram of an exemplary voltage regulator module (VRM) embedded in a package with a microprocessor according to some embodiments of the present disclosure is shown. System 3100 may include a server motherboard, a socket 3120, a VRM 3150, an application specific processing unit architecture (XPU) 3160, and a cooling mechanism 3180. The height of the voltage regulator module may be affected by the height of the magnetic components (such as but not limited to inductors or coupled inductors). The height of the magnetic components can be determined by the trade-off between transient performance and ripple performance.

[0147] Fig.32 A schematic diagram of an exemplary architecture of a microprocessor VRM according to some embodiments of the present disclosure is shown. The architecture 3200 may be a multi-stacked switched capacitor point-of-load (MSC-PoL) architecture with coupled magnetic components for 48V to 1V microprocessor voltage regulation and may include a multi-stacked switched capacitor stage 3220, a current source switched inductor stage 3240, and a processing unit 3260.

[0148] In some embodiments, Fig.32As shown, multiple SC units are stacked in front and the high input voltage is broken down into many intermediate voltage rails, which are loaded with switching inductor current sources to perform soft charging and voltage regulation. Unlike the IBA topology, the intermediate voltage rail in this article is not necessarily a fixed dc bus, but can be converted between several dc levels under different switching states. The dc rail voltage is provided by the capacitor network of the SC stage, and therefore the large intermediate bus capacitor can be omitted. The switching inductor unit is switched at the appropriate time to obtain the required voltage level. Many inductors of the switching inductor unit are merged into one and work in an interleaved manner. By using a single coupled magnetic component to soft charge multiple switching capacitors, the MSC-PoL architecture can minimize the size of capacitors and magnetic components, thereby achieving extremely low z height as well as high efficiency and high transient speed.

[0149] As mentioned earlier, the height or compactness of the voltage regulator module (VRM) depends in part on the size of the magnetic components. To achieve ultra-low z-height, both the power architecture and the magnetic components may need to be improved. A widely adopted solution for 48V to 1V regulation is a two-stage intermediate bus architecture (IBA), where the first stage is usually a switched capacitor (SC) circuit or a transformer-based converter (such as an LLC converter) acting as a fixed ratio dc transformer (DCX), and the second stage is a multi-phase buck switch at high frequency for high control bandwidth. Compared with transformer-based topologies, SC converters use capacitors to bear the main voltage stress of large step-down ratios, and due to the higher energy storage density of capacitors, the size of the converter can be greatly reduced. Soft charging techniques can be used in SC circuits to reduce charge sharing losses, allowing the use of lower switching frequencies or smaller capacitors to obtain higher power density and efficiency. In terms of magnetic components, height is limited by the fundamental trade-off between transient performance and ripple performance. The use of coupled magnetic components with interleaved operation can achieve both high di / dt in transients and low current ripple in steady states, thereby significantly reducing the size of dc energy storage and magnetic components.

[0150] Fig.33 A schematic diagram of the topology of an exemplary architecture of a microprocessor VRM according to some embodiments of the present disclosure is shown. Architecture 3300 may include an H-bridge SC unit and two 4-phase series capacitor buck (SCB) modules. The stacked H-bridge SC unit is configured to step down Vin in half and distribute the 24V voltage to the first phase of each SCB module. The two switches at the output terminals of the H-bridge can be merged with the input switches of the SCB module to reduce the number of components and power losses. Architecture 3300 may also include one or more bootstrap gate driver circuits. It will be appreciated that, Fig.33The topology shown in is a non-limiting example implementation of the MSC-PoL architecture, and other topologies and configurations are possible. For example, two or more H-bridges may be employed or more buck phases may be connected in parallel for extended voltage conversion ratios or higher power ratings.

[0151] Fig.34 Graph 3400 shows an exemplary operating waveform of a microprocessor VRM based on a multi-stacked switched capacitor point-of-load (MSC-PoL) architecture according to some embodiments of the present disclosure. Graph 3400 shows an operating waveform of a 48V to 1V MSC-PoL converter. Switch S 0A and S 0B Can be respectively with S 1A and S 1B Synchronization. For each SCB module, the high-side and low-side switches of one phase are driven by complementary gate signals, and the four phases can be interleaved with 90° phase shift.

[0152] In some embodiments, Fig.34 As shown, four interleaved inductors in each SCB module can be coupled in parallel into one, thereby producing a reduced inductor current ripple with 4 times the ripple frequency. As an example, Fig.34 As shown, two SCB modules can be phase-shifted by 180°. The flying capacitor C in the SC unit fly Phase 1A and phase 1B of the two SCB modules are softly charged and discharged in turn, and the blocking capacitor C in the SCB circuit 1～3A / B Soft charging and discharging can be performed by the inductor current of two adjacent phases. In some embodiments, automatic mutual balancing of the capacitor voltage and the inductor current can be achieved during the charging and discharging process.

[0153] Fig.35A , Fig.35B and Fig.35C Schematic diagrams of exemplary coupled inductors with stepped cores, windings, and magnetic plates are shown, respectively, according to some embodiments of the present disclosure. Fig.35A A top view of a ladder core 3520 of a prototype coupled inductor is shown. To minimize the z-height, a four-phase ladder structure coupled inductor (e.g., Fig.35B In a preferred embodiment, winding 3540 may be machined using a computer numerical control (CNC) machining system. The coupled inductor may also include a plate 3560, an example of which is shown in FIG. Fig.35C. Plate 3560 can be configured to reduce the magnetic resistance of the leakage flux path and can be placed on top of the stepped core 3520. In the context of the present disclosure, plate 3560 can be referred to as a leakage plate. The reduction in the magnetic resistance of the leakage flux path can result in an increase in leakage inductance, a reduction in current ripple, and an increase in efficiency. The inventors recognized that adding a leakage plate may result in slower transient speeds and higher thickness. Simulated transient inductance L for two coupled inductor designs tr , Steady-state inductance L ss and magnetic altitudes are summarized in Table 1 below.

[0154] Coupled Inductor Design <![CDATA[L tr ]]> <![CDATA[L ss ]]> high Step core only 14nH 127nH 2.9mm Step core + leakage plate 67nH 410 nH 4.2mm

[0155] Table 1. Comparison of two coupled-inductor designs.

[0156] In some embodiments, the winding 3540 can be made of a magnetic material including, but not limited to, copper, aluminum, or other suitable materials. In some embodiments, the stepped core 3520 can be made of Fair Rite Or other suitable materials. In a preferred embodiment, the dimensions of the stepped core 3520 can be 24.1 mm (length) × 13 mm (width) × 2.9 mm (height). In a preferred embodiment, the leakage magnetic plate 3560 can be made of Ferroxcube 3F45. It will be understood that these dimensions and materials are exemplary and non-limiting and can be adjusted appropriately. In some embodiments, the geometry of the stepped core and CNC winding can be optimized to minimize the sum of core and conduction losses. In some embodiments, the materials, dimensions, and geometries of the stepped core 3520 and windings 3540 can be optimized based on the desired performance indicators.

[0157] In some embodiments, the plate 3560 may include one or more plates 3560-1, 3560-2, and 3560-3 placed adjacent to each other. In some embodiments, the gaps between the plates 3560-1 to 3560-3 may be adjusted. In some embodiments, there may be substantially no gaps between the plates.

[0158] Fig.36 A schematic diagram of an exemplary coupled inductor 3600 including an air gap according to some embodiments of the present disclosure is shown. Coupled inductor 3600 may include a stepped core 3620, a leakage magnetic plate 3660, and a non-magnetic layer 3670 disposed between stepped core 3620 and leakage magnetic plate 3660. In the context of the present disclosure, non-magnetic layer 3670 may be referred to as an "air gap". The thickness of non-magnetic layer 3670 (i.e., air gap) may be adjusted to achieve a desired leakage inductance.

[0159] Fig.37A and Fig.37BSchematic diagrams showing top and bottom assembly views, respectively, of an exemplary MSC-PoL architecture for a microprocessor VRM according to some embodiments of the present disclosure. Fig.37A A top view 3700 showing detailed component placement and printed circuit board (PCB) layout of a 48V to 1V MSC-PoL prototype is shown.

[0160] In some embodiments, Fig.37B As shown in Figure 1, all power devices can be placed on the top side of the PCB, while the coupled inductor and gate driver can be stacked on the bottom side. Placing all power components on one side can simplify cooling requirements by enabling single-sided cooling. Fig.37A As shown, the bootstrap circuit chain can be placed in the center, and the H-bridge SC unit and two SCB modules (module S) are positioned symmetrically on both sides thereof. A and S B ). To minimize both converter height and board area, a stacked inductor driver structure can be implemented as shown in Figure 3750. On the bottom side of the PCB, the coupled inductor can be stacked on top of the gate driver with a copper backbone inserted in between to draw out the high output current. The winding structure of the two inductors can be symmetrical to draw all output currents to the same side, which can shorten the layout length of the PCB traces and therefore reduce the conduction losses of the entire system.

[0161] Table 2 lists the key parameters of the components used in the 48V to 1V MSC-PoL prototype. The higher voltage rated GaN switches are used in the S 0～1A / B , to withstand high voltage stress; silicon MOSFETs with lower rated voltages are used for S 2～8A / B The hybrid GaN-Si switch combination takes full advantage of the material properties and current processing technology of GaN transistors and silicon MOSFETs.

[0162]

[0163]

[0164] Table 2. Bill of Materials for MSC-PoL Prototype from 48V to 1V

[0165] Fig.38A , Fig.38B and Fig.38CSchematic diagrams showing exemplary circuit designs for switches in an MSC-PoL architecture for a microprocessor VRM according to some embodiments of the present disclosure. Circuit 3800A shows an exemplary layout of high-side and low-side switches in SCB phases 2A-4A and 2B-4B, circuit 3800B shows an exemplary layout of GaN switches in an SC cell, and circuit 3800C shows an exemplary layout of low-side switches in SCB phases 1A and 1B.

[0166] exist FIG. 38A to FIG. 38C In the embodiment shown, the signal input side can be provided by a voltage source V with a reference ground ranging from 8V to 12V. drive The output side of the driver can be powered by a floating DC voltage level on the bootstrap chain or by V if it is ground referenced. drive Power Supply. In some implementations, for GaN switches, a low dropout regulator (LDO) may be required to create a stable 5V rail with overvoltage protection for the gate drive.

[0167] Fig.39A and Fig.39B Schematic diagrams showing top and side views of the hardware layout of an exemplary VRM according to some embodiments of the present disclosure. Fig.39A and Fig.39B As shown, the MSC-PoL prototype can be enclosed in a box volume of 31.9mm×26.6mm×6mm. All components including the power stage, gate driver and bootstrap circuit and coupled inductor can be packaged in a 0.31in 3 The ultra-compact size and ultra-thin thickness of 6mm in a 1 / 16 brick module may only require a pulse width modulation (PWM) control pin and a voltage rail V drive To operate the MSC-PoL model.

[0168] Fig.40 Graphs of measured inductor current and switch node voltage are shown for an exemplary coupled inductor according to some embodiments of the present disclosure. Fig.40 The data graphs shown in Figure 1 show the measured waveforms of example inductor current and switch node voltage at 48V to 1V voltage conversion and 500kHz switching frequency, verifying the functionality of the MSC-PoL prototype. The coupled inductor current measured using the external measurement loop exhibits a segmented shape, with reduced current ripple, and a 4x switching frequency, as expected. As shown in the figure, the current ripple is reduced by a factor of 2, and the switching frequency is 4x higher. L1A The data graph indicates the measured inductor current, labeled V sw1A 、V sw2A and V sw3AThe data graph indicates the switch node voltage, Vin = 48V, Vout = 1V, f sw =500kHz, and L ss =416nH. It is understandable that the inductor L ss May be affected by the inductance of the current measurement loop.

[0169] Fig.41 Shown is a graph comparing conversion efficiencies of exemplary coupled inductors according to some embodiments of the present disclosure. Fig.41 The graph shown in Figure 1 shows the measured efficiency when transferring power from 48V to 1V using different coupled inductor designs. The inductor design with leakage pads has higher leakage inductance and lower current ripple. The resulting smaller RMS and peak currents reduce conduction losses, switching losses, and parasitic inductance losses, thereby improving converter efficiency. Fig.41 As shown, the peak efficiencies of the converters with and without the leakage plate are 91.7% and 90.0%, respectively, and the full load efficiencies are 85.3% and 85.0%, respectively. Fig.42 As shown in the hot spot temperature distribution in Figure 1, the maximum output power in each case can be obtained when the hot spot temperature reaches about 87°C under a 36CFM fan.

[0170] Table 3 compares the converter performance when using different coupled inductor designs. The prototype using only the ladder core can achieve over 680W / in at full load. 3 As for the design with leaky plates, the trade-off for higher efficiency is increased height and converter volume, resulting in a slightly lower power density of 580W / in 3 Power density. Thanks to the multi-stack SC architecture, soft-charging technology, hybrid GaN-Si switch combination and coupled magnetic components, the 48V to 1V MSC-PoL prototype achieves ultra-compact size at a very low z-height, as well as high efficiency and high transient speed.

[0171] Step core only Step core + leakage plate Converter height 6mm 7.3mm Box volume 0.310in3 0.377in3 Peak efficiency 90.0％ 91.7％ Peak efficiency power density 274W / in3 194W / in3 Full load efficiency 85.0％ 85.3％ Full load power density 684W / in3 584W / in3

[0172] Table 3. Converter performance comparison

[0173] In some implementations, the design of a coupled inductor for a voltage regulation module having an MSC-PoL architecture may be determined based on a number of factors, some of which will be discussed herein.

[0174] In some embodiments, the leakage inductance may be determined based on transient speed and current ripple, which may further depend on the application or end use. For example, in some applications, a leakage inductance in the range of 10nH to 50nH per phase of a CPU VRM may be suitable.

[0175] In some embodiments, the air gap thickness may be determined based on the desired leakage inductance and bottom core size.As a non-limiting example, the thickness of the air gap or the material constituting the air gap may be in the range of 0.2 mm to 0.5 mm.

[0176] In some embodiments, the thickness of the leakage plate (eg, leakage plate 3560) may be determined based on the maximum rated current and the flux density saturation limit. As an example, the thickness of the leakage plate may be in the range of 0.8 mm to 1.5 mm.

[0177] In some embodiments, the magnetic material of the leakage plate may be determined based on the expected operating frequency. As an example, a high frequency range of 2 MHz to 8 MHz may be suitable for some applications to provide high frequency flux and a higher saturation limit (e.g., >0.5 T) compared to the bottom core.

[0178] In some embodiments, the leakage plates can be implemented as separate plates for different phases. For example, the air gap of each of the plates can be adjusted individually to obtain the required leakage inductance for each phase. This can help mitigate the asymmetric leakage inductance caused by the stepped core structure.

[0179] Fig.43 A schematic diagram of an exemplary coupled inductor according to some embodiments of the present disclosure is shown. Fig.43 43. A cross-sectional view of coupled inductor 4300 is shown in FIG. Coupled inductor 4300 includes a stepped core structure 4320 and a plate 4360 (eg, a magnetic flux leakage plate). Although not shown, after assembly, assembled coupled inductor 4300 may further include a winding (eg, winding 3540 of FIG. 35 ).

[0180] Fig.44 FIG. 4 shows an exemplary coupled inductor 4400 according to some embodiments of the present disclosure. Coupled inductor 4400 may be used with Fig.284400 is substantially similar to the coupled inductor 2800 shown in and described above, and can perform substantially similar functions thereto. As shown, coupled inductor 4400 provides an example of a coupled inductor that includes a cap layer (alternatively referred to as a cap structure) on a magnetic core. In some embodiments, coupled inductor 4400 may include a magnetic core 4420 and a winding 4410. As shown, winding 4410 may form a pillar 4415. Pillar 4415 may extend orthogonally from the bottom of magnetic core 4420. Magnetic core 4420 may include a cap layer 4430, which may cover winding 4410. Cap layer 4430 may be made of the same material as magnetic core 4420. In some embodiments, cap layer 4430 may include gap 4440, which may be a gap or material missing across cap layer 4430. Gap 4440 may allow coupled inductor 4400 to be tuned to desired performance characteristics. For example, the width of gap 4440 can be varied to adjust the leakage current of coupled inductor 4400. In some embodiments, gap 4440 can be adjusted over the phases to obtain the desired leakage inductance for each phase.

[0181] In a preferred embodiment, although Fig.44 Although not explicitly shown in the figure, the gap 4440 can be substantially symmetrical along its length and width (indicated by dashed lines AA' and BB', respectively). In some embodiments, the gap 4440 can be asymmetrical along one or both of the axes AA' or BB'.

[0182] Fig.45A and Fig.45B Schematic diagram of an exemplary coupled inductor 4500 according to some embodiments of the present disclosure is shown. Coupled inductor 4500 may include a stepped core structure 4520 and a magnetic leakage plate 4560 separated from each other by a non-magnetic layer 4570 (also referred to as an air gap). Non-magnetic layer 4570 may be placed adjacent to and in physical contact with the top side of stepped core structure 4520. In some embodiments, as Fig.45A As shown, the thickness of the nonmagnetic layer 4570 can be substantially similar throughout its length.

[0183] exist Fig.45A In the illustrated embodiment, the leakage plate 4560 of the coupled inductor 4500 includes four plates separated from each other by small gaps. In some embodiments, the gaps between each of the plates may be substantially uniform or non-uniform. It will be appreciated that the leakage plate 4560 may include a single plate, two plates, three plates, four plates, or a rectangular array of plates, or any number of plates as appropriate. In some embodiments, the length and width of the leakage plate 4560 may be substantially similar to the length and width of the underlying stepped core structure 4520, such that the leakage plate 4560 completely covers the stepped core structure 4520.

[0184] Fig.46A and Fig.46B Schematic diagram of an exemplary coupled inductor 4600 according to some embodiments of the present disclosure is shown. Coupled inductor 4600 may include a stepped core structure 4620 and a magnetic leakage plate 4660 separated from each other by a non-magnetic layer 4670 (also referred to as an air gap). Non-magnetic layer 4670 may be placed adjacent to and in physical contact with the top side of stepped core structure 4620. In some embodiments, as shown in FIG. Fig.46A As shown, the thickness of the non-magnetic layer 4670 can vary over its entire length. The thickness can be varied based on the phase to obtain the desired leakage inductance for each phase. Fig.46A As shown, the non-magnetic layer 4670 can be thicker below the two plates 4662 and 4663 in the center of the leakage plate 4660 compared to the two edge plates 4661 and 4664 to provide a variable air gap. In other words, the air gap thickness of the coupled inductor 4600 in the center is greater than the air gap thickness at the edges. Although not shown, it is understood that the air gap thickness can be adjusted in other ways. For example, alternatively or additionally, the thickness of each of the leakage plates can be changed along the length of the leakage plates, or the height of the stepped core structure 4620 can be adjusted or changed over its length, or other arrangements of the leakage plates and stepped core structures for adjusting the air gap thickness are also possible.

[0185] Fig.47 Schematic diagram of an exemplary coupled inductor 4700 according to some embodiments of the present disclosure is shown. Coupled inductor 4700 may include a stepped core 4720, a non-magnetic layer 4770, and a leakage magnetic layer 4760. Fig.47 In the illustrated embodiment, although leakage magnetic layer 4760 of coupled inductor 4700 is shown as including three separate magnetic pieces, leakage magnetic layer 4760 may include one or more magnetic pieces.

[0186] In some embodiments, one or more magnetic sheets can limit leakage flux by providing a low reluctance leakage path. This can allow leakage inductance to be increased and current ripple can be reduced in a manner similar to using magnetic plates (e.g., leakage magnetic plates 3560, 3660, 4360, 4560, 4660). The resulting smaller root mean square (RMS) and peak current values ​​can enable reduced conduction losses, switching losses, and parasitic inductance losses, thereby improving the efficiency of the converter.

[0187] In some embodiments, the thickness of one or more magnetic sheets can range from 100 μm to 500 μm. In some embodiments, the thickness of the magnetic sheet can be 130 μm. In some embodiments, a higher number of magnetic sheets can provide a higher leakage inductance, which can produce a lower current ripple. In a circuit, a lower current ripple can produce lower power losses and thereby higher efficiency. In addition, a higher number of sheets can increase the total thickness of the leakage magnetic layer, which can reduce magnetic losses. In some embodiments, the use of one or more magnetic sheets can help shield high-frequency electromagnetic interference (EMI) noise radiated from a converter in an electronic device.

[0188] Fig.48 An exemplary inductor 4801 and efficiency graph 4802 according to some embodiments of the present disclosure are shown. For example, inductor 4801 may include additional magnetic layers to reduce current ripple, thereby increasing peak efficiency (eg, by 2%) while full load efficiency remains constant.

[0189] Fig.49 An exemplary leakage inductance graph 4901 and an exemplary current ripple graph 4902 are shown according to some embodiments of the present disclosure. For example, an inductor 4903 with additional layers at a swept air gap distance at around 700 kHz (e.g., 704 kHz) may exhibit the trends shown in graphs 4901 and 4902.

[0190] Fig.50 An exemplary inductor and flux saturation of the inductor at heavy load according to some embodiments of the present disclosure are shown. Fig.50 It is shown that the inductor with additional layers and small air gap distance (eg, 0.10 mm, 0.25 mm at -700 kHz and 120 A) exhibits low leakage reluctance, saturation at heavy load, and unchanged efficiency at heavy load.

[0191] Fig.51 An exemplary graph 5105 is shown showing the effect of the thickness of the air gap 5103 of the inductor 5101 on efficiency according to some embodiments of the present disclosure. For example, the thickness of the air gap 5103 can be 0.10 mm, 0.20 mm, 0.35 mm, etc. As shown in graph 5105, reducing the thickness of the air gap 5103 can improve the peak efficiency. In some embodiments, reducing the thickness of the air gap 5103 may cause saturation at heavy loads.

[0192] Fig.52Example graphs 5201 and 5203 showing the effect of switching capacity on efficiency according to some embodiments of the present disclosure are shown. For example, graphs 5201 and 5203 show that if the air gap thickness of the inductor is a certain thickness (e.g., 0.10 mm, 0.35 mm, etc.; not saturated at heavy load), reducing the frequency can improve the rated power and heavy load efficiency.

[0193] Fig.53 Exemplary views of an inductor with one or more magnetic sheets and an exemplary graph 5309 showing the effect of the number of magnetic sheets on efficiency according to some embodiments of the present disclosure are shown. View 5301 shows multiple magnetic sheets of an inductor (e.g., each layer is 0.13 mm thick), view 5303 shows a top view of the inductor, view 5305 shows a side view of the inductor, and graph 5307 shows the relationship between the magnetic permeability of the magnetic sheets and the frequency. Graph 5309 shows the relationship between device efficiency and output power for different numbers of magnetic sheets in the inductor.

[0194] Fig.54 Example graphs 5401 and 5403 and table 5405 are shown according to some embodiments of the present disclosure. Graph 5401 shows the relationship between the switched capacitor efficiency and the output power for different numbers of magnetic pieces in the inductor. Graph 5403 shows the relationship between the power density and the switched capacitor efficiency for different numbers of magnetic pieces in the inductor. Table 5405 shows the data points of graphs 5401 and 5403 in tabular form.

[0195] Fig.55 Exemplary graphs 5501 and 5503 and inductor core 5505 according to some embodiments of the present disclosure are shown. Graph 5501 shows the relationship between power loss density and flux density for different inductor cores (including inductor core 5505) with core losses at 700hKz. Curve 5501a corresponds to inductor core 5505, curve 5501b corresponds to Hitachi ML95S inductor core, and curve 5501c corresponds to FairRite 79 inductor core. Graph 5503 shows the relationship between power loss density and flux density for different inductor cores (including inductor core 5505) with core losses at 1MHz. Curve 5301a corresponds to inductor core 5505, curve 5301b corresponds to Hitachi ML95S inductor core, and curve 5301c corresponds to FairRite 79 inductor core. The inductor core 5505 may include a stepped structure 5505a having a thickness of 2.9 mm and a sheet 5505b having a thickness of 0.9 mm.

[0196] Fig.56A schematic diagram of an exemplary inductor 5601 according to some embodiments of the present disclosure is shown. The inductor 5601 may include a first magnetic material 5603, an air gap 5605, a second magnetic material 5607, and a winding 5609. Fig.56 Views 5610 , 5612 , 5614 , 5616 , 5618 , and 5620 of inductor 5601 are shown.

[0197] Fig.57 A schematic diagram of an exemplary inductor according to some embodiments of the present disclosure is shown. Fig.57 The hardware 5701 of the inductor under test, the exposed pad 5703 of the inductor, the backbone copper 5705 of the inductor, and the complete assembly 5707 of the inductor are shown.

[0198] Fig.58 Example circuit diagrams 5801 and 5803 of an inductor according to some embodiments of the present disclosure are shown. Graph 5803 shows a switch node voltage signal.

[0199] Fig.59 An exemplary circuit diagram 5901 and diagram 5903 of an inductor according to some embodiments of the present disclosure are shown. Diagram 5903 shows a switch node voltage signal.

[0200] Fig.60 An exemplary circuit diagram 6001 of an inductor according to some embodiments of the present disclosure is shown, as well as diagrams 6003 and 6005. Diagram 6003 shows an off-time resonant signal of the inductor, and diagram 6005 shows a voltage signal of the inductor.

[0201] Fig.61 Exemplary graphs 6101, 6103, and 6105 are shown according to some embodiments of the present disclosure. Graph 6101 shows a revised timing signal for an inductor, and graphs 6103 and 6105 show a voltage signal for an inductor.

[0202] Fig.62 Exemplary graphs 6201 and 6203 with measured waveforms according to some embodiments of the present disclosure are shown. Graph 6201 shows the voltage signal of the inductor at no load, and graph 6203 shows the voltage signal of the inductor at 35A load.

[0203] The disclosed embodiments may include switched-capacitor power converters. Switched-capacitors may also be referred to as cascade multipliers, switching capacitors, switched capacitors, switch capacitors, charge pumps, and voltage multipliers. The advantages and benefits of switched-capacitor power converters may enable them to be used in a wide range of applications. For example, applications for switching power converters include portable devices, mobile computing and / or communication products and components (e.g., laptops, ultrabook computers, tablet devices, and cell phones), displays (e.g., LCDs, LEDs), radio-based devices and systems (e.g., cellular systems, WiFi, Bluetooth, Zigbee, Z-Wave, and GPS-based devices), wired network devices and systems, data centers (e.g., power conversion and / or battery backup systems for processing systems and / or electronic / optical network systems), Internet of Things (IOT) devices (e.g., smart switches and lights, security sensors, and security cameras), home appliances and electronic products (e.g., set-top boxes, battery-powered vacuum cleaners, appliances with built-in radio transceivers such as washers, dryers, and refrigerators), AC / DC power converters, for all types of electric vehicles (e.g., for powertrains, control systems, and / or infotainment systems), and other devices and systems that utilize portable power generation sources and / or require power conversion.

[0204] The disclosed embodiments may include switched capacitor power converters utilizing specific types of capacitors, particularly flying capacitors. For example, it may be useful for flying capacitors to have low equivalent series resistance (ESR), low DC bias attenuation, high capacitance, and / or small size. Low ESR may be particularly important for switched capacitor power converters that include additional switches and flying capacitors to increase the number of voltage levels. The disclosed embodiments may include specific capacitors based on considerations of specifications for power levels, efficiency, size, etc. Various types of capacitor technologies may be used, including ceramic capacitors (including multilayer ceramic capacitors (MLCCs)), electrolytic capacitors, film capacitors (including power film capacitors), and IC-based capacitors. The capacitor dielectric may vary according to the needs of a specific application and may include paraelectric dielectrics, such as silicon dioxide (SiO2), hafnium dioxide (HFO2), or aluminum oxide Al2O3. In addition, the switched capacitor power converter design may advantageously utilize inherent parasitic capacitance (e.g., inherent to power FETs) in combination with or in place of designed capacitors to reduce circuit size and / or improve circuit performance. The disclosed embodiments may also select capacitors for switched capacitor converters based on capacitor component variations, effective capacitance reduction with DC bias, and ceramic capacitor temperature coefficients (eg, minimum and maximum temperature operating limits and capacitance variation with temperature).

[0205] Similarly, in various embodiments of switched capacitor power converters, it may be beneficial to use a particular type of inductor. For example, the disclosed embodiments may include an inductor with low DC equivalent resistance, high inductance, and small size to improve performance.

[0206] The disclosed embodiments may include one or more controllers to control, for example, the startup and operation of the disclosed embodiments. The controller may be implemented as a microprocessor, a microcontroller, a digital signal processor (DSP), a register transfer level (RTL) circuit, and / or combinatorial logic.

[0207] The disclosed embodiments may include one or more MOSFETs. In embodiments, a MOSFET may refer to any field effect transistor (FET) having an insulated gate, the voltage of which determines the conductivity of the transistor. In some embodiments, MOSFETS may include an insulated gate having a metal or metalloid, an insulator, and / or a semiconductor structure. The metal or metalloid structure may include at least one conductive material (e.g., aluminum, copper or other metal, or highly doped polysilicon, graphene or other electrical conductor). The insulator structure may include at least one insulating material (e.g., silicon oxide or other dielectric material). The semiconductor structure may include at least one semiconductor material.

[0208] The disclosed embodiments may meet a variety of specifications and may be implemented in any suitable integrated circuit (IC) technology, including but not limited to MOSFET structures, or in hybrid or discrete circuit form. Integrated circuit embodiments may be fabricated using any suitable substrate and process, including but not limited to standard bulk silicon, high resistivity bulk CMOS, silicon on insulator (SOI), and silicon on sapphire (SOS). Unless otherwise noted above, embodiments of the invention may be implemented in other transistor technologies, such as bipolar, BiCMOS, LDMOS, BCD, GaAs HBT, GaN HEMT, GaAs pHEMT, and MESFET technologies. Fabrication in CMOS using SOI or SOS processes may allow circuits to have low power consumption, the ability to withstand high power signals during operation due to FET stacking, good linearity, and high frequency operation (e.g., radio frequencies up to and exceeding 300 GHz). Monolithic IC implementations may be useful because parasitic capacitances can generally be kept low (or minimally, consistent across all cells, allowing them to be compensated for) by careful design.

[0209] Depending on the particular specifications and / or implementation technology (e.g., NMOS, PMOS, or CMOS, and enhancement mode or depletion mode transistor devices), voltage levels may be adjusted, and / or voltage and / or logic signal polarity may be reversed. The disclosed embodiments may adjust component voltage, current, and power handling capabilities as needed, such as by adjusting device size, "stacking" components (particularly FETs) in series to withstand greater voltages, and / or using multiple components in parallel to handle greater currents. Additional circuit components may be added to enhance the capabilities of the disclosed circuits and / or to provide additional functionality without significantly changing the functionality of the disclosed circuits.

[0210] Circuits and devices according to the present disclosure can be used alone or in combination with other components, circuits and devices. Implementations can be manufactured as integrated circuits (ICs), which can be encapsulated in IC packages and / or modules for ease of processing, manufacturing and / or improved performance. For example, IC implementations of the present disclosure can be used in modules, in which one or more such ICs are combined with other circuit components or blocks (e.g., filters, amplifiers, passive components and possible additional ICs) into a package. Then, the IC and / or module can be combined with other components (e.g., components on a printed circuit board) to form a part of a final product (e.g., a cellular phone, a laptop computer or an electronic tablet), or to form a higher-level module, which can be used for various products, such as vehicles, test equipment, medical devices, etc. Through various configurations of modules and components, such an IC can implement communication modes, such as wireless communications.

[0211] Embodiments may include implementation in hardware or software or a combination of the two (e.g., a programmable logic array). In some embodiments, various general-purpose computing machines may be used together with programs written according to the teachings of this article. In other embodiments, a special-purpose computer or special-purpose hardware (e.g., an integrated circuit) may be used to perform a specific function. Embodiments may be implemented in one or more computer programs (i.e., a set of instructions or codes) executed on one or more programming or programmable computer systems (which may have various architectures, such as distributed, client / server, or grid), each computer system including, for example, at least one processor, at least one data storage system (which may include volatile and non-volatile memory and / or storage element), at least one input device or port, and / or at least one output device or port. Program instructions or codes may be applied to input data to perform the functions described herein and generate output information. Output information may be applied to one or more output devices.

[0212] The disclosed embodiments may involve a computer program implemented in a computer language (e.g., machine, assembly or high-level process, logic, object-oriented programming language or custom language / script) to communicate with a computer system, and may be implemented in a distributed manner, where different parts of the calculations specified by the software are performed by different processors. The computer language may be a compiled language or an interpreted language. The computer program implementing certain embodiments may form one or more modules of a larger program or program system. Some or all elements of the computer program may be implemented as a data structure stored in a computer-readable medium or other organized data that conforms to a data model stored in a data repository.

[0213] The disclosed embodiments may include a computer program that may be stored on or downloaded to (e.g., by encoding in a propagating signal and passing through a communication medium such as a network) a tangible, non-transitory storage medium or device (e.g., a solid-state storage medium or device, or a magnetic or optical medium) for a period of time (e.g., the time between refresh cycles of a dynamic memory device such as a dynamic RAM, or semi-permanently, or permanently) that, when read by a computer system to perform the above-described processes, can be read by a general or special-purpose programmable computer for configuring and operating the computer. The disclosed embodiments may also be implemented as a non-transitory computer-readable storage medium configured with a computer program, wherein the storage medium so configured causes a computer system to operate in a specific or predefined manner to perform the above-described functions.

[0214] In the specification, embodiments have been described with reference to numerous specific details, which may vary depending on the implementation. Certain rewriting and modification may be performed to the described embodiments. In view of the practice of the disclosure disclosed herein and the disclosure of this specification, other embodiments may be apparent to those skilled in the art. It is also expected that the sequence of steps shown in the figure is for illustrative purposes only and is not intended to be limited to any specific sequence of steps. Thus, it will be appreciated by those skilled in the art that these steps may be performed in different orders when implementing the same method.

[0215] It should be understood that, for the sake of clarity, certain features of this specification described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, for the sake of brevity, various features of this specification described in the context of a single embodiment may also be provided individually or in any suitable sub-combination or suitably in any other described embodiment of this specification. Certain features described in the context of various embodiments are not considered essential features of these embodiments, unless the embodiment is inoperable without these elements.

[0216] The foregoing summarizes the features of several embodiments so that those skilled in the art can better understand the various aspects of the present disclosure. Those skilled in the art will appreciate that they can easily use the present disclosure as a basis for designing or modifying other processes and structures for performing the same purpose and / or achieving the same advantages of the embodiments described herein. Those skilled in the art will also appreciate that such equivalent structures do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions, and modifications herein without departing from the spirit and scope of the present disclosure.

[0217] The following terms may be used to further describe the embodiments:

[0218] 1. A power converter circuit, comprising:

[0219] At least one charge distributor, the at least one charge distributor comprising a switch, a capacitor and an inductor, wherein:

[0220] The at least one charge distributor has a fixed voltage conversion rate;

[0221] The switches in the at least one charge distributor operate at a common frequency; and

[0222] Each of the at least one charge distributor has four terminals, one terminal is connected to a high voltage, one terminal is connected to ground, and two branch terminals have a voltage between the high voltage and ground;

[0223] a plurality of voltage regulators, the plurality of voltage regulators comprising switches, inductors and capacitors, wherein the voltage regulators regulate voltage by changing a duty cycle of the switches,

[0224] Therein, the terminal connected to the high voltage of the at least one charge distributor is connected to a high voltage terminal of a system, and the low voltage side of the voltage regulator is connected to a low voltage terminal of the system.

[0225] 2. A power converter circuit according to clause 1, wherein:

[0226] The switches of the voltage regulator operate at a frequency higher than or equal to the frequency of the switches of the at least one charge distributor.

[0227] 3. A power converter circuit according to any one of clauses 1 to 2, wherein:

[0228] At all times during operation of the power converter circuit, at least one capacitor is connected between the high voltage terminal, the ground, and the branch terminal, acting as a capacitive voltage divider and dividing the high voltage into smaller intermediate voltage domains;

[0229] The charge distributor of the at least one charge distributor comprises a plurality of modular circuits operating in an interleaved manner.

[0230] 4. A power converter circuit according to clause 3, comprising:

[0231] a first resulting voltage of the at least one capacitor corresponding to a switch coupled to the high voltage terminal and the first branch terminal; and

[0232] A second resulting voltage of the at least one capacitor corresponds to a switch coupled to the one terminal connected to ground and to the second branch terminal,

[0233] The first result voltage is equal to the second result voltage.

[0234] 5. A power converter circuit according to clause 3, wherein:

[0235] a first resulting current of the at least one capacitor corresponding to a switch coupled to the high voltage terminal and the first branch terminal; and

[0236] A second resulting current of the at least one capacitor corresponds to a switch coupled to the one terminal connected to ground and to the second branch terminal,

[0237] The first result current is equal to the second result current.

[0238] 6. A power converter circuit according to any one of clauses 1 to 5, wherein:

[0239] During operation of the power converter circuit, at least one charge storage block is connected between the high voltage terminal, the ground and the branch terminal, acts as a capacitive voltage divider and divides the high voltage into smaller intermediate voltage domains.

[0240] 7. A power converter circuit according to clause 6, wherein:

[0241] The at least one charge storage block stores one or more capacitors.

[0242] 8. A power converter circuit according to clause 6, wherein:

[0243] The at least one charge storage block stores one or more inductors.

[0244] 9. A power converter circuit according to any one of clauses 1 to 8, wherein:

[0245] A voltage regulator of the plurality of voltage regulators has a plurality of terminals: a terminal connected to ground, a terminal connected to a low voltage, and a branch terminal of a charge distributor of the at least one charge distributor.

[0246] 10. A power converter circuit according to clause 9, wherein:

[0247] The inductor of the voltage regulator is positioned between the low voltage and the one branch terminal.

[0248] 11. A power converter circuit according to clause 10, wherein:

[0249] The switch includes a switch between the one branch terminal and an inductor of the voltage regulator.

[0250] 12. A power converter circuit according to any of clauses 10 to 11, wherein:

[0251] The switch includes a switch between ground and a node between the one branch terminal and an inductor of the voltage regulator.

[0252] 13. A power converter circuit according to any of clauses 9 to 12, wherein:

[0253] The capacitor of the voltage regulator is positioned between the low voltage and ground.

[0254] 14. A power converter circuit according to any of clauses 9 to 12, wherein:

[0255] The capacitor of the voltage regulator is positioned between the inductor of the voltage regulator and the one branch terminal.

[0256] 15. A power converter according to any one of clauses 1 to 14, wherein:

[0257] The charge distributor of the at least one charge distributor comprises:

[0258] a first inductor positioned between the high voltage and the low voltage, and

[0259] A second inductor is positioned between the low voltage and ground.

[0260] 16. A power converter according to any one of clauses 1 to 15, wherein:

[0261] The charge distributor of the at least one charge distributor comprises:

[0262] An inductor is positioned between a first branch terminal of the two branch terminals and the low voltage.

[0263] 17. A power converter circuit according to any of clauses 1 to 16, wherein:

[0264] The charge distributor of the at least one charge distributor comprises:

[0265] A capacitor is positioned between the low voltage and ground.

[0266] 18. A power converter circuit according to any of clauses 1 to 17, wherein:

[0267] The charge distributor of the at least one charge distributor comprises:

[0268] A capacitor is positioned between one terminal connected to the high voltage and one terminal connected to ground.

[0269] 19. A power converter according to any one of clauses 1 to 18, wherein:

[0270] The inductors of the charge distributors in the one charge distributor include inductor subsets, each inductor subset including a shared magnetic core.

[0271] 20. A power converter according to clause 19, wherein:

[0272] The number of the inductor subsets is equal to the number of series capacitor step-down units.

[0273] 21. A power converter according to clause 1, wherein:

[0274] The inductors of the charge distributors in the at least one charge distributor share a magnetic core.

[0275] 22. A power converter according to any one of clauses 1 to 21, wherein:

[0276] Two of the at least one charge distributor are connected in parallel.

[0277] 23. A power converter according to clause 22, wherein:

[0278] The inductors of the two charge distributors are coupled to each other.

[0279] 24. A power converter circuit according to any of clauses 22 to 23, wherein:

[0280] The switches of the two charge distributors include gate driver control signals.

[0281] 25. A power converter circuit according to any of clauses 22 to 23, further comprising:

[0282] A level shifter is used for converting the signal voltage level of the switches with floating sources of the two charge distributors.

[0283] 26. A power converter according to any one of clauses 1 to 25, wherein:

[0284] The at least one charge distributor includes a first charge distributor driving a second charge distributor and a third charge distributor; and

[0285] The second charge distributor and the third charge distributor each drive two series capacitor step-down voltage regulators.

[0286] 27. A power converter circuit according to any of clauses 1 to 26, wherein:

[0287] The inductor in the voltage regulator operates as a DC inductor having a DC average current value and a minimum peak-to-peak ripple; and

[0288] The voltage regulator includes a plurality of modular units that work in an interleaved manner.

[0289] 28. A power converter circuit according to any of clauses 1 to 27, wherein:

[0290] There is no intermediate bus capacitor between the charge distributor and the voltage regulator.

[0291] 29. A power converter circuit according to any of clauses 1 to 28, wherein:

[0292] The circuit is more of a voltage regulator than a charge divider.

[0293] 30. A power converter circuit according to any of clauses 1 to 29, wherein:

[0294] Each charge distributor includes two switches and a capacitor.

[0295] 31. A power converter circuit according to any of clauses 1 to 30, wherein:

[0296] The capacitor in the charge distributor is charged / discharged via the inductor in the voltage regulator; and

[0297] During the charging / discharging process, the capacitor voltage of the charge distributor interacts with the inductor current of the voltage regulator to achieve automatic balancing of both the capacitor voltage and the inductor current.

[0298] 32. A power converter circuit according to any of clauses 1 to 31, wherein:

[0299] The inductor in the charge distributor operates as a resonant inductor and resonates with the capacitor in the charge distributor; and

[0300] The currents charging and discharging the capacitors are sinusoidal or partially sinusoidal.

[0301] 33. A charge distributor circuit according to any of clauses 30 to 32, wherein:

[0302] The charge distributor is a resonant switched capacitor converter having a plurality of switches connected in series and a plurality of capacitors that are reconfigured by the plurality of switches connected in series to transfer energy.

[0303] 34. A charge divider circuit according to any of clauses 31 to 33, wherein:

[0304] The charge distributor is a resonant switched capacitor converter in which an inductor is connected in series with a flying capacitor.

[0305] 35. A charge divider circuit according to any of clauses 31 to 34, wherein:

[0306] The charge distributor is a resonant switched capacitor converter in which an inductor is connected at the low voltage terminal of a flying capacitor multilevel converter.

[0307] 36. A charge distributor circuit according to any of clauses 31 to 35, wherein:

[0308] The charge distributor is a resonant switched capacitor converter including a plurality of resonant inductor and capacitor networks;

[0309] The resonant switched capacitor converter is reconfigured by the switches to transfer energy.

[0310] 37. A voltage regulator circuit according to any of clauses 1 to 36, wherein:

[0311] The voltage regulator is a multi-phase buck converter.

[0312] 38. A voltage regulator circuit according to any of clauses 1 to 36, wherein:

[0313] The voltage regulator is a series buck converter.

[0314] 39. A voltage regulator circuit according to any of clauses 1 to 36, wherein:

[0315] The voltage regulator is a hybrid switched capacitor converter.

[0316] 40. A voltage regulator circuit according to any of clauses 1 to 36, wherein:

[0317] The inductor of the voltage regulator is a multi-phase coupled inductor.

[0318] 41. A power converter circuit according to any of clauses 1 to 40, wherein:

[0319] The power converter circuit is used to power a computer microprocessor.

[0320] 42. A power converter circuit according to any of clauses 1 to 41, wherein:

[0321] The voltage of the high voltage terminal of the voltage divider is between 40V and 60V.

[0322] 43. A power converter circuit according to any of clauses 1 to 42, wherein:

[0323] The voltage of the low voltage terminal of the voltage divider is between 20V and 30V.

[0324] 44. A power converter circuit according to any of clauses 1 to 43, wherein:

[0325] The voltage of the low voltage terminal of the voltage regulator is between 0.5V and 3V.

[0326] 45. A power converter circuit as described in any of clauses 1 to 44, further comprising a gate driver circuit.

[0327] 46. ​​A coupled inductor comprising:

[0328] a magnetic core having a first gap forming two lengths of core material between two ends; and

[0329] A conductive winding is wound around the two lengths of magnetic core material.

[0330] 47. The coupled inductor of clause 46, wherein the two lengths of core material form a stepped structure.

[0331] 48. The coupled inductor of clause 47, wherein the two lengths of core material form steps of the ladder structure.

[0332] 49. The coupled inductor of any of clauses 47 to 48, wherein the conductive winding is wound around the periphery of each rung of the ladder structure.

[0333] 50. The coupled inductor of any of clauses 47 to 49, wherein the stepped structure is used to minimize hot spots in the coupled inductor.

[0334] 51. The coupled inductor of any of clauses 47 to 50, wherein the magnetic core comprises a plurality of layers.

[0335] 52. The coupled inductor of clause 51 , wherein the plurality of layers have different thicknesses.

[0336] 53. A power converter for receiving a coupled inductor as described in any one of clauses 46 to 52, the coupled inductor comprising a winding, the winding having a leg design, and the power converter comprising:

[0337] Printed circuit boards (PCBs); and

[0338] A plurality of capacitors are attached to the PCB.

[0339] 54. The coupled inductor of any of clauses 46 to 53, wherein the magnetic core comprises two layers made of different materials.

[0340] 55. The coupled inductor of clause 54, wherein:

[0341] The first layer of the magnetic core comprises a first magnetic permeability and a first saturation capability,

[0342] The second layer of the magnetic core comprises a second magnetic permeability and a second saturation capacity, and

[0343] The first magnetic permeability is greater than the second magnetic permeability, and the first saturation capacity is less than the second saturation capacity.

[0344] 56. The coupled inductor of any of clauses 46 to 55, wherein the magnetic core comprises a cap layer.

[0345] 57. The coupled inductor of clause 56, wherein the cap layer of the magnetic core comprises a gap.

[0346] 58. A coupled inductor as defined in any one of clauses 46 to 57, wherein the windings form a mosaic pattern.

[0347] 59. A coupled inductor as described in any of clauses 46 to 58, wherein the windings include legs extending in a common direction away from a given face of the magnetic core.

[0348] 60. A coupled inductor comprising:

[0349] a magnetic core having a plurality of first gaps arranged along a first direction and at least one second gap arranged along a second direction perpendicular to the first direction,

[0350] the plurality of first gaps, the plurality of first gaps forming a plurality of lengths of magnetic core material between two ends of the first direction; and

[0351] A conductive winding is wound around the plurality of lengths of magnetic core material.

[0352] 61. The coupled inductor of clause 60, wherein the magnetic core comprises two layers made of different materials.

[0353] 62. A power converter for receiving a coupled inductor as claimed in any one of clauses 60 to 61, the coupled inductor comprising a winding having a leg design, and the power converter comprising:

[0354] Printed circuit boards (PCBs); and

[0355] A plurality of capacitors are attached to the PCB.

[0356] 63. A power converter circuit comprising:

[0357] A charge distributor, the charge distributor comprising a switch, a capacitor and an inductor, wherein:

[0358] The charge distributor has a fixed voltage conversion rate;

[0359] The switches in the charge distributor operate at a common frequency; and

[0360] The charge distributor has four terminals, one of which is connected to a high voltage, one of which is connected to ground, and two branch terminals have voltages between the high voltage and ground;

[0361] a plurality of voltage regulators, the plurality of voltage regulators comprising switches, inductors and capacitors, wherein the voltage regulators regulate voltage by changing a duty cycle of the switches,

[0362] Wherein, the terminal connected to the high voltage of the charge distributor is connected to the high voltage terminal of the system, and the low voltage side of the voltage regulator is connected to the low voltage terminal of the system.

[0363] 64. A system comprising:

[0364] substrate;

[0365] a core on a first die of the substrate; and

[0366] a voltage regulator module on a second side of the substrate, the second side being opposite the first side,

[0367] Wherein, the voltage regulator module comprises:

[0368] a magnetic core having twelve voids arranged in a four by three grid, the twelve voids forming four lengths of core material between the two ends,

[0369] an electrically conductive winding wound around the four lengths of magnetic core material, the winding circulating through at least one of the twelve gaps, and

[0370] Multiple switches.

[0371] 65. The system of clause 64, wherein power is transmitted from the voltage regulator module to the core.

[0372] 66. A coupled inductor comprising:

[0373] a magnetic core, the magnetic core comprising a plurality of gaps;

[0374] a plurality of conductive windings;

[0375] wherein each winding is at least partially disposed in two of the gaps, each winding includes a flat surface adjacent to the top surface of the magnetic core, each winding further includes two legs on opposite sides of the winding, each leg is disposed orthogonally to the bottom surface of the magnetic core, each leg extends at least to the bottom surface of the magnetic core, and each leg is disposed in a different gap from another leg,

[0376] wherein at least two of the windings are partially arranged in the same gap, and

[0377] wherein each gap includes two windings at least partially disposed therein; and

[0378] A magnetic plate is disposed adjacent to a top surface of the magnetic core and is spaced apart from the top surface of the magnetic core by a gap, wherein the magnetic plate comprises a different material from that of the magnetic core.

[0379] 67. The coupled inductor of clause 66, wherein the gap between the magnetic plate and the top surface of the magnetic core is between 0.05 mm and 5.00 mm.

[0380] 68. The power converter circuit of clause 31, wherein the current that charges and discharges the capacitor is a pulsed square wave current.

[0381] 69. The coupled inductor of clause 46, further comprising:

[0382] a second gap and a third gap combined with the first gap,

[0383] The first gap, the second gap and the third gap form four lengths of magnetic core material between the two ends.

Claims

1. A power converter circuit, comprising: At least one charge distributor, the at least one charge distributor comprising a switch, a capacitor and an inductor, wherein: The at least one charge distributor has a fixed voltage conversion rate; The switches in the at least one charge distributor operate at a common frequency; and Each of the at least one charge distributor has four terminals, one terminal is connected to a high voltage, one terminal is connected to ground, and two branch terminals have a voltage between the high voltage and ground; a plurality of voltage regulators, the plurality of voltage regulators comprising switches, inductors and capacitors, wherein the voltage regulators regulate voltage by changing a duty cycle of the switches, Therein, the terminal connected to the high voltage of the at least one charge distributor is connected to a high voltage terminal of a system, and the low voltage side of the voltage regulator is connected to a low voltage terminal of the system.

2. The power converter circuit of claim 1 , wherein: The switches of the voltage regulator operate at a frequency higher than or equal to the frequency of the switches of the at least one charge distributor.

3. The power converter circuit according to any one of claims 1 to 2, wherein: At all times during operation of the power converter circuit, at least one capacitor is connected between the high voltage terminal, the ground, and the branch terminal, acting as a capacitive voltage divider and dividing the high voltage into smaller intermediate voltage domains; The charge distributor of the at least one charge distributor comprises a plurality of modular circuits operating in an interleaved manner.

4. The power converter circuit according to claim 3, comprising: a first resulting voltage of the at least one capacitor corresponding to a switch coupled to the high voltage terminal and the first branch terminal; as well as A second resulting voltage of the at least one capacitor corresponds to a switch coupled to the one terminal connected to ground and to the second branch terminal, The first result voltage is equal to the second result voltage.

5. The power converter circuit of claim 3, wherein: a first resulting current of the at least one capacitor corresponding to a switch coupled to the high voltage terminal and the first branch terminal; as well as A second resulting current of the at least one capacitor corresponds to a switch coupled to the one terminal connected to ground and to the second branch terminal, The first result current is equal to the second result current.

6. The power converter circuit according to any one of claims 1 to 5, wherein: During operation of the power converter circuit, at least one charge storage block is connected between the high voltage terminal, the ground and the branch terminal, acts as a capacitive voltage divider and divides the high voltage into smaller intermediate voltage domains.

7. The power converter circuit of claim 6, wherein: The at least one charge storage block stores one or more capacitors.

8. The power converter circuit of claim 6, wherein: The at least one charge storage block stores one or more inductors.

9. The power converter circuit according to any one of claims 1 to 8, wherein: A voltage regulator of the plurality of voltage regulators has a plurality of terminals: a terminal connected to ground, a terminal connected to a low voltage, and a branch terminal of a charge distributor of the at least one charge distributor.

10. The power converter circuit of claim 9, wherein: The inductor of the voltage regulator is positioned between the low voltage and the one branch terminal.

11. The power converter circuit of claim 10, wherein: The switch includes a switch between the one branch terminal and an inductor of the voltage regulator.

12. The power converter circuit according to any one of claims 10 to 11, wherein: The switch includes a switch between ground and a node between the one branch terminal and an inductor of the voltage regulator.

13. A power converter circuit according to any one of claims 9 to 12, wherein: The capacitor of the voltage regulator is positioned between the low voltage and ground.

14. A power converter circuit according to any one of claims 9 to 12, wherein: The capacitor of the voltage regulator is positioned between the inductor of the voltage regulator and the one branch terminal.

15. A power converter according to any one of claims 1 to 14, wherein: The charge distributor of the at least one charge distributor comprises: a first inductor positioned between the high voltage and the low voltage, and A second inductor is positioned between the low voltage and ground.

16. A power converter according to any one of claims 1 to 15, wherein: The charge distributor of the at least one charge distributor comprises: An inductor is positioned between a first branch terminal of the two branch terminals and the low voltage.

17. A power converter circuit according to any one of claims 1 to 16, wherein: The charge distributor of the at least one charge distributor comprises: A capacitor is positioned between the low voltage and ground.

18. A power converter circuit according to any one of claims 1 to 17, wherein: The charge distributor of the at least one charge distributor comprises: A capacitor is positioned between one terminal connected to the high voltage and one terminal connected to ground.

19. A power converter according to any one of claims 1 to 18, wherein: The inductors of the charge distributors in the one charge distributor include inductor subsets, each inductor subset including a shared magnetic core.

20. The power converter of claim 19, wherein: The number of the inductor subsets is equal to the number of series capacitor step-down units.

21. The power converter of claim 1, wherein: The inductors of the charge distributors in the at least one charge distributor share a magnetic core.

22. A power converter according to any one of claims 1 to 21, wherein: Two of the at least one charge distributor are connected in parallel.

23. A power converter according to claim 22, wherein: The inductors of the two charge distributors are coupled to each other.

24. A power converter circuit according to any one of claims 22 to 23, wherein: The switches of the two charge distributors include gate driver control signals.

25. The power converter circuit according to any one of claims 22 to 23, further comprising: A level shifter is used for converting the signal voltage level of the switches with floating sources of the two charge distributors.

26. A power converter according to any one of claims 1 to 25, wherein: The at least one charge distributor includes a first charge distributor driving a second charge distributor and a third charge distributor; and The second charge distributor and the third charge distributor each drive two series capacitor step-down voltage regulators.

27. A power converter circuit according to any one of claims 1 to 26, wherein: The inductor in the voltage regulator operates as a DC inductor having a DC average current value and a minimum peak-to-peak ripple; and The voltage regulator includes a plurality of modular units that work in an interleaved manner.

28. A power converter circuit according to any one of claims 1 to 27, wherein: There is no intermediate bus capacitor between the charge distributor and the voltage regulator.

29. A power converter circuit according to any one of claims 1 to 28, wherein: The circuit is more of a voltage regulator than a charge divider.

30. A power converter circuit according to any one of claims 1 to 29, wherein: Each charge distributor includes two switches and a capacitor.

31. A power converter circuit according to any one of claims 1 to 30, wherein: The capacitor in the charge distributor is charged / discharged via the inductor in the voltage regulator; as well as During the charging / discharging process, the capacitor voltage of the charge distributor interacts with the inductor current of the voltage regulator to achieve automatic balancing of both the capacitor voltage and the inductor current.

32. A power converter circuit according to any one of claims 1 to 31, wherein: The inductor in the charge distributor operates as a resonant inductor and resonates with the capacitor in the charge distributor; as well as The currents charging and discharging the capacitors are sinusoidal or partially sinusoidal.

33. A charge divider circuit according to any one of claims 30 to 32, wherein: The charge distributor is a resonant switched capacitor converter having a plurality of switches connected in series and a plurality of capacitors that are reconfigured by the plurality of switches connected in series to transfer energy.

34. A charge divider circuit according to any one of claims 31 to 33, wherein: The charge distributor is a resonant switched capacitor converter in which an inductor is connected in series with a flying capacitor.

35. A charge divider circuit according to any one of claims 31 to 34, wherein: The charge distributor is a resonant switched capacitor converter in which an inductor is connected at the low voltage terminal of a flying capacitor multilevel converter.

36. A charge divider circuit according to any one of claims 31 to 35, wherein: The charge distributor is a resonant switched capacitor converter including a plurality of resonant inductor and capacitor networks; The resonant switched capacitor converter is reconfigured by the switches to transfer energy.

37. A voltage regulator circuit according to any one of claims 1 to 36, wherein: The voltage regulator is a multi-phase buck converter.

38. A voltage regulator circuit according to any one of claims 1 to 36, wherein: The voltage regulator is a series buck converter.

39. A voltage regulator circuit according to any one of claims 1 to 36, wherein: The voltage regulator is a hybrid switched capacitor converter.

40. A voltage regulator circuit according to any one of claims 1 to 36, wherein: The inductor of the voltage regulator is a multi-phase coupled inductor.

41. A power converter circuit according to any one of claims 1 to 40, wherein: The power converter circuit is used to power a computer microprocessor.

42. A power converter circuit according to any one of claims 1 to 41, wherein: The voltage of the high voltage terminal of the voltage divider is between 40V and 60V.

43. A power converter circuit according to any one of claims 1 to 42, wherein: The voltage of the low voltage terminal of the voltage divider is between 20V and 30V.

44. A power converter circuit according to any one of claims 1 to 43, wherein: The voltage of the low voltage terminal of the voltage regulator is between 0.5V and 3V.

45. A power converter circuit as claimed in any one of claims 1 to 44, further comprising a gate driver circuit.

46. ​​A coupled inductor comprising: a magnetic core having a first gap forming two lengths of core material between two ends; as well as A conductive winding is wound around the two lengths of magnetic core material.

47. The coupled inductor of claim 46, wherein: The two lengths of core material form a stepped structure.

48. The coupled inductor of claim 47, wherein: The two lengths of core material form steps of the stepped structure.

49. The coupled inductor of any one of claims 47 to 48, wherein: The conductive winding is wound around the periphery of each step of the stepped structure.

50. The coupled inductor of any one of claims 47 to 49, wherein: The stepped structure is used to minimize hot spots in the coupled inductor.

51. The coupled inductor of any one of claims 47 to 50, wherein: The magnetic core includes a plurality of layers.

52. The coupled inductor of claim 51 , wherein: The plurality of layers have different thicknesses.

53. A power converter for receiving a coupled inductor as claimed in any one of claims 46 to 52, the coupled inductor comprising a winding having a leg design, and the power converter comprising: Printed circuit board (PCB); as well as A plurality of capacitors are attached to the PCB.

54. The coupled inductor of any one of claims 46 to 53, wherein: The magnetic core comprises two layers made of different materials.

55. The coupled inductor of claim 54, wherein: The first layer of the magnetic core comprises a first magnetic permeability and a first saturation capability, The second layer of the magnetic core comprises a second magnetic permeability and a second saturation capacity, and The first magnetic permeability is greater than the second magnetic permeability, and the first saturation capacity is less than the second saturation capacity.

56. The coupled inductor of any one of claims 46 to 55, wherein: The magnetic core includes a cap layer.

57. The coupled inductor of claim 56, wherein: The cap layer of the magnetic core includes a gap.

58. The coupled inductor of any one of claims 46 to 57, wherein: The windings form a mosaic pattern.

59. The coupled inductor of any one of claims 46 to 58, wherein: The windings include legs extending in a common direction away from a given face of the core.

60. A coupled inductor comprising: a magnetic core having a plurality of first gaps arranged along a first direction and at least one second gap arranged along a second direction perpendicular to the first direction, The plurality of first gaps form a plurality of lengths of magnetic core material between two ends of the first direction; as well as A conductive winding is wound around the plurality of lengths of magnetic core material.

61. The coupled inductor of claim 60, wherein: The magnetic core comprises two layers made of different materials.

62. A power converter for receiving the coupled inductor of any one of claims 60 to 61, the coupled inductor comprising a winding, the winding having a leg design, and the power converter comprising: Printed circuit board (PCB); as well as A plurality of capacitors are attached to the PCB.

63. A power converter circuit comprising: A charge distributor, the charge distributor comprising a switch, a capacitor and an inductor, wherein: The charge distributor has a fixed voltage conversion rate; The switches in the charge distributor operate at a common frequency; and The charge distributor has four terminals, one of which is connected to a high voltage, one of which is connected to ground, and two branch terminals have voltages between the high voltage and ground; a plurality of voltage regulators, the plurality of voltage regulators comprising switches, inductors and capacitors, wherein the voltage regulators regulate voltage by changing a duty cycle of the switches, Wherein, the terminal connected to the high voltage of the charge distributor is connected to the high voltage terminal of the system, and the low voltage side of the voltage regulator is connected to the low voltage terminal of the system.

64. A system comprising: substrate; a core on a first die of the substrate; as well as a voltage regulator module on a second side of the substrate, the second side being opposite the first side, Wherein, the voltage regulator module comprises: a magnetic core having twelve voids arranged in a four by three grid, the twelve voids forming four lengths of core material between the two ends, an electrically conductive winding wound around the four lengths of magnetic core material, the winding circulating through at least one of the twelve gaps, and Multiple switches.

65. The system of claim 64, wherein: Power is transmitted from the voltage regulator module to the core.

66. A coupled inductor comprising: a magnetic core, the magnetic core comprising a plurality of gaps; a plurality of conductive windings; wherein each winding is at least partially disposed in two of the gaps, each winding includes a flat surface adjacent to the top surface of the magnetic core, each winding further includes two legs on opposite sides of the winding, each leg is disposed orthogonally to the bottom surface of the magnetic core, each leg extends at least to the bottom surface of the magnetic core, and each leg is disposed in a different gap from another leg, wherein at least two of the windings are partially arranged in the same gap, and wherein each gap includes two windings at least partially disposed therein; and A magnetic plate is disposed adjacent to a top surface of the magnetic core and is spaced apart from the top surface of the magnetic core by a gap, wherein the magnetic plate comprises a different material from that of the magnetic core.

67. The coupled inductor of claim 66, wherein: The gap between the magnetic plate and the top surface of the magnetic core is between 0.05 mm and 5.00 mm.

68. The power converter circuit of claim 31 , wherein: The current that charges and discharges the capacitor is a pulsed square wave current.

69. The coupled inductor of claim 46, further comprising: a second gap and a third gap combined with the first gap, The first gap, the second gap and the third gap form four lengths of magnetic core material between the two ends.

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