Electronic device and method for digital predistortion in wireless communication system

Abstract

According to an embodiment, a method performed by an electronic device may include a step for identifying a channel bandwidth. The method may comprise the steps of: identifying one or more active digital pre-distortion (DPD) units among a plurality of DPD units of the DPD circuit based on a channel bandwidth and a number of resources allocated in the channel bandwidth; generating a DPD output signal of the DPD circuit based on the one or more active DPD cells; and generating an amplifier output signal based on the DPD output signal of the DPD circuit, a digital-to-analog converter (DAC) and a power amplifier (PA). When the DPD output signal is being generated, at least one DPD cell of the plurality of DPD cells of the DPD circuit that is different from the one or more active DPD cells may be deactivated.

Description

Technical Field

[0001] The present disclosure relates to a wireless communication system. For example, the present disclosure relates to an electronic device and a method for digital predistortion (DPD) in a wireless communication system. Background Art

[0002] In wireless communication systems, digital modulated signals are amplified by radio frequency (RF) power amplifiers. In order to transmit without signal distortion, high linearity characteristics of the power amplifier are required. In order to provide high linearity of the power amplifier, digital predistortion (DPD) is used to change the input signal so that the output of the power amplifier is close to the ideal state. Summary of the invention

[0003] Solution to the problem

[0004] Embodiments of the present disclosure provide an electronic device and method for performing digital pre-distortion (DPD) control based on resource allocation.

[0005] Embodiments of the present disclosure provide an electronic device and method for determining a memory order of a DPD circuit based on resource allocation.

[0006] Embodiments of the present disclosure provide an electronic device and method for performing DPD modeling on a DPD circuit based on resource allocation.

[0007] Embodiments of the present disclosure provide an electronic device and method for adaptively adjusting the complexity of a DPD circuit that compensates for memory effects based on resource allocation.

[0008] According to various example embodiments, a method performed by an electronic device may include: identifying a channel bandwidth; identifying one or more active DPD units among a plurality of DPD units of a digital predistortion (DPD) circuit based on the channel bandwidth and an amount of resources allocated within the channel bandwidth; generating a DPD output signal of the DPD circuit based on the one or more active DPD units; generating an amplifier output signal based on the DPD output signal of the DPD circuit, a digital-to-analog converter (DAC), and a power amplifier (PA), wherein, based on the DPD output signal being generated, at least one DPD unit among the plurality of DPD units of the DPD circuit that is different from the one or more active DPD units is deactivated.

[0009] According to various example embodiments, an electronic device may include: a processor; a digital predistortion (DPD) circuit; a digital-to-analog converter (DAC); and a power amplifier (PA). The processor may be configured to: identify a channel bandwidth; identify one or more active DPD units among a plurality of DPD units of the DPD circuit based on the channel bandwidth and the amount of resources allocated within the channel bandwidth; control the DPD circuit to generate a DPD output signal based on the one or more active DPD units; generate an amplifier output signal based on the DPD output signal of the DPD circuit through the DAC and the PA; wherein, based on the DPD output signal being generated, at least one DPD unit among the plurality of DPD units of the DPD circuit that is different from the one or more active DPD units may be deactivated.

[0010] Electronic devices and methods according to various example embodiments of the present disclosure may more accurately compensate for distortion characteristics of a power amplifier by adjusting the complexity of a DPD circuit based on an allocated resource amount.

[0011] Effects that can be obtained from the present disclosure are not limited to those described above, and any other effects not mentioned herein will be clearly understood from the following description by a person of ordinary knowledge in the art to which the present disclosure pertains. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent through the following detailed description in conjunction with the accompanying drawings, in which:

[0013] Figure 1 is a diagram showing a wireless communication system according to an embodiment;

[0014] Figure 2 is a diagram showing the principle of digital pre-distortion (DPD) according to an embodiment;

[0015] Figure 3 is a diagram showing an example of a transmission circuit including a DPD circuit according to an embodiment;

[0016] Figure 4 is a diagram showing an example of a transmission circuit including a DPD circuit according to DPD control based on resource allocation according to an embodiment;

[0017] Figure 5a and 5b is a graph showing an example of performance of DPD control based on resource allocation according to an embodiment;

[0018] Figure 6 is a flowchart illustrating an example operation of an electronic device for DPD control based on resource allocation according to an embodiment; and

[0019] Figure 7is a diagram showing an example configuration of an electronic device including a transmission circuit for DPD control based on resource allocation according to an embodiment. DETAILED DESCRIPTION

[0020] The terms used in this disclosure are only used to describe example embodiments and are not intended to limit the scope of the present disclosure. A singular expression may include a plural expression unless it is clearly expressed differently in the context. The terms used herein, including technical or scientific terms, may have the same meaning as that generally understood by persons with ordinary knowledge in the technical field described in this disclosure. The terms defined in a general dictionary in the terms used in this disclosure may be interpreted with the same or similar meaning as the contextual meaning of the relevant technology, and unless clearly defined in this disclosure, should not be interpreted with an ideal or overly formal meaning. In some cases, even the terms defined in this disclosure should not be interpreted as excluding embodiments of the present disclosure.

[0021] In various embodiments of the present disclosure described below, a hardware method is described as an example. However, since various embodiments of the present disclosure include techniques using both hardware and software, various embodiments of the present disclosure do not exclude a software-based method.

[0022] For convenience of description, terms used in the following description referring to signals (e.g., signal, signal stream, composite signal, digital signal, analog signal, modulated signal, distorted signal), terms referring to resources (e.g., time, symbol, time slot, subframe, radio frame, subcarrier, resource element, resource block, bandwidth part (BWP), opportunity), terms for operation states (e.g., step, operation, process), terms referring to channels, terms referring to network entities, terms referring to components of devices, etc. are shown. Therefore, the present disclosure is not limited to the terms described below, and another term having an equivalent technical meaning may be used.

[0023] For ease of description, the terms used in the following description to refer to components of electronic devices (e.g., modules, antennas, antenna elements, circuits, processors, chips, components, devices), terms to refer to circuits (e.g., combination circuits, coupling circuits, separation circuits, distribution circuits, PIMC circuits, harmonic removal circuits), terms to refer to the shapes of components (e.g., structures, constructions, support portions, contact portions, protruding portions), terms to refer to circuits (e.g., PCBs, FPCBs, signal lines, feed lines, data lines, RF signal lines, antenna lines, RF paths, RF modules, RF circuits, separators, frequency dividers, couplers, combiners), etc. are shown. Therefore, the present disclosure is not limited to the terms described below, and another term with equivalent technical meaning may be used. In addition, terms such as "part", "device", "structure", "construction", etc. used below may refer to, for example, at least one shape structure, or may refer to, for example, a unit of a processing function.

[0024] In addition, in the present disclosure, in order to determine whether a specific condition is met or satisfied, an expression of greater than or less than may be used, but this is merely a description for expressing an example, and does not exclude a description of greater than or equal to or less than or equal to. A condition described as "greater than or equal to" may be replaced with "greater than", a condition described as "less than or equal to" may be replaced with "less than", and a condition described as "greater than or equal to and less than" may be replaced with "greater than and less than or equal to". In addition, hereinafter, "A to B" may refer to at least one of the elements from A (including A) to B (including B), for example.

[0025] The present disclosure relates to electronic devices and methods for enhancing the performance of a digital predistortion (DPD) circuit for compensating for nonlinearity of a power amplifier (PA) in a wireless communication system. For example, in a wireless communication system, the present disclosure can improve the performance of a transmitting end by compensating for distortion components of a power amplifier through at least a portion of a DPD unit of a selected DPD circuit based on an amount of resources allocated within a bandwidth.

[0026] Figure 1 is a diagram illustrating a wireless communication system according to various embodiments.

[0027] refer to Figure 1 , Figure 1 A base station 110 and a terminal 120 are shown as a part of nodes using a wireless channel in a wireless communication system. Figure 1 Only one base station is shown, but the wireless communication system may further include another base station that is the same as or similar to the base station 110 .

[0028] The base station 110 is a network infrastructure that provides wireless access to the terminal 120. The base station 110 has coverage defined based on the distance at which a signal can be transmitted. The base station 110 may be referred to as an access point (AP), an eNodeB (eNB), a fifth generation node, a next generation node B (gNB), a wireless point, a transmission / reception point (TRP), or another term having an equivalent technical meaning other than a base station.

[0029] The terminal 120 is a device used by a user, and performs communication with the base station 110 through a wireless channel. A link from the base station 110 to the terminal 120 is called a downlink (DL), and a link from the terminal 120 to the base station 110 is called an uplink (UL). Figure 1 , but the terminal 120 and another terminal may perform communication through a wireless channel. In this case, the device-to-device link (D2D) between the terminal 120 and another terminal is called a side link, and the side link may be used together with the PC5 interface by mixing. In an embodiment, the terminal 120 may be operated without user participation. According to an embodiment, the terminal 120 is a device that performs machine type communication (MTC) and may not be carried by a user. In addition, according to an embodiment, the terminal 120 may be a narrowband (NB)-Internet of Things (IoT) device.

[0030] The terminal 120 may be referred to as user equipment (UE), customer premises equipment (CPE), a mobile station, a subscriber station, a remote terminal, a wireless terminal, an electronic device, a user device, or another term having an equivalent technical meaning except terminal.

[0031] As the power of the input signal of the power amplifier (PA) increases, the response of the power amplifier shows nonlinearity. The response of the power amplifier eventually reaches a saturation point. This nonlinearity causes distortion of the transmitted signal and leads to a degradation of the link quality. Therefore, linearity of the power amplifier is required. Generally, in order to achieve linearity, the power amplifier is required to be input within a limited power range. Digital pre-distortion can be used to increase the power range of the input signal for linearity.

[0032] Figure 2 is a diagram showing the principle of digital predistortion (DPD) according to an embodiment. Predistortion can be performed in a DPD circuit. The DPD circuit compensates for distortion components due to the nonlinear characteristics of a power amplifier (PA) based on a comparison between an input signal and an output signal of the PA. When an input modulated signal distorted by the DPD circuit is input to the PA, the final modulated signal can be linearly amplified.

[0033] refer to Figure 2, the DPD circuit 210 may output a DPD output signal 215 based on the input signal 205. The input signal 205 may be pre-distorted into the DPD output signal 215 by the DPD circuit 210. The PA 220 may output an amplifier output signal 225 based on the DPD output signal 215. The DPD output signal 215 may be input to the PA 220. Due to the nonlinear characteristics of the PA 220, the DPD output signal 215 is distorted. The amplifier output signal 225 is output through the distortion caused by the PA 220. Although not in Figure 2 , but analog conversion may be performed on the DPD output signal 215 by a DAC, and up-conversion may be performed on the DPD output signal 215 by a mixer.

[0034] Graph 251 shows the relationship between the magnitude of the input signal 205 and the magnitude of the DPD output signal 215. Graph 253 shows the relationship between the magnitude of the DPD output signal 215 and the magnitude of the amplifier output signal 225. Graph 255 shows the relationship between the magnitude of the input signal 205 and the magnitude of the amplifier output signal 225. Referring to graph 255, through predistortion of the DPD circuit 210, the output (e.g., the amplifier output signal 225) can be linear with respect to the input (e.g., the input signal 205).

[0035] PA 220 may include a transistor. The transistor generates a harmonic component. Due to the nonlinearity of the low-frequency second harmonic component corresponding to the bandwidth (f2-f1) (f2 is the highest frequency and f1 is the lowest frequency), a memory effect occurs. The larger the second harmonic component of the low frequency, the more difficult it is to remove the impedance. Therefore, when the signal bandwidth increases, the power amplifier exhibits a memory effect. In the case where the modulated signal of the wireless communication system is used as a wide bandwidth signal, the distortion component of the power amplifier may include a distortion component due to the memory effect as well as nonlinear characteristics. The memory effect may refer to, for example, a signal generated nonlinearly in the past that affects the current nonlinearity. In other words, the power amplifier is a nonlinear system using memory.

[0036] The memory effect can be attributed to the thermal constants of active devices or components of the bias network with frequency-dependent operation. As mentioned above, the distortion component due to the memory effect increases in proportion to the bandwidth of the signal. A memory-compensated DPD circuit is required to compensate for the nonlinear distortion components of the power amplifier and the distortion components caused by the memory effect. In the following, Figure 3 A memory compensated DPD circuit is described.

[0037] Figure 32 is a diagram showing an example of a transmission circuit including a DPD circuit according to an embodiment. The DPD circuit according to an embodiment can compensate for a memory effect. The memory effect may refer to a signal generated in the past that affects current nonlinearity, for example.

[0038] refer to Figure 3 , the DPD circuit 300 may use a finite impulse response (FIR) filter structure. In order to achieve predistortion, a multi-order FIR filter may be used. The DPD circuit 300 may include components according to the structure of the FIR filter. The DPD circuit 300 may include a plurality of DPD units, one or more delay elements, and a combiner 330. The plurality of DPD units may include a first DPD unit 320-1, a second DPD unit 320-2, a third DPD unit 320-3, ..., an i-th DPD unit 320-i. In each DPD unit, a function operation (e.g., multiplication of coefficients) for a delayed signal may be performed. i may correspond to the length of the FIR filter. One or more delay elements may include a second delay element 310-2 connected to the second DPD unit 320-2, a third delay element 310-3 connected to the third DPD unit 320-3, a fourth delay element 310-4 connected to the fourth DPD unit 320-4, ..., and a delay element coupled to the N-th DPD unit. The output of each of the plurality of DPD units may be provided to a combiner 330 .

[0039] The combiner 330 may generate a DPD output signal 335 by combining the outputs of a plurality of DPD units. The DPD output signal 335 may be sent from the combiner 330 to the DAC 340. According to an embodiment, the DPD output signal 335 may be provided to a calculation block 380. The calculation block 380 may refer to a function executed by a processor, for example.

[0040] DAC 340 may convert DPD output signal 335 into an analog signal. DAC 340 may send the converted analog signal to PA 350. Figure 3 Not shown, but up-conversion by a mixer may be performed between the DAC 340 and the PA 350 .

[0041] PA 350 may amplify an input signal. A signal 395 amplified by PA 350 may pass through a coupler 360 and may be sent to a filter (not shown) (e.g., a bandpass filter (BPF)) and an antenna (not shown). The antenna may radiate the signal. Meanwhile, PA 350 may include a transistor. A transistor is an active element and has an inherent nonlinear characteristic. Therefore, PA 350 may output an amplifier output signal that is nonlinear with respect to the input signal. The amplifier output signal is linearly proportional to the input signal with respect to the size of the input signal in a certain region. However, in certain other regions with respect to the size of the input signal, PA 350 provides an output that is not proportional to the input signal. In particular, the wider the bandwidth of the input signal of PA 350, the more frequently the memory effect due to the second harmonic component of the input signal occurs. The harmonic impedance at the output end of PA 350 may generate a voltage component. The voltage component may be reflected by the bias line and re-input to PA 350. Therefore, the memory effect may occur by the interaction between the current input signal and the re-input signal. In order to reduce the performance delay due to the memory effect, the DPD circuit 300 and the calculation block 380 for controlling the DPD circuit 300 may be used.

[0042] The calculation block 380 may control the DPD circuit 300 to predistort the nonlinear characteristics of the PA 350. The calculation corresponding to the calculation block 380 may be performed by a processor. In other words, the processor of the electronic device may generate a control signal for controlling the DPD circuit 300.

[0043] According to an embodiment, the processor of the calculation block 380 can determine how much to compensate the nonlinear characteristics of the PA 350 by the DPD circuit 300 based on the bandwidth of the input signal. As the complexity of the DPD circuit 300 increases, the degree of compensation of the nonlinear characteristics of the PA 350 increases. The complexity of the DPD circuit 300 depends on the number of activated DPD units. The number of activated DPD units can be referred to as the memory order.

[0044] According to an embodiment, the processor of the computation block 380 may determine a control parameter for pre-distorting the nonlinear characteristics of the PA 350 by comparing the input signal of the PA 350 with the output signal of the PA 350. Determining the control parameter may be referred to as DPD modeling. The processor of the computation block 380 may obtain an input signal to the DAC 340. The input signal to the DAC 340 may correspond to the input signal of the PA 350. The processor of the computation block 380 may obtain an output signal of the ADC 370. The output signal of the ADC 370 may correspond to the output signal of the PA 350. The signal 365 isolated by the coupler 360 coupled to the PA 350 may pass through the ADC 370 and may be sent to the computation block 380.

[0045] The DPD circuit 300 may include a DPD unit DPD1 (e.g., a first DPD unit 320-1) for a current input signal 305 and DPD units DPD2, DPD3, ..., DPDi (e.g., a second DPD unit 320-2, a third DPD unit 320-3, ..., the i-th DPD unit 320-i) for past signals. As the bandwidth increases and the output power of the PA 350 increases, the distortion component increases. In order to linearize the output signal at the rated output power, a DPD circuit 300 having a relatively complex structure is required. The rated output power is the output power when the resources for the terminal user are allocated to the maximum, in other words, the output power when the traffic volume is the highest. In the orthogonal frequency division multiplexing (OFDM) modulation method, resource blocks (RBs) may be allocated according to the traffic volume. At the rated output power, all RBs of the channels operating in the base station are allocated. In other words, at the rated output power, the base station transmits a signal corresponding to the maximum bandwidth. If the number of terminal users decreases and the traffic volume decreases, the output power and bandwidth decrease. Furthermore, the distortion characteristics of the PA 350 are also improved, and the complicated structure of the DPD circuit required for the rated output needs to be simplified.

[0046] If the complexity of DPD does not change according to the bandwidth of the output signal, the DPD circuit always operates at a complexity suitable for the rated output power. When a high-complexity DPD circuit is used in a low-traffic situation (for example, all DPD units in a plurality of DPD units are operating), it is difficult to properly model the DPD for the frequency band of the RB that is not allocated within the base station operating channel. At this time, when the maximum traffic is allocated to the transmission system, distortion of the output signal occurs instantaneously. Here, distortion may refer to, for example, distortion of the DPD output, rather than pre-distortion for compensating for nonlinearity. Since the quality of wireless communication is degraded due to additional distortion (for example, distortion in addition to pre-distortion) generated in the DPD output, a method for maintaining the performance of improved linearity due to the DPD circuit is needed.

[0047] Embodiments of the present disclosure provide a method for operating the complexity of a DPD circuit differently according to the bandwidth of an input signal of a wireless communication system. In low traffic, the modeling error of the DPD circuit for unallocated frequency resources in the channel can be reduced, and in high traffic, the performance of the transmission circuit can be improved by the DPD circuit that compensates for the distortion component of the complete PA. Figure 4 , an example of a transmitting circuit for performing DPD control using allocated resources is described in more detail.

[0048] Figure 4 is a diagram showing an example of a transmission circuit including a DPD circuit according to DPD control based on resource allocation according to an embodiment. Figure 4 The transmitting circuit can use Figure 3 The sending circuit. Figure 4 The DPD circuit 400 of the transmitting circuit may include Figure 3 At least part of the components of the DPD circuit 300. In addition, terms such as "...part", "...device", "...structure", "...configuration" used below may refer to at least one shape structure or unit of, for example, a processing function.

[0049] refer to Figure 4 , the DPD circuit 400 may use a finite impulse response (FIR) filter structure. The DPD circuit 400 may include a plurality of DPD units, one or more delay elements, one or more switches and a combiner 330. The plurality of DPD units may include a first DPD unit 320-1, a second DPD unit 320-2, a third DPD unit 320-3, ..., an i-th DPD unit 320-i. 'i' may correspond to the length of the FIR filter. The order of the FIR filter is 'i-1'. The one or more delay elements may include a second delay element 310-2 connected to the second DPD unit 320-2, a third delay element 310-3 connected to the third DPD unit 320-3, a fourth delay element 310-4 connected to the fourth DPD unit 320-4, ..., and a delay element coupled to the N-th DPD unit. The one or more switches may include a second switch 450-2 connected to the second DPD unit 320-2, a third switch 450-3 connected to the third DPD unit 320-3, a fourth switch 450-4 connected to the fourth DPD unit 320-4, ..., and a switch 450-i coupled to the Nth DPD unit. The output of each of the plurality of DPD units may be provided to the combiner 330.

[0050] The combiner 330 may generate a DPD output signal 335 by combining the outputs of a plurality of DPD units. The DPD output signal 335 may be sent from the combiner 330 to the DAC 340. According to an embodiment, the DPD output signal 335 may be provided to a calculation block 380. The calculation block 380 may refer to a function executed by a processor, for example. Hereinafter, the operation of the calculation block 380 for effective bandwidth-based DPD control according to various embodiments may be understood as the operation of a processor.

[0051] DAC 340 may convert DPD output signal 335 into an analog signal. DAC 340 may send the converted analog signal to PA 350. Figure 3 Not shown, but up-conversion by a mixer may be performed between the DAC 340 and the PA 350 .

[0052] PA 350 may amplify an input signal. A signal 395 amplified by PA 350 may pass through a coupler 360 and may be sent to a filter (not shown) (eg, a band pass filter (BPF)) and an antenna (not shown). The antenna may radiate the signal. Meanwhile, PA 350 may include a transistor.

[0053] The processor may control the DPD circuit 400 through the calculation block 380 to pre-distort the nonlinear characteristics of the PA 350. The DPD circuit 400 may pre-compensate the signal input to the PA 350. The calculation block 380 may include a DPD modeling unit 410 and an effective bandwidth detector 420, each of which may include various processing circuits and / or executable program instructions. The processor may generate a control signal 440 for controlling the DPD circuit 400. A wide bandwidth generally has a high memory effect. However, even if the bandwidth is wide, if the actually allocated resources are small, a high-complexity DPD circuit is disadvantageous in terms of efficiency for signals allocated to small resources. In addition, in other words, when many resources are allocated instantaneously, since the coefficients applied to each DPD unit do not change, the components of the previous signal are applied to the DPD circuit for memory compensation, resulting in distortion in the output signal. Thus, in the DPD circuit, it is required to deactivate the DPD unit associated with the unnecessary past component.

[0054] The calculation block 380 according to various embodiments may include an effective bandwidth detector 420 for DPD modeling. The effective bandwidth detector 420 may calculate the effective bandwidth based on the input signal. The effective bandwidth may refer to, for example, the size of the frequency resources allocated in the frequency domain. The effective bandwidth detector 420 may calculate the effective bandwidth based on a fast Fourier transform (FFT). The effective bandwidth detector 420 of the processor may determine how much the nonlinear characteristics of the PA 350 are compensated by the DPD circuit 400 based on the bandwidth of the input signal. As the complexity of the DPD circuit 400 increases, the degree of compensation of the nonlinear characteristics of the PA 350 increases. The complexity of the DPD circuit 400 depends on the number of activated DPD units. The number of active DPD units may be referred to as a memory order.

[0055] The DPD modeling unit 410 of the processor may predetermine a control parameter for distorting the nonlinear characteristics of the PA 350 by comparing the input signal of the PA 350 with the output signal of the PA 350. Determining the control parameter may be referred to as DPD modeling. The calculation block 380 may obtain an input signal to the DAC 340. The input signal to the DAC 340 may correspond to the input signal of the PA 350. The calculation block 380 may obtain an output signal of the ADC 370. The output signal of the ADC 370 may correspond to the output signal of the PA 350. The signal 365 isolated by the coupler 360 coupled to the PA 350 may pass through the ADC 370 and may be sent to the calculation block 380.

[0056] The DPD modeling unit 410 according to the embodiment may calculate the modeling parameters reflected in the DPD circuit 400. The modeling parameters may include a function (or coefficient) applied to each DPD unit of the DPD circuit 400. The DPD modeling unit 410 may model the nonlinearity of the PA 350 by comparing the signal input to the PA 350 with the signal fed back through the output of the PA 350 and the coupler. The modeling result may be reflected in as many activated DPD units as the number of memory orders. The activated DPD units may compensate for the distortion components of the PA 350.

[0057] The DPD modeling unit 410 according to an embodiment may calculate nonlinear modeling parameters of the PA 350. Each DPD unit may calculate a function corresponding to a specific time delay. Applied to the input component corresponding to a particular time delay i (e.g., ).

[0058] According to an embodiment, the function may be determined based on the number of components for nonlinear modeling of the PA 350. In this case, according to an embodiment, the number of components for nonlinear modeling may be reduced by DPD control based on resource allocation. The meaning of reduction may mean, for example, that the number of components for expressing the nonlinear model is less than the number of components for the rated power (e.g., maximum bandwidth). For example, it may be a polynomial. The function may include a plurality of terms. In this case, the number of terms of the function may be reduced compared to the number of terms for the rated power. For example, if the function of the DPD unit at the rated power is a fifth-order polynomial, the function of the DPD unit at the effective bandwidth may be a third-order polynomial. In this way, as the complexity of the function applied to the DPD unit decreases, the calculation speed may increase. The complexity of the function depends on the modeling of the power amplifier (e.g., PA 350). For example, the higher the complexity, the greater the number of terms of the polynomial configured as a function. The lower the complexity, the smaller the number of terms of the polynomial configured.

[0059] The processor may determine the memory order of the DPD circuit according to the calculated effective bandwidth. The processor may determine the memory order based on the ratio (hereinafter, allocation ratio) of the effective bandwidth to the entire bandwidth (e.g., channel bandwidth, transmission bandwidth). The memory order may refer to, for example, the number of DPD units to be activated among a plurality of DPD units of the DPD circuit 400. In the case where one DPD unit is activated, the memory order of the DPD circuit 400 is 1. In the case where two DPD units are activated, the memory order of the DPD circuit 400 is 2. In the case where three DPD units are activated, the memory order of the DPD circuit 400 is 3.

[0060] According to an embodiment, the allocation ratio may be determined based on the number of samples having a power spectral density (PSD) exceeding a threshold value through FFT. Each sample may correspond to a resource element (RE) in the frequency domain. An RB defining a resource allocation unit may be defined as N in the frequency domain. SC RB The number of subcarriers can be N SC RB = 12. For example, the allocation ratio may be determined based on the following equation.

[0061] [Equation 1]

[0062]

[0063] here, For example, it may refer to the allocation ratio of the effective bandwidth. is a value obtained by calculating the power spectrum density (PSD) by performing FFT on the input signal. Th is a threshold value of PSD used to determine the effective bandwidth. The processor may determine the signal exceeding the set threshold value according to the operating state of the transmission system of the base station. The number of samples is counted.

[0064] The processor may calculate the allocation ratio by multiplying the ratio of the number of samples greater than the threshold relative to the total FFT size by the ratio of the signal sampling rate and the base station operating channel BW. In other words, Indicates the ratio of RBs currently allocated within the base station operating channel BW.

[0065] The processor can be based on The processor may determine whether each DPD unit is active in a segment distinguished by a value. The control signal 440 of the processor may indicate the activation or deactivation of each DPD unit. For example, the processor may send a control signal 440 for turning on or off each of the switches connected to the DPD units. By controlling the switches, the processor may change the structure of the DPD circuit 400. The structure of the DPD circuit 400 may vary depending on the number of activated DPD units among the multiple DPD units of the DPD circuit 400. For example, the processor may change the structure of the DPD circuit 400 based on the following equation.

[0066] [Equation 2]

[0067]

[0068]

[0069]

[0070] here, represents the function set in the DPD unit corresponding to the i-th memory order. For example, the function may include a polynomial operation (eg, an operation of multiplying an input by a specific coefficient, an operation of adding terms). The DPD unit may output the operation result.

[0071] In the case of a small effective bandwidth, the DPD circuit 400 does not compensate for memory. Since the unallocated frequency band within the operating channel is not modeled, the output signal is not distorted even if the maximum traffic is instantaneously allocated. Here, the output signal is not distorted indicating that no unexpected distortion occurs in the pre-distortion of the DPD circuit 400.

[0072] As the effective bandwidth increases, the unallocated frequency resources within the operating channel decrease. As the effective bandwidth increases, the transmitting circuit uses a DPD circuit with higher and higher complexity. A DPD circuit with high complexity may refer to, for example, a high complexity of the function of a DPD unit designed for nonlinear modeling in time delay. For example, the complexity of a polynomial may refer to the maximum degree of the polynomial. According to an embodiment, by designing DPD modeling based on the effective bandwidth rather than the maximum channel bandwidth, the number of components of the function of a single DPD unit (e.g., the degree of the polynomial) may be reduced.

[0073] In the case of maximum traffic where the distortion component of the PA 350 is maximized, in other words, at rated output, the transmitting circuit may use the maximum number of DPD units, in other words, the DPD circuit 400 according to the maximum memory order.

[0074] According to an embodiment, the number of sections distinguished according to the ratio of the effective bandwidth to the entire bandwidth and the range in each section may vary based on the characteristics of the PA 350. The number of sections and the range in each section may be determined according to the memory effect and the characteristics defining the nonlinearity of the PA 350. According to the nonlinear modeling of the PA 350, the number of components of the function applied in the DPD unit and the coefficient of each component may be determined. In addition, according to an embodiment, the PSD threshold used to calculate the effective bandwidth may vary depending on the characteristics of the PA 350 and the operation scenario of the base station transmission system.

[0075] Figure 5a and 5b is a graph showing an example of the performance of DPD control based on resource allocation according to an embodiment. Figure 5a In, the results of predistortion without DPD control based on resource allocation are described, and in Figure 5b In , the results of predistortion using DPD control based on resource allocation are described.

[0076] refer to Figure 5a , the bandwidth 503 of the output signal 501 may include an allocated resource region 505 and an unallocated resource region 507. The bandwidth 513 of the output signal 511 may include an allocated resource region 515. All RBs of the bandwidth 513 of the output signal 511 may be allocated.

[0077] A DPD circuit without DPD control based on resource allocation can perform predistortion based on all DPD units. Each DPD unit can compensate for the memory effect of the power amplifier through different delay times. All DPD units and delay elements of the DPD circuit are used for predistortion. However, the second harmonic component that affects the memory effect is affected by the size of the allocated frequency. In other words, if the actual allocated frequency size is small, the DPD circuit does not need to use all DPD units configured for the entire bandwidth. On the contrary, the DPD unit used to compensate for the past component may generate unnecessary predistortion.

[0078] The DPD model characteristic 509 of the output signal 501 (e.g., the relationship between the output signal of the DPD circuit and the input signal in the frequency domain) is constant in the allocated resource region 505. However, the DPD model characteristic 509 decreases in the unallocated resource region 507. In the unallocated resource region 507, it is not necessary to improve the linearity of the power amplifier, but if resources are instantaneously allocated to the entire bandwidth 513, it is difficult for the DPD circuit to accurately provide predistortion for the entire bandwidth 513. The DPD model characteristic 519 of the output signal 511 is not constant in the allocated resource region 515. Since the DPD circuit does not fully reflect the memory effect for the additionally allocated frequency portion, the performance of the entire transmission circuit is degraded.

[0079] refer to Figure 5b , the bandwidth 523 of the output signal 521 may include the allocated resource region 525 and the unallocated resource region 527. The bandwidth 533 of the output signal 531 may include the allocated resource region 535. All RBs of the bandwidth 533 of the output signal 531 may be allocated.

[0080] A DPD circuit using DPD control based on resource allocation can perform predistortion based on at least part of the DPD units in all DPD units. At least part of the DPD units can compensate for the memory effect of the power amplifier through different delay times. If the actual allocated frequency size is small, the DPD circuit does not need to use all DPD units configured for the entire bandwidth. In order to compensate for small memory effects, instead of providing coefficients to each of all DPD units, the processor can activate at least part of the DPD units in the DPD units, and the remaining DPD units can be deactivated. The processor can deactivate at least one DPD unit so that unnecessary predistortion does not occur.

[0081] The DPD model characteristic 529 of the output signal 521 (e.g., the relationship of the output signal of the DPD circuit with respect to the input signal in the frequency domain) is constant in the allocated resource region 525. The DPD model characteristic 529 is constant in the unallocated resource region 527. Since memory compensation for the unallocated resource region 527 is not performed, distortion of the output signal may not occur even in a case where resources are instantaneously allocated to the entire bandwidth 533. In other words, the pre-distortion performance of the DPD circuit can be guaranteed. The DPD model characteristic 539 of the output signal 531 is constant in the allocated resource region 535. By the switch control of the DPD circuit of the processor, compensation for unnecessary memory effects that may cause errors in the increased frequency domain is not performed, so the performance of the entire transmission circuit can be maintained.

[0082] If through Figure 1 , Figure 2 , Figure 3 , Figure 4 , Figure 5a and Figure 5b As described, the harmonic components corresponding to the bandwidth cause nonlinearity of the power amplifier. Therefore, if the size of the frequency domain used is small, the memory effect generated in the power amplifier is not significant. Even if a relatively small frequency domain is used within the bandwidth, if the DPD circuit is used as it is, it is difficult to properly design the parameters of the portion of the DPD unit that reflects the past time. For example, in the case where the channel bandwidth is 20 MHz, the maximum number of RBs that can be allocated is 100. When less than 50 RBs are allocated, the memory effect of the power amplifier may be relatively insignificant. The DPD circuit can compensate for the past component without using delay elements and DPD units. Nevertheless, if the function is designed based on an unnecessary time delay component, when the instantaneous allocation number exceeds 50 (for example, 100) RBs, the output of the DPD circuit causes unnecessary distortion.

[0083] Electronic devices (e.g. Figure 1The processor of the base station 110 of the electronic device may include various processing circuits and calculate the effective bandwidth of the input signal. The processor of the electronic device may determine the memory order of the DPD circuit based on the effective bandwidth. The memory order of the DPD circuit may refer to, for example, the number of activated DPD units among a plurality of DPD units of the DPD circuit. The activation of the DPD unit may be determined according to the on or off of the switch set between the DPD unit and the delay element. Regardless of the switch, the DPD unit (e.g., the first DPD unit 320-1) at the current time may always be activated. By performing pre-distortion based on the effective bandwidth using at least part of the DPD unit, the overfitting problem may be solved because the modeling is incorrect for the frequency interval in the operating channel to which the RB is not allocated at a specific time. In summary, at rated output (e.g., high traffic volume), the high-complexity DPD circuit may well compensate for the distortion characteristics of the PA. In the case of low traffic volume, the low-complexity DPD circuit reduces the calculation time of the pre-distortion, thereby improving the convergence speed. Therefore, the processor may be modeled by quickly responding to changes in the temperature, signal, environment, etc. of the power amplifier.

[0084] Figure 3 and Figure 4 The transmitting circuit described in the embodiment may include a DPD circuit and a calculation block. The time unit compensated by the DPD circuit (eg, Figure 3 Z -1 and Figure 4 Z -1 ) can be independent of the processor of the computation block to calculate the time unit of the function of the DPD circuit. For example, due to the time delay of the DPD circuit, the memory compensation delay unit (e.g., Figure 3 Z -1 and Figure 4 Z -1 ) and the update unit of the function determined by comparing the input and output of the power amplifier (e.g., the function corresponding to each tap) may have different synchronization. For another example, the delay unit of the memory compensation due to the time delay of the DPD circuit (e.g., Figure 3 Z -1 and Figure 4 Z -1 ) may have the same synchronization as an update unit for function determination (eg, coefficient determination of each term of a polynomial) of the DPD circuit.

[0085] According to an embodiment, the processor may calculate the resources allocated within the bandwidth (in other words, the effective bandwidth). According to an embodiment, the implementation of the DPD circuit of the present disclosure may be confirmed by recognizing that the memory order (i.e., the number of activated DPD units) changes as the resources allocated within a given bandwidth changes.

[0086] According to an embodiment, implementation of the DPD circuit of the present disclosure may be confirmed by identifying a nonlinear model of DPD, ie, a function (eg, coefficient of each term) applied to each of the activated DPD units changes as resources allocated within a given bandwidth change.

[0087] According to an embodiment, implementation of the DPD circuit of the present disclosure may be confirmed by identifying that the number of activated DPD units and the components of the function applied to each of the activated DPD units (e.g., the number of terms in a polynomial, the coefficient of each term) change as the resources allocated within a given bandwidth change.

[0088] According to an embodiment, a DPD circuit for memory compensation may include a switch disposed between each delay element and the DPD unit.

[0089] According to an embodiment, the processor may vary the number of DPD modeling complexity bins and the extent of each of the bins based on the effective bandwidth.

[0090] Figure 6 is a flowchart illustrating an example operation of an electronic device for DPD control based on resource allocation according to an embodiment. The operation of the electronic device may be performed by a processor or a communication device (eg, DPD, DAC, PA) equipped in the electronic device.

[0091] refer to Figure 6 , in operation S601, the electronic device may identify a channel bandwidth. The channel bandwidth may be a maximum allocatable frequency size. When a signal is sent using the entire channel bandwidth, the electronic device consumes a rated output power. At the rated output power, all RBs of a channel operating in the electronic device are allocated. According to an embodiment, the channel bandwidth may refer to an interval between a starting point and an end point of an operating channel. For example, the channel bandwidth may be 100 MHz. For another example, the channel bandwidth may be 20 MHz. According to an embodiment, the channel bandwidth may refer to a frequency domain corresponding to a maximum number of allocatable RBs.

[0092] In operation S603, the electronic device may identify one or more active DPD units based on the channel bandwidth and the amount of allocated resources. The electronic device may identify the size of the amount of allocated resources. The amount of allocated resources may refer to, for example, the size of the frequency resources to be used for actual transmission in the frequency resources within the channel bandwidth. The amount of allocated resources may refer to, for example, the frequency domain corresponding to the allocated RB within the channel bandwidth. The amount of allocated resources may be referred to as a transmission bandwidth, an active bandwidth, or an effective bandwidth.

[0093] The electronic device can calculate the effective bandwidth ratio based on the channel bandwidth and the amount of allocated resources. The effective bandwidth ratio can refer to, for example, the total allocated resources with respect to the channel bandwidth. How much frequency resources are used, in other words, the size of the bandwidth of the signal input to the power amplifier affects the degree of memory effect. Therefore, the electronic device can change the configuration of the DPD circuit based on the effective bandwidth ratio.

[0094] The electronic device may identify one or more active DPD units among a plurality of DPD units of a DPD circuit of a transmitting circuit based on an effective bandwidth ratio. The DPD circuit may include one or more delay elements and a DPD unit connected to each delay element to compensate for a memory effect. The memory order may be K (K≤N, N is the total number of DPD units). The memory order may be determined based on the effective bandwidth ratio. According to an embodiment, the electronic device may determine the memory order based on the effective bandwidth ratio. The electronic device may identify K fast DPD units in a time sequence among a plurality of DPD units. For example, the kth DPD unit may correspond to the following operations: (Here, k is an integer greater than or equal to 1 and less than or equal to K). According to an embodiment, the electronic device may determine the memory order corresponding to the range to which the effective bandwidth ratio belongs. For example, as shown in Equation 2, when the effective bandwidth ratio is less than a first threshold value (e.g., 0.5), the electronic device may perform pre-distortion using only a DPD unit for the current input without using a separate delay element. In this case, the memory order may be 1. At the same time, when the effective bandwidth ratio is greater than or equal to the first threshold value (e.g., 0.5) and less than the second threshold value, the electronic device may perform pre-distortion based on a predetermined number (e.g., j) of DPD units. In this case, the memory order may be j.

[0095] In operation S605, the electronic device may generate a DPD output signal based on one or more active DPD units. In the case where the structure of the current DPD circuit according to the activity state (e.g., active or inactive) of each DPD unit is different from the structure according to the identified one or more DPD units and other DPD units, the electronic device may generate a control signal for changing the DPD circuit structure. The electronic device may send the generated control signal to the DPD circuit.

[0096] The electronic device may activate one or more active DPD units of the DPD circuit. The electronic device may provide a control signal to the DPD circuit for activating each of the one or more active DPD units. According to an embodiment, the electronic device may use one control signal to activate each of the one or more active DPD units. According to an embodiment, the electronic device may use separate control signals to activate the DPD units separately.

[0097] The electronic device may deactivate at least one DPD unit of the plurality of DPD units of the DPD circuit that is different from the one or more active DPD units. The electronic device may provide a control signal to the DPD circuit for deactivating each of the one or more active DPD units. According to an embodiment, the electronic device may use one control signal to deactivate each of the one or more active DPD units. According to an embodiment, the electronic device may use separate control signals to deactivate the DPD units separately.

[0098] The electronic device may determine the function of the active DPD unit. The electronic device may provide each active DPD unit with information about the function to be applied in the active DPD unit. Determining the function of each DPD unit may be referred to as DPD modeling. DPD modeling may be performed based on the nonlinearity of the power amplifier. The electronic device may obtain an input signal of the power amplifier in order to specify the nonlinearity of the power amplifier. The input signal may be a digital signal. The electronic device may obtain a signal input to the DAC. The electronic device may obtain an output signal of the power amplifier in order to specify the nonlinearity of the power amplifier. The output signal may be fed back through a coupler connected to one end of the power amplifier. The fed back signal may pass through an ADC and may be converted into a digital signal. The electronic device may determine a function (e.g., the number and coefficients of terms of a polynomial) for compensation and predistortion of memory effects by comparing the input signal and the output signal of the power amplifier. Operations according to the function may be performed in a DPD unit corresponding to a specific time component.

[0099] In operation S605, the electronic device may generate a DPD output signal based on one or more active DPD units. The DPD circuit of the transmitting circuit may include multiple DPD units. Each DPD unit corresponds to a different time delay. The DPD circuit may include an FIR filter. Each label of the FIR filter may refer to, for example, a corresponding DPD unit in multiple DPD units. By using one or more active DPD units to generate a DPD output signal instead of using all DPD units to generate a DPD output signal, the electronic device can reach convergence in a faster time. Convergence may refer to, for example, a state in which the memory effect and nonlinear characteristics of a power amplifier are compensated to the greatest extent by calculating multiple DPD coefficients. When fewer DPD units are used, the amount of coefficients that the processor must calculate is reduced. Thus, the time to convergence is shortened because the time required for the processor to calculate the DPD coefficients once is reduced.

[0100] In operation S607, the electronic device may generate an amplifier output signal based on the DAC and the power amplifier. The output of the DPD circuit may be input to the DAC. The DAC may output an analog signal by converting the input signal. The analog signal as the output of the DAC may be input to the power amplifier by up-conversion. The electronic device may generate an output signal by providing the DPD output signal to the DAC and the power amplifier, the DPD output signal being the output of the DPD circuit. Although not in Figure 6 , but the electronic device can radiate the output signal into the air through a filter and an antenna.

[0101] Figure 7 is a diagram showing an example configuration of an electronic device including a transmitting circuit for DPD control based on resource allocation according to an embodiment. DPD control based on resource allocation may refer to, for example, activating at least one DPD unit of the DPD circuit for memory compensation and deactivating at least one other DPD unit based on the ratio of resources actually allocated within the channel bandwidth. Modeling may be performed only for resources actually allocated in the frequency domain, rather than always using all DPD units to compensate for the nonlinearity of the power amplifier. In low traffic, as the calculation time is reduced and the convergence speed is improved, modeling can quickly respond to changes in the temperature, environment, etc. of the power amplifier.

[0102] Electronic device 710 may include, for example but not limited to Figure 1 Meanwhile, unlike what is shown, the present disclosure does not exclude that the electronic device 710 may be Figure 1 The terminal 120 is implemented. Figures 1 to 6 The communication module mentioned includes the DPD circuit, and the electronic device including the same is also included in the embodiments of the present disclosure.

[0103] refer to Figure 7 , shows an example functional configuration of an electronic device 710. The electronic device 710 may include an antenna unit (e.g., including at least one antenna) 711, a filter unit (e.g., including at least one filter) 712, a radio frequency (RF) processing unit (e.g., including various circuits) 713, and a processor (e.g., including a processing circuit) 714.

[0104] The antenna unit 711 may include one or more antennas. The antenna performs a function for sending and receiving signals through a wireless channel. The antenna may include a radiator formed by a conductor or a conductive pattern formed on a substrate (e.g., a PCB). The antenna may radiate an up-converted signal on a wireless channel, or may obtain a signal radiated by another device. Each antenna may be referred to as an antenna element or an antenna device. In an embodiment, the antenna unit 711 may include an antenna array in which a plurality of antenna elements form an array. The antenna unit 711 may be electrically connected to the filter unit 712 via an RF signal line. The antenna unit 711 may be mounted on a PCB including a plurality of antenna elements. The PCB may include a plurality of RF signal lines connecting each antenna element and a filter of the filter unit 712. These RF signal lines may be referred to as a feed network.

[0105] The antenna unit 711 may provide the received signal to the filter unit 712, or may radiate the signal provided from the filter unit 712 into the air. The filter unit 712 may perform filtering to send a signal of a desired frequency. The filter unit 712 may perform a function of selectively identifying a frequency by forming resonance. The filter unit 712 may include at least one of a bandpass filter, a low-pass filter, a high-pass filter, or a band-stop filter. The filter unit 712 may include an RF circuit for obtaining a signal of a frequency band for transmission or a frequency band for reception. The filter unit 712 according to an embodiment may be electrically connected to the antenna unit 711 and the RF processing unit 713.

[0106] The RF processing unit 713 may include multiple RF paths. The RF path may be a unit of a path through which a signal received by an antenna or a signal radiated by an antenna passes. At least one RF path may be referred to as an RF chain. The RF chain may include multiple RF elements. The RF elements may include amplifiers, mixers, oscillators, DACs, ADCs, and the like. For example, the RF processing unit 713 may include a mixer for up-converting a transmit signal to a transmit frequency. The transmit path of the RF processing unit 713 may include a DAC, a mixer, an oscillator, and an amplifier. The receive path of the RF processing unit 713 may include an ADC, a mixer, an oscillator, and an LNA. The transmit path may also include a coupler (or combiner). In addition, for example, the RF processing unit 713 may include a mixer for down-converting an analog RF receive signal to a digital frequency. The receive path of the RF processing unit 713 may include a low noise amplifier (LNA), a mixer, an oscillator, and an ADC. The receive path may also include a coupler or an attenuator.

[0107] The RF components of the RF processing unit may be implemented in a PCB. The electronic device 710 may include a structure in which an antenna unit 711, a filter unit 712, and an RF processing unit 713 are stacked in this order. The antenna and RF components of the RF processing unit may be implemented on a PCB, and the filter may be repeatedly fastened between the PCB and the PCB to form multiple layers.

[0108] The processor 714 may include various processing circuits and control the overall operation of the electronic device 710. The processor 714 may include various modules for performing communications. Figure 7 One processor is shown in the figure, but the processor 714 may include multiple processors. The processor 714 may include a module for digital signal processing. For example, the processor 714 may include a component for controlling the DPD circuit (e.g., a baseband modem). For another example, the processor 714 may include a component for operating the DPD circuit (e.g., a chip). When sending data, the processor 714 generates complex symbols by encoding and modulating the transmitted bit sequence. In addition, for example, when receiving data, the processor 714 recovers the received bit sequence by demodulating and decoding the baseband signal. The processor 714 can perform the functions of the protocol stack required by the communication standard. In an embodiment, each DPD unit of the DPD circuit includes a circuit for performing a specified function.

[0109] exist Figure 7 In the embodiment, the functional configuration of the electronic device 710 is described as a device in which the antenna structure of the present disclosure can be utilized. However, Figure 7 The examples shown are based only on Figures 1 to 6 The embodiments of the present disclosure are described for utilizing example configurations of antenna structures, and the embodiments of the present disclosure are not limited to Figure 7 Therefore, antenna modules including antenna structures, communication devices with other configurations, and the antenna structures themselves may also be understood as embodiments of the present disclosure.

[0110] In a digital predistortion system, the coefficient of each DPD unit of the DPD circuit is adjusted. However, this coefficient adjustment is performed by modeling based on the difference between the input signal of the PA (e.g., the digital signal input to the DAC) and the output signal of the PA (e.g., the digital signal fed back by the coupler). However, instead of determining the coefficient for each DPD unit in all DPD units, the processor according to an embodiment of the present disclosure determines the function operation (e.g., coefficient) for each DPD unit in one or more DPD units as many as the required number (e.g., memory order). Here, the required number can be determined based on the effective bandwidth. One or more DPD units can be identified based on the effective bandwidth and the entire bandwidth. In other words, the processor according to the embodiment may not simply determine the parameters of the DPD circuit, but may adaptively identify the memory order (e.g., the number of activated DPD units) based on the allocated amount of resources, and may determine the function for each activated DPD unit and the coefficient of each term. Therefore, a DPD circuit that is most suitable for the actual amount of allocated resources can be configured.

[0111] According to various example embodiments, a method performed by an electronic device may include: identifying a channel bandwidth; identifying one or more active DPD cells including a circuit from a plurality of DPD cells of a digital predistortion (DPD) circuit based on the channel bandwidth and an amount of resources allocated within the channel bandwidth; generating a DPD output signal of the DPD circuit based on the one or more active DPD cells; generating an amplifier output signal based on the DPD output signal of the DPD circuit, a digital-to-analog converter (DAC), and a power amplifier (PA), wherein at least one DPD cell of the plurality of DPD cells of the DPD circuit that is different from the one or more DPD cells may be deactivated when the DPD output signal is generated.

[0112] According to example embodiments, the amount of allocated resources may be identified based on an input signal from the DPD circuit to the DAC.

[0113] According to an example embodiment, an input signal from a DPD circuit to a DAC may be used to obtain a number of samples having a power spectral density (PSD) greater than a threshold value. The amount of resources allocated may be identified based on a ratio of the number of samples having a power spectral density (PSD) greater than the threshold value relative to a fast Fourier transform (FFT) size multiplied by a sampling rate.

[0114] According to an example embodiment, one or more DPD units may be identified based on a ratio of an amount of allocated resources relative to a channel bandwidth.

[0115] According to an example embodiment, identifying one or more active DPD units may include identifying at least one first active DPD unit within a first range based on a ratio of an amount of allocated resources relative to a channel bandwidth. Identifying one or more active DPD units may include identifying at least one second active DPD unit within a second range higher than the first range based on a ratio of an amount of allocated resources relative to a channel bandwidth. The number of the at least one second active DPD unit may be greater than the number of the at least one first active DPD unit.

[0116] According to example embodiments, the DPD circuit may include a finite impulse response (FIR) filter. The length of the FIR filter may correspond to the number of the plurality of DPD units of the DPD circuit.

[0117] According to example embodiments, the method may further include generating a DPD output signal of the DPD circuit based on a plurality of DPD units of the DPD circuit without deactivated DPD units, based on resource blocks (RBs) corresponding to a size of a channel bandwidth being allocated.

[0118] According to example embodiments, among the one or more active DPD units, a coefficient of each DPD unit may be based on an input signal of the PA before generating a DPD output signal, an output signal of the PA before generating the DPD output signal, and the number of the one or more active DPD units.

[0119] According to an example embodiment, the number of terms of the polynomial of the function for each of the one or more active DPD units may be determined based on the amount of allocated resources.

[0120] According to example embodiments, the input signal of the PA may include an input signal of a DAC before the DPD output signal is generated. The output signal of the PA may include an output signal of an analog-to-digital converter (ADC) before the DPD output signal is generated.

[0121] According to an example embodiment, generating the DPD output signal includes sending to the DPD circuit at least one of: a control signal for turning on a switch corresponding to each of the one or more active DPD cells, or a control signal for turning off a switch corresponding to each of the at least one DPD cell.

[0122] According to various example embodiments, an electronic device may include: a processor; a digital predistortion (DPD) circuit; a digital-to-analog converter (DAC); and a power amplifier (PA). The processor may be configured to: identify a channel bandwidth; identify one or more active DPD units including a circuit from a plurality of DPD units of a digital predistortion (DPD) circuit based on the channel bandwidth and the amount of resources allocated within the channel bandwidth; control the DPD circuit to generate a DPD output signal based on the one or more active DPD units; generate an amplifier output signal based on the DPD output signal of the DPD circuit through a digital-to-analog converter (DAC) and a power amplifier (PA); wherein at least one DPD unit of the plurality of DPD units of the DPD circuit that is different from the one or more DPD units may be deactivated when the DPD output signal is generated.

[0123] According to example embodiments, the amount of allocated resources may be identified based on an input signal from the DPD circuit to the DAC.

[0124] According to an example embodiment, an input signal from a DPD circuit to a DAC may be used to obtain a number of samples having a power spectral density (PSD) greater than a threshold value. The amount of resources allocated may be identified based on a ratio of the number of samples having a power spectral density (PSD) greater than the threshold value relative to a fast Fourier transform (FFT) size multiplied by a sampling rate.

[0125] According to an example embodiment, one or more DPD units may be identified based on a ratio of an amount of allocated resources relative to a channel bandwidth.

[0126] According to an example embodiment, the processor may be configured to: identify one or more active DPD units, identify at least one first active DPD unit within a first range based on a ratio of an amount of allocated resources relative to a channel bandwidth; identify at least one second active DPD unit within a second range higher than the first range based on a ratio of an amount of allocated resources relative to a channel bandwidth, wherein the number of the at least one second active DPD unit may be greater than the number of the at least one first active DPD unit.

[0127] According to example embodiments, the DPD circuit may include a finite impulse response (FIR) filter. The length of the FIR filter may correspond to the number of the plurality of DPD units of the DPD circuit.

[0128] According to an example embodiment, the processor may be further configured to: control the DPD circuit to generate a DPD output signal based on a plurality of DPD units of the DPD circuit without deactivated DPD units based on resource blocks (RBs) corresponding to the size of the channel bandwidth being allocated.

[0129] According to example embodiments, among the one or more active DPD units, a coefficient of each DPD unit may be based on an input signal of the PA before generating a DPD output signal, an output signal of the PA before generating the DPD output signal, and the number of the one or more active DPD units.

[0130] According to an example embodiment, the number of terms of the polynomial of the function for each of the one or more active DPD units may be determined based on the amount of allocated resources.

[0131] According to example embodiments, the input signal of the PA may include an input signal of a DAC before the DPD output signal is generated. The output signal of the PA may include an output signal of an analog-to-digital converter (ADC) before the DPD output signal is generated.

[0132] According to an example embodiment, the processor may be configured to generate a DPD output signal, send to the DPD circuit at least one of: a control signal for turning on a switch corresponding to each of the one or more active DPD cells, or a control signal for turning off a switch corresponding to each of the at least one deactivated DPD cell.

[0133] The DPD circuit according to various example embodiments of the present disclosure can improve the nonlinear characteristics of the power amplifier and can compensate for the distortion components caused by the memory effect. The processor controlling the DPD circuit can calculate the parameters applied to the DPD circuit by comparing the input signal of the power amplifier with the coupled feedback signal. According to an embodiment, the processor can detect the effective bandwidth of the input signal. The processor can identify at least one active DPD unit among multiple DPD units of the DPD circuit based on the ratio of the effective bandwidth to the channel bandwidth. The processor can turn on the switch connected to each DPD unit in the at least one active DPD unit through a control signal. The DPD unit for the current input signal (which is the first DPD unit of the at least one active DPD unit) may not be connected to a separate switch. In other words, the first DPD unit is always active.

[0134] According to an embodiment, the processor may calculate parameters of a function operation (or multiplication of coefficients) to be applied to an active DPD unit. For example, the processor may calculate coefficients to be multiplied in each active DPD unit of a DPD circuit having an FIR filter structure. The parameter calculation process may be referred to as DPD modeling. An electronic device according to an embodiment may compensate for distortion components of a power amplifier by changing a memory order and a nonlinear model according to an effective bandwidth.

[0135] Since the electronic device according to the embodiment of the present disclosure determines the memory order of the DPD based on the effective bandwidth of the input signal, the problem of overfitting caused by incorrect modeling of the frequency segment of the operating channel to which the RB is not allocated can be solved. In particular, when using the rated output of the entire frequency band, a high-complexity DPD circuit is configured. Therefore, the DPD circuit can well compensate for the distortion characteristics of the power amplifier. At low traffic volume, a low-complexity DPD circuit is configured. In order to compensate for the relatively small memory effect, a small number of DPD units operate. Since the calculation time is reduced, the time for the output of the DPD circuit to converge is reduced. As a result, it is possible to model a transmitting circuit that quickly reflects changes in peripheral factors such as the temperature, signal, and environment of the power amplifier.

[0136] The methods according to the claims or the embodiments described in the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0137] When implemented as software, a computer-readable storage medium storing one or more programs (software modules) may be provided. One or more programs stored in the computer-readable storage medium are configured to be executed by one or more processors in an electronic device. The one or more programs include instructions that cause the electronic device to perform a method according to the embodiments described in the claims or the present disclosure.

[0138] Such programs (software modules, software) may be stored in random access memory, non-volatile memory including flash memory, read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic disk storage, compact disk ROM (CD-ROM), digital versatile disk (DVD) or other forms of optical storage, magnetic tape cassettes. In addition, the programs may be stored in a memory configured with some or all combinations thereof. In addition, each configured memory may include multiple.

[0139] In addition, the program can be stored in an attachable storage device that can be accessed through a communication network, such as the Internet, an intranet, a local area network (LAN), a wide area network (WAN), or a storage area network (SAN), or a combination thereof. Such a storage device can be connected to the device that performs the embodiments of the present disclosure through an external port. In addition, a separate storage device on a communication network can access the device that performs the embodiments of the present disclosure.

[0140] In the above-mentioned exemplary embodiments of the present disclosure, the components included in the present disclosure are expressed in the singular or plural, depending on the specific embodiment presented. However, for ease of explanation, the singular or plural expression is appropriately selected for the presented situation, and the present disclosure is not limited to singular or plural components, and even if a component is expressed in plural, it can also be configured with a singular, or even if it is expressed in a singular, it can also be configured with a plural.

[0141] Meanwhile, in the detailed description of the present disclosure, specific embodiments have been described, but it goes without saying that various modifications may be made within the limits not departing from the scope of the present disclosure.

Claims

1. A method performed by an electronic device, the method comprising: Identify channel bandwidth; identifying one or more active DPD units from a plurality of DPD units of a digital predistortion (DPD) circuit based on the channel bandwidth and an amount of resources allocated within the channel bandwidth; generating a DPD output signal of the DPD circuit based on the one or more active DPD cells; generating an amplifier output signal based on the DPD output signal of the DPD circuit, a digital-to-analog converter (DAC) and a power amplifier (PA), Wherein, when the DPD output signal is generated, at least one DPD unit among the plurality of DPD units of the DPD circuit that is different from the one or more active DPD units is deactivated.

2. The method according to claim 1, wherein: The amount of resources allocated is identified based on an input signal from the DPD circuit to the DAC.

3. The method according to claim 2, in, The input signal from the DPD circuit to the DAC is used to obtain the number of samples having a power spectral density greater than a threshold, and Wherein the amount of resources allocated is identified based on the multiplication of: a ratio of the number of samples having the power spectral density greater than the threshold relative to a Fast Fourier Transform (FFT) size, and Sampling rate.

4. The method according to claim 1, wherein: The one or more active DPD units are identified based on a ratio of an amount of allocated resources relative to a bandwidth of the channel.

5. The method according to claim 4, wherein: The identifying of the one or more active DPD units comprises: identifying at least one first active DPD unit based on a ratio of the amount of allocated resources relative to the channel bandwidth being within a first range; and identifying at least one second active DPD unit based on a ratio of the amount of allocated resources relative to the channel bandwidth being within a second range higher than the first range, and The number of the at least one second active DPD unit is greater than the number of the at least one first active DPD unit.

6. An electronic device comprising: processor; Digital pre-distortion (DPD) circuit; Digital-to-analog converters (DACs); and Power amplifier (PA), Wherein, the processor is configured to: Identify channel bandwidth; identifying one or more active digital predistortion (DPD) units from a plurality of DPD units of the DPD circuit based on the channel bandwidth and an amount of resources allocated within the channel bandwidth; controlling the DPD circuit to generate a DPD output signal of the DPD circuit based on the one or more active DPD cells; generating an amplifier output signal based on the DPD output signal of the DPD circuit by the DAC and the PA, Wherein, when the DPD output signal is generated, at least one DPD unit among the plurality of DPD units of the DPD circuit that is different from the one or more active DPD units is deactivated.

7. The electronic device according to claim 6, wherein: The amount of resources allocated is identified based on an input signal from the DPD circuit to the DAC.

8. The electronic device according to claim 7, in, The input signal from the DPD circuit to the DAC is used to obtain the number of samples having a power spectral density (PSD) greater than a threshold, and Wherein the amount of resources allocated is identified based on the multiplication of: a ratio of the number of samples having the power spectral density (PSD) greater than the threshold relative to a Fast Fourier Transform (FFT) size, and Sampling rate.

9. The electronic device according to claim 6, wherein: The one or more active DPD units are identified based on a ratio of an amount of allocated resources relative to a bandwidth of the channel.

10. The electronic device according to claim 9, wherein: To identify the one or more active DPD units, the processor is configured to: identifying at least one first active DPD unit based on a ratio of the amount of allocated resources relative to the channel bandwidth being within a first range, and identifying at least one second active DPD unit based on a ratio of the amount of allocated resources relative to the channel bandwidth being within a second range higher than the first range, and The number of the at least one second active DPD unit is greater than the number of the at least one first active DPD unit.

11. The electronic device according to claim 6, in, The DPD circuit includes a finite impulse response (FIR) filter, and The length of the FIR filter corresponds to the total number of DPD units in the plurality of DPD units of the DPD circuit.

12. The electronic device according to claim 6, wherein: The processor is further configured to: When resource blocks (RBs) corresponding to the size of the channel bandwidth are allocated, the DPD circuit is controlled to generate a DPD output signal of the DPD circuit based on the plurality of DPD units of the DPD circuit without deactivating the DPD units.

13. The electronic device according to claim 6, wherein: The number of terms of the polynomial of the function of each of the one or more active DPD units is determined based on the amount of allocated resources.

14. The electronic device according to claim 6, in, Before generating the DPD output signal, the input signal of the PA includes the input signal of the DAC, and Wherein, before generating the DPD output signal, the output signal of the PA includes an output signal of an analog-to-digital converter (ADC).

15. The electronic device according to claim 6, wherein: To generate the DPD output signal, the processor is configured to send at least one of the following to the DPD circuit: a control signal for turning on a switch corresponding to each of the one or more active DPD units, or A control signal is used to turn off a switch corresponding to each DPD unit in the at least one deactivated DPD unit.

Images