Endoscope control method, device, electronic device and storage medium

Abstract

The present invention discloses an endoscope control method, device, electronic device and storage medium. The endoscope in the endoscope control method includes a processing module and an analog camera, and the processing module and the analog camera are connected by a cable; the method includes: obtaining an analog image signal transmitted by the analog camera, performing signal conversion on the analog image signal, and obtaining interface image data and a first clock signal; determining the proportion of vertical stripes in the interface image data based on the interface image data; when the proportion of vertical stripes in the interface image data reaches a phase adjustment condition, performing phase adjustment on the first clock signal to obtain a second clock signal; transmitting the second clock signal to the analog camera, so that the analog camera transmits the analog image signal based on the second clock signal. The present invention realizes synchronous control of the processing module and the analog camera by phase adjustment of the clock signal, thereby avoiding the problem of vertical stripes caused by the excessively long pull wire distance of the analog camera.

Description

Technical Field

[0001] The present invention relates to the field of endoscope control technology, and in particular to an endoscope control method, device, electronic equipment and storage medium. Background Art

[0002] Currently, the processing module and analog camera of most medical endoscopes are connected by cables. However, if the cable distance of the endoscope analog camera is too long, vertical stripes will appear in the endoscope image. Summary of the Invention

[0003] The present invention provides an endoscope control method, device, electronic equipment and storage medium to solve the problem of vertical stripes caused by an overly long pull line distance of an analog camera.

[0004] According to one aspect of the present invention, a method for controlling an endoscope is provided, wherein the endoscope comprises a processing module and an analog camera, wherein the processing module and the analog camera are connected via a cable;

[0005] The method is applied to the processing module, including:

[0006] Acquire an analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal, and obtain interface image data and a first clock signal;

[0007] determining a ratio of vertical stripes in the interface image data based on the interface image data;

[0008] When the ratio of vertical stripes in the interface image data reaches the phase adjustment condition, the phase of the first clock signal is adjusted to obtain a second clock signal; the second clock signal is transmitted to the analog camera so that the analog camera transmits an analog image signal based on the second clock signal.

[0009] According to another aspect of the present invention, a method for controlling an endoscope is provided, wherein the endoscope comprises a processing module and an analog camera, wherein the processing module and the analog camera are connected via a cable;

[0010] The device is used in the processing module, comprising:

[0011] an analog image signal conversion submodule, configured to obtain the analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal, and obtain interface image data and a first clock signal;

[0012] a vertical stripe ratio determination submodule, configured to determine a ratio of vertical stripes in the interface image data based on the interface image data;

[0013] A phase adjustment submodule is used to adjust the phase of the first clock signal to obtain a second clock signal when the proportion of vertical stripes in the interface image data reaches a phase adjustment condition; and transmit the second clock signal to the analog camera so that the analog camera transmits an analog image signal based on the second clock signal.

[0014] According to another aspect of the present invention, an electronic device is provided, comprising:

[0015] at least one processor; and

[0016] a memory communicatively connected to the at least one processor; wherein,

[0017] The memory stores a computer program that can be executed by the at least one processor. The computer program is executed by the at least one processor to enable the at least one processor to perform the endoscope control method described in any embodiment of the present invention.

[0018] According to another aspect of the present invention, a computer-readable storage medium is provided, wherein the computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the endoscope control method according to any embodiment of the present invention when executed.

[0019] The technical solution of an embodiment of the present invention is to obtain an analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal, and obtain interface image data and a first clock signal; determine the ratio of vertical stripes in the interface image data based on the interface image data; when the ratio of vertical stripes in the interface image data meets a phase adjustment condition, perform phase adjustment on the first clock signal to obtain a second clock signal; and transmit the second clock signal to the analog camera, so that the analog camera transmits an analog image signal based on the second clock signal. By phase-adjusting the clock signal, the accuracy of the signal phase is ensured during signal transmission, achieving synchronous control of the processing module and the analog camera, and avoiding the problem of vertical stripes caused by the excessively long pull-wire distance of the analog camera.

[0020] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present invention, nor is it intended to limit the scope of the present invention. Other features of the present invention will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0022] Figure 1 This is a flow chart of an endoscope control method provided in Example 1 of the present invention;

[0023] Figure 2 This is a schematic structural diagram of an endoscope provided in Example 1 of the present invention;

[0024] Figure 3 This is a schematic structural diagram of an endoscope control device provided in a second embodiment of the present invention;

[0025] Figure 4 This is a structural diagram of an electronic device provided in Example 3 of the present invention. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of the present invention.

[0027] It should be noted that the terms "first clock signal", "second clock signal", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way are interchangeable where appropriate so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units that are not explicitly listed or are inherent to these processes, methods, products or devices.

[0028] Example 1

[0029] Figure 1This is a flowchart of an endoscope control method provided in embodiment 1 of the present invention. This embodiment is applicable to the situation where vertical stripes of the endoscope are removed by controlling the endoscope to adjust the clock phase. The method can be executed by an endoscope control device, which can be implemented in the form of hardware and / or software. The endoscope control device can be configured in the electronic equipment of the endoscope provided in the embodiment of the present invention.

[0030] Figure 2 FIG. 1 is a schematic structural diagram of an endoscope provided in the first embodiment of the present invention. Figure 2 As shown, the endoscope includes a processing module and an analog camera, wherein the processing module and the analog camera are connected by a cable; the processing module of the endoscope includes an image processing chip, a field programmable gate array (FPGA), a driving circuit and an analog-to-digital converter, wherein the image processing chip, the driving circuit and the analog-to-digital converter are all controlled by the FPGA; the analog camera includes an image sensor, and the image sensor transmits an analog image signal to the image processing chip. It should be noted that when the cable length between the processing module and the analog camera is greater than the preset length threshold, vertical stripes will be generated due to the excessive length of the analog camera. At this time, the endoscope control method provided by the present invention can be used to control the endoscope to remove the vertical stripes. The preset length threshold is determined by those skilled in the art based on experience and is not limited here. It is understandable that in some scenarios, vertical stripes may not be generated because the cable length between the processing module and the analog camera does not reach the preset length threshold.

[0031] like Figure 1 As shown, the method includes:

[0032] S110 , acquiring an analog image signal transmitted by the analog camera, performing signal conversion on the analog image signal, and obtaining interface image data and a first clock signal.

[0033] Wherein, the analog image signal is obtained by converting the optical image data. Specifically, the analog camera includes an image sensor, and the image sensor can convert the optical image into an analog image signal. Exemplary image sensors include but are not limited to OV6946, which is not limited here. In this embodiment, the analog camera obtains optical image data, converts the optical image data into an analog image signal, and transmits the analog image signal to the image processing chip of the processing module. The image processing chip of the processing module receives the analog image signal transmitted by the analog camera, and the image processing chip performs signal conversion on the analog image signal to obtain interface image data and a first clock signal. Wherein, the image processing chip includes but is not limited to OV426, which is not limited here. The analog image signal can be converted by the image processing chip to obtain interface image data and a first clock signal. The interface of the interface image data can be a digital video port (DVP), and the first clock signal is a clock signal corresponding to the interface image data.

[0034] It is understandable that before converting the analog image signal, the image processing chip needs to be initialized and configured so that it enters a normal working state.

[0035] S120: Determine the ratio of vertical stripes in the interface image data based on the interface image data.

[0036] After the image processing chip converts the interface image data and the first clock signal, the FPGA in the processing module samples the first clock signal to obtain the sampled first clock signal, and simultaneously collects the interface image data, and determines the proportion of vertical stripes in the interface image data based on the interface image data.

[0037] It should be noted that the first clock signal obtained by sampling has the same frequency and phase as the first clock signal output by the image processing chip.

[0038] On the basis of the above embodiment, optionally, determining the proportion of vertical stripes in the interface image data based on the interface image data includes: filtering the pixels of each row of the interface image data to obtain a filtered value of each pixel, and binarizing the filtered value of each pixel; and determining the proportion of vertical stripes in the interface image data based on the filtered value of each pixel after binarization.

[0039] In this embodiment, filtering can be performed on each row of the interface image data based on a filtering operator to obtain a filtered value for each pixel. Filtering operators include, but are not limited to, mean filtering operators, median filtering operators, Gaussian filtering operators, etc., which are not limited here.

[0040] For example, the filtering formula is:

[0041] F′(i, j)=f_lap*F(i, j)

[0042]

[0043] Among them, F′(i, j) represents the filtered value of the pixel in the i-th row and j-th column of the interface image data, f_lap represents the filtering operator, and F(i, j) represents the pixel in the i-th row and j-th column of the interface image data.

[0044] Furthermore, the filter value of each pixel is binarized based on a preset binarization threshold to obtain the filter value of each pixel after binarization. The preset binarization threshold is set by those skilled in the art according to needs and is not limited here.

[0045] For example, the binarization formula is:

[0046]

[0047] Among them, F th(i，j) represents the filtered value after binarization processing, th represents the preset binarization threshold, and F′(i, j) represents the filtered value of the pixel in the i-th row and j-th column of the interface image data.

[0048] Furthermore, the ratio of vertical stripes in the interface image data is determined according to the filter value of each pixel after the binarization process.

[0049] For example, the statistical formula for the vertical stripe ratio is:

[0050]

[0051] Among them, P represents the ratio of vertical stripes in the interface image data, F th(i，j) The filtered value after binarization processing, H*V represents the number of pixels of the interface image data.

[0052] S130. When the ratio of vertical stripes in the interface image data reaches a phase adjustment condition, perform phase adjustment on the first clock signal to obtain a second clock signal; transmit the second clock signal to the analog camera so that the analog camera transmits an analog image signal based on the second clock signal.

[0053] The second clock signal is the adjusted first clock signal. In this embodiment, the FPGA of the processing module determines the ratio of vertical stripes in the interface image data based on a phase adjustment condition. If the ratio of vertical stripes in the interface image data meets the phase adjustment condition, the phase of the sampled first clock signal is adjusted to obtain a second clock signal. The second clock signal is then transmitted to the analog camera, causing the analog camera to transmit an analog image signal based on the second clock signal.

[0054] On the basis of the above embodiment, optionally, when the ratio of vertical stripes in the interface image data reaches a phase adjustment condition, the phase of the first clock signal is adjusted to obtain a second clock signal, including: comparing the ratio of vertical stripes in the interface image data with a preset vertical stripe ratio threshold; if the ratio of vertical stripes in the interface image data is greater than the preset vertical stripe ratio threshold, the phase of the first clock signal is adjusted based on a reference signal to obtain a second clock signal.

[0055] The preset vertical stripe ratio threshold refers to the preset ratio of vertical stripes in the interface image data, which is set by those skilled in the art according to needs and is not limited here. In this embodiment, the FPGA of the processing module compares the ratio of vertical stripes in the interface image data with the preset vertical stripe ratio threshold. If the ratio of vertical stripes in the interface image data is greater than the preset vertical stripe ratio threshold, the phase of the sampled first clock signal is adjusted based on the reference signal to obtain a second clock signal; the second clock signal is transmitted to the analog camera, so that the analog camera transmits an analog image signal based on the second clock signal. The reference signal is a reference signal used to adjust the first clock signal. Specifically, the phase of the first clock signal is adjusted with reference to the reference signal.

[0056] In some embodiments, optionally, the method further includes: when the ratio of vertical stripes in the interface image data does not meet the phase adjustment condition, transmitting the first clock signal to the analog camera, so that the analog camera transmits an analog image signal based on the first clock signal.

[0057] In this embodiment, if the ratio of vertical stripes in the interface image data is less than or equal to a preset vertical stripe ratio threshold, the sampled first clock signal is transmitted to the analog camera, causing the analog camera to transmit an analog image signal based on the first clock signal. It will be understood that if the ratio of vertical stripes in the interface image data is less than or equal to the preset vertical stripe ratio threshold, this indicates that the impact of the vertical stripes on the image has not reached a level requiring phase adjustment, and therefore, no phase adjustment of the first clock signal is required.

[0058] The technical solution of this embodiment is to obtain the analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal to obtain interface image data and a first clock signal; determine the proportion of vertical stripes in the interface image data based on the interface image data; when the proportion of vertical stripes in the interface image data meets the phase adjustment condition, perform phase adjustment on the first clock signal to obtain a second clock signal; and transmit the second clock signal to the analog camera, so that the analog camera transmits the analog image signal based on the second clock signal. By phase-adjusting the clock signal, the accuracy of the signal phase is ensured during signal transmission, achieving synchronous control between the processing module and the analog camera, and avoiding the problem of vertical stripes caused by the excessively long pull-wire distance of the analog camera.

[0059] Based on the above embodiment, optionally, the processing module also includes a driving circuit to transmit the first clock signal or the second clock signal to the analog camera, including: adjusting the first clock signal or the second clock signal by controlling the driving circuit to obtain a target clock signal, and transmitting the target clock signal to the analog camera; the adjustment includes one or more of amplitude adjustment, frequency adjustment and waveform adjustment.

[0060] Before transmitting the first or second clock signal to the analog camera, the FPGA of the processing module can control the driver circuit to adjust the first or second clock signal to obtain a target clock signal, and then transmit the target clock signal to the analog camera. The target clock signal refers to the first or second clock signal after being adjusted by the driver circuit. In this embodiment, the driver circuit adjusts the first or second clock signal to balance the clock signal load, ensuring the stability and accuracy of clock signal transmission.

[0061] Based on the above embodiment, optionally, the method further includes: determining a maximum value of the target clock signal, and adjusting the driving strength of the driving circuit based on the maximum value of the target clock signal and a preset clock signal threshold.

[0062] In this embodiment, the FPGA of the processing module acquires a target clock signal via an analog-to-digital converter, determines the maximum value of the target clock signal, and adjusts the drive strength of the driver circuit based on the maximum value of the target clock signal and a preset clock signal threshold. The preset clock signal threshold is a threshold used to determine the adjustment method for the drive strength of the driver circuit. Specifically, the maximum value of the target clock signal can be compared with the preset clock signal threshold, and the drive strength adjustment method can be determined based on the comparison result of the maximum value of the target clock signal and the preset clock signal threshold.

[0063] On the basis of the above embodiment, optionally, the adjusting the driving strength of the driving circuit based on the maximum value of the target clock signal and the preset clock signal threshold includes: comparing the maximum value of the target clock signal with the preset clock signal threshold; if the preset clock signal threshold is greater than or equal to the maximum value of the target clock signal, determining the driving strength of the driving circuit based on the difference between the preset clock signal threshold and the maximum value of the target clock signal; if the preset clock signal threshold is less than the maximum value of the target clock signal, determining the driving strength of the driving circuit based on the sum of the preset clock signal threshold and the maximum value of the target clock signal.

[0064] Exemplarily, the calculation formula for drive strength is:

[0065]

[0066] Among them, ADC gain Indicates the driving strength, th ADC Indicates the preset clock signal threshold, Indicates the maximum value of the target clock signal.

[0067] This embodiment adjusts the driving strength of the driving circuit to balance the load of the first clock signal or the second clock signal transmitted to the analog camera, thereby ensuring the stability and accuracy of the clock signal transmission.

[0068] Example 2

[0069] Figure 3 FIG. 1 is a schematic diagram of the structure of an endoscope control device provided in the second embodiment of the present invention. Figure 3 As shown, the endoscope of the device includes a processing module 310 and an analog camera 320, and the processing module and the analog camera are connected via a cable.

[0070] The device is applied to the processing module 310 and includes:

[0071] The analog image signal conversion submodule 311 is configured to obtain the analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal, and obtain interface image data and a first clock signal;

[0072] A vertical stripe ratio determination submodule 312 is configured to determine a ratio of vertical stripes in the interface image data based on the interface image data;

[0073] The phase adjustment submodule 313 is used to adjust the phase of the first clock signal to obtain a second clock signal when the ratio of vertical stripes in the interface image data reaches the phase adjustment condition; and transmit the second clock signal to the analog camera so that the analog camera transmits an analog image signal based on the second clock signal.

[0074] The technical solution of this embodiment is to obtain the analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal to obtain interface image data and a first clock signal; determine the proportion of vertical stripes in the interface image data based on the interface image data; when the proportion of vertical stripes in the interface image data meets the phase adjustment condition, perform phase adjustment on the first clock signal to obtain a second clock signal; and transmit the second clock signal to the analog camera, so that the analog camera transmits the analog image signal based on the second clock signal. By phase-adjusting the clock signal, the accuracy of the signal phase is ensured during signal transmission, achieving synchronous control between the processing module and the analog camera, and avoiding the problem of vertical stripes caused by the excessively long pull-wire distance of the analog camera.

[0075] Based on the above embodiment, optionally, the vertical stripe ratio determination submodule 312 is specifically used to filter the pixels of each row of the interface image data to obtain the filter value of each pixel, and binarize the filter value of each pixel; and determine the ratio of vertical stripes in the interface image data based on the filter value of each pixel after binarization.

[0076] Based on the above embodiment, optionally, the phase adjustment submodule 313 is specifically used to compare the ratio of vertical stripes in the interface image data with a preset vertical stripe ratio threshold. If the ratio of vertical stripes in the interface image data is greater than the preset vertical stripe ratio threshold, the phase of the first clock signal is adjusted based on the reference signal to obtain a second clock signal.

[0077] Based on the above embodiment, optionally, the device also includes a first clock signal transmission module, which is used to transmit the first clock signal to the analog camera when the proportion of vertical stripes in the interface image data does not meet the phase adjustment condition, so that the analog camera transmits the analog image signal based on the first clock signal.

[0078] Based on the above embodiment, optionally, the processing module further includes a driving circuit, and the device further includes a clock signal adjustment module, which is used to adjust the first clock signal or the second clock signal by controlling the driving circuit to obtain a target clock signal, and transmit the target clock signal to the analog camera; the adjustment includes one or more of amplitude adjustment, frequency adjustment and waveform adjustment.

[0079] Based on the above embodiment, optionally, the device further includes a driving strength adjustment module for determining the maximum value of the target clock signal and adjusting the driving strength of the driving circuit based on the maximum value of the target clock signal and a preset clock signal threshold.

[0080] Based on the above embodiment, optionally, the driving strength adjustment module is specifically used to compare the maximum value of the target clock signal with the preset clock signal threshold; if the preset clock signal threshold is greater than or equal to the maximum value of the target clock signal, the driving strength of the driving circuit is determined based on the difference between the preset clock signal threshold and the maximum value of the target clock signal; if the preset clock signal threshold is less than the maximum value of the target clock signal, the driving strength of the driving circuit is determined based on the sum of the preset clock signal threshold and the maximum value of the target clock signal.

[0081] The endoscope control device provided in the embodiment of the present invention can execute the endoscope control method provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.

[0082] Example 3

[0083] Figure 4 1 is a structural diagram of an electronic device provided in Example 3 of the present invention. The electronic device 10 is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices (such as helmets, glasses, watches, etc.) and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present invention described and / or required herein.

[0084] like Figure 4As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12, a random access memory (RAM) 13, etc., which is communicatively connected to the at least one processor 11. The memory stores a computer program that can be executed by the at least one processor. The processor 11 can perform various appropriate actions and processes according to the computer program stored in the read-only memory (ROM) 12 or the computer program loaded from the storage unit 18 into the random access memory (RAM) 13. Various programs and data required for the operation of the electronic device 10 can also be stored in the RAM 13. The processor 11, ROM 12, and RAM 13 are connected to each other via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0085] Multiple components in the electronic device 10 are connected to the I / O interface 15, including an input unit 16, such as a keyboard, a mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a magnetic disk, an optical disk, etc.; and a communication unit 19, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information / data with other devices via a computer network such as the Internet and / or various telecommunication networks.

[0086] The processor 11 can be various general-purpose and / or specialized processing components with processing and computing capabilities. Some examples of the processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various specialized artificial intelligence (AI) computing chips, various processors that run machine learning model algorithms, a digital signal processor (DSP), and any appropriate processor, controller, microcontroller, etc. The processor 11 executes the various methods and processes described above, such as the endoscope control method.

[0087] In some embodiments, the endoscope control method can be implemented as a computer program tangibly embodied in a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on the electronic device 10 via the ROM 12 and / or the communication unit 19. When the computer program is loaded into the RAM 13 and executed by the processor 11, one or more steps of the endoscope control method described above can be performed. Alternatively, in other embodiments, the processor 11 can be configured to execute the endoscope control method in any other suitable manner (e.g., by means of firmware).

[0088] Various embodiments of the systems and techniques described herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), system-on-chip systems (SOCs), programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments can include being implemented in one or more computer programs that are executable and / or interpreted on a programmable system that includes at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.

[0089] The computer programs for implementing the endoscope control method of the present invention can be written in any combination of one or more programming languages. These computer programs can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that when the computer programs are executed by the processor, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The computer programs can be executed entirely on the machine, partially on the machine, as a stand-alone software package, partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0090] Example 4

[0091] Embodiment 4 of the present invention further provides a computer-readable storage medium storing computer instructions, the computer instructions being used to cause a processor to execute an endoscope control method, wherein the endoscope includes a processing module and an analog camera, the processing module and the analog camera being connected via a cable; the method is applied to the processing module, and includes:

[0092] Acquire an analog image signal transmitted by an analog camera, perform signal conversion on the analog image signal, and obtain interface image data and a first clock signal;

[0093] determining a ratio of vertical stripes in the interface image data based on the interface image data;

[0094] When the ratio of vertical stripes in the interface image data reaches the phase adjustment condition, the phase of the first clock signal is adjusted to obtain a second clock signal; the second clock signal is transmitted to the analog camera so that the analog camera transmits an analog image signal based on the second clock signal.

[0095] In the context of the present invention, computer-readable storage media can be tangible media that can contain or store a computer program for use with an instruction execution system, device or equipment or used in combination with an instruction execution system, device or equipment. Computer-readable storage media can include but are not limited to electronic, magnetic, optical, electromagnetic, infrared or semiconductor systems, devices or equipment, or any suitable combination of the foregoing. Alternatively, computer-readable storage media can be machine-readable signal media. More specific examples of machine-readable storage media can include electrical connections based on one or more lines, portable computer disks, hard disks, random access memories (RAM), read-only memories (ROM), erasable programmable read-only memories (EPROM or flash memory), optical fibers, portable compact disk read-only memories (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0096] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).

[0097] The systems and techniques described herein can be implemented in a computing system that includes back-end components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes front-end components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such back-end components, middleware components, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), a blockchain network, and the Internet.

[0098] A computing system may include clients and servers. The clients and servers are typically remote from each other and typically interact via a communication network. This client-server relationship arises through computer programs running on the respective computers, creating a client-server relationship. The server may be a cloud server, also known as a cloud computing server or cloud host. This server is a hosting product within the cloud computing service ecosystem that addresses the management difficulties and limited scalability of traditional physical hosting and VPS services.

[0099] It should be understood that the various forms of the processes shown above can be used to reorder, add, or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially, or in a different order, as long as the desired results of the technical solution of the present invention can be achieved. This is not limited herein.

[0100] The above specific embodiments do not limit the scope of protection of the present invention. Those skilled in the art will appreciate that various modifications, combinations, sub-combinations, and substitutions may be made based on design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention are intended to be included within the scope of protection of the present invention.

Claims

1. A method for controlling an endoscope, characterized in that: The endoscope includes a processing module and an analog camera, and the processing module and the analog camera are connected via a cable; The method is applied to the processing module, and removes endoscope vertical stripes by controlling the endoscope to adjust the clock phase, including: Acquire an analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal, and obtain interface image data and a first clock signal; Performing filtering processing on pixels of each row of the interface image data to obtain a filtering value of each pixel, and performing binarization processing on the filtering value of each pixel; Determining the proportion of vertical stripes in the interface image data based on the filtered value of each pixel after the binarization process; When the ratio of vertical stripes in the interface image data reaches the phase adjustment condition, the first clock signal is phase adjusted to obtain a second clock signal; the second clock signal is transmitted to the analog camera so that the analog camera transmits an analog image signal based on the second clock signal.

2. The method according to claim 1, characterized in that When the ratio of vertical stripes in the interface image data reaches a phase adjustment condition, performing phase adjustment on the first clock signal to obtain a second clock signal includes: The ratio of vertical stripes in the interface image data is compared with a preset vertical stripe ratio threshold. If the ratio of vertical stripes in the interface image data is greater than the preset vertical stripe ratio threshold, the phase of the first clock signal is adjusted based on the reference signal to obtain a second clock signal.

3. The method according to claim 1, characterized in that The method further comprises: When the ratio of vertical stripes in the interface image data does not meet the phase adjustment condition, the first clock signal is transmitted to the analog camera, so that the analog camera transmits an analog image signal based on the first clock signal.

4. The method according to claim 1 or 3, characterized in that The processing module further includes a driving circuit, which transmits the first clock signal or the second clock signal to the analog camera, including: The first clock signal or the second clock signal is adjusted by controlling the driving circuit to obtain a target clock signal, and the target clock signal is transmitted to the analog camera; the adjustment includes one or more of amplitude adjustment, frequency adjustment and waveform adjustment.

5. The method according to claim 4, characterized in that The method further comprises: A maximum value of the target clock signal is determined, and a driving strength of the driving circuit is adjusted based on the maximum value of the target clock signal and a preset clock signal threshold.

6. The method according to claim 5, characterized in that The adjusting the driving strength of the driving circuit based on the maximum value of the target clock signal and a preset clock signal threshold comprises: Comparing the maximum value of the target clock signal with the preset clock signal threshold; If the preset clock signal threshold is greater than or equal to the maximum value of the target clock signal, determining the driving strength of the driving circuit based on the difference between the preset clock signal threshold and the maximum value of the target clock signal; If the preset clock signal threshold is less than the maximum value of the target clock signal, the driving strength of the driving circuit is determined based on the sum of the preset clock signal threshold and the maximum value of the target clock signal.

7. An endoscope control device, characterized in that: The endoscope control device includes a processing module and an analog camera, and the processing module and the analog camera are connected via a cable; The device is used in the processing module to remove vertical stripes on an endoscope by controlling the endoscope to adjust the clock phase, and includes: an analog image signal conversion submodule, configured to obtain the analog image signal transmitted by the analog camera, perform signal conversion on the analog image signal, and obtain interface image data and a first clock signal; A vertical stripe ratio determination submodule is used to filter the pixels of each row of the interface image data to obtain a filter value of each pixel, and binarize the filter value of each pixel; determine the ratio of vertical stripes in the interface image data based on the filter value of each pixel after binarization; a phase adjustment submodule is used to adjust the phase of the first clock signal to obtain a second clock signal when the ratio of vertical stripes in the interface image data meets the phase adjustment condition; and transmit the second clock signal to the analog camera so that the analog camera transmits an analog image signal based on the second clock signal.

8. An electronic device, characterized in that: The electronic device comprises: at least one processor; and a memory communicatively connected to the at least one processor; wherein, The memory stores a computer program executable by the at least one processor. The computer program is executed by the at least one processor to enable the at least one processor to perform the endoscope control method according to any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that The computer-readable storage medium stores computer instructions, and the computer instructions are used to enable a processor to implement the endoscope control method according to any one of claims 1 to 6 when executed.

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