Display module inspection apparatus and display module inspection method using the same
By designing an inspection device for display modules that uses a waveform generator and a noise sensing unit to measure the wiring interference of the display module, the challenge of verifying the wiring interference characteristics of the display module is solved, and the effect of improving component reliability is achieved.
Patent Information
- Application Number
- CN202410959862.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-07-18
- Filing Date
- 2024-07-17
- Publication Date
- 2025-01-21
AI Technical Summary
Verifying the interference characteristics between the wiring of the display module is a challenge when developing and manufacturing the display module, affecting the reliability of the components.
A display module inspection device is designed, including a waveform generator and a noise sensing unit. The waveform generator generates a test signal and transmits it to the display module, while the noise sensing unit receives the test signal from the display module and calculates the capacitance value to measure the noise.
Through this device, defects can be effectively reduced and the degree of interference between the wiring of the display module can be measured, thereby improving component reliability.
Smart Images

Figure CN119339641A_ABST
Abstract
Description
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0002] This application claims the priority of Korean Patent Application No. 10-2023-0093006 filed in the Korean Intellectual Property Office on July 18, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field
[0003] Embodiments of the present disclosure described herein relate to a display module inspection apparatus, and more particularly, to a display module inspection apparatus capable of detecting interference between wirings and a display module inspection method using the same. Background Art
[0004] Display modules used in smartphones, TVs, monitors, etc. include various elements such as a display layer and a sensor layer. In the development and manufacturing process, a process of verifying interference characteristics between wirings of a display module respectively connected to elements for transmitting and receiving signals can be used to ensure the reliability of the elements. Summary of the invention
[0005] Embodiments of the present disclosure provide a display module inspection apparatus capable of reducing defects and measuring a degree of interference between wirings of a display module and a display module inspection method using the same.
[0006] According to an embodiment, a display module inspection device includes: a waveform generator configured to generate a first test signal and transmit the first test signal to the display module; and a noise sensing unit configured to receive a second test signal from the display module, wherein the second test signal indicates a mutual capacitance between multiple sensing electrodes of the display module, wherein the noise sensing unit is configured to calculate a capacitance value based on the mutual capacitance and the first test signal, and wherein the capacitance value indicates noise.
[0007] The noise sensing unit may output test data including a corresponding capacitance value for each channel formed by a plurality of sensing electrodes of the display module.
[0008] The noise sensing unit may identify a wiring of the display module corresponding to a channel corresponding to the noise.
[0009] According to an embodiment, a display module inspection device includes: an inspection board electrically connected to a display module, the display module including a sensor layer including a plurality of sensing electrodes; a waveform generator electrically connected to the inspection board and generating a first test signal and transmitting the first test signal to the display module; and a noise sensing unit electrically connected to the inspection board and receiving a second test signal from the display module. The second test signal indicates mutual capacitance between the plurality of sensing electrodes.
[0010] The display module may further include: a display layer; a data driver driving the display layer; a sensor driver chip driving the sensor layer; and a circuit board connected to the display layer.
[0011] The display module may further include: a first wiring disposed on the circuit board and electrically connected to the data driver; and a second wiring disposed on the circuit board and electrically connected between the sensor driver chip and the sensor layer.
[0012] The waveform generator may transmit the first test signal to the first wiring, and the noise sensing unit may receive the second test signal through the second wiring.
[0013] At least a portion of the first wiring may overlap at least a portion of the second wiring.
[0014] The noise sensing unit may calculate a capacitance value based on the mutual capacitance.
[0015] The noise sensing unit may output test data including a corresponding capacitance value for each channel formed by the plurality of sensing electrodes.
[0016] The noise sensing unit may detect noise of the sensor layer.
[0017] The noise sensing unit may be configured to calculate the color depending on the value of the capacitance.
[0018] The first test signal may be an analog data signal.
[0019] The first test signal may include a 1-1th test signal having a first frequency and a 1-2th test signal having a second frequency different from the first frequency.
[0020] According to an embodiment, a method for inspecting a display module includes: installing the display module on an inspection board, the display module including a display layer, a sensor layer including a plurality of sensing electrodes, a first wiring electrically connected to the display layer, and a second wiring electrically connected to the sensor layer; transmitting a first test signal to the first wiring by a waveform generator electrically connected to the inspection board; receiving a second test signal from the second wiring by a noise sensing unit electrically connected to the inspection board, the second test signal indicating mutual capacitance between the plurality of sensing electrodes; and detecting noise of the display module based on the second test signal by the noise sensing unit.
[0021] Detecting the noise may include calculating, by the noise sensing unit, a capacitance value based on the mutual capacitance.
[0022] Detecting the noise may include outputting, by a noise sensing unit, test data including a capacitance value for each channel formed by a plurality of sensing electrodes.
[0023] Detecting the noise may include displaying the capacitance value in a color depending on the capacitance value.
[0024] Transmitting the first test signal may include: outputting a 1-1th test signal having a first frequency to the first wiring; and outputting a 1-2th test signal having a second frequency different from the first frequency to the first wiring.
[0025] Detecting the noise may include detecting the noise of the sensor layer when determining that the capacitance value is different from an expected value of a given first test signal transmitted to the first wiring. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The above and other objects and features of the present disclosure will become apparent by describing in detail embodiments of the present disclosure with reference to the attached drawings.
[0027] Figure 1 is a schematic diagram showing a display module inspection device according to an embodiment of the present disclosure.
[0028] Figure 2 is a cross-sectional view of a display module according to an embodiment of the present disclosure.
[0029] Figure 3 is a plan view showing a portion of a display module according to an embodiment of the present disclosure.
[0030] Figure 4 is a plan view of a sensor layer according to an embodiment of the present disclosure.
[0031] Figure 5 According to an embodiment of the present disclosure, by enlarging Figure 3 The plane diagram of the area AA' is obtained.
[0032] Figure 6 The present invention is shown in the embodiment of the present invention. Figure 3 An exploded perspective view of area AA'.
[0033] Figure 7 is a flowchart illustrating a display module inspection method according to an embodiment of the present disclosure.
[0034] Figure 8 Test data according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION
[0035] In this specification, the expression that a first component (or region, layer, portion, part, etc.) is "on", "connected to" or "coupled to" a second component means that the first component may be directly on, directly connected to or directly coupled to the second component, or a third component may be interposed between the first component and the second component. The expression that a first component is "directly disposed on", "directly connected to" or "directly coupled to" a second component means that no third component is interposed between the first component and the second component.
[0036] The same reference numerals represent the same components. In addition, in the drawings, the thickness, proportion and size of the components may be exaggerated for the effect of describing the technical content. The expression "and / or" may include one or more combinations of components that can be defined to be associated.
[0037] Although the terms "first", "second", etc. may be used to describe various components, the components should not be interpreted as being limited by these terms. These terms may be used to distinguish one component from another component. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component without departing from the scope and spirit of the present disclosure. The articles "a", "an", and "the" are singular because they have a single referent, but the use of the singular form in this specification should not exclude the presence of more than one referent.
[0038] In addition, the terms "lower", "below", "upper", "above", etc. may be used to describe the relationship between components shown in the drawings. These terms are relative and are described with reference to the directions shown in the drawings.
[0039] It will be understood that the terms “includes,” “comprising,” “having,” etc. indicate the presence or a combination of features, numbers, steps, operations, elements or parts described in the specification, and do not exclude the presence or additional possibility of one or more other features, numbers, steps, operations, elements or parts, or a combination thereof.
[0040] Unless otherwise defined, all terms (including technical terms and scientific terms) used in the specification have the same meaning as commonly understood by a person skilled in the art to which the present disclosure belongs. In addition, terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the relevant technology, and should not be interpreted in an idealized or overly formalized meaning unless explicitly defined herein.
[0041] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.
[0042] Figure 1is a schematic diagram showing a display module inspection device according to an embodiment of the present disclosure.
[0043] refer to Figure 1 , the display module DM may be a device that is activated depending on an electrical signal. The display module DM may be implemented in various devices. For example, in addition to large electronic devices such as televisions, monitors, or external billboards, the display module DM may be used in medium and small electronic devices such as personal computers, notebook computers, personal digital terminals, car navigation units, game consoles, portable electronic devices, or cameras. These are non-limiting examples, and without departing from the concept of the present disclosure, the display module DM may be implemented in various other (multiple) electronic devices.
[0044] The display module DM may have a surface defined by a first direction DR1 and a second direction DR2 intersecting the first direction DR1. The display module DM may have a thickness in a third direction DR3. The third direction DR3 may intersect the first direction DR1 and the second direction DR2. For example, the third direction DR3 may be perpendicular to the surface defined by the first direction DR1 and the second direction DR2.
[0045] The display module inspection device DID may be used to inspect whether one or more functions of the inspection target are working. For example, the display module inspection device DID may quantitatively measure interference characteristics between wirings that may be respectively connected to elements of the display module DM to transmit and receive signals.
[0046] The display module inspection device DID may include an inspection board IB, a waveform generator WG, and a noise sensing unit ND.
[0047] The inspection board IB may be a board on which an inspection target may be placed. For example, the inspection target may include a display module DM. The inspection board IB may be electrically connected to the display module DM.
[0048] The inspection board IB may include a first connector CN1, a second connector CN2, and a third connector CN3. The display module DM may be connected to the display module DM through the connector CNT (see also Figure 3 ) is connected to the first connector CN1 of the inspection board IB.
[0049] The first connector CN1 may deliver a signal to the display module DM or may receive a signal provided from the display module DM. The first connector CN1 may be electrically connected to one or more of the second connector CN2 and the third connector CN3.
[0050] The waveform generator WG may be electrically connected to the inspection board IB through the second connector CN2. The waveform generator WG may generate the first test signal SG1. For example, the waveform generator WG may include a function generator and an arbitrary waveform generator.
[0051] The waveform generator WG may transmit the first test signal SG1 to the display module DM. The waveform generator WG may transmit the first test signal SG1 to the display module DM through the second connector CN2 and the first connector CN1.
[0052] The noise sensing unit ND may be electrically connected to the inspection board IB through the third connector CN3. The noise sensing unit ND may receive the second test signal SG2 from the display module DM. The noise sensing unit ND may receive the second test signal SG2 from the display module DM through the first connector CN1 and the third connector CN3. The noise sensing unit ND may sense the noise of the display module DM based on the second test signal SG2. The noise sensing unit ND may display the test data TSD to an external user through the display unit DS (see Figure 8 ).
[0053] Figure 2 is a cross-sectional view of a display module according to an embodiment of the present disclosure.
[0054] refer to Figure 2 , the display module DM may include a display layer 100 and a sensor layer 200 .
[0055] The display layer 100 may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 , and an encapsulation layer 140 .
[0056] The base layer 110 may be a member providing a base surface on which the circuit layer 120 may be disposed. The base layer 110 may be a glass substrate, a metal substrate, a polymer substrate, etc. However, the present disclosure is not limited thereto, and the base layer 110 may be an inorganic layer, an organic layer, or a composite material layer.
[0057] The base layer 110 may have a multi-layer structure. For example, the base layer 110 may include a first synthetic resin layer, a silicon oxide (SiO x ) layer, an amorphous silicon (a-Si) layer disposed on the silicon oxide layer, and a second synthetic resin layer disposed on the amorphous silicon layer. The silicon oxide layer and the amorphous silicon layer may be referred to as a "base barrier layer".
[0058] Each of the first synthetic resin layer and the second synthetic resin layer may include a polyimide-based resin. In addition, each of the first synthetic resin layer and the second synthetic resin layer may include at least one of an acrylate-based resin, a methacrylate-based resin, a polyisoprene-based resin, a vinyl-based resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, or a perylene-based resin. According to the definition, the "~~"-based resin in this specification refers to a functional group including "~~".
[0059] The circuit layer 120 may be disposed on the base layer 110. The circuit layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal wiring. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base layer 110 in a manner such as coating, evaporation, etc. The insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by, for example, performing a photolithography process multiple times. The semiconductor pattern, the conductive pattern, and the signal wiring included in the circuit layer 120 may be formed by a patterning process.
[0060] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a light emitting element. For example, the light emitting element layer 130 may include an organic light emitting material, a quantum dot, a quantum rod, a micro LED (light emitting diode), or a nano LED.
[0061] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 from foreign substances such as moisture, oxygen, and dust particles.
[0062] The sensor layer 200 may be disposed on the display layer 100. The sensor layer 200 may sense an external input applied from the outside. The external input may be a user input. The user input may include various types of external inputs such as an input applied by a part of the user's body (e.g., a finger touch), light, heat, an input applied by a pen, pressure, etc.
[0063] The sensor layer 200 may be formed on the display layer 100 through a continuous process. In this case, the sensor layer 200 may appear to be directly disposed on the display layer 100. That is, a third component may not be interposed between the sensor layer 200 and the display layer 100. For example, a separate adhesive member may not be interposed between the sensor layer 200 and the display layer 100. Alternatively, the sensor layer 200 may be coupled to the display layer 100 through an adhesive member. The adhesive member may include a general adhesive or a general adhesive.
[0064] The display module DM may have touch performance. The touch performance may be related to characteristics such as touch accuracy, repeatability, or delay. The touch performance is not limited to these examples, and other measurements of touch performance may be considered. Depending on the implementation, one or more of these characteristics may be affected by noise.
[0065] Although not shown in the drawings, the display module DM may further include an anti-reflection layer and / or an optical layer that may be disposed on the sensor layer 200. The anti-reflection layer may reduce the reflectivity of external light incident from the outside of the display module DM. The optical layer may improve the front brightness of the display module DM by controlling the direction of light incident from the display layer 100.
[0066] Figure 3 is a plan view showing a portion of a display module according to an embodiment of the present disclosure.
[0067] refer to Figure 2 and Figure 3 , the display module DM may include a display layer 100 , a power pattern VDD, a data driver DIC, a circuit board CF, a sensor driver chip 200C, a first wiring L1 , a second wiring L2 , and a connector CNT.
[0068] The display area DP-DA and the peripheral area DP-NDA adjacent to the display area DP-DA may be defined in the display layer 100. The display area DP-DA may be an area in which an image is displayed. A plurality of pixels PX may be positioned in the display area DP-DA. The peripheral area DP-NDA may be an area in which a driving circuit or a driving wiring is disposed. The peripheral area DP-NDA may be disposed at the periphery of the display area DP-DA.
[0069] The display layer 100 may include a base layer 110 , a plurality of pixels PX, a plurality of signal wirings GL, DL, PL, and EL, a plurality of display pads P1 and P2 , and a plurality of sensing pads PDT.
[0070] Each of the plurality of pixels PX may display a primary color or a mixed color. Different pixels PX in the plurality of pixels PX may display different colors (e.g., different primary colors). The primary colors may include red, green, or blue. The mixed colors may include various colors such as white, yellow, cyan, or magenta. However, the colors displayed by each of the pixels PX are not limited thereto.
[0071] A plurality of signal wirings GL, DL, PL, and EL may be provided on the base layer 110. The plurality of signal wirings GL, DL, PL, and EL may be connected to a plurality of pixels PX to deliver electrical signals to the plurality of pixels PX. The plurality of signal wirings GL, DL, PL, and EL may include a plurality of scan wirings GL, a plurality of data wirings DL, a plurality of power lines PL, and a plurality of emission control wirings EL. However, this is an example, and the configuration of the plurality of signal wirings GL, DL, PL, and EL according to an embodiment of the present disclosure is not limited thereto. For example, the plurality of signal wirings GL, DL, PL, and EL according to an embodiment of the present disclosure may further include an initialization voltage wiring.
[0072] The power pattern VDD may be disposed in the peripheral area DP-NDA. The power pattern VDD may be connected to a plurality of power lines PL. Each of the plurality of pixels PX may receive a power supply voltage ELVDD provided by the power line PL.
[0073] A plurality of display pads P1 and P2 may be positioned in the peripheral area DP-NDA. The plurality of display pads P1 and P2 may include a first pad P1 and a second pad P2. The plurality of first pads P1 may be connected to a plurality of data wirings DL, respectively. The second pad P2 may be connected to a power pattern VDD and may be electrically connected to a plurality of power lines PL. The display module DM may provide electrical signals from the plurality of display pads P1 and P2 to the plurality of pixels PX. In addition to the first pad P1 and the second pad P2, the plurality of display pads P1 and P2 may further include pads for receiving other electrical signals. The plurality of display pads P1 and P2 may be configured differently, and embodiments are not limited to any specific example described herein.
[0074] The data driver DIC may be disposed in the peripheral area DP-NDA. The data driver DIC may be a timing control circuit in the form of a chip. The data driver DIC may output grayscale voltages to a plurality of data wirings DL in response to frame data of image data. The plurality of data wirings DL may be electrically connected to a plurality of first pads P1 via the data driver DIC, respectively. However, this is an example, and the data driver DIC may be implemented differently. For example, the data driver DIC according to an embodiment of the present disclosure may be disposed on a film separated from the display layer 100. In this example, the data driver DIC may be electrically connected to a plurality of display pads P1 and P2 through the film.
[0075] A plurality of sensing pads PDT may be positioned in the peripheral area DP-NDA. The plurality of sensing pads PDT may be electrically connected to the sensor layer 200 (see Figure 2 ). The plurality of sensing pads PDT may include a plurality of first sensing pads TD1 and a plurality of second sensing pads TD2.
[0076] The circuit board CF may be electrically connected to the plurality of display pads P1 and P2 and the plurality of sensing pads PDT.
[0077] The sensor driver chip 200C may be disposed on the circuit board CF. The sensor driver chip 200C may be electrically connected to a plurality of sensing pads PDT.
[0078] The first wiring L1 may be electrically connected to the data driver DIC. For example, the first wiring L1 may be connected between the connector CNT and the plurality of display pads P1 and P2. The first wiring L1 may transmit and receive a data signal DATA. The data signal DATA may be referred to as a "MIPI signal". The first wiring L1 may be disposed on a circuit board CF. The first wiring L1 may be referred to as a "MIPI wiring".
[0079] The second wiring L2 may be electrically connected between the sensor layer 200 and the sensor driver chip 200C. For example, the second wiring L2 may be connected between the sensor driver chip 200C and a plurality of sensing pads PDT. The second wiring L2 may be provided with a touch transmission signal TX and a touch reception signal RX. The sensor driver chip 200C may transmit the touch transmission signal TX to a plurality of first sensing pads TD1 via the second wiring L2. The sensor driver chip 200C may receive a touch reception signal RX from a plurality of first sensing pads TD1 via the second wiring L2. The second wiring L2 may be provided on the circuit board CF.
[0080] like Figure 3 As shown in , the first wiring L1 may intersect with the second wiring L2. The first wiring L1 may intersect with the second wiring L2 at area AA'. That is, the touch transmission signal TX and / or the touch reception signal RX may be transmitted on the second wiring L2, and the data signal DATA may be transmitted on the first wiring L1 substantially at the same time. In some cases, the data signal DATA may interfere with the touch transmission signal TX and / or the touch reception signal RX. Interference can be detected as noise in the touch reception signal RX, which can be measured as an interference characteristic. It should be understood that interference may occur in the area where the lines intersect, or may occur in another area. For example, interference may occur when different lines are very close to each other.
[0081] The connector CNT may be electrically connected to each of the first wiring L1 and the second wiring L2. The connector CNT may be provided on the circuit board CF. In a display device including the display module DM, the connector CNT may be connected to a host processor.
[0082] The host processor may include one or more of a central processing unit (CPU) and an application processor. The host processor may also include one or more of a graphics processing unit (GPU), a communication processor (CP), and an image signal processor (ISP). The host processor may also include a neural processing unit (NPU). The NPU may be a processor dedicated to processing an artificial intelligence model, and the artificial intelligence model may be generated by machine learning. The artificial intelligence model may include multiple artificial neural network layers. The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), and a deep Q network, or a combination of two or more of the above networks, but is not limited to the above examples. In addition to the hardware structure, the artificial intelligence model may additionally or optionally include a software structure. The above-mentioned at least two elements such as two processing units, two processors, or a processing unit and a processor may be implemented as an integrated configuration (e.g., a single chip). Optionally, each of the above-mentioned processing units and processors may be implemented as an independent configuration (e.g., multiple chips).
[0083] Figure 4 is a plan view of a sensor layer according to an embodiment of the present disclosure.
[0084] refer to Figure 3 and Figure 4 , the sensor layer 200 may include an active area AR and a peripheral area NAR adjacent to the active area AR. The peripheral area NAR may be disposed at the periphery of the active area AR. The active area AR may be activated according to an electrical signal. The active area AR may be an area in which an input is sensed. The active area AR may overlap with the display area DP-DA of the display layer 100. The peripheral area NAR may overlap with the peripheral area DP-NDA of the display layer 100. A portion of the active area AR may overlap with the peripheral area DP-NDA of the display layer 100. Similarly, a portion of the peripheral area NAR may overlap with the display area DP-DA of the display layer 100.
[0085] The sensor layer 200 may include a base layer 201, a plurality of sensing electrodes SP, and a plurality of sensing lines TL1 and TL2. A plurality of first sensing electrodes TE1 and a plurality of second sensing electrodes TE2 may be disposed in the active region AR, and a plurality of sensing lines TL1 and TL2 may be disposed in the peripheral region NAR.
[0086] The base layer 201 may be an inorganic layer including one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer 201 may be an organic layer including epoxy resin, acrylate resin, or imide-based resin. The base layer 201 may be directly formed on the display layer 100. Alternatively, an adhesive member may be provided between the base layer 201 and the display layer 100. Thus, the base layer 201 and the display layer 100 may be coupled.
[0087] The plurality of sensing electrodes SP may include a plurality of first sensing electrodes TE1 and a plurality of second sensing electrodes TE2. An input sensing layer (not shown) may obtain information about external input through changes in capacitance between the plurality of first sensing electrodes TE1 and the plurality of second sensing electrodes TE2.
[0088] Each of the plurality of first sensing electrodes TE1 may extend in the first direction DR1, and the plurality of first sensing electrodes TE1 may be arranged in the second direction DR2. For example, the plurality of first sensing electrodes TE1 may be arranged in a row extending in the first direction DR1. Each of the plurality of first sensing electrodes TE1 may include a plurality of first portions SP1 and a plurality of second portions BSP1. Each of the plurality of second portions BSP1 may electrically connect adjacent first portions SP1. For example, the second portion BSP1 may electrically connect two first portions SP1 adjacent to each other in the first direction DR1. The plurality of first portions SP1 and the plurality of second portions BSP1 may have a grid structure. The plurality of first portions SP1 may be referred to as “a plurality of first sensing units SP1”. The plurality of second portions BSP1 may be referred to as “a plurality of first connection units BSP1”.
[0089] Each of the plurality of second sensing electrodes TE2 may extend in the second direction DR2, and the plurality of second sensing electrodes TE2 may be arranged in the first direction DR1. For example, the plurality of second sensing electrodes TE2 may be arranged in a column extending in the second direction DR2. Each of the plurality of second sensing electrodes TE2 may include a plurality of sensing patterns SP2 and a plurality of bridge patterns BSP2. Each of the plurality of bridge patterns BSP2 may electrically connect adjacent sensing patterns SP2. For example, the bridge pattern BSP2 may electrically connect two sensing patterns SP2 that are adjacent to each other in the first direction DR1. The plurality of sensing patterns SP2 may have a grid structure. The plurality of sensing patterns SP2 may be referred to as “a plurality of second sensing units SP2”. The plurality of bridge patterns BSP2 may be referred to as “a plurality of second connection units BSP2”.
[0090] The plurality of second portions BSP1 may be disposed on a layer different from the layer on which the plurality of bridge patterns BSP2 are disposed. In a plan view, the plurality of bridge patterns BSP2 may intersect the plurality of second portions BSP1. The plurality of second portions BSP1 may intersect the plurality of bridge patterns BSP2 and be insulated from the plurality of bridge patterns BSP2.
[0091] The plurality of sensing lines TL1 and TL2 may include a plurality of first sensing lines TL1 and a plurality of second sensing lines TL2. The plurality of first sensing lines TL1 may be electrically connected to a plurality of first sensing electrodes TE1. For example, the plurality of first sensing lines TL1 may be electrically connected to a row of a plurality of first sensing units SP1 extending in a first direction DR1. The plurality of second sensing lines TL2 may be electrically connected to a plurality of second sensing electrodes TE2, respectively. For example, the plurality of second sensing lines TL2 may be electrically connected to a column of a plurality of second sensing units SP2 extending in a second direction DR2.
[0092] The plurality of first sensing lines TL1 may be electrically connected to the plurality of first sensing pads TD1 through contact holes, respectively. The plurality of second sensing lines TL2 may be electrically connected to the plurality of second sensing pads TD2 through contact holes, respectively.
[0093] Figure 5 According to an embodiment of the present disclosure, by enlarging Figure 3 The plane diagram of the area AA' is obtained. Figure 6 The present invention is shown in the embodiment of the present invention. Figure 3 An exploded perspective view of area AA'.
[0094] refer to Figure 5 and Figure 6 , the first wiring L1 and the second wiring L2 may be disposed on the circuit board CF. For example, the second wiring L2 may be disposed on the circuit board CF, and the first wiring L1 may be disposed on the second wiring L2. The first wiring L1 and the second wiring L2 may be spaced apart from each other in the third direction DR3. When viewed from above in a plan view, a portion of the first wiring L1 may overlap a portion of the second wiring L2.
[0095] Display module DM (see Figure 3 ) may also include a first ground layer GND-1 and a second ground layer GND-2 (see Figure 6 ). The first ground layer GND-1 and the second ground layer GND-2 may also be provided on the circuit board CF. For example, the second wiring L2 may be provided on the circuit board CF; the second ground layer GND-2 may be provided on the second wiring L2; the first ground layer GND-1 may be provided on the second ground layer GND-2; and the first wiring L1 may be provided on the first ground layer GND-1.
[0096] The first ground layer GND-1 may be inserted between the second ground layer GND-2 and the first wiring L1. The first ground layer GND-1 may be placed to reduce or minimize interference between the first wiring L1 and the second wiring L2. The first ground layer GND-1 may have a mesh structure for impedance matching of the first wiring L1. The first ground layer GND-1 is not limited to any specific structure, and the shape of the first ground layer GND-1 may be configured differently. According to an embodiment, the first ground layer GND-1 may be omitted.
[0097] The second ground layer GND-2 may be inserted between the first ground layer GND-1 and the second wiring L2. The second ground layer GND-2 may be arranged to reduce or minimize interference between the first wiring L1 and the second wiring L2. The second ground layer GND-2 may have a solid plate structure. The second ground layer GND-2 is not limited to any specific structure, and the structure of the second ground layer GND-2 may be configured differently. According to an embodiment, the second ground layer GND-2 may be omitted.
[0098] When at least one of the first ground layer GND-1 and the second ground layer GND-2 is omitted, interference may be generated by an interference capacitor formed between the first wiring L1 and the second wiring L2 overlapping each other in a plan view. Figure 1 ) can detect the display module DM (see Figure 1 ) noise. Noise sensing unit ND (see Figure 1 ) can quantitatively measure noise, which can be a disturbance characteristic. Therefore, in the sensor layer 200 (see Figure 2 ) and the first wiring L1 and the second wiring L2 associated with the noise occurring in the circuit board CF and the reduction of the touch performance can be determined by the noise sensing unit ND. Therefore, the structure or arrangement of the first wiring L1 and / or the second wiring L2 provided on the circuit board CF can be redesigned to achieve an improved structure that can reduce or eliminate the noise. Therefore, it is possible to provide a display module inspection device DID (see FIG. 1 ) having an improved ability to reliably inspect the display module DM. Figure 1 ) and for checking the display module DM by using the same (see Figure 1 ) method.
[0099] Figure 7 is a flowchart illustrating a display module inspection method according to an embodiment of the present disclosure.
[0100] refer to Figures 1 to 7The display module DM may be mounted on the inspection board IB (S100). The display module DM may include a display layer 100, a sensor layer 200 including a plurality of sensing electrodes SP, a first wiring L1 electrically connected to the display layer 100, and a second wiring L2 electrically connected to the sensor layer 200.
[0101] The waveform generator WG may transmit the first test signal SG1 to the first wiring L1 ( S200 ).
[0102] The first test signal SG1 may be provided to the display module DM as a data signal DATA, and more specifically as a MIPI signal. That is, the first test signal SG1 may be provided to the display module DM as an analog data signal. The first test signal SG1 may include a 1-1 test signal having a first frequency and a 1-2 test signal having a second frequency different from the first frequency. In other words, the waveform generator WG may generate the first test signal SG1 having frequencies different from each other.
[0103] According to an embodiment of the present disclosure, the display module inspection device DID may control the frequency of the first test signal SG1 provided to the display module DM. The display module inspection device DID may detect noise generated in response to a touch input depending on the frequency of the MIPI signal. The noise sensing unit ND (see Figure 1 ) can quantitatively measure noise as an interference characteristic under certain conditions. Noise can be detected as a deviation from an expected signal given some input (e.g., the frequency of the first test signal SG1). For example, noise can be detected on a channel corresponding to the sensing electrode SP as a capacitance value that is outside the expected range of values for the frequency of the given first test signal SG1 applied at the sensing electrode SP. The noise can be determined based on the noise for each frequency of the MIPI signal at the sensor layer 200 (see Figure 2 ). The touch performance associated with the noise can be determined and associated with the first wiring L1 and the second wiring L2. Therefore, the structure or arrangement of the first wiring L1 and the second wiring L2 provided on the circuit board CF can be improved to reduce or eliminate the noise. Therefore, it is possible to provide a display module inspection device DID (see FIG. 1 ) having an improved ability to reliably inspect the display module DM. Figure 1 ) and for checking the display module DM by using the same (see Figure 1 ) method.
[0104] The noise sensing unit ND may receive a second test signal SG2 from the second wiring L2 (S300). The second test signal SG2 may be affected by mutual capacitance between the plurality of sensing electrodes SP.
[0105] The noise sensing unit ND may detect the noise of the sensor layer 200 based on the second test signal SG2 (S400). The noise sensing unit ND may calculate the capacitance value based on the mutual capacitance. The noise sensing unit ND may output the test data TSD based on the capacitance value (see Figure 8 ).
[0106] In addition, according to an embodiment of the present disclosure, the display module inspection device DID can detect the noise of the display module DM. The noise sensing unit ND can quantitatively measure the noise as an interference characteristic, and can provide the measurement result as test data TSD (see Figure 8 ). A reduction in touch performance in the sensor layer 200 can be determined based on the measured noise and the test data TSD. The first wiring L1 and the second wiring L2 can be identified based on a channel associated with the noise. Therefore, the structure of the first wiring L1 and / or the second wiring L2 provided on the circuit board CF can be improved. For example, the test data TSD can be reviewed, and the structure of the first wiring L1 and / or the second wiring L2 can be updated in a newly designed display module DM. Therefore, a display module inspection device DID capable of measuring the degree of interference between wirings, identifying wirings that may cause interference, and a method for inspecting the display module DM by using the same can be provided.
[0107] Figure 8 Test data according to an embodiment of the present disclosure is shown.
[0108] refer to Figures 1 to 8 , the noise sensing unit ND may output test data TSD. The test data TSD may include capacitance values D1, D2, D3, and D4 for each channel formed by the plurality of sensing electrodes SP.
[0109] The horizontal axis of the test data TSD may represent a plurality of first sensing electrodes TE1. The vertical axis of the test data TSD may represent a plurality of second sensing electrodes TE2. However, the present disclosure is not limited to any specific configuration of the test data TSD. For example, the objects of the horizontal axis and the vertical axis of the test data TSD according to an embodiment of the present disclosure may be changed.
[0110] The test data TSD may be displayed and indicate data for a plurality of channels formed between the plurality of first sensing electrodes TE1 and the plurality of second sensing electrodes TE2 .
[0111] The capacitance values D1, D2, D3, and D4 measured by the noise sensing unit ND may be displayed to correspond to a plurality of channels, respectively. The capacitance values D1, D2, D3, and D4 may be set between the first capacitance value shown on the right portion of the test data TSD and the second capacitance value shown on the left portion of the test data TSD.
[0112] The first capacitance value includes values D1, D2, and D3 measured at the sensing electrode SP connected to the second wiring L2 overlapping the first wiring L1 from among the plurality of sensing electrodes SP, and may be displayed in the noise region DN at the right portion of the test data TSD. The first capacitance value may include a 1-1 capacitance value D1, a 1-2 capacitance value D2, and a 1-3 capacitance value D3. The 1-1 capacitance value D1 may be a capacitance value indicating normal operation, and the 1-2 capacitance value D2 and the 1-3 capacitance value D3 may be capacitance values indicating noise. For example, the capacitance value of the noise region DN may be less than -20 or greater than 20.
[0113] The second capacitance value includes a value D4 measured at a sensing electrode SP connected to a second wiring L2 that does not overlap the first wiring L1 from among the plurality of sensing electrodes SP. The second capacitance value may be displayed in a safety area at the left portion of the test data TSD. For example, the capacitance value of the safety area may be -20 to 20.
[0114] The sum of the absolute values of the first capacitance values including the values D1, D2, and D3 at the right portion of the test data TSD may be greater than the sum of the absolute values of the second capacitance values including the value D4 at the left portion of the test data TSD. That is, the difference between the first capacitance value and the second capacitance value may indicate the overall level of noise. The overall level of noise may be attributed to the second wiring L2 overlapping the first wiring L1.
[0115] When the first test signal SG1 indicates a noise signal due to interference capacitance formed between the first wiring L1 and the second wiring L2 in the noise region DN at the right portion of the test data TSD, the absolute value of each of the 1-2 capacitance value D2 and the 1-3 capacitance value D3 formed in the channel of the corresponding sensing electrode SP may be greater than the absolute value of the second capacitance value D4.
[0116] In the test data TSD, the capacitance values D1, D2, D3, and D4 may be displayed in different colors depending on the capacitance value. Each of the 1-2 capacitance value D2 and the 1-3 capacitance value D3 may be displayed in a different color from the second capacitance value D4. For example, a normal 1-1 capacitance value D1 and a second capacitance value D4 may be displayed in green; a 1-2 capacitance value D2 indicating noise may be displayed in red; and a 1-3 capacitance value D3 may be displayed in blue.
[0117] According to an embodiment of the present disclosure, the noise sensing unit ND may display the capacitance value in different colors depending on the capacitance value. When the first test signal SG1 is applied to the first wiring L1, noise may be generated in the signal carried by the second wiring L2, and the channel having a high capacitance value due to the noise may be indicated by color in the test data TSD. Therefore, the user can perceive the presence of noise in the second test signal SG2 measured in the display module DM according to the color and / or value in the test data TSD, and can test the noise by changing the configuration of the display module DM (e.g., the process route of the wiring of the display module DM). Therefore, it is possible to provide a display module inspection device DID having an improved ability to reliably inspect the display module DM and a method for inspecting the display module DM using the same.
[0118] In addition, according to an embodiment of the present disclosure, the display module inspection device DID can detect the noise of the display module DM. The noise sensing unit ND can quantitatively measure the noise as an interference characteristic, and can provide the measurement result as test data TSD. The reduction in touch performance that can occur in the sensor layer 200 can be associated with certain channels and wirings of the display module DM based on the noise. The first wiring L1 and the second wiring L2 can be identified based on the channel associated with the noise. Therefore, the first wiring L1 and the second wiring L2 set on the circuit board CF can be identified and changed to improve the structure of the display module DM. Therefore, it is possible to provide a display module inspection device DID that can reduce defects and measure the degree of interference between wirings and a method for inspecting the display module DM by using the same.
[0119] Although the embodiments of the present disclosure have been described for illustrative purposes, it will be understood by those skilled in the art that various modifications and substitutions are possible without departing from the scope and spirit of the present disclosure as disclosed in the appended claims. Therefore, the technical scope of the present disclosure is not limited to the detailed description of this specification, but should be defined by the claims.
[0120] As described above, the display module inspection device DID can detect noise in the display module DM. The noise sensing unit ND can quantitatively measure the noise as an interference characteristic, and can provide the measurement result as the test data TSD. Therefore, the first wiring L1 and the second wiring L2 that cause the touch performance to be reduced can be identified based on the noise. Therefore, the structure of the first wiring L1 and the second wiring L2 set on the circuit board CF can be changed to improve the structure of the display module DM. Therefore, it is possible to provide a display module inspection device DID that can reduce defects and measure the degree of interference between wirings and a display module inspection method using the same.
[0121] While the present disclosure has been described with reference to the embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the present disclosure as set forth in the appended claims.
Claims
1. A display module inspection device, comprising: a waveform generator configured to generate a first test signal and transmit the first test signal to a display module; as well as a noise sensing unit configured to receive a second test signal from the display module, The second test signal indicates the mutual capacitance between the plurality of sensing electrodes of the display module. wherein the noise sensing unit is configured to calculate a capacitance value based on the mutual capacitance and the first test signal, and Wherein, the capacitance value indicates noise.
2. The display module inspection device according to claim 1, wherein: The noise sensing unit outputs test data including a corresponding capacitance value for each channel formed by the plurality of sensing electrodes of the display module.
3. The display module inspection device according to claim 2, wherein: The noise sensing unit identifies a wiring of the display module corresponding to a channel corresponding to the noise.
4. A display module inspection device, comprising: an inspection board electrically connected to a display module, the display module including a sensor layer including a plurality of sensing electrodes; a waveform generator electrically connected to the inspection board and configured to generate a first test signal and transmit the first test signal to the display module; as well as a noise sensing unit electrically connected to the inspection board and configured to receive a second test signal from the display module, The second test signal indicates the mutual capacitance between the plurality of sensing electrodes.
5. The display module inspection device according to claim 4, wherein: The display module further includes: Display layer; a data driver configured to drive the display layer; a sensor driver chip configured to drive the sensor layer; and A circuit board is connected to the display layer.
6. The display module inspection device according to claim 5, wherein: The display module further includes: a first wiring disposed on the circuit board and electrically connected to the data driver; and A second wiring is provided on the circuit board and is electrically connected between the sensor driver chip and the sensor layer.
7. The display module inspection device according to claim 6, wherein: The waveform generator transmits the first test signal to the first wiring, and The noise sensing unit receives the second test signal through the second wiring.
8. The display module inspection device according to claim 6, wherein: At least a portion of the first wiring overlaps with at least a portion of the second wiring.
9. The display module inspection device according to claim 8, wherein: The noise sensing unit calculates a capacitance value based on the mutual capacitance.
10. The display module inspection device according to claim 9, wherein: The noise sensing unit outputs test data including a corresponding capacitance value for each channel formed by the plurality of sensing electrodes.
11. The display module inspection device according to claim 9, wherein: The noise sensing unit detects noise of the sensor layer.
12. The display module inspection device according to claim 9, wherein: The noise sensing unit is configured to calculate a color depending on a value of the capacitance value.
13. The display module inspection device according to claim 4, wherein: The first test signal is an analog data signal.
14. The display module inspection device according to claim 4, wherein: The first test signal includes a 1-1th test signal having a first frequency and a 1-2th test signal having a second frequency different from the first frequency.
15. A method for inspecting a display module, the method comprising: mounting a display module on the inspection board, the display module including a display layer, a sensor layer including a plurality of sensing electrodes, a first wiring electrically connected to the display layer, and a second wiring electrically connected to the sensor layer; transmitting a first test signal to the first wiring by a waveform generator electrically connected to the inspection board; receiving, by a noise sensing unit electrically connected to the inspection board, a second test signal from the second wiring, the second test signal indicating mutual capacitance between the plurality of sensing electrodes; as well as The noise of the display module is detected by the noise sensing unit based on the second test signal.
16. The method according to claim 15, wherein: Detecting the noise includes: A capacitance value is calculated by the noise sensing unit based on the mutual capacitance.
17. The method according to claim 16, wherein: Detecting the noise further includes: Test data is outputted by the noise sensing unit, the test data including the capacitance value for each channel formed by the plurality of sensing electrodes.
18. The method according to claim 16, wherein: Detecting the noise further includes: The capacitance value is displayed in a color depending on the capacitance value.
19. The method according to claim 15, wherein: Transmitting the first test signal includes: outputting a 1-1th test signal having a first frequency to the first wiring; and A 1-2 test signal having a second frequency different from the first frequency is output to the first wiring.
20. The method according to claim 16, wherein: Detecting the noise includes: When it is determined that the capacitance value is different from an expected value given the first test signal transmitted to the first wiring, noise of the sensor layer is detected.
Citation Information
Patent Citations
Smart connected seats, battery packs and vehicles
KR1020230093006A