Electrostatic chuck with multiple radio frequency meshes to control plasma uniformity

Abstract

The invention relates to a method and apparatus for controlling a plasma shell near an edge of a substrate. Varying the voltage / current distribution across the internal and external electrodes within the substrate assembly facilitates a spatial distribution of plasma across the substrate. The method includes: providing a first radio frequency power to a central electrode embedded in a substrate support assembly; providing a second radio frequency power to a ring electrode embedded in the substrate support assembly at a different position from the central electrode, wherein the ring electrode circumferentially surrounds the central electrode; monitoring parameters of the first radio frequency power and the second radio frequency power; and adjusting one or both of the first radio frequency power and the second radio frequency power based on the monitored parameter.

Description

[0001] This application is a divisional application of a Chinese patent application (PCT application number PCT / US2019 / 020001) with an application date of February 28, 2019, application number 201980017976.0, and name “Electrostatic chuck with multiple RF meshes to control plasma uniformity”. Background Art Technical Field

[0002] Embodiments disclosed herein relate generally to apparatus and methods for tuning plasma in a semiconductor substrate manufacturing process, and more particularly, to apparatus and methods for tuning plasma near an edge of a semiconductor substrate.

[0003] Related technical description

[0004] In the manufacture of integrated circuits and other electronic devices, plasma processes are often used to deposit or etch various layers of materials. The plasma enhanced chemical vapor deposition (PECVD) process is a chemical process in which electromagnetic energy is applied to at least one precursor gas or precursor vapor to convert the precursor into a reactive plasma. The plasma can be generated within the processing chamber (i.e., in situ) or in a remote plasma generator disposed away from the processing chamber. The process is widely used to deposit materials on substrates to produce high-quality and high-performance semiconductor devices.

[0005] In the current semiconductor manufacturing industry, transistor structures have become increasingly complex and challenging as feature sizes continue to decrease. To meet processing requirements, advanced process control techniques are useful for controlling costs and maximizing substrate and die yields. Typically, die at the edge of the substrate suffer from yield issues such as contact caused by misalignment, and poor sensitivity to hard masks. At the substrate processing level, advances in process uniformity control are needed to allow fine, local process tuning as well as global process tuning across the entire substrate.

[0006] Therefore, there is a need for methods and apparatus that allow fine, localized process tuning at the edge of a substrate. Summary of the invention

[0007] Embodiments disclosed herein generally relate to apparatus and methods for plasma tuning near a substrate edge. In one implementation, a method for tuning a plasma in a chamber is disclosed. The method includes: providing a first RF power to a central electrode embedded in a substrate support assembly; providing a second RF power to a ring electrode embedded in the substrate support assembly at a different location from the central electrode, wherein the ring electrode is spaced apart from the central electrode and the ring electrode circumferentially surrounds the central electrode; monitoring parameters of the first RF power and the second RF power; and adjusting one or both of the first RF power and the second RF power based on the monitored parameters.

[0008] In another embodiment, a semiconductor processing chamber is disclosed. The semiconductor processing chamber includes: a pedestal disposed in the chamber, the pedestal having a first electrode and a second electrode circumferentially surrounding the first electrode; a high frequency power supply and a low frequency power supply, the high frequency power supply and the low frequency power supply coupled to both the first electrode and the second electrode; a power divider disposed between the high frequency power supply and the low frequency power supply and the first electrode and the second electrode; and an electrode tuning circuit coupled to both the first electrode and the second electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to be able to understand in detail the manner in which the above-mentioned features of the present disclosure are achieved, a more specific description of the present disclosure briefly outlined above may be made with reference to embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings only illustrate typical embodiments of the present disclosure and therefore should not be considered as limiting the scope of the present disclosure, as the present disclosure may allow other equally effective embodiments.

[0010] Figure 1 A cross-sectional view of a processing chamber according to one aspect of the present disclosure is shown.

[0011] Figure 2 A top view of a substrate assembly according to one aspect of the present disclosure is shown.

[0012] Figure 3 A partial perspective view of a base plate assembly according to one aspect of the present disclosure is shown.

[0013] Figure 4 It is available with Figure 1 A schematic diagram of one embodiment of a power filter for use with a processing chamber.

[0014] Figure 5 It is available with Figure 1 A schematic diagram of another embodiment of a power filter for use with a processing chamber.

[0015] FIG. 6A to FIG. 6D is a schematic diagram illustrating various embodiments of a tuning circuit for tuning a first pedestal electrode and a second pedestal electrode.

[0016] Figure 7 and FIG. 8A to FIG. 8D is a schematic diagram depicting various power distribution circuits that may be used with the power filters described herein.

[0017] Fig. 9 is a schematic diagram depicting a circuit configured to cancel the inductance of the rods in the stem of the base.

[0018] Fig.10 is a schematic diagram depicting a power splitter circuit according to another embodiment.

[0019] To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. DETAILED DESCRIPTION

[0020] The present disclosure generally relates to methods and apparatus for controlling a plasma sheath near a substrate edge. The present disclosure provides radio frequency (RF) circuits and methods to adjust the distribution of RF power to more than one mesh embedded in a substrate support or pedestal that also serves as an electrostatic chuck. The methods and apparatus described herein are applicable regardless of whether the embedded mesh is a source of RF power (e.g., a powered electrode or multiple powered electrodes), or whether the mesh is a destination of RF power (e.g., a grounded electrode or multiple grounded electrodes). The embodiments disclosed herein allow for modulation of the uniformity of a plasma profile above a substrate. Changing the plasma distribution results in improved uniformity of film parameters on the substrate, such as deposition rate, film stress, refractive index, and other parameters.

[0021] Conventional plasma control techniques for modulating plasma include top and bottom tuners, both of which only weakly modify the plasma properties at the edge of the substrate relative to other areas of the substrate. The present disclosure provides tuning elements to affect the plasma profile at the edge of the substrate as well as to affect other areas of the substrate in addition to the edge. Previous methods for modulating the plasma at the edge of the substrate involve different process accessories or edge rings. However, these are typically process specific, and when more than one film (e.g., silicon oxide and silicon nitride) is deposited in the same chamber, it may be difficult to optimize the uniformity of both processes using the same set of hardware. The present disclosure provides the ability to change the plasma profile without changing the hardware.

[0022] The present disclosure provides a base having a plurality of meshes embedded therein, and one of the meshes is used as an adsorption electrode to adsorb a substrate on the mesh. A voltage divider is used to control and / or adjust the RF power to different meshes, or the RF power to different mesh segments. The voltage division is accomplished using a capacitive voltage divider, a series resonant voltage divider, or a parallel resonant voltage divider. The variable element in the circuit is a capacitor, but a resonance-based voltage divider may use fixed circuit elements and employ a variable frequency generator to modulate the power distribution. Different branches connected after the voltage divider may require additional filtering elements to block one frequency and pass another frequency, or to compensate for subsequent circuit elements inherent to the base configuration. The power division hardware is applicable regardless of whether the embedded mesh is a source of RF power (e.g., an electrode or multiple electrodes), or whether the mesh is a destination of RF power (e.g., ground).

[0023] Figure 1 1 is a cross-sectional view of a processing chamber 100 according to one aspect of the present disclosure. As shown, the processing chamber 100 is an etching chamber suitable for etching a substrate, such as substrate 125. An example of a processing chamber that may be adapted to benefit from exemplary aspects of the present disclosure is available from Applied Materials, Inc. of Santa Clara, California. Etching Process Chamber and Precision TM Processing Chambers. It is contemplated that other processing chambers, including those from other manufacturers, may be adapted to benefit from aspects of the present disclosure.

[0024] The processing chamber 100 can be used for various plasma processes. In one aspect, the processing chamber 100 can be used to perform dry etching using one or more etchants. For example, the processing chamber can be used to ignite a plasma from a precursor C x F y (where x and y represent known compounds), O 2 NF 3 In another implementation, the processing chamber 100 can be used for plasma enhanced chemical vapor deposition using one or more precursors.

[0025] The processing chamber 100 includes a chamber body 102, a lid assembly 106, and a pedestal 104. The lid assembly 106 is positioned at an upper end of the chamber body 102. The pedestal 104 is disposed within the chamber body 102, and the lid assembly 106 is coupled to the chamber body 102 and encloses the pedestal 104 in a processing volume 120. The chamber body 102 includes a transfer port 126, which may include a slit valve formed in a sidewall thereof. The transfer port 126 is selectively opened and closed to allow a substrate transfer robot (not shown) to enter the processing volume 120 for substrate transfer.

[0026] The electrode 108 is provided as part of the lid assembly 106. The electrode 108 may also serve as a gas distributor plate 112 having a plurality of openings 118 for allowing process gas to enter the processing volume 120. The process gas may be supplied to the processing chamber 100 via a conduit 114, and the process gas may enter a gas mixing region 116 before flowing through the openings 118. The electrode 108 is coupled to an electrical power source 142, such as an RF generator. DC power, pulsed DC power, and pulsed RF power may also be used. An isolator 110 (which may be a dielectric material, such as a ceramic or a metal oxide, such as aluminum oxide and / or aluminum nitride) contacts the electrode 108 and electrically and thermally separates the electrode 108 from the chamber body 102. A heater 119 is shown coupled to the gas distributor plate 112. The heater 119 is coupled to an AC power source 121.

[0027] The pedestal 104 is coupled to a lift mechanism via a shaft 144 that extends through the bottom surface of the chamber body 102. The lift mechanism may be flexibly sealed to the chamber body 102 via a bellows, which prevents vacuum leaks from around the shaft 144. The lift mechanism allows the substrate support 180 to be moved vertically within the chamber body 102 between a transfer position and a plurality of processing positions to place the substrate 125 adjacent to the electrode 108.

[0028] The pedestal 104 may be formed of a metal or ceramic material, such as a metal oxide or nitride or oxide / nitride mixture, such as aluminum, aluminum oxide, aluminum nitride, or an aluminum oxide / nitride mixture. A first pedestal electrode 122 and a second pedestal electrode 124 are disposed in the pedestal 104. The first pedestal electrode 122 and the second pedestal electrode 124 may be embedded in the pedestal 104 or coupled to a surface of the pedestal 104. The first pedestal electrode 122 and the second pedestal electrode 124 may be a plate, a perforated plate, a mesh, a wire mesh, or any other distribution arrangement. One or both of the first pedestal electrode 122 and the second pedestal electrode 124 may be a tuning electrode and may be coupled to a tuning circuit 136 via a conduit 146, such as a cable disposed in the shaft 144 of the pedestal 104 and having a selected resistance (such as 50Ω). The tuning circuit 136 may have a sensor 138 and an electronic controller 140, which may be a variable capacitor. The sensor 138 may be a voltage or current sensor and may be coupled to the electronic controller 140 to provide further control of the plasma conditions in the processing volume 120. The first pedestal electrode 122 may also be an adsorption electrode.

[0029] The first pedestal electrode 122 and the second pedestal electrode 124 are coupled to a power source 150. The power source 150 may illustratively be a source of RF energy of up to about 1000 W (but not limited to about 1000 W) at a frequency of, for example, about 13.56 MHz, but other frequencies and powers may be provided as needed for specific applications. The power source 150 is capable of generating AC power at multiple frequencies, such as 13.56 MHz and 2 MHz. The power source 150 may also generate either or both of continuous or pulsed DC power, which may be used to adsorb the substrate 125. The mesh tuner 148 is shown coupled between the power source 150 and the first pedestal electrode 122 and the second pedestal electrode 124.

[0030] RF matching 152 is coupled to each of the first and second pedestal electrodes 122, 124 and the power supply 150. RF matching 152 includes a power divider 154. One or both of RF matching 152 and mesh tuner 148 include a power filter (described below) for controlling power to the first and second pedestal electrodes 122, 124.

[0031] Figure 2 A top view of a pedestal 104 according to one aspect of the present disclosure is shown. The pedestal 104 includes a plurality of electrodes. The first pedestal electrode 122 and the second pedestal electrode 124 are meshes or wire meshes. The first pedestal electrode 122 and the second pedestal electrode 124 may be formed of aluminum or copper, or other conductive metals or materials.

[0032] In one implementation, the second pedestal electrode 124 has a larger surface area than the first pedestal electrode 122. In one implementation, the second pedestal electrode 124 has a larger diameter than the first pedestal electrode 122. The second pedestal electrode 124 may surround the first pedestal electrode 122. In one implementation, the first pedestal electrode 122 may be used as an adsorption electrode while also serving as a first RF electrode. The second pedestal electrode 124 may be a second RF electrode that tunes the plasma together with the first pedestal electrode 122. The first pedestal electrode 122 and the second pedestal electrode 124 may generate power at the same frequency or at different frequencies. The RF power to one or both of the first pedestal electrode 122 and the second pedestal electrode 124 may be varied in order to tune the plasma. For example, a sensor (not shown) may be used to monitor the RF energy from one or both of the first pedestal electrode 122 and the second pedestal electrode 124. Data from the sensor device may be communicated and used to change the power of the RF power applied to the first pedestal electrode 122 and / or the RF power of the second pedestal electrode 124.

[0033] Figure 3 A partial perspective view of a pedestal 104 is shown in accordance with one aspect of the present disclosure. In this implementation, a second pedestal electrode 124 is disposed within the pedestal 104 laterally adjacent to a substrate 125. The second pedestal electrode 124 is disposed above the first pedestal electrode 122, closer to the substrate 125.

[0034] Figure 4 It is available with Figure 1 Schematic diagram of one embodiment of a power filter 400 for use with a process chamber 100. In this embodiment, RF power for the process chamber is provided from the bottom. For example, the gas distributor plate 112 is grounded, and the RF power for plasma formation is provided by the first pedestal electrode 122 and the second pedestal electrode 124.

[0035] The power filter 400 includes a mesh tuner 148, which can be used as a power divider. The power filter 400 includes a first circuit 405 and a second circuit 410. Both the first circuit 405 and the second circuit 410 are positioned between the power supply 150 and the first pedestal electrode 122 and the second pedestal electrode 124. In this embodiment, the power supply 150 includes a high frequency RF generator 415 and a low frequency generator 420.

[0036] The first circuit 405 includes an inductor 425 coupled between the low frequency generator 420 and the filter main lead 430. The filter main lead 430 is coupled to both the high frequency RF generator 415 and the low frequency generator 420, and each of the first pedestal electrode 122 and the second pedestal electrode 124. The filter main lead 430 is also coupled to the high frequency RF generator 415, and the first capacitor 435 is positioned therebetween. The high frequency RF generator 415 is coupled to the filter main lead 430 and the second circuit 410. The low frequency generator 420 and the first circuit 405 are coupled to the filter main lead 430 through the inductor 425.

[0037] The second circuit 410 includes a second capacitor 440 and a third capacitor 445. The third capacitor 445 is a variable capacitor. The third capacitor 445 is used as a tuning knob. The first circuit 405 and the second circuit 410 are coupled to the first pedestal electrode 122 through the filter main lead 430. The first circuit 405 and the second circuit 410 are coupled to the second pedestal electrode 124 at a node 450. The second circuit 410 is also coupled to the filter main lead 430 at a node 452. The filter main lead 430 is coupled to the first pedestal electrode 122 through a rod 455. The second pedestal electrode 124 is coupled to the power filter 400 through a rod 460. Both the rod 455 and the rod 460 are positioned in the shaft 144.

[0038] Figure 5 It is available with Figure 1 Schematic diagram of another embodiment of a power filter 500 for use with a processing chamber 100. In this embodiment, RF power for the processing chamber is provided from the top. For example, the gas distributor plate 112 is coupled to the high frequency RF generator 415 and the low frequency generator 420 through the RF match 152. In this embodiment, the power filter 500 is used to change the ground path of both the first pedestal electrode 122 and the second pedestal electrode 124. The power filter 500 can be used to change the plasma properties of the first pedestal electrode 122 and the second pedestal electrode 124 by changing their ground paths, while the gas distributor plate 112 can be electrically floating.

[0039] The power filter 500 according to this embodiment includes a first capacitor 505, a second capacitor 510, and a third capacitor 515. The first capacitor 505 and the second capacitor 510 are variable capacitors, and the third capacitor 515 is a fixed capacitor. The first capacitor 505 and the second capacitor 510 can be used as a tuning knob to change the ground path of one of the first pedestal electrode 122 and the second pedestal electrode 124.

[0040] The power filter 500 includes a first circuit 520, which includes a first capacitor 505 and a filter main lead 430. The filter main lead 430 is coupled to the first pedestal electrode 122 through a rod 455. The first capacitor 505 is coupled to ground. The power filter 500 also includes a second circuit 525, which includes a second capacitor 510 and a third capacitor 515. The second circuit 525 is coupled to the second pedestal electrode 124 through a node 450 and a rod 460. The second circuit 525 is also coupled to the filter main lead 430 at a node 452.

[0041] FIG. 6A to FIG. 6D is a schematic diagram illustrating various embodiments of a tuning circuit for tuning the first pedestal electrode 122 and the second pedestal electrode 124 . FIG. 6A to FIG. 6D It is shown in Figure 4 A portion of the power filter 400 .

[0042] exist Fig. 6A In , the signals from the high frequency RF generator 415 and the low frequency generator 420 are separated and then independently combined. Figure 6B In the embodiment of the present invention, the signals from the high frequency RF generator 415 and the low frequency generator 420 are separated and then coherently combined.

[0043] Figure 6C and Fig.6D The application of signals from a high frequency RF generator 415 and a low frequency generator 420 is shown, the signals being split and then provided to each of the first pedestal electrode 122 and the second pedestal electrode 124 as desired.

[0044] exist Figure 6C In the embodiment, the high frequency signal is provided to the first pedestal electrode 122 and the second pedestal electrode 124, while the low frequency signal is provided only to the first pedestal electrode 122. Figure 6C In the embodiment of the present invention, the low frequency signal is not provided to the second pedestal electrode 124 .

[0045] exist Fig.6D In the embodiment, the low frequency signal is provided to the first pedestal electrode 122 and the second pedestal electrode 124, while the high frequency signal is provided only to the first pedestal electrode 122. Fig.6D The high frequency signal is not provided to the second base electrode 124.

[0046] Figure 7 and FIG. 8A to FIG. 8D is a schematic diagram depicting various power distribution circuits that may be used with power filter 400 or power filter 500 and power divider 154 as described above.

[0047] Figure 7 A capacitive voltage divider 700 is depicted. Figure 7The capacitive voltage divider 700 receives a power input signal 705, which is RF power at a fixed frequency. The third capacitor 445 provides a low impedance and can be adjusted to provide the same voltage to the first pedestal electrode 122 and the second pedestal electrode 124. The sensor 710 is coupled to both the first pedestal electrode 122 and the second pedestal electrode 124. The sensor 710 monitors the power (e.g., voltage, current, and / or phase) of each of the first pedestal electrode 122 and the second pedestal electrode 124. The tuning of the first pedestal electrode 122 and the second pedestal electrode 124 is adjusted based on the information from the sensor 710.

[0048] Fig. 8A A voltage divider circuit 800 is depicted that includes a second capacitor 440 and a third capacitor 445 connected in series. An inductor 805 is positioned between the second capacitor 440 and the third capacitor 445. The third capacitor 445 can be adjusted to change the voltage between the first pedestal electrode 122 and the second pedestal electrode 124. In one embodiment, the voltage divider circuit 800 includes a series resonant circuit.

[0049] Figure 8B A voltage divider circuit 810 is depicted, which includes a second capacitor 440 and a third capacitor 445. An inductor 815 is connected in parallel to the second capacitor 440 and the third capacitor 445. The third capacitor 445 can be adjusted to change the voltage between the first pedestal electrode 122 and the second pedestal electrode 124. In one embodiment, the voltage divider circuit 800 includes a parallel resonant circuit. The inductor 815 can provide a higher impedance.

[0050] Figure 8C A voltage divider circuit 820 is depicted, comprising a second capacitor 440 (first fixed capacitor) and a fourth capacitor 825 (second fixed capacitor) connected in series. An inductor 805 is positioned between the second capacitor 440 and the fourth capacitor 825 .

[0051] Fig.8D A voltage divider circuit 830 is depicted, comprising a second capacitor 440 (a first fixed capacitor) and a fourth capacitor 825 (a second fixed capacitor) connected in parallel. An inductor 815 is positioned between the second capacitor 440 and the fourth capacitor 825 .

[0052] exist Figure 8C and Fig.8D8, the circuit is coupled to a power input signal 835 that provides RF power at various frequencies. Each of the voltage divider circuit 820 and the voltage divider circuit 830 does not include a variable capacitor and is used to adjust the RF frequency to the corresponding circuit to tune the first pedestal electrode 122 and the second pedestal electrode 124.

[0053] Fig. 9 is a schematic diagram depicting a circuit 900 configured to cancel the inductance of rods 455 and 460. The circuit 900 is disposed between a voltage divider (e.g., the power distribution circuit described above) and a first pedestal electrode 122 and a second pedestal electrode 124. The circuit 900 includes an inductor 910 and an inductor 915 coupled to rods 455 and 460, respectively. The circuit 900 also includes an inter-bonded capacitor 920 coupled to each of the inductors. The circuit 900 also includes a pair of LC circuits 925, each consisting of an inductor 930 and a fixed capacitor 935. The LC circuits 925 allow low frequency power to pass through with low impedance, but provide capacitance to cancel the inductance from one or both of the rods 455 and 460. The circuit 900 can use one of the capacitors to cancel the inductance of the rods 455 and 460 to enable high frequency power and block low frequency power. The inductor can be used to block high frequency power and pass low frequency power.

[0054] Fig.10 is a schematic diagram depicting a power divider circuit 1000 according to another embodiment. The power divider circuit 1000 includes the circuit 900 and the second circuit 410. The power divider circuit 1000 also includes filter circuits 1005. Each of the filter circuits 1005 includes an inductor 1020 (for passing low frequency power with a low inductive impedance) and a capacitor 1025 (for passing high frequency power with a capacitance having an inductance that cancels the inductance of the rods 455 and 460 (not shown)). Each of the filter circuits 1005 is configured as a parallel LC circuit.

[0055] Benefits of the present disclosure include increased control of the plasma adjacent to the edge of the substrate. Increased plasma control results in increased plasma uniformity.

[0056] While the foregoing is directed to embodiments of the present disclosure, other and further embodiments of the disclosure may be envisaged without departing from the basic scope thereof, and the scope of the disclosure is determined by the appended claims.

Claims

1. A substrate support assembly for positioning in a semiconductor processing chamber, the substrate support assembly comprising: a substrate support, the substrate support having a first electrode and a second electrode, at least a portion of the second electrode being disposed outside the first electrode; Power divider; as well as A circuit is coupled to both the first electrode and the second electrode, the circuit is arranged between the power divider and the first electrode and the second electrode, and the circuit comprises: a first capacitor coupled to a first node coupled to the first electrode, an inductor coupled to the first node, and a second capacitor between ground and a second node coupled to the second electrode, and A third capacitor is provided between the first node and the second node.

2. The substrate support assembly of claim 1, wherein the first capacitor and the third capacitor are variable capacitors and the second capacitor is a fixed capacitor.

3. The substrate support assembly of claim 1, wherein the second electrode circumferentially surrounds the first electrode.

4. The substrate support assembly of claim 1, wherein the first electrode is disposed below the second electrode.

5. The substrate support assembly of claim 1, wherein the second electrode partially overlaps the first electrode.

6. The substrate support assembly of claim 1, wherein the circuit comprises a plurality of parallel LC circuits.

7. A substrate support assembly for positioning in a semiconductor processing chamber, the substrate support assembly comprising: a substrate support, the substrate support having a first electrode and a second electrode, at least a portion of the second electrode being disposed outside the first electrode; as well as A circuit coupled to the first electrode and the second electrode, the circuit comprising: a first inductor coupled to the first electrode; a first parallel LC circuit, the first parallel LC circuit being connected in series with the first inductor; a second inductor coupled to the second electrode, and A second parallel LC circuit is connected in series with the second inductor. 8 . The substrate support assembly of claim 7 , wherein the first electrode is disposed below the second electrode, and the second electrode partially overlaps the first electrode.

9. The substrate support assembly of claim 7, wherein the circuit further comprises a capacitor coupled to the first inductor and the second inductor.

10. The substrate support assembly of claim 9, wherein the circuit further comprises a second capacitor.

11. The substrate support assembly of claim 10, wherein the second capacitor is a variable capacitor.

12. The substrate support assembly of claim 11, wherein the capacitor is on a first side of the first inductor and the second inductor, and the second capacitor is on a second side of the first inductor and the second inductor.

13. The substrate support assembly of claim 7, wherein the circuit comprises a plurality of capacitors.

14. The substrate support assembly of claim 13, wherein at least one capacitor of the plurality of capacitors is a variable capacitor.

15. The substrate support assembly of claim 14, wherein the variable capacitor is coupled to the first parallel LC circuit and the second parallel LC circuit.

16. The substrate support assembly of claim 14, wherein the variable capacitor is between at least one of the first parallel LC circuit or the second parallel LC circuit and ground.

17. The substrate support assembly of claim 14, wherein the plurality of capacitors further comprises fixed capacitors.

18. The substrate support assembly of claim 15, wherein the fixed capacitor is between the variable capacitor and ground.

19. The substrate support assembly of claim 7, wherein the circuit further comprises: a first sensor between the first inductor and the first parallel LC circuit, the first sensor being operable to monitor power at the first electrode; as well as A second sensor is between the second inductor and the second parallel LC circuit, the second sensor being operable to monitor power to the second electrode.

20. The substrate support assembly of claim 7, wherein the circuit further comprises an interbonded capacitor coupled to the first inductor and the second inductor.

21. The substrate support assembly of claim 7, wherein the second electrode circumferentially surrounds the first electrode.

22. A semiconductor processing chamber comprising: a base disposed in the chamber, the chamber having a first electrode and a second electrode, the second electrode circumferentially surrounding the first electrode, wherein the first electrode is disposed below the second electrode; a high frequency power source and a low frequency power source, the high frequency power source and the low frequency power source coupled to both the first electrode and the second electrode; A power distributor, the power distributor being arranged between the high-frequency power supply, the low-frequency power supply, the first electrode and the second electrode; as well as A circuit coupled to both the first electrode and the second electrode, the circuit comprising: a plurality of capacitors, one of the plurality of capacitors being directly coupled to the high frequency power source through the power divider, and An inductor is directly coupled to the low frequency power source through the power divider.

23. The semiconductor processing chamber of claim 22, wherein the second electrode partially overlaps the first electrode.

24. The semiconductor processing chamber of claim 22, further comprising a gas distributor plate, wherein the gas distributor plate is configured to be electrically grounded.

25. A semiconductor processing chamber comprising: a base disposed in the chamber, the chamber having a first electrode and a second electrode, the second electrode circumferentially surrounding the first electrode; a high frequency power source and a low frequency power source, the high frequency power source and the low frequency power source coupled to both the first electrode and the second electrode; A power distributor, the power distributor being arranged between the high-frequency power supply, the low-frequency power supply, the first electrode and the second electrode; as well as A circuit coupled to both the first electrode and the second electrode, the circuit comprising: a plurality of capacitors, one of the plurality of capacitors being directly coupled to the high frequency power source through the power divider, and an inductor, the inductor being directly coupled to the low-frequency power supply through the power divider; as well as A gas distributor plate is configured to be electrically grounded.

26. A method for conditioning a plasma in a chamber, the method comprising: providing a first RF power to a first electrode embedded in a substrate support assembly positioned adjacent a showerhead in the chamber, and; providing a second radio frequency power to a second electrode embedded in the substrate support assembly at a different location from the first electrode; monitoring parameters of the first radio frequency power and the second radio frequency power; as well as The plasma is adjusted based on the monitored parameters.

27. The method of claim 26, wherein the first RF power is provided through a first parallel LC circuit and through a first inductor arranged in series with the first parallel circuit, and the second RF power is provided through a second parallel LC circuit and through a second inductor arranged in series with the second parallel circuit.

28. The method of claim 26, wherein the first RF power is provided by a first power source, and the second RF power is provided by a second power source.

29. The method of claim 26, wherein the first electrode is disposed below the second electrode.

30. The method of claim 29, wherein the second electrode partially overlaps the first electrode.

31. The method of claim 26, wherein the adjusting comprises adjusting one or both of the first electrode or the second electrode when one or both of the first electrode or the second electrode is a source of radio frequency power.

32. The method of claim 31, wherein the showerhead is electrically grounded.

33. The method of claim 26, wherein the second electrode circumferentially surrounds the first electrode.

34. The method of claim 26, wherein the adjusting comprises adjusting one or both of the first electrode or the second electrode when one or both of the first electrode or the second electrode is a ground electrode.

35. The method of claim 26, wherein at least a portion of the second electrode is disposed outside of the first electrode.

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