Miniature light-emitting diode device and preparation method of miniature light-emitting diode device

Abstract

The invention provides a miniature light-emitting diode device and a preparation method thereof. The miniature light-emitting diode device comprises a driving substrate which is provided with a first surface, and a plurality of first alignment marks which are arranged at intervals are distributed in a first area of the first surface; the light-emitting unit is located on the side, provided with the first surface, of the driving substrate, the orthographic projection of the light-emitting unit on the first surface is located in a second area of the first surface, and the second area is the area, except the first area, in the first surface. According to the invention, the bonding pads on the driving substrate can be aligned with the corresponding light-emitting units in a high-precision manner, so that the miniature light-emitting diode device has reliable electrical connection, and the yield of the device is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a micro light emitting diode device and a method for preparing the micro light emitting diode device. Background Art

[0002] Micro-LED arrays have shown significant technical advantages with their high color saturation, high contrast, fast response, low energy consumption and long service life. Currently, Micro-LED arrays use two main structures: vertical structure and flip-chip structure, and ultimately achieve their light-emitting function through bonding with the driving circuit.

[0003] In terms of the technical details of Micro-LED, the scale of each unit is as fine as the micron level, and the electrode design is more precise, reaching the sub-micron level of size and spacing. This tiny scale requires that the electrodes of the driving circuit must be precisely aligned with the Micro-LED electrodes to ensure the reliability of the electrical connection. Even a tiny alignment error is enough to cause poor electrode contact or short circuit, seriously interfering with the normal operation of the device, or even causing it to fail.

[0004] In view of the precise connection requirements between Micro-LED and driving circuit, the existing technology uses wafer bonding technology to achieve the integration of the two. The basic process flow is as follows:

[0005] (a) A GaN substrate, a buffer layer, an n-type GaN layer, a multi-layer quantum well layer, and a p-type GaN layer are sequentially grown on a silicon substrate;

[0006] (b) patterning the light-emitting unit and etching the light-emitting unit for isolation;

[0007] (c) Side wall processing of LED unit and deposition of passivation layer;

[0008] (d) making a p-metal electrode;

[0009] (e) filling the LED unit isolation groove with optical isolation material and depositing a dielectric layer;

[0010] (f) The p-metal electrode is bonded to the driving circuit backplane;

[0011] (g) peeling off the substrate and removing a certain thickness of n-type GaN to completely isolate the light-emitting unit;

[0012] (h) Fabricate n-metal electrodes to complete circuit interconnection.

[0013] However, this process places extremely stringent requirements on the alignment accuracy of the bonding. Especially when the p-metal electrode is bonded to the drive circuit backplane, the alignment accuracy requirement is very high. A slight alignment error may cause poor electrode contact, affect the electrical performance of the device, or even cause a short circuit.

[0014] Therefore, how to improve device yield is still a major difficulty in the existing technology. Summary of the invention

[0015] The main purpose of the present invention is to provide a micro light emitting diode device and a method for preparing the micro light emitting diode device, so as to solve the problem of low yield of micro light emitting diodes in the prior art.

[0016] In order to achieve the above-mentioned purpose, according to one aspect of the present invention, there is provided a micro light emitting diode device, comprising: a driving substrate having a first surface, a first area of ​​the first surface being distributed with a plurality of first alignment marks arranged at intervals; a light emitting unit being located on a side of the driving substrate having the first surface, an orthographic projection of the light emitting unit on the first surface being located in a second area of ​​the first surface, and the second area being an area of ​​the first surface excluding the first area.

[0017] Optionally, the micro light emitting diode device further includes: a bonding metal layer located between the driving substrate and the light emitting unit.

[0018] Optionally, the light-emitting units include a plurality of light-emitting units spaced apart along a first direction, the first direction being parallel to the first surface, and the micro-LED device further includes: a dielectric isolation structure located between adjacent light-emitting units; the dielectric isolation structure is arranged in contact with the first surface and spaced apart from the bonding metal layer.

[0019] Optionally, the micro light emitting diode device further includes: a pad located on the driving substrate and in contact with the bonding metal layer; and a first insulating dielectric layer located between the dielectric isolation structure and the pad.

[0020] Optionally, the micro light emitting diode device further includes: a second insulating dielectric layer located between the dielectric isolation structure and the light emitting unit and between the dielectric isolation structure and the bonding metal layer, and the second insulating dielectric layer and the dielectric isolation structure are formed of different materials.

[0021] Optionally, the driving substrate has a first end and a second end relative to each other in a second direction, the second direction is parallel to the first surface, and the first direction is perpendicular to the second direction, and the dielectric isolation structure includes: a first dielectric isolation structure, located between two adjacent light-emitting units in the first direction, and extending from the first end to the second end along the second direction.

[0022] Optionally, the light-emitting units include a plurality of light-emitting units spaced apart along the second direction, the driving substrate has a third end and a fourth end relative to each other in the first direction, and the dielectric isolation structure further includes: a second dielectric isolation structure, located between two adjacent light-emitting units in the second direction, and extending from the third end to the first dielectric isolation structure along the first direction or extending from the fourth end to the first dielectric isolation structure along the first direction.

[0023] Optionally, the micro light emitting diode device further includes: an electrode layer, located on a surface of the light emitting unit on a side away from the driving substrate.

[0024] Optionally, in the case where the light-emitting units include a plurality of arrays distributed along the first direction and the second direction, the electrode layers include a plurality of electrode layers, the plurality of electrode layers correspond one-to-one to the plurality of light-emitting units in the first direction, and each electrode layer contacts a side surface of the plurality of light-emitting units arranged in the second direction away from the driving substrate.

[0025] Optionally, the micro light emitting diode device further includes: a plurality of lenses, which are located one by one on a side of the plurality of light emitting units away from the driving substrate.

[0026] According to another aspect of the present invention, a method for preparing a micro light emitting diode device is provided, the method comprising: providing a semiconductor substrate, comprising a driving substrate and a light emitting functional layer which are stacked, the driving substrate having a first surface, a plurality of first alignment marks which are spaced apart from each other on the first surface, the light emitting functional layer covering the plurality of first alignment marks, the first surface being a surface close to a side of the light emitting functional layer; performing a first patterning on the light emitting functional layer to expose the plurality of first alignment marks; covering a mask plate on a side of the light emitting functional layer away from the driving substrate, the mask plate having a second alignment mark; aligning the first alignment mark and the second alignment mark; and performing a second patterning on the light emitting functional layer to form a light emitting unit.

[0027] Optionally, the step of forming a semiconductor substrate includes: providing a driving substrate and a light-emitting diode epitaxial wafer, the light-emitting diode epitaxial wafer including a substrate and a light-emitting functional layer located on one side of the substrate; forming a first metal layer on a side of the driving substrate having a first surface; forming a second metal layer on a surface of the light-emitting functional layer away from the substrate; bonding the first metal layer and the second metal layer; and removing the substrate to form a semiconductor substrate.

[0028] Optionally, before the step of performing the first patterning on the light-emitting functional layer, the preparation method further includes: forming a notch mark at an edge position of the semiconductor substrate; transferring the semiconductor substrate with the notch mark to a photolithography machine, and aligning the semiconductor substrate and the photolithography machine using the notch mark.

[0029] By applying the technical solution of the present invention, a micro-light emitting diode device is provided, including a driving substrate and a light-emitting unit. The driving substrate has a first surface, and a first area of ​​the first surface is distributed with a plurality of first alignment marks arranged at intervals. The light-emitting unit is located on a side of the driving substrate having the first surface, and the orthographic projection of the light-emitting unit on the first surface is located in a second area of ​​the first surface, and the second area is an area of ​​the first surface other than the first area. Based on this, the present application sets a plurality of first alignment marks on the driving substrate, and when the driving substrate and the light-emitting functional layer corresponding to the light-emitting unit are bonded, the light-emitting functional layer is first patterned to expose the plurality of first alignment marks on the driving substrate, and then the light-emitting functional layer is patterned again according to the plurality of first alignment marks exposed on the driving substrate to obtain the light-emitting unit. At this time, the pad on the driving substrate can be aligned with the corresponding light-emitting unit with high precision, so that the micro-light emitting diode device has a reliable electrical connection, thereby improving the device yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The accompanying drawings constituting a part of the present invention are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the accompanying drawings:

[0031] Figure 1 A schematic cross-sectional structure diagram of a driving substrate provided in a method for preparing a micro light emitting diode device according to an embodiment of the present invention is shown;

[0032] Figure 2 A schematic cross-sectional structure diagram of a light-emitting diode epitaxial wafer provided in a method for preparing a micro light-emitting diode device according to an embodiment of the present invention is shown;

[0033] Figure 3 Shows the Figure 1 The drive substrate and Figure 2 The cross-sectional structure diagram of the structure of the light-emitting diode epitaxial wafer after bonding is shown;

[0034] Figure 4 Shows the removal Figure 3 A schematic cross-sectional structure diagram of a semiconductor base after the substrate of the structure shown;

[0035] Figure 5 Shows the etching Figure 4 A schematic cross-sectional structure diagram of the semiconductor substrate after the first alignment mark on the driving substrate is exposed;

[0036] Figure 6 Shows the Figure 5 A schematic cross-sectional view of the structure after the light-emitting functional layer in the structure is patterned;

[0037] Figure 7 Shown in Figure 6 A schematic cross-sectional view of the structure after an insulating material layer is formed in the structure shown;

[0038] Figure 8 Shown in Figure 7 A schematic cross-sectional view of the structure after forming a second insulating dielectric layer and a dielectric isolation structure in the structure shown;

[0039] Fig. 9 Shown in Figure 8 A schematic cross-sectional view of the structure after an electrode layer is formed in the structure shown;

[0040] Fig.10 Shown in Fig. 9 A schematic cross-sectional view of the structure after a lens is formed in the structure shown;

[0041] Fig.11 A top view of a micro light emitting diode array according to an embodiment of the present invention is shown.

[0042] The above drawings include the following reference numerals:

[0043] 100, driving substrate; 101, first insulating dielectric layer; 102, solder pad; 103, insulating material layer; 104, second insulating dielectric layer; 200, substrate; 201, second doped layer; 202, active layer; 203, first doped layer; 210, light-emitting functional layer; 20, light-emitting unit; 30, bonding metal layer; 301, second metal layer; 302, first metal layer; 40, dielectric isolation structure; 401, first dielectric isolation structure; 402, second dielectric isolation structure; 50, electrode layer; 60, lens. DETAILED DESCRIPTION

[0044] It should be noted that, in the absence of conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other. The present invention will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0045] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0046] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so as to describe the embodiments of the present invention described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0047] As described in the background technology, the prior art uses wafer bonding technology to achieve the integration of the two, and the basic process flow is as follows: the silicon substrate sequentially grows a GaN substrate, a buffer layer, an n-type GaN, a multi-layer quantum well, and a p-type GaN; the light-emitting unit is patterned, and the light-emitting unit is isolated by etching; the sidewall of the LED unit is processed, and a passivation layer is deposited; a p-metal electrode is made; the LED unit isolation groove is filled with an optical isolation material, and a dielectric layer is deposited; the p-metal electrode is bonded to the drive circuit backplane; the substrate is peeled off and a certain thickness of n-type GaN is removed to completely isolate the light-emitting unit; an n-metal electrode is made to complete the circuit interconnection. However, this process places extremely stringent requirements on the alignment accuracy of the bonding. Especially when the p-metal electrode is bonded to the drive circuit backplane, the alignment accuracy requirements are very high. A slight alignment error may cause poor electrode contact, affect the electrical performance of the device, and even cause a short circuit. Therefore, in order to improve the device yield, the present application provides a micro light-emitting diode device and a method for preparing a micro light-emitting diode device.

[0048] In some optional embodiments, a micro light emitting diode device is provided, and a method for preparing the micro light emitting diode device may be: providing a semiconductor substrate, including a stacked arrangement of Figure 1 The driving substrate 100 shown in FIG. Figure 2 The light-emitting functional layer 210 shown in the figure, the driving substrate 100 has a first surface, and a plurality of first alignment marks (not shown in the figure) are distributed on the first surface and spaced apart. The light-emitting functional layer 210 covers the plurality of first alignment marks, and the first surface is the surface close to the side of the light-emitting functional layer 210; the light-emitting functional layer 210 is first patterned to expose the plurality of first alignment marks; a mask plate (not shown in the figure) is covered on the side of the light-emitting functional layer 210 away from the driving substrate 100, and the mask plate has a second alignment mark. The first alignment mark and the second alignment mark are aligned, and the light-emitting functional layer 210 is second patterned to form a light-emitting unit (not shown in the figure).

[0049] Specifically, Figure 1As shown, the driving substrate 100 may have a first insulating dielectric layer 101 and a plurality of pads 102 , and the first insulating dielectric layer 101 may be located between two adjacent pads 102 to achieve electrical isolation between the two adjacent pads 102 .

[0050] In the above embodiment, by setting a plurality of first alignment marks on the driving substrate 100, during the process of forming a light-emitting unit on one side of the driving substrate 100, even if the light-emitting functional layer corresponding to the light-emitting unit covers the plurality of first alignment marks, the present application firstly patterns the light-emitting functional layer 210 to expose the plurality of first alignment marks on the driving substrate 100, and then patterns the light-emitting functional layer 210 again according to the plurality of first alignment marks exposed on the driving substrate 100 to obtain the light-emitting unit. At this time, since the patterned alignment of the light-emitting unit is based on the plurality of first alignment marks exposed on the driving substrate, interlayer errors are avoided, so that the pads 102 on the driving substrate 100 can be aligned with the corresponding light-emitting units with high precision, so that the micro light-emitting diode device has a reliable electrical connection, thereby improving the device yield.

[0051] Before the step of providing a semiconductor substrate, in order to prepare a semiconductor substrate, in some optional embodiments, the step of forming a semiconductor substrate includes: Figure 1 and Figure 2 As shown, a driving substrate 100 and a light-emitting diode epitaxial wafer are provided, wherein the light-emitting diode epitaxial wafer includes a substrate 200 and a light-emitting functional layer 210 located on one side of the substrate 200; a first metal layer 302 is formed on the side of the driving substrate 100 having a first surface; a second metal layer 301 is formed on the surface of the light-emitting functional layer 210 away from the substrate 200; Figure 3 As shown, the first metal layer 302 and the second metal layer 301 are bonded; Figure 4 As shown, the substrate 200 is removed to form a semiconductor base.

[0052] Specifically, Figure 4 As shown, the first metal layer 302 and the second metal layer 301 are bonded to form a bonding metal layer 30 .

[0053] Specifically, the light emitting diode epitaxial wafer can be obtained by epitaxially growing the light emitting functional layer 210 on the substrate 200. After bonding the first metal layer 302 and the second metal layer 301, the substrate 200 can be removed so that the surface of the light emitting functional layer 210 away from the driving substrate 100 is the light emitting surface.

[0054] Alternatively, if Figure 2 , Figure 3 , Figure 4 and Figure 5As shown, the light-emitting functional layer 210 may include a first doped layer 203, an active layer 202, and a second doped layer 201 that are stacked. Exemplarily, the first doped layer 203 may be a P-type gallium nitride layer, the active layer 202 may be a multi-layer quantum well, and the second doped layer 201 may be an N-type gallium nitride layer. Based on this, the light emitting surface may be a side surface of the N-type gallium nitride layer away from the P-type gallium nitride layer.

[0055] In the above embodiment, the first metal layer 302 and the second metal layer 301 can provide a stable bonding interface, so as to withstand the thermal stress and mechanical stress of the material during the miniaturization process, and reduce the material cracks and delamination problems caused by miniaturization. Thus, the production of a micro-LED with a light-emitting unit 20 size of less than 5 μm can be achieved.

[0056] Furthermore, if Figure 5 As shown, the light-emitting functional layer 210 can be first patterned using a photolithography machine to expose multiple first alignment marks on the first surface. In order to first pattern the light-emitting functional layer 210 using a photolithography machine, the alignment mark area position can be first found in each exposure area according to the driving circuit layout information.

[0057] For example, Figure 5 As shown, 5 or more independent exposure areas symmetrical to the central exposure area are selected on the semiconductor substrate, the alignment mark area position is found in each independent exposure area according to the driving circuit layout information, and a graphic etching process is performed at this position to expose the alignment mark (i.e., Mark clear).

[0058] It is mentioned here that the exposure area refers to the surface area of ​​the wafer (corresponding to the semiconductor substrate after the above bonding) to be patterned during the lithography process, and these areas are planned according to the driving circuit layout information. The driving circuit layout information is created in the design stage and contains the precise position information of all circuit components and alignment marks. This information can usually be stored in files in formats such as GDSII or OASIS. By reading and parsing these design data, the lithography machine can determine the specific coordinates of each exposure area and alignment mark, and the alignment mark area is periodically distributed with the exposure area.

[0059] It is understandable that if Figure 5 As shown, in the case where there is a bonding metal layer 30 between the light-emitting functional layer 210 and the driving substrate 100, in order to expose the multiple first alignment marks on the first surface, in the step of first patterning the above-mentioned light-emitting functional layer 210 using a photolithography machine, the bonding metal layer 30 also needs to be patterned.

[0060] Optionally, in order to find the position of the alignment mark area, before the first patterning step of the light-emitting functional layer 210, the preparation method also includes: forming a notch mark (not shown) at the edge position of the semiconductor substrate; transferring the semiconductor substrate with the notch mark to a photolithography machine, and using the notch mark to align the semiconductor substrate and the photolithography machine.

[0061] In the above steps, a notch mark may be formed at the edge of the semiconductor substrate by wafer edge processing.

[0062] In summary, in order to expose the multiple first alignment marks on the first surface of the driving substrate 100, the semiconductor substrate can be loaded or transferred into the photolithography machine, and then the notch detection system of the photolithography machine can search the edge of the semiconductor substrate to find the notch mark. The optical sensor of the notch detection system can transmit the captured notch information to the control system of the photolithography machine. The control system commands the wafer stage to translate and rotate according to the detected notch information to locate the notch to a fixed reference position inside the photolithography machine, thereby achieving preliminary alignment of the semiconductor substrate and the photolithography machine. Once the semiconductor substrate and the photolithography machine are aligned, the alignment system of the photolithography machine will locate each exposure area on the semiconductor substrate according to the coordinate data in the driving circuit layout information, and find the alignment mark area position corresponding to the multiple first alignment marks in each exposure area, and then the light-emitting functional layer 210 (or the light-emitting functional layer 210 and the bonding metal layer 30) can be first patterned to expose the multiple first alignment marks.

[0063] On this basis, the exposed multiple first alignment marks can be used to perform a second patterning on the light-emitting functional layer 210. Optionally, the process of covering the mask plate (with the second alignment mark) on the side of the light-emitting functional layer 210 away from the driving substrate 100 and the process of aligning the first alignment mark with the second alignment mark on the mask plate can be achieved using a photolithography machine.

[0064] For example, when the multiple first alignment marks on the drive substrate 100 are exposed, the alignment system (such as an optical alignment system) of the lithography machine can start to detect the surface of the semiconductor substrate. The alignment system will automatically identify the multiple exposed first alignment marks. Once the first alignment marks are identified, the lithography machine will adjust the position of the wafer stage to ensure that the multiple first alignment marks on the drive substrate 100 of the semiconductor substrate completely coincide with the alignment reference points of the lithography machine. It is worth mentioning that this is achieved through high-precision mechanical and optical systems, which can achieve nanometer-level alignment accuracy.

[0065] Furthermore, after the multiple first alignment marks on the driving substrate 100 are fully aligned with the alignment system of the photolithography machine, the next step is to align the semiconductor substrate and the mask plate (with the second alignment mark) of the photolithography machine, that is, align the first alignment mark and the second alignment mark. The mask plate contains a preset pattern of the light-emitting unit 20. Once the semiconductor substrate and the mask plate are accurately positioned, the exposure process begins, that is, the light-emitting functional layer 210 is second patterned to form a microstructure of the light-emitting unit 20, such as Figure 6 It is emphasized here that the present application patterns the light-emitting functional layer 210 after aligning the second alignment mark on the mask plate directly rather than indirectly with the plurality of first alignment marks on the driving substrate 100, so that the alignment accuracy of the light-emitting unit 20 and the driving circuit on the driving substrate 100 is higher.

[0066] In summary, the present application also provides a micro light emitting diode device, including: Figure 6 As shown, the driving substrate 100 has a first surface, and a first area of ​​the first surface is distributed with a plurality of first alignment marks (not shown in the figure) arranged at intervals; the light-emitting unit 20 is located on a side of the driving substrate 100 having the first surface, and the orthographic projection of the light-emitting unit 20 on the first surface is located in a second area of ​​the first surface, and the second area is an area of ​​the first surface excluding the first area.

[0067] The driving substrate 100 plays a core role in the operation of the Micro-LED array, and is responsible for providing precise current control to each independent light-emitting unit 20. It is worth noting that in order to achieve this function, Figure 6 As shown, pads 102 corresponding to the light-emitting units 20 are arranged on the driving substrate 100 , and these pads 102 are electrically connected to the light-emitting units 20 to ensure that the corresponding light-emitting units 20 can receive independent driving signals.

[0068] For example, Figure 6 As shown, there may be multiple pads 102 on the driving substrate 100 , and the driving substrate 100 may also have a first insulating dielectric layer 101 , so that the first insulating dielectric layer 101 may be located between two adjacent pads 102 to achieve electrical isolation between the two adjacent pads 102 .

[0069] Specifically, the driving substrate 100 and the light emitting unit 20 may be physically connected by bonding.

[0070] Optionally, the first alignment mark includes but is not limited to a cross, a grid, or other easily identifiable patterns.

[0071] Specifically, the driving substrate 100 may be a silicon-based driving substrate. Optionally, the silicon-based driving substrate may include a CMOS driving circuit.

[0072] Specifically, Figure 6 As shown, the micro light emitting diode device may include a plurality of light emitting units 20 , so it can be understood that the plurality of pads 102 correspond one-to-one to the plurality of light emitting units 20 , so that each light emitting unit 20 can receive an independent driving signal.

[0073] Specifically, the light-emitting functional layer corresponding to the light-emitting unit 20 may be a GaN epitaxial light-emitting functional layer.

[0074] In some optional embodiments, such as Figure 6 As shown, in order to improve the reliability of the electrical connection between the light-emitting unit 20 and the driving substrate 100 and the stability of the device performance, the micro light-emitting diode device also includes a bonding metal layer 30, and the bonding metal layer 30 is located between the driving substrate 100 and the light-emitting unit 20.

[0075] Specifically, Figure 6 As shown, the side of the light emitting unit 20 can be aligned at the same level as the side of the bonding metal layer 30. That is, the light emitting unit 20 and the bonding metal layer can be formed in the same etching process, so that the present application can be compatible with advanced semiconductor manufacturing processes and can meet the needs of large-scale mass production.

[0076] Specifically, Figure 6 As shown, the bonding metal layer 30 may be disposed in contact with the pad 102 on the driving substrate 100 .

[0077] It is worth mentioning that the above-mentioned bonding metal layer 30 not only serves as an electrode connection layer between the light-emitting unit 20 and the driving substrate 100, realizing the physical connection between the driving substrate 100 and the light-emitting unit 20, but also realizes the heterogeneous integration of the silicon-based CMOS driving circuit and the GaN epitaxial light-emitting functional layer, solving the problem that direct bonding may generate stress when the temperature changes, resulting in material cracks or delamination due to the different thermal expansion coefficients of silicon and gallium nitride, thereby improving the stability and reliability of the bonding structure.

[0078] In some optional embodiments, such as Figure 6 As shown, the light-emitting unit 20 includes a plurality of light-emitting units 20 spaced apart along a first direction A, and the first direction A is parallel to the first surface. In order to prevent optical crosstalk between two adjacent light-emitting units 20 in the first direction A, the micro-LED device also includes a dielectric isolation structure, which is located between adjacent light-emitting units 20; the dielectric isolation structure is arranged in contact with the first surface and is spaced apart from the bonding metal layer 30.

[0079] Specifically, Figure 7 and Figure 8As shown, in order to form the dielectric isolation structure 40, after the light-emitting unit 20 is formed, an insulating material layer 103 may be first deposited on the side of the light-emitting unit 20 away from the driving substrate 100, so that the insulating material layer 103 covers the light-emitting unit 20. Then, the insulating material layer 103 may be patterned, and part of the insulating material between two adjacent light-emitting units 20 may be removed until part of the first surface is exposed, so as to form an isolation region between two adjacent light-emitting units 20 (not shown in the figure), and the remaining part of the insulating material in the insulating material layer 103 located between the two adjacent light-emitting units 20 may cover the sidewall of the light-emitting unit 20, so as to form a second insulating dielectric layer 104. Afterwards, metal may be deposited in the isolation region to form the above-mentioned dielectric isolation structure 40 between two adjacent light-emitting units 20.

[0080] Specifically, the material of the dielectric isolation structure 40 may be a metal material, that is, the second insulating dielectric layer 104 and the dielectric isolation structure 40 are formed of different materials.

[0081] Thus, Figure 8 , Fig. 9 and Fig.10 As shown, when the micro-LED device includes the second insulating dielectric layer 104, the second insulating dielectric layer 104 is located between the dielectric isolation structure 40 and the light-emitting unit 20. Further, when the micro-LED device also includes the bonding metal layer 30, the second insulating dielectric layer 104 is also located between the dielectric isolation structure 40 and the bonding metal layer 30. At this time, the light-emitting units 20 are double-isolated by the second insulating dielectric layer 104 and the dielectric isolation structure 40. Since the material of the dielectric isolation structure 40 is metal, the dielectric isolation structure 40 can prevent optical crosstalk, increase the side reflectivity of the emitted light, and improve the heat dissipation efficiency.

[0082] Of course, in some other exemplary embodiments, two adjacent light-emitting units 20 in the micro light-emitting diode device may only include the second insulating medium layer 104 for electrical isolation.

[0083] In some optional embodiments, in order to realize N-type circuit connection of the light emitting unit, the micro light emitting diode device further includes: an electrode layer located on a surface of the light emitting unit away from the driving substrate.

[0084] Specifically, Figure 8 and Fig. 9 As shown, after the step of forming the dielectric isolation structure 40 , an electrode layer 50 may be formed on a side of the light emitting unit 20 away from the driving substrate 100 .

[0085] In some optional embodiments, in order to improve light output efficiency, the micro light emitting diode device further includes a lens located on a side of the light emitting unit away from the driving substrate.

[0086] Specifically, Fig. 9 and Fig.10 As shown, after the step of forming the electrode layer 50 , a lens 60 may be formed on a side of the light emitting unit 20 away from the driving substrate 100 .

[0087] In some optional embodiments, such as Fig.11 As shown, for the micro-LED array, the light-emitting units 20 include a plurality of light-emitting units 20 distributed in an array along a first direction A and a second direction B, the plurality of light-emitting units 20 in the first direction A are arranged at intervals, and the plurality of light-emitting units 20 in the second direction B are arranged at intervals. Optionally, the driving substrate 100 has a first end and a second end opposite to each other in the second direction B, the second direction B is parallel to the first surface, and the first direction A is perpendicular to the second direction B, and the dielectric isolation structure 40 includes: a first dielectric isolation structure 401, the dielectric isolation structure 40 is located between two adjacent light-emitting units 20 in the first direction A, and extends from the first end to the second end along the second direction B.

[0088] Alternatively, if Fig.11 As shown, the driving substrate 100 has a third end and a fourth end relative to each other in the first direction A, and the dielectric isolation structure 40 also includes: a second dielectric isolation structure 402 dielectric isolation structure 40, which is located between two adjacent light-emitting units 20 in the second direction B, and extends from the third end along the first direction A to the first dielectric isolation structure 401 dielectric isolation structure 40 or extends from the fourth end along the first direction A to the first dielectric isolation structure 401 dielectric isolation structure 40.

[0089] On this basis, the electrode layer 50 may include multiple electrode layers 50, and the multiple electrode layers 50 correspond one-to-one to the multiple light-emitting units 20 in the first direction A, and each electrode layer 50 contacts the side surface of the multiple light-emitting units 20 arranged in the second direction B away from the driving substrate 100.

[0090] That is, through the above embodiment, the multiple light-emitting units 20 in the second direction B can share the N-type electrode, thereby realizing the N-type circuit connection of the multiple light-emitting units 20.

[0091] From the above description, it can be seen that the above embodiments of the present invention achieve the following technical effects:

[0092] By applying the technical solution of the present invention, a micro-light emitting diode device is provided, including a driving substrate and a light-emitting unit. The driving substrate has a first surface, and a first area of ​​the first surface is distributed with a plurality of first alignment marks arranged at intervals. The light-emitting unit is located on a side of the driving substrate having the first surface, and the orthographic projection of the light-emitting unit on the first surface is located in a second area of ​​the first surface, and the second area is an area of ​​the first surface other than the first area. Based on this, the present application sets a plurality of first alignment marks on the driving substrate, and when the driving substrate and the light-emitting functional layer corresponding to the light-emitting unit are bonded, the light-emitting functional layer is first patterned to expose the plurality of first alignment marks on the driving substrate, and then the light-emitting functional layer is patterned again according to the plurality of first alignment marks exposed on the driving substrate to obtain the light-emitting unit. At this time, the pad on the driving substrate can be aligned with the corresponding light-emitting unit with high precision, so that the micro-light emitting diode device has a reliable electrical connection, thereby improving the device yield.

[0093] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A micro light emitting diode device, characterized in that: include: A driving substrate having a first surface, wherein a first area of ​​the first surface is provided with a plurality of first alignment marks arranged at intervals; A light emitting unit is located on a side of the driving substrate having the first surface, and the orthographic projection of the light emitting unit on the first surface is located in a second area of ​​the first surface, where the second area is an area of ​​the first surface other than the first area.

2. The micro light emitting diode device according to claim 1, characterized in that: The micro light emitting diode device further comprises: The bonding metal layer is located between the driving substrate and the light emitting unit.

3. The micro light emitting diode device according to claim 2, characterized in that: The light emitting units include a plurality of light emitting units spaced apart along a first direction, the first direction is parallel to the first surface, and the micro light emitting diode device further includes: A dielectric isolation structure, located between adjacent light-emitting units; The dielectric isolation structure is disposed in contact with the first surface and is spaced apart from the bonding metal layer.

4. The micro light emitting diode device according to claim 3, characterized in that: The micro light emitting diode device further comprises: A pad, located on the driving substrate and arranged in contact with the bonding metal layer; The first insulating dielectric layer is located between the dielectric isolation structure and the pad.

5. The micro light emitting diode device according to claim 4, characterized in that: The micro light emitting diode device further comprises: The second insulating dielectric layer is located between the dielectric isolation structure and the light emitting unit and between the dielectric isolation structure and the bonding metal layer. The second insulating dielectric layer and the dielectric isolation structure are formed of different materials.

6. The micro light emitting diode device according to claim 3, characterized in that: The drive substrate has a first end and a second end opposite to each other in a second direction, the second direction is parallel to the first surface, and the first direction is perpendicular to the second direction, and the dielectric isolation structure includes: The first dielectric isolation structure is located between two adjacent light emitting units in the first direction and extends from the first end to the second end along the second direction.

7. The micro light emitting diode device according to claim 6, characterized in that: The light emitting units include a plurality of light emitting units spaced apart along the second direction, the driving substrate has a third end and a fourth end opposite to each other in the first direction, and the dielectric isolation structure further includes: The second dielectric isolation structure is located between two adjacent light emitting units in the second direction and extends from the third end to the first dielectric isolation structure along the first direction or extends from the fourth end to the first dielectric isolation structure along the first direction.

8. The micro light emitting diode device according to any one of claims 1 to 7, characterized in that: The micro light emitting diode device further comprises: The electrode layer is located on a surface of the light emitting unit that is away from the driving substrate.

9. The micro light emitting diode device according to claim 8, characterized in that: In the case where the light-emitting units include a plurality of arrays distributed along a first direction and a second direction, the electrode layers include a plurality of electrode layers, the plurality of electrode layers correspond one-to-one to the plurality of light-emitting units in the first direction, and each of the electrode layers contacts a side surface of the plurality of light-emitting units arranged in the second direction away from the driving substrate.

10. The micro light emitting diode device according to claim 8, characterized in that: The micro light emitting diode device further comprises: The lens is located on a side of the light emitting unit away from the driving substrate.

11. A method for preparing a micro light emitting diode device, characterized in that: The preparation method comprises: A semiconductor substrate is provided, comprising a driving substrate and a light-emitting functional layer which are stacked, wherein the driving substrate has a first surface, a plurality of first alignment marks which are spaced apart are distributed on the first surface, the light-emitting functional layer covers the plurality of first alignment marks, and the first surface is a surface close to a side of the light-emitting functional layer; Performing a first patterning on the light-emitting function layer to expose a plurality of the first alignment marks; A mask plate is covered on a side of the light-emitting functional layer away from the driving substrate, wherein the mask plate has a second alignment mark; aligning the first alignment mark and the second alignment mark; The light-emitting functional layer is subjected to a second patterning process to form a light-emitting unit.

12. The preparation method according to claim 11, characterized in that: The steps of forming the semiconductor substrate include: Providing a driving substrate and a light-emitting diode epitaxial wafer, wherein the light-emitting diode epitaxial wafer comprises a substrate and a light-emitting functional layer located on one side of the substrate; forming a first metal layer on a side of the drive substrate having the first surface; forming a second metal layer on a surface of the light-emitting functional layer away from the substrate; bonding the first metal layer and the second metal layer; The substrate is removed to form the semiconductor base.

13. The preparation method according to claim 11 or 12, characterized in that: Before the step of performing a first patterning on the light-emitting functional layer, the preparation method further comprises: forming a notch mark at an edge position of the semiconductor substrate; The semiconductor substrate with the notch mark is transferred to a photolithography machine, and the notch mark is used to align the semiconductor substrate and the photolithography machine.

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