Accelerated boundary volume hierarchy (BVH) traversal for shadow rays
By using the hierarchical acceleration data structure and sorting node method in ray tracing technology, the problem of low efficiency of shadow ray intersection testing in the existing technology is solved, more efficient ray tracing is achieved, and real-time performance and image quality are improved.
Patent Information
- Application Number
- CN202380046090.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-06-21
- Filing Date
- 2023-06-01
- Publication Date
- 2025-01-21
AI Technical Summary
Existing ray tracing technologies are inefficient in real-time applications, especially when dealing with shadow ray intersection tests, resulting in computational complexity and performance bottlenecks.
A hierarchical acceleration data structure is adopted, nodes are sorted by determining the sorting parameter value, and the data structure is traversed based on the sorting order to improve the efficiency of shadow ray intersection testing.
By optimizing the process of shadow light intersecting testing, the calculation time is reduced, and the real -time performance of the light tracking has been improved, so that more light can be processed in a short period of time, and the quality of the image is improved.
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Figure CN119343704A_ABST
Abstract
Description
Technical Field
[0001] Generally speaking, the present disclosure relates to graphics processing. For example, aspects of the present disclosure relate to systems and techniques for determining shadow rays for ray tracing using a hierarchical structure. Background Art
[0002] Ray tracing is a computer graphics technique that can be used to generate images by tracing the path of light through a three-dimensional scene, simulating interactions with objects illuminated by the light source, and determining ray intersections. Ray intersections can include ray-primitive intersections or ray-object intersections. Primitives are geometric shapes that can be used to construct or model larger three-dimensional objects. For example, primitives can include triangles or polygons.
[0003] Ray tracing can be used to generate realistic images of three-dimensional scenes, including shadows. Scene geometry can be stored in an acceleration data structure that groups scene primitives. The acceleration data structure can be used to accelerate the process of ray tracing by improving the efficiency of ray intersection testing and / or calculations. For example, a bounding volume hierarchy (BVH) is an acceleration data structure that can group scene primitives in a hierarchical tree of bounding volumes that surround one or more scene primitives in the scene primitive. Ray tracing can be performed by traversing these hierarchies to determine ray-primitive and / or ray-object intersections. Summary of the invention
[0004] In some examples, systems and techniques for determining shadow rays using a hierarchical structure for ray tracing are described. For example, the systems and techniques can be used to accelerate shadow ray traversal for a bounding volume hierarchy (BVH). According to at least one illustrative example, a method for ray tracing is provided, the method comprising: obtaining a hierarchical acceleration data structure, the hierarchical acceleration data structure comprising one or more primitives of a scene object; sorting the two or more nodes into a sorted order based on a sorting parameter value determined for each corresponding node of two or more nodes included in the same level of the hierarchical acceleration data structure, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each corresponding node of the two or more nodes; and determining an intersection between a shadow ray and an opaque primitive in a node included in the two or more nodes based on traversing the hierarchical acceleration data structure using the sorted order.
[0005] In another example, a device for ray tracing is provided, the device including a memory (e.g., configured to store data, such as virtual content data, one or more images, etc.) and one or more processors coupled to the memory (e.g., implemented in a circuit system). The one or more processors are configured and capable of performing the following operations: obtaining a hierarchical acceleration data structure, the hierarchical acceleration data structure including one or more primitives of a scene object; sorting the two or more nodes into a sorted order based on a sorting parameter value determined for each corresponding node of two or more nodes included in the same level of the hierarchical acceleration data structure, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each corresponding node of the two or more nodes; and determining an intersection between a shadow ray and an opaque primitive in a node included in the two or more nodes based on traversing the hierarchical acceleration data structure using the sorted order.
[0006] In another example, a non-transitory computer-readable medium having instructions stored thereon is provided, which when executed by one or more processors causes the one or more processors to perform the following operations: obtain a hierarchical acceleration data structure, the hierarchical acceleration data structure including one or more primitives of a scene object; sort the two or more nodes into a sorted order based on a sorting parameter value determined for each corresponding node of two or more nodes included in the same level of the hierarchical acceleration data structure, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each corresponding node of the two or more nodes; and determine an intersection between a shadow ray and an opaque primitive in a node included in the two or more nodes based on traversing the hierarchical acceleration data structure using the sorted order.
[0007] In another example, an apparatus for ray tracing is provided. The apparatus includes: means for obtaining a hierarchical acceleration data structure, the hierarchical acceleration data structure including one or more primitives of a scene object; means for sorting the two or more nodes into a sorted order based on a sorting parameter value determined for each respective node of the two or more nodes included in a same level of the hierarchical acceleration data structure, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each respective node of the two or more nodes; and means for determining an intersection between a shadow ray and an opaque primitive in a node included in the two or more nodes based on traversing the hierarchical acceleration data structure using the sorted order.
[0008] In some aspects, one or more of the above devices are or are part of: a camera, a mobile device (e.g., a mobile phone or so-called "smart phone" or other mobile device), a wearable device, an extended reality device (e.g., a virtual reality (VR) device, an augmented reality (AR) device, or a mixed reality (MR) device), a personal computer, a laptop computer, a server computer, or other device. In some aspects, the device includes a camera or multiple cameras for capturing one or more images. In some aspects, the device further includes a display for displaying one or more images, notifications, and / or other displayable data. In some aspects, the device may include one or more sensors that can be used to determine the position and / or posture of the device, the state of the device, and / or for other purposes.
[0009] This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to be used in isolation to determine the scope of the claimed subject matter. The subject matter should be understood with reference to appropriate portions of the entire specification of this patent, any or all drawings, and each claim.
[0010] The foregoing, together with other features and aspects, will become more fully apparent upon reference to the following description, claims and accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] Illustrative aspects of the present application are described in detail below with reference to the following drawings:
[0012] Figure 1A An example of a ray tracing process according to some examples is shown;
[0013] Figure 1B An example of a ray tracing process including one or more shadow rays according to some examples is shown;
[0014] Figure 1C An example of a ray tracing process including one or more occluded shadow rays according to some examples is shown;
[0015] Figure 2A shows an example of a bounding volume including one or more primitives representing portions of a surface in a scene according to some examples;
[0016] Figure 2B shows the organization according to some examples Figure 2A An example of a bounding volume hierarchy (BVH) for a bounding volume of
[0017] Figure 3A shows an example of a scene object and an object space bounding volume surrounding the scene object according to some examples;
[0018] Figure 3B shows the enclosure according to some examples Figure 3A Example of object space bounding volume for and world space bounding volume for scene objects;
[0019] Figure 4A shows an example of an acceleration data structure including a top-level acceleration structure (TLAS) and a bottom-level acceleration structure (BLAS) according to some examples;
[0020] Figure 4B An example of an acceleration data structure according to some examples is shown, the acceleration data structure including leaf nodes containing triangles and leaf nodes containing bounding volumes;
[0021] Figure 5 is a simplified block diagram illustrating an example ray tracing system according to some examples of the present disclosure;
[0022] Fig. 6A shows an example of an acceleration data structure for shadow ray intersection according to some examples of the present disclosure;
[0023] Figure 6B is another example of an acceleration data structure for shadow ray intersection according to some examples of the present disclosure;
[0024] Figure 7 is a flowchart illustrating an example of a process for graphics processing according to some examples of the present disclosure; and
[0025] Figure 8 is a block diagram illustrating an example of a computing system for implementing certain aspects described herein. DETAILED DESCRIPTION
[0026] Some aspects of the present disclosure are provided below. Some of these aspects can be applied independently, and some of them can be applied in combination, which will be apparent to those skilled in the art. In the following description, for the purpose of explanation, specific details are set forth to provide a thorough understanding of the various aspects of the application. However, it will be apparent that various aspects can also be implemented without these specific details. These figures and descriptions are not intended to be restrictive.
[0027] The following description provides only example aspects and is not intended to limit the scope, applicability or configuration of the present disclosure. On the contrary, the following description of the example aspects will provide a feasible description for realizing the example aspects for those skilled in the art. It should be understood that various changes can be made to the function and arrangement of elements without departing from the spirit and scope of the present application as set forth in the attached claims.
[0028] Ray tracing is a graphics processing and rendering technique that can be used to produce photorealistic images by modeling the transport of light to simulate optical effects. Ray tracing can realistically simulate the lighting of a three-dimensional (3D) scene and its objects by rendering physically correct reflections, refractions, shadows, and / or indirect lighting in a two-dimensional (2D) view of the scene.
[0029] Ray tracing can be a computationally intensive technique. For example, the computational resources (e.g., computation time) used to trace rays for a single frame may increase with the number of rays traced per frame, and / or may increase with the computational resources (e.g., computation time) spent tracing each individual ray. Due to this computational complexity, ray tracing can often be limited to non-real-time uses. Real-time ray tracing has long been sought for uses such as rendering video games, virtual reality (VR), and augmented reality (AR) experiences. Recently, real-time ray tracing has become possible, for example, using hardware accelerators and / or graphics processing units (GPUs), which can provide parallelization of the underlying calculations for each individual ray cast into a scene.
[0030] The number of rays that can be cast into a scene for each frame is typically relatively small because the rendering time for each frame cannot exceed a certain maximum amount without losing real-time performance. Image quality when using real-time ray tracing can be improved by increasing the number of rays cast into the scene for each frame. For example, the number of rays cast into the scene for each frame can be increased through increased parallelization (e.g., providing additional computing resources that allow more rays to be traced simultaneously). However, hardware upgrades can incur high upfront costs and may be difficult or impossible to retrofit on existing systems and platforms. A scalable and efficient solution that can improve the real-time performance (e.g., image quality) of existing ray tracing hardware is desired.
[0031] Described herein are systems, apparatus, processes (also referred to as methods), and computer-readable media (collectively, "systems and techniques") that can provide accelerated ray tracing operations for shadow ray intersection testing. For example, as described in greater detail herein, these systems and techniques can increase the number of rays cast into a scene per frame by tracing each ray more efficiently (e.g., reducing the computation time of each ray tracing operation allows more ray tracing operations to be performed within the same fixed rendering time per frame).
[0032] Various aspects of the application will be described with respect to the accompanying drawings.
[0033] Figure 1A1 is a schematic diagram illustrating an example of a ray tracing technique 100. As shown, a ray tracing system may perform ray tracing by casting a plurality of rays (e.g., ray 152a, ray 152b, and ray 152c) from a virtual or imaginary view camera 110 (e.g., which determines a view into the 3D scene) through pixels 140 of a 2D viewing plane into the 3D scene. In some examples, rays 152a-c may also be referred to as "primary rays." Each primary ray may pass through a particular pixel in pixels 140 (e.g., such as Figure 1A 140 ). In some cases, when rendering a 3D scene, each primary ray may pass through a different one of pixels 140. Multiple rays may also be used for some (or all) of pixels 140. After casting one or more of primary rays 152a-c, the ray tracing system may then trace the path of each primary ray to determine whether the ray traces back to light source 120 in the 3D scene. Multiple different primary rays may be processed in parallel (e.g., because primary rays interact with various objects, surfaces, light sources, etc. in the 3D scene, but do not interact with other primary rays).
[0034] In the example of the ray tracing technique 100, each primary ray 152a-c originates from a virtual or imaginary view camera 110 (e.g., sharing a common starting point) and is projected through a particular pixel in the plurality of pixels 140 located on a 2D view plane (e.g., as described above). If a particular primary ray in the primary rays 152a-c reaches a light source in the 3D scene (e.g., light source 120), information from the ray may be used to contribute to the final color and / or illumination level of the pixel (e.g., from the pixel 140) through which the particular ray was projected.
[0035] For example, when a ray projected into a scene intersects one or more objects (e.g., object 130), color and lighting information from the intersection point on the surface of the object can contribute to the final color and illumination level of a pixel (e.g., pixel 140) associated with the ray (e.g., primary ray 152a-c). The color and lighting information can be determined based on whether the ray-object intersection point is directly illuminated by a light source (e.g., light source 120) or is obscured (e.g., shaded). The color and lighting information for the ray-object intersection point can be determined by casting one or more shadow rays from the ray-object intersection point to a light source within the scene, which will be described in more depth below. If the shadow ray does not intersect an object on the way to the light source, the ray-object intersection (e.g., also referred to as a "hit point") is illuminated. If the shadow ray does intersect another object, the hit point may be obscured (e.g., the object intersected by the shadow ray may cast a shadow on the hit point). Similarly, different objects may have different surface properties that reflect, refract, and / or absorb light in different ways, which may also contribute to the final pixel color and / or illumination level. Before reaching a light source (e.g., light source 120), light may also reflect from an object and hit other objects in the scene, or travel through the surface of a transparent object, etc.
[0036] For example, Figure 1A As shown, the first primary ray 152a is projected into the scene and intersects the object 130, resulting in the generation of a first shadow ray 162a. The first shadow ray 162a is projected between the hit point (e.g., where the first primary ray 152a intersects the object 130) and the light source 120, and can be used to determine whether the hit point between the first primary ray 152a and the object 130 is directly illuminated by the light source 120 or is obscured by additional scene objects. As shown, the first shadow ray 162a reaches the light source 120, and therefore, can contribute to the color or illumination information used to render the particular pixel in the pixel 140 through which the first primary ray 152 was projected. The intersection between the first primary ray 152a and the object 130 (e.g., the hit point) can also be used to generate one or more reflected rays, such as at Figure 1A. The first reflected ray 156a is depicted in . The first reflected ray 156a does not reach the light source 120, and therefore, may not directly contribute to color or luminance information returned to the pixel 140. In some cases, the first reflected ray 156a may intersect with additional scene objects (not shown), and may contribute to color and / or luminance information for these additional intersection points between the reflected ray and one or more additional scene objects. The same or similar scenes are shown for the second main ray 152b and the associated second shadow ray 162b (e.g., which reaches the light source 120) and the second reflected ray 156b (e.g., which does not reach the light source 120), and for the third main ray 152c and the associated third shadow ray 162c (e.g., which reaches the light source 120) and the third reflected ray 156c (e.g., which does not reach the light source 120).
[0037] Figure 1B 1 is a schematic diagram illustrating another example of a ray tracing process 100b. Here, a primary ray 152 is projected through a pixel grid 140b and into a scene including an object 130. For example, primary ray 152 is projected from a starting point / viewpoint through a particular pixel 141 (e.g., included in pixel grid 140b) and intersects object 130. A hit point or ray-object intersection between primary ray 152 and object 130 is then used as a starting point for generating and projecting shadow ray 162. As described above, shadow ray 162 can be projected from the hit point to light source 120. As shown in FIG. Figure 1B As depicted, shadow ray 162 reaches light source 120 without intersecting any other objects or scene primitives, and lighting and color information may be determined for pixel 141 based on the hit point being directly illuminated by light source 120 .
[0038] Figure 1C is a schematic diagram illustrating another example of a ray tracing process 100c. Figure 1C Schematic diagram and Figure 1B, with the addition of an additional object 135 (e.g., an additional scene primitive) located along a direct path between a hit point (e.g., where the primary ray 152 and the object 130 intersect) and the light source 120. Here, when a shadow ray 164 is generated and cast from the hit point to the light source 120, the shadow ray 164 intersects the additional object 135 and does not reach the light source 120. Because the shadow ray 164 does not reach the light source 120, the hit point can be considered to be blocked or shaded by the additional object 135. For example, based on the intersection between the shadow ray 164 and the additional object 135, lighting and color information can be determined for the pixel 141 based on the hit point being blocked or shaded (e.g., blocked or shaded relative to the light source 120). In some examples, after generating and casting a shadow ray in response to determining a hit point between the primary ray and the scene object / primitive, processing for the shadow ray can be terminated when the shadow ray intersects the light source or another scene primitive (e.g., whichever comes first).
[0039] As mentioned previously, each interaction between a ray and an object (e.g., a scene object, primitive, surface, etc. within a 3D scene) can contribute to color and / or lighting information returned to a specific pixel through which the primary ray is projected. In some cases, tracing a greater number of interactions for each ray can provide increased visual fidelity (e.g., quality) of the rendered scene at the expense of increased computational cost (e.g., time). For example, a ray tracing method that prioritizes speed over quality may calculate or otherwise determine only the first reflection for each ray, while a ray tracing method that prioritizes quality over speed may determine three or more reflections for each ray. In some cases, after observing a maximum number of reflections or the ray has traveled a certain distance without intersection, the ray can stop traveling and the value of the pixel can be updated. In some cases, the ray can stop traveling and the value of the pixel can be updated based on the ray traveling a certain distance without reflection (e.g., reflection is a possible result of intersection). In some cases, the number of rays per pixel projected through the 2D viewing plane can be adjusted based on a similar tradeoff between computational cost and visual fidelity.
[0040] As a result, ray tracing becomes very expensive in terms of the time and / or computing power required to render realistic-looking scenes (e.g., based on the number of rays cast into the scene and the number of additional rays traced for secondary reflections and refractions). Due to this computational complexity, ray tracing is generally limited to non-real-time uses (e.g., scenes or visual effects that may be rendered in advance for film and television). Real-time ray tracing has long been sought for use cases such as rendering video games, virtual reality (VR), and augmented reality (AR) experiences.
[0041] Real-time ray tracing has recently become possible, and is typically performed by hardware acceleration units and / or graphics processing units (GPUs), which can provide parallelization of the underlying calculations for each individual ray cast into the scene. The number of rays that can be cast into the scene for each frame is typically relatively small, since the rendering time per frame cannot exceed a certain maximum amount without losing real-time performance.
[0042] Image quality when using real-time ray tracing can be improved by increasing the number of rays cast into the scene per frame. This can be achieved through increased parallelization (e.g., providing additional computing resources that allow more rays to be traced simultaneously). However, hardware upgrades can come with high upfront costs and can be difficult or impossible to retrofit on existing systems and platforms. Scalable and efficient solutions that can improve the real-time performance of existing ray tracing hardware are desired. For example, the number of rays cast into the scene per frame can also be increased by tracing each ray more efficiently (e.g., reducing the computation time of each ray tracing operation allows more ray tracing operations to be performed within the same fixed rendering time per frame).
[0043] One example of a ray tracing acceleration technique utilizes a tree-based acceleration structure to improve the efficiency of ray intersection tests (e.g., also referred to as "collision tests" and / or "hit tests") and / or other ray tracing operations. For example, ray intersection tests may include, but are not limited to: determining whether a primary ray intersects one or more scene objects or primitives (e.g., after the primary ray is cast into the scene); determining whether a shadow ray intersects additional scene objects or primitives (e.g., after the shadow ray is cast from the primary ray hit point to the light source); and determining whether a reflected ray intersects additional scene objects or primitives (e.g., after the reflected ray is cast from the hit point using a calculated reflection angle).
[0044] A scene can be converted into a bounding volume hierarchy (BVH), which is a hierarchical tree structure consisting of increasingly dense bounding volumes (also called "bounding areas", such as bounding boxes or "axis-aligned bounding boxes" (AABB)). For example, Figure 2AAn example of a scene 200a in which a plurality of triangle primitives 252a-252e are arranged as a series of increasingly tight bounding boxes 256a-256e is shown. The scene may contain hundreds, thousands, or more primitives, but for clarity, only five triangle primitives 252a-252e are depicted. The bounding boxes 256a-256e may be AABBs, which are bounding boxes with the minimum area or volume in which all points of the enclosed primitives (e.g., triangle primitives 252a-252e) may be located. The bounding boxes may be axis-aligned so that the sides of each bounding box 256a-256e are parallel to the coordinate axes (e.g., x, y, and z axes). Figure 2B An example hierarchical data structure 200b is shown having nodes associated with Figure 2A The bounding boxes 256a-256e shown in FIG. 256a-256e are associated with the triangle primitives 252a-252e. The hierarchical data structure 200b may be a BVH. For example, the BVH root node 262a may correspond to Figure 2A Similarly, the intermediate BVH node 262b may correspond to Figure 2A The intermediate BVH node 262c may correspond to Figure 2A 's bounding box 256c, and so on.
[0045] BVH root node (e.g., Figure 2B The BVH root node 262a) contains the AABB (e.g., Figure 2A 256a), which encloses all individual scene or object geometries contained in the BVH leaf node. Each primitive in the BVH root node is assigned to a left or right child node. The child node contains an AABB containing its assigned geometry, and the geometry is also assigned to the left or right child node, recursively until the BVH leaf node contains a small number of primitives, such as four or less. Depending on the extent of any scene changes and / or object deformations, the next frame and any subsequent frames may require one or more new BVH build operations or BVH refurbishment / update operations based on scene changes.
[0046] As mentioned earlier, testing each ray for intersection with each primitive in the scene can be inefficient and computationally expensive. BVHs can be used to accelerate ray intersection testing techniques as well as other ray tracing operations. For example, BVHs can be used for efficient traversal during collision checks associated with primary rays, shadow rays, reflected rays, and the like. Instead of testing each ray for intersection with a BVH bounding box (e.g., using a depth-first tree traversal process), each ray can be tested for intersection with the BVH bounding box (e.g., using a depth-first tree traversal process). As mentioned earlier, the bounding box surrounds or surrounds different amounts of scene geometry or primitives, and becomes increasingly tighter with the depth of the BVH tree structure.
[0047] Bounding boxes (e.g., AABBs or other bounding boxes) or other bounding regions can be defined relative to world space or object space. World space can be considered constant (e.g., the coordinate space of the entire 3D scene). Objects can exist in their own coordinate space, which is called object space (e.g., the coordinate space in which the object is modeled or created). For example, Figure 3A and Figure 3B is a diagram depicting object space and world space AABBs (axis-aligned bounding boxes) for the same geometry. Here, Figure 3A An object space AABB 320 of a geometric scene object 310 is shown. A scene object may include a 3D or graphical object present in a 3D scene for which ray tracing is performed. In some cases, a geometric scene object may be a scene object that includes geometric primitives (e.g., triangles). In some examples, a scene object may include an AABB or other object representation. Both the object space AABB 320 and the scene object 310 are shown in the object space 300a of the scene object 310. Figure 3B The same geometric scene object 310 is shown, but transformed into the world space 300b of the scene (eg, the scene to which the scene object 310 belongs or is located). A world space AABB 330 surrounds both the object space AABB 320 and the scene object 310 .
[0048] Ray tracing can utilize a two-level acceleration structure system, for example, the top-level acceleration structure (TLAS) and the bottom-level acceleration structure (BLAS), such as Figure 4A For example, Figure 4A A TLAS 410 and a BLAS 430 are shown, which are described in more depth below.
[0049] TLAS 410 is constructed in world space. TLAS primitives are instances of BLAS, which are defined in object space. TLAS can be constructed as a BVH with leaf nodes containing BLAS. For example, TLAS leaf nodes 422, 424, 426, and 428 each contain one of the two BLAS 440 and 460 or are otherwise associated with one of the two BLAS 440 and 460. Translation matrices can be encoded in TLAS leaf nodes to perform conversions from world space to object space and / or vice versa, as described in more depth below.
[0050] A BLAS can be constructed for each object in the scene (called a scene object). For example, Figure 4AA BLAS 440 that may be constructed for a first unique scene object and a BLAS 460 that may be constructed for a second unique scene object are shown. BLAS primitives may be triangles or AABBs that are procedural primitives used to construct scene objects. The underlying BVH is constructed on top of a collection of these triangles or AABBs for scene objects, where each BLAS leaf node contains a small number (e.g., at most four, five, or some other number) of triangles or AABBs. For example, in Figure 4A In the context of , BLAS leaf nodes 452-458 and 472-478 may each contain a certain number of triangles, AABBs, or other primitives used to construct scene objects. In some examples, a BLAS may also be referred to as a "bottom layer BVH". Multiple instances of the same BLAS may be included in a TLAS. For example, if a TLAS includes a car object, a BLAS for tires may be included four times. The same BLAS may also be included in or referenced by multiple TLASs, such as Figure 4A shown.
[0051] In some examples, a TLAS can be created using an object-to-world matrix that transforms inputs expressed in object space coordinates to output representations in world space coordinates. The world-to-object matrix can apply the transformation in the opposite direction (e.g., transforming inputs expressed in world space coordinates to output representations in object space coordinates). In some cases, a TLAS can be constructed on top of a BLAS set by using the object-to-world matrix to calculate the world space AABBs of each BLAS (e.g., the world space AABBs of BLAS root nodes 442 and 462). A BVH is then constructed on top of these world space AABBs of the BLAS root nodes, and the BVH can be referred to as a top-level BVH or TLAS 410. In some cases, TLAS and BLAS creation can be performed using similar or identical techniques. For example, the same SAH (surface area heuristic)-based algorithm or method can be used for both TLAS construction and BLAS construction.
[0052] Figure 4B 4 is a schematic diagram showing an example of an acceleration data structure 400b that includes or stores both triangles and bounding volumes. In some examples, the acceleration data structure 400b may be a BVH (e.g., Figure 4B ), but it should be noted that other hierarchical tree structures and / or other acceleration data structures may also be utilized. Figure 4BAs shown in , acceleration data structure 400b (e.g., BVH) includes a BVH root node 460, which includes a plurality of bounding volumes 471-478. Bounding volumes 471-478 may correspond to or be otherwise constructed for child nodes of BVH root node 460. For example, eight bounding volumes 471-478 may be AABBs for eight corresponding child nodes of BVH root node 460.
[0053] exist Figure 4B In the example of , acceleration data structure 400b has a branching factor of 8. The branching factor of an acceleration data structure is the maximum number of child nodes that can be associated with or contained by any parent node within the acceleration data structure. The number of child nodes associated with some internal nodes may be less than the branching factor. For example, acceleration data structure 400b has a branching factor of 8, but some internal nodes within acceleration data structure 400b may have less than 8 child nodes. It should be noted that larger or smaller branching factors can also be used to generate acceleration structures such as acceleration data structure 400b. In the case where acceleration data structure 400b uses a larger or smaller branching factor, the BVH root node 460 and / or BVH internal nodes (e.g., shown here as BVH internal nodes 471-478) can also include a larger or smaller number of bounding volumes or AABBs.
[0054] As mentioned above, BVH root node 460 includes AABBs for its eight child nodes 471-478. In some examples, the AABBs for child nodes 471-478 may be stored in a data structure of BVH 400b (e.g., included in a data representation of a parent node). For example, BVH root node 460 may include an index to a data storage or memory location at which one or more of its child nodes 471-478 may be obtained or retrieved. In one illustrative example, BVH root node 460 includes an index to only a first child node (e.g., BVH internal node 471), with the remaining child nodes (e.g., nodes 472-478) being stored adjacent to the memory index of first child node 471.
[0055] Child node 471 is Figure 4B471, because node 471 is neither the root nor a leaf of BVH 400b. An internal node of BVH 400b (e.g., node 471) may have a number of child nodes that is less than or equal to the branching factor (8 for BVH 400b). In some examples, an internal BVH node (e.g., node 471) may contain a bounding volume or AABB for each of its child nodes, as previously described above with respect to BVH root node 460. BVH internal node 471 contains a plurality of bounding volumes 481-488, which in this case represent the eight child nodes of internal node 471. Figure 4B As shown, the child nodes of internal node 471 are BVH leaf nodes (eg, leaf nodes of BVH acceleration data structure 400b).
[0056] For example, the child nodes of internal node 471 include BVH leaf node 481 and BVH leaf node 482 (internal node 471 includes additional child nodes 483-488, which are removed for clarity). Figure 4B These child nodes are omitted from the leaf node level of BVH 400b). As shown, BVH leaf node 481 includes two triangles 481a and 481b, which are geometric primitives that can be used to build a scene object or model represented by BVH 400b. In some cases, triangles 481a-481b can be surrounded by corresponding AABBs, which are stored in internal nodes 471 for BVH leaf node 481. In an illustrative example, the coordinates of triangles 481a-481b can be directly stored in the underlying data structure of BVH 400b, rather than being retrieved from an external data storage or data location. For example, the coordinates (e.g., vertices) of triangles 481a-481b can be stored in the BVH leaf node 481 itself.
[0057] Figure 4B BVH leaf node 482 is depicted to include four bounding volumes (e.g., AABBs) 482a, 482b, 482c, and 482d. In one illustrative example, bounding volumes 482a-482d may be AABBs of procedural primitives (e.g., representing spheres or other user-defined shapes). In some examples, bounding volumes 482a-482d may be AABBs of instances of the BVH. As described above with respect to BVH leaf node 481, it should be noted that the four bounding volumes 482a-482d may be surrounded by corresponding AABBs stored in internal node 471 for BVH leaf node 472. Although Figure 4BBVH internal node 471 is depicted as including child nodes that contain triangles (e.g., BVH leaf node 481) and child nodes that contain bounding volumes (e.g., BVH leaf node 482), but in some examples, the BVH acceleration data structure 400b as a whole may include only leaf nodes that contain triangles or may include only leaf nodes that contain bounding volumes.
[0058] As mentioned above, the BVH can store scene geometry (e.g., primitives) in a hierarchical grouping structure that can be used to accelerate the process of ray tracing by improving the efficiency of ray intersection testing. In some aspects, the same BVH can be used to perform ray intersection tests for primary rays (e.g., testing primary rays for intersections with one or more primitives) and perform ray intersection tests for shadow rays (e.g., testing shadow rays for intersections with light sources or any opaque primitives included in the scene). Primary ray intersection tests can be performed based on a depth-first traversal of the BVH and / or other traversal techniques (wherein BVH nodes closer to the virtual camera (e.g., the starting point of the primary ray) are traversed first). In some cases, the primary ray BVH traversal can terminate after observing the maximum number of intersections and / or reflections associated with the primary ray. The primary ray BVH traversal can terminate additionally or alternatively based on the primary ray traveling a certain distance without intersection.
[0059] In what may also be referred to as "early shadow ray termination," a shadow ray BVH traversal may be terminated once a shadow ray intersects any opaque primitive included in a scene, or once a shadow ray intersects a corresponding light source for which it was generated. In some examples, when the shadow ray BVH traversal is also performed based on accessing BVH nodes according to distance from a virtual camera (e.g., when the same BVH traversal technique as in primary ray intersection testing is used), the efficiency and / or performance of shadow ray collision testing may be reduced. A need exists for systems and techniques that can perform shadow ray intersection testing with improved BVH traversal efficiency.
[0060] As described above, systems and techniques are described herein that can provide accelerated ray tracing operations for shadow ray intersection testing. For example, the systems and techniques can be used to perform shadow ray intersection testing with improved BVH traversal efficiency. In one illustrative example, the systems and techniques can perform shadow ray BVH traversals by preferentially accessing BVH nodes that can provide shadow ray primitive intersections more quickly. For example, a shadow ray intersection test and therefore a shadow ray BVH traversal can terminate in response to a shadow ray reaching (e.g., intersecting) a light source toward which the shadow ray is projected. However, the shadow ray intersection test / BVH traversal can also terminate in response to a shadow ray intersecting any opaque primitive in a scene (e.g., the shadow ray terminates early).
[0061] Figure 5 is a schematic diagram illustrating an example ray tracing system 500 according to some examples of the present disclosure. The ray tracing system 500 can implement the systems and techniques disclosed herein, including the aspects described above and related Figure 6A-Figure 7 Associated Aspects. Ray tracing system 500 may perform various tasks and operations, such as ray tracing tasks and operations (eg, ray-primitive intersection, ray-bounding volume intersection, ray-triangle intersection, ray-AABB intersection, acceleration data structure construction and / or updating, rendering, etc.).
[0062] exist Figure 5 In the example shown in , ray tracing system 500 includes storage unit 502, computing component 510, ray tracing engine 520, acceleration data structure engine 522, node extraction and caching engine 524, and graphics processing engine 526. It should be noted that in Figure 5 The components 502 to 526 shown in FIG. 5 are non-limiting examples provided for purposes of illustration and explanation, and other examples may include components 502 to 526 shown in FIG. Figure 5 For example, in some cases, ray tracing system 500 may include components that are not shown in FIG. Figure 5 One or more display devices, one or more other processing engines, one or more other hardware components and / or one or more other software and / or hardware components shown in FIG. Figure 8 An example architecture and example hardware components that may be implemented by ray tracing system 500 are further described.
[0063] Reference to any component of ray tracing system 500 in the singular or plural should not be construed as limiting the number of such components implemented by ray tracing system 500 to one or more than one. For example, reference to a processor in the singular should not be construed as limiting the number of processors implemented by ray tracing system 500 to one. One of ordinary skill in the art will recognize that for Figure 5 , ray tracing system 500 may include only one of such components or more than one of such components.
[0064] The ray tracing system 500 may be part of, or implemented by, a single computing device or a plurality of computing devices. In some examples, the ray tracing system 500 may be part of an electronic device (or multiple electronic devices), such as a desktop computer, a laptop or notebook computer, a tablet computer, a set-top box, a smart TV, a display device, a game console, a video streaming device, an IoT (Internet of Things) device, a smart wearable device (e.g., a head-mounted display (HMD), smart glasses, an extended reality (XR) device (e.g., a VR headset or head-mounted display (HMD), an AR headset, HMD or glasses, etc.), or any other suitable electronic device.
[0065] In some implementations, the storage unit 502, the computing component 510, the ray tracing engine 520, the acceleration data structure engine 522, the node extraction and caching engine 524, and the graphics processing engine 526 can be part of the same computing device. For example, in some cases, the storage unit 608, the computing component 510, the ray tracing engine 520, the acceleration data structure engine 522, and the graphics processing engine 526 can be integrated into a smart phone, a laptop computer, a tablet computer, a smart wearable device, a gaming system, and / or any other computing device. In other implementations, the storage unit 502, the computing component 510, the ray tracing engine 520, the acceleration data structure engine 522, and the graphics processing engine 526 can be part of two or more separate computing devices. For example, in some cases, some of the components 502 to 526 can be part of or implemented by one computing device, while the remaining components can be part of or implemented by one or more other computing devices.
[0066] Storage unit 502 may be any storage device for storing data. In addition, storage unit 502 may store data from any of the components of ray tracing system 500. For example, storage unit 502 may store data from computing component 510, data from ray tracing engine 520, data from acceleration data structure engine 522, data from node extraction and cache engine 524, and / or data from graphics processing engine 526. In some examples, storage unit 502 may include one or more buffers and / or caches for storing data for processing by computing component 510. In some examples, one or more buffers and / or caches may be general and available to some (or all) computing components 510. In some examples, one or more buffers and / or caches may be provided specifically for certain ones of computing components 510.
[0067] The computing component 510 may include a central processing unit (CPU) 512, a graphics processing unit (GPU) 514, a memory 516, a ray tracing unit 518, and / or one or more hardware accelerator components 519. In some implementations, the computing component 510 may include other processors or computing components, such as one or more digital signal processors (DSPs), one or more neural processing units (NPUs), and / or other processors or computing components. The computing component 510 may perform various operations, such as ray-primitive intersection, ray-bounding volume intersection, ray-AABB intersection, acceleration data structure construction, acceleration data structure update, scene rendering, rasterization, geometry processing, pixel processing, visibility processing, etc.
[0068] Operations for the ray tracing engine 520, the acceleration data structure engine 522, the node fetch and cache engine 524, and the graphics processing engine 526 (as well as any other processing engines) may be implemented by any of the computing components 510. In some cases, operations of one or more of the ray tracing engine 520, the acceleration data structure engine 522, the node fetch and cache engine 524, and the graphics processing engine 526 may be performed by the CPU 512. In one illustrative example, operations of one or more of the ray tracing engine 520, the acceleration data structure engine 522, the node fetch and cache engine 524, and the graphics processing engine 526 may be performed by the GPU 514. In some cases, operations of one or more of the ray tracing engine 520, the acceleration data structure engine 522, the node fetch and cache engine 524, and the graphics processing engine 526 may be performed by the RTU 518 and / or one or more hardware accelerators 519.
[0069] In some cases, operations of one or more of ray tracing engine 520, acceleration data structure engine 522, node fetch and cache engine 524, and graphics processing engine 526 may be performed by one or more combinations of CPU 512, GPU 514, RTU 518, and hardware accelerator 519. In some cases, computing component 110 may include other electronic circuitry or hardware, computer software, firmware, or any combination thereof to perform any of the various operations described herein.
[0070] In some examples, ray tracing engine 520 may include one or more ray tracing application programming interfaces (APIs). In one example, ray tracing engine 520 may include one or more ray intersection engines. For example, ray tracing engine 520 may include one or more ray-primitive intersection engines and / or may include one or more ray-bounding volume intersection engines. In some cases, ray tracing engine 520 may include one or more ray-triangle intersection engines and / or may include one or more ray-AABB intersection engines. In some examples, ray tracing engine 520 may implement one or more ray intersection engines using one or more hardware accelerated ray tracing units (RTUs) and / or arithmetic logic units (ALUs).
[0071] In one illustrative example, ray tracing engine 520 may communicate with RTU 518 (and / or hardware accelerator 519) to perform ray-primitive (e.g., ray-triangle) intersections and / or ray-bounding volume (e.g., ray-AABB) intersections. For example, in some cases, ray tracing engine 520 may provide one or more input and / or control signals to RTU 518 (and / or hardware accelerator 519). RTU 518 (and / or hardware accelerator 519) may use the input and control signals from ray tracing engine 520 to perform ray-primitive intersections and / or ray-bounding volume intersections, and may transmit ray intersection results back to ray tracing engine 520.
[0072] In some examples, the acceleration data structure engine 522 can construct or generate one or more acceleration data structures. The acceleration data structure generated by the acceleration data structure engine 522 can be used by one or more of the ray tracing engine 520, the node extraction and caching engine 524, and the graphics processing engine 526. In an illustrative example, the acceleration data structure engine 522 can construct or generate a boundary volume hierarchy (BVH). In some cases, the acceleration data structure engine 522 can generate a two-level acceleration structure (e.g., an acceleration data structure including a TLAS and one or more BLAS). The acceleration data structure engine 522 can be implemented using a CPU 512, a GPU 514, or a combination of the two. In some examples, the acceleration data structure engine 522 can be implemented using one or more of the dedicated hardware accelerator components 519 in addition or alternatively.
[0073] In some examples, the graphics processing engine 526 may include a graphics processing pipeline. For example, the graphics processing engine 526 may include, but is not limited to, one or more of a geometry processing stage, a visibility stage, a rasterization stage, and a pixel processing pipeline. In some examples, the graphics processing engine 526 may communicate with or access a memory 516 of the computing component 510. The memory 516 may include one or more of a system memory, a frame buffer, a graphics memory, one or more caches, and the like. In some examples, the graphics processing engine 526 may communicate with one or more of the RTU 518 (e.g., of the computing component 510) and / or the hardware accelerator 519 and / or the ray tracing engine 520.
[0074] In some cases, the ray tracing system 500 (e.g., using the ray tracing engine 520, the acceleration data structure engine 522, the node extraction and caching engine 524, and / or the graphics processing engine 526) can obtain an acceleration data structure including one or more primitives of the scene object. For example, the ray tracing system 500 can obtain the acceleration data structure from the storage unit 502 and / or the memory 516. In some cases, the acceleration data structure can be generated or constructed using the acceleration data structure engine 522.
[0075] The acceleration data structure engine 522 may obtain one or more representations of scene objects or other scene geometry and generate and / or update a BVH or other acceleration data structure that includes the scene objects or scene geometry. In some examples, the acceleration data structure engine 522 may obtain the representations of the scene objects or other scene geometry at least in part from one or more of the storage unit 502 and the memory 516. In some cases, the acceleration data structure engine 522 may obtain the representations of the scene objects or other scene geometry from the ray tracing engine 520 (and / or one or more of the computation components 510).
[0076] The acceleration data structure engine 522 can operate on representations of scene objects and scene geometry using both object space representation and world space representation. In some examples, the acceleration data structure engine 522 can use one or more object-to-world matrices and / or world-to-object matrices to transform scene objects / geometry from object space representation to world space representation and from world space representation to object space representation, respectively.
[0077] Fig. 6A An example BVH 600a that can be traversed to perform shadow ray intersection tests is depicted. As shown, BVH 600a includes a root node 602, an internal node 612, and leaf nodes 614, 622, and 624, but other BVHs and / or other hierarchical tree-based acceleration data structures may also be utilized. For example, BVH 600a may include a greater or lesser number of internal nodes 612 and / or may include a greater or lesser number of leaf nodes 614, 622, 624. BVH leaf nodes 614, 622, and 624 are depicted as each including two triangles (e.g., scene geometry or scene primitives). In some cases, one or more of BVH leaf nodes 614, 622, 624 may additionally or alternatively include a greater or lesser number of primitives or other scene geometry. BVH leaf nodes 614, 622, 624 may each include the same number and / or type of primitives. In some examples, the BVH leaf nodes 614 , 622 , 624 may include different numbers and / or types of primitives.
[0078] As previously mentioned, shadow ray intersection testing can be performed based on previously determined intersection points (e.g., hit points) between rays and scene primitives. In some aspects, shadow ray intersection testing can be performed based on traversing a BVH (e.g., BVH 600a) to determine intersection points associated with cast shadow rays in a 3D scene. For example, shadow ray intersection testing can be performed based on generating and casting shadow rays from the hit points to a light source in a scene and determining whether the shadow ray intersects an opaque scene primitive or reaches the light source. Based on a determination that the cast shadow ray reaches the light source, the hit point (e.g., a scene primitive previously intersected by a primary ray and used as a starting point from which to cast the shadow ray) can be identified as being directly illuminated by the light source. Based on a determination that the shadow ray does not reach the light source, the hit point can be identified as being obscured or occluded relative to the light source.
[0079] As previously described above, once a shadow ray intersects a light source or intersects an opaque scene primitive, the shadow ray intersection test can be terminated (e.g., also referred to as "early shadow ray termination," as previously described). When the shadow ray intersection test is exited via early termination, the path of the shadow ray is not projected beyond the intersection point between the shadow ray and the opaque primitive. For example, if the path of the shadow ray intersects at least one opaque scene primitive, the shadow ray may not have reached the light source toward which the shadow ray was projected (e.g., a scene may include multiple primitives in the path of the projected shadow ray, and determining whether there is more than one shadow ray-primitive intersection may be unnecessary).
[0080] In some cases, shadow ray intersection testing may ignore or invalidate any intersections between a shadow ray and a non-opaque (e.g., transparent) primitive, because a transparent primitive may not occlude or obscure the hit point from which a shadow ray is cast. For example, when non-opaque primitives are considered invalid for shadow ray intersections, shadow ray intersection testing may be terminated as soon as a shadow ray intersects a light source or intersects any opaque scene primitive.
[0081] Shadow ray intersection testing can be performed based on traversing a BVH (e.g., BVH 600a). A BVH traversal associated with a shadow ray intersection test may also be referred to as a "shadow ray BVH traversal" or "shadow ray traversal". In some examples, the same BVH 600a may be utilized (e.g., traversed) to perform a primary ray intersection test and to perform a shadow ray intersection test. In some cases, the same traversal technique may be used additionally or alternatively to perform both a shadow ray BVH traversal and a primary ray BVH traversal. For example, when a shadow ray BVH traversal and a primary ray BVH traversal are implemented using the same traversal technique, the BVH traversal may be performed as a depth-first traversal or other traversal in which the primitives closest to the virtual camera viewpoint are traversed (e.g., tested or checked) first.
[0082] Performing shadow ray traversal based on a principal ray traversal technique (e.g., where the primitives closest to the viewpoint are traversed first) may be inefficient. For example, a shadow ray traversal may be performed until an intersection is found with an opaque primitive or a light source toward which a shadow ray is cast. When the BVH includes both opaque and non-opaque primitives, performing intersection tests between a shadow ray and any opaque primitives being traversed may result in wasted clock cycles (e.g., even if an intersection is found for a shadow ray and an opaque primitive, the intersection may be ignored or invalidated and the shadow ray BVH traversal continues).
[0083] For example, BVH 600a includes a combination of non-opaque (e.g., transparent) primitives 652, 654, and 656 and opaque primitives 655, 657, and 659. As shown, non-opaque primitives 652, 654, 656 are unobstructed, while opaque primitives 655, 657, 659 are obstructed. BVH nodes that include only non-opaque primitives are unobstructed (e.g., BVH node 622). BVH nodes that include only opaque primitives are obstructed (e.g., BVH node 614). BVH nodes that include both opaque and non-opaque primitives are partially obstructed (e.g., BVH nodes 602, 612, and 624).
[0084] exist Fig. 6A The bold connecting arrows included in show an example of a shadow ray traversal technique with wasted clock cycles (e.g., due to accessing non-opaque primitives). Fig. 6A The example shadow ray traversal technique shown in can be the same as or similar to the main ray BVH traversal technique, such as the depth-first traversal technique described above, where the primitives closest to the virtual camera viewpoint are traversed first. In some aspects, Fig. 6A An example shadow ray traversal may be performed independently of the contents of each BVH node (eg, regardless of whether the BVH node contains only opaque primitives, only non-opaque primitives, or a combination of both).
[0085] For example, starting from BVH root node 602, shadow ray traversal may proceed to BVH interior node 612, which includes BVH leaf nodes 622 and 624. Traversal then continues from BVH interior node 612 to BVH leaf node 622, which includes non-opaque primitives 652 and 654 as its children.
[0086] The traversal may first visit the non-opaque primitives 652. Although any intersection determined between the shadow ray and the non-opaque primitive 652 may be ignored or invalidated (e.g., because the non-opaque primitive 652 is transparent), the shadow ray traversal may perform an intersection test between the shadow ray and the non-opaque primitive 652. For example, the intersection test may be performed based on calling an arbitrary hit shader and providing the shadow ray and the non-opaque primitive 652 as input. The arbitrary hit shader consumes one or more clock cycles to determine the intersection result. If the arbitrary hit shader determines that the shadow ray and the non-opaque primitive 652 do not intersect, the shadow ray traversal continues. If the arbitrary hit shader determines that the shadow ray and the non-opaque primitive 652 do intersect, the shadow ray traversal may also continue (e.g., because the intersection between the shadow ray and the non-opaque primitive is ignored or considered invalid).
[0087] In this example, shadow ray traversal is paused when the any-hit shader is invoked to determine the intersection result between the shadow ray and the non-opaque primitive 652, but then continues to traverse the BVH 600a regardless of the result determined by the any-hit shader (e.g., wasting one or more clock cycles consumed by the any-hit shader invocation). Regardless of the result determined by the any-hit shader, shadow ray traversal of the BVH 600a then proceeds by visiting the non-opaque primitive 654 (e.g., the remaining child nodes of the BVH leaf node 622).
[0088] The any-hit shader is called again and consumes one or more clock cycles to determine the intersection result between the shadow ray and the non-opaque primitive 654. As described above with respect to the non-opaque primitive 652, the shadow ray traversal of the BVH 600a can then continue to visit the next BVH node regardless of the intersection result determined for the shadow ray and the non-opaque primitive 654 by the any-hit shader call.
[0089] For example, after calling the any hit shader to perform intersection tests for non-opaque primitives 652 and 654, the shadow ray traversal of BVH 600a can return to BVH node 612 and proceed to BVH leaf node 624. BVH leaf node 624 includes opaque primitive 655 and non-opaque primitive 656. Opaque primitive 655 can be visited first, and the any hit shader can be called to determine the result of the intersection test between the shadow ray and the opaque primitive 655. If the any hit shader determines that the shadow ray intersects the opaque primitive 655, the shadow ray traversal of BVH 600a can be terminated (e.g., early termination based on the shadow ray, as described above).
[0090] exist Fig. 6A In the example shadow ray traversal of the BVH 600a shown in , the any-hit shader is called three times before the shadow ray early termination condition is triggered. The any-hit shader is called twice to determine intersection results (e.g., intersection results between shadow rays and non-opaque primitives 652, 654) that may be ignored or invalidated, which may result in wasted clock cycles and / or extended shadow ray BVH traversal time. Wasted clock cycles and extended shadow ray BVH traversal time may reduce the efficiency of ray tracing operations for shadow rays. For example, shadow rays that intersect or hit non-opaque (e.g., transparent) primitives may be associated with a polynomial degradation in performance. Systems and techniques are needed for minimizing shadow ray BVH traversals that intersect with non-opaque primitives.
[0091] The systems and techniques described herein can be used to perform shadow ray BVH traversals with increased efficiency. For example, a shadow ray BVH traversal can be performed by selecting (e.g., visiting) a BVH node associated with an increased probability of intersecting a shadow ray with an opaque primitive at each level of the BVH. In some aspects, the BVH can be traversed with a depth-first search (DFS), where the selection decision (e.g., between multiple BVH nodes that can be traversed or visited next) is based on the probability that a shadow ray intersects an opaque primitive included in a given BVH node.
[0092] In one illustrative example, one or more sorting parameters may be used to sort nodes at each BVH level (e.g., nodes at each depth within a hierarchical tree structure associated with the BVH). For example, the sorting parameters may include, but are not limited to, an area associated with each BVH node, a surface area heuristic (SAH) associated with each BVH node, a density associated with each BVH node, and / or a number of primitives associated with each BVH node (e.g., described in turn below). A traversal decision may then be made for each BVH level based on the sorted order of the nodes included in a given BVH level.
[0093] In some aspects, the sorting parameters may include an area associated with each node of a given BVH level. For example, the BVH nodes may be sorted based on the bounding box area (e.g., AABB area) associated with each node. The BVH nodes may be sorted in ascending order of area or descending order of area. When sorting in ascending order of area, shadow ray traversal may be performed for a given BVH level by first visiting the BVH node determined to have the smallest bounding box area (e.g., visiting the node with the smallest bounding box area first, and visiting the node with the largest bounding box area last). When sorting in descending order of area, shadow ray traversal may be performed for a given BVH level by first visiting the BVH node determined to have the largest bounding box area (e.g., visiting the node with the largest bounding box area first, and visiting the node with the smallest bounding box area last).
[0094] In some aspects, the sorting parameters may include a surface area heuristic (SAH) associated with each node of a given BVH level. The SAH can be used to provide an estimate of the ray tracing performance of a portion (or all) of a BVH or other acceleration data structure. In some examples, the BVH nodes of a given BVH level can be sorted in increasing or decreasing order according to the SAH. When sorting in increasing order of SAH, shadow ray traversal can be performed for a given BVH level by first visiting the BVH node determined to have the smallest SAH (e.g., visiting the node with the smallest SAH first, and visiting the node with the largest SAH last). When sorting in decreasing order of SAH, shadow ray traversal can be performed for a given BVH level by first visiting the BVH node determined to have the largest SAH (e.g., visiting the node with the largest SAH first, and visiting the node with the smallest SAH last).
[0095] In some aspects, the sorting parameters may include or otherwise be based on the density associated with each node of a given BVH level. In some examples, the density of a given BVH node may be determined as the density of a subtree of the BVH node (e.g., also referred to herein as a "subtree density value"). A subtree of a BVH node may include one or more BVH intermediate nodes, BVH leaf nodes, scene primitives, and / or combinations thereof. In an illustrative example, the sorting parameters may include a subtree density value, wherein the subtree density of a given BVH node may be determined as the area of a given BVH node divided by the number of primitives included in a given BVH node (e.g., the number of primitives included in a subtree of a given BVH node). In some examples, the BVH nodes of a given BVH level may be sorted in increasing order or decreasing order according to density. When sorting in increasing order of density, shadow ray traversal may be performed for a given BVH level by first visiting the BVH node determined to have the lowest density (e.g., first visiting the node with the lowest density, and finally visiting the node with the highest density). When sorting in decreasing density order, shadow ray traversal may be performed for a given BVH level by first visiting BVH nodes determined to have the highest density (eg, visiting nodes with the highest density first, and nodes with the lowest density last).
[0096] In some aspects, the sorting parameters may include the number of primitives associated with each node of a given BVH level. For example, the number of primitives associated with a given BVH node may be determined as the number of primitives included in a subtree of a given BVH node. In some examples, the BVH nodes of a given BVH level may be sorted in ascending or descending order according to the number of primitives. When sorting in ascending order of the number of primitives, shadow ray traversal may be performed for a given BVH level by first accessing the BVH node determined to have the smallest number of primitives (e.g., first accessing the node with the smallest number of primitives, and finally accessing the node with the largest number of primitives). When sorting in descending order of the number of primitives, shadow ray traversal may be performed for a given BVH level by first accessing the BVH node determined to have the largest number of primitives (e.g., first accessing the node with the largest number of primitives, and finally accessing the node with the smallest number of primitives).
[0097] In one illustrative example, one or more (or all) of the sorting parameters may be determined during BVH construction. For example, the BVH construction process may include determining values for one or more sorting parameters at one or more (or all) of the BVH nodes included in the BVH being constructed. The determined sorting parameter values may be included in or associated with the generated BVH, may be stored separately from the BVH (e.g., and accessed during a shadow ray BVH traversal), or a combination of both.
[0098] In some examples, the systems and techniques may group sorted BVH nodes at each BVH level visited during shadow ray traversal. For example, a first group may include BVH nodes with opaque primitives, while a second group may include BVH nodes with non-opaque primitives. The first group may include BVH nodes containing only opaque primitives, and / or may include BVH nodes containing at least one opaque primitive. In some examples, when the first group includes BVH nodes containing only opaque primitives, a second group may be generated to include BVH nodes containing a combination of opaque and non-opaque primitives, and a third group may be generated to include BVH nodes containing only non-opaque primitives. In an illustrative example, the sorted BVH nodes of a given BVH level may be arranged based on the above grouping (e.g., a group including BVH nodes with opaque primitives may be traversed or visited before a group including BVH nodes with non-opaque primitives). For example, the BVH nodes included in the first group may be traversed first, followed by the BVH nodes included in the second group (and followed by the BVH nodes included in the third group, if any, and so on).
[0099] In some aspects, grouping can be applied to BVH nodes that have already been sorted (e.g., sorted based on sorting parameters, as described above). In some cases, grouping can be applied before sorting the BVH nodes. For example, the BVH nodes at a given BVH level can be first classified into groups based on whether the BVH nodes include opaque primitives. Groups of BVH nodes that include opaque primitives can be classified before groups of BVH nodes that do not include opaque primitives (e.g., only non-opaque primitives). The BVH nodes included in each different group can then be sorted based on the sorting parameters described above. For example, the BVH nodes within each group can be rearranged based on the selected sorting parameters, while the overall arrangement of the BVH node group remains unchanged.
[0100] In some cases, the group (groups) of BVH nodes with opaque primitives may be subject to subsequent sorting (e.g., based on the sorting parameters described above), while the group of BVH nodes with only non-opaque primitives is not subject to any subsequent sorting. For example, a shadow ray BVH traversal may terminate when an intersection between a shadow ray and a light source or a shadow ray and any non-opaque primitive is found, whichever comes first (e.g., the shadow ray terminates early). Because the non-opaque group of BVH nodes does not contain any opaque primitives, and because the shadow ray BVH traversal begins by visiting the group of BVH nodes that do contain opaque primitives, the shadow ray BVH traversal should terminate before the group of non-opaque BVH nodes needs to be visited (e.g., the group of non-opaque BVH nodes can be left unsorted because they will not be traversed or otherwise visited).
[0101] Figure 6B An example shadow ray BVH traversal 600b is depicted in accordance with aspects of the present disclosure. In some examples, BVH 600b may be similar to the one described above with respect to Fig. 6A 600a. As will be described in more depth below, the systems and techniques can be used to perform shadow ray traversal for BVH 600b by selecting BVH nodes with an increased probability of shadow ray-opaque primitive intersections at each traversal step. In some aspects, a shadow ray-opaque primitive intersection can occur for a given BVH node when the BVH node includes one or more opaque primitives and the shadow ray intersects any one of the one or more opaque primitives included in the BVH node. As shown, traversal steps are depicted as bold connection arrows between pairs of BVH nodes.
[0102] In some aspects, starting at BVH root node 602, the systems and techniques can use one or more sorting parameters and / or BVH node grouping to sort the BVH nodes of the next BVH level, as described above. For example, when shadow ray traversal starts at BVH root node 602, the next BVH level can be the level within BVH 600b that is immediately below BVH root node 602. As shown, the next BVH level includes BVH interior nodes 612 and BVH leaf nodes 614.
[0103] In one illustrative example, the BVH nodes (e.g., nodes 612 and 614) of a given BVH level can be sorted in descending order based on a density parameter of each node (e.g., using density as a sorting parameter). In a density sorting in descending order, the BVH node with the greatest density is provided first in the sorting order, and the BVH node with the lowest density is provided last in the sorting order. Figure 6B In the example of , BVH internal nodes 612 may have a greater density than BVH leaf nodes 614 and will be sorted first in the sort order.
[0104] BVH nodes 612 and 614 are additionally grouped (based on the type or content associated with each node). For example, a first group may be generated to include only BVH nodes with opaque primitives, and a second group may be generated to include only BVH nodes with non-opaque primitives. BVH leaf node 614 includes only opaque primitives 657 and 659 and may be assigned to the first group. BVH internal node 612 includes non-opaque (e.g., transparent) primitives 652, 654, and 656, and also includes opaque primitive 655, and may be assigned to the second group. As described above, additional sorting may be performed so that the first group of opaque BVH nodes are arranged before the second group of non-opaque BVH nodes.
[0105] exist Figure 6B In the example of , although BVH leaf node 614 has a lower density sorting parameter than BVH interior node 612, based on the grouping, BVH leaf node 614 may be sorted earlier in the sorting order than BVH interior node 612. In other words, although BVH interior node 612 is determined to be a denser node (e.g., and would otherwise be traversed first), the use of grouping causes BVH leaf node 614 to be traversed first (e.g., because BVH leaf node 614 includes only opaque primitives and may be associated with a greater probability of early termination of shadow rays).
[0106] In another illustrative example, the systems and techniques can perform shadow ray BVH traversals with increased efficiency based on sorting the BVH nodes of a given BVH level in increasing order of the number of non-opaque (e.g., transparent) primitives included in each given node. For example, the BVH node with the fewest non-opaque primitives can be first in the sorted order, while the BVH node with the most non-opaque primitives can be last in the sorted order. An initial sort based on the number of non-opaque primitives included can be applied to each BVH node of the BVH level. In this example, BVH nodes that contain only opaque primitives (e.g., contain zero non-opaque primitives) will be sorted first in the sorted order.
[0107] Additional sorting may then be applied to the BVH nodes containing opaque primitives, such as using one or more of the above sorting parameters (e.g., node area, node SAH, node density, total number of primitives included by the node). For example, additional sorting may be applied to BVH nodes containing only opaque primitives (e.g., BVH leaf nodes 614) and / or BVH nodes containing both opaque and non-opaque primitives (e.g., BVH interior nodes 612). Additional sorting may be omitted for BVH nodes containing only non-opaque primitives (e.g., BVH leaf nodes 622).
[0108] In some aspects, additional sorting can be applied to BVH nodes containing opaque primitives based on SAH sorting parameters, wherein the opaque BVH nodes are sorted in descending order of SAH. For example, based on the additional sorting, opaque BVH nodes with lower SAH can be placed earlier in the sorting order than opaque BVH nodes with higher SAH (e.g., where non-opaque BVH nodes are pushed to the end of the sorting order). In some examples, in lower (e.g., deeper) BVH levels, a shadow ray BVH traversal can be utilized based on the following manner: all BVH nodes of a given BVH level are sorted in increasing order according to the number of non-opaque primitives they include, followed by increasing order SAH sorting of opaque BVH nodes. For example, in lower or deeper levels of the BVH, a larger number of BVH nodes can exist in each level, and greater granularity and differentiation can be provided in the resulting sorting order generated using the above-described two-stage sorting method.
[0109] In another illustrative example, the systems and techniques can perform shadow-ray BVH traversals with increased efficiency by sorting each BVH node based on the relative SAH determined for the BVH nodes at a given BVH level. For example, when a shadow-ray BVH traversal reaches a new level of the BVH (e.g., and must decide which particular BVH node to traverse or visit next for a given BVH level), the BVH node determined to have the largest relative SAH can be traversed first.
[0110] In some aspects, the relative SAH may be determined as the amount of opacity distributed over a parent node (e.g., each given BVH node at the level) relative to the amount of non-opacity distributed over the same parent node. For example, the relative SAH for a BVH node may be determined as:
[0111]
[0112] Here, SAH(opaque) may be determined as the aggregate SAH over opaque primitives of a given BVH node, and SAH(non-opaque) may be determined as the aggregate SAH over non-opaque (eg, transparent) primitives of a given BVH node.
[0113] In some aspects, the relative SAH value determined for a given BVH node can be associated with the probability that a shadow ray will intersect or hit an opaque primitive included within the BVH node. For example, at lower relative SAH values, the denominator of equation (1) may dominate due to the relatively high presence of SAH contributions of non-opaque (e.g., transparent) primitives. At higher relative SAH values, the numerator of equation (1) may dominate due to the relatively high presence of SAH contributions of opaque primitives.
[0114] In some examples, a relative SAH can be determined for each BVH node at a given BVH level (e.g., using equation (1)), and the BVH nodes can then be sorted in decreasing order of relative SAH. For example, the BVH node with the largest relative SAH value can be arranged first in the sort order (e.g., the node with the largest probability of hitting an opaque primitive), while the BVH node with the smallest relative SAH value can be arranged last in the sort order (e.g., the node with the smallest probability of hitting an opaque primitive). The shadow ray BVH traversal can then continue through each level of the BVH (e.g., using a depth-first search), with the nodes of each newly traversed or encountered level being sorted based on the relative SAH until a shadow ray-opaque primitive intersection is found and a shadow ray early termination condition is triggered. In some aspects, the systems and techniques perform shadow ray BVH traversals with improved efficiency based on each traversal decision (e.g., each selection of a next BVH node to visit from a set of candidate BVH nodes that can be visited) maximizing the relative probability of finding a shadow ray-opaque primitive intersection.
[0115] Figure 7 700 for graphics processing. Although the example process 700 depicts a specific sequence of operations, the sequence may be changed without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order that does not substantially affect the functionality of the process 700. In other examples, different components of the example device or system implementing the process 700 may perform functions at substantially the same time or in a specific sequence.
[0116] At block 702, process 700 includes obtaining a hierarchical acceleration data structure that includes one or more primitives of a scene object. For example, the acceleration data structure may be composed of Figure 5 The acceleration data structure may be obtained by or from the acceleration data structure engine 522 associated with the ray tracing system 500 shown in FIG. 5 . In some cases, the acceleration data structure may include a bounding volume hierarchy (BVH). For example, the BVH may be associated with Figure 4B The BVH400b shown in Fig. 6A The BVH 600a shown in FIG. 600a and / or in FIG. Figure 6B In some examples, the acceleration data structure may include a underlying acceleration structure (BLAS). For example, the acceleration data structure may include Figure 4AIn some cases, one or more primitives of a scene object may be included in one or more leaf nodes of the acceleration data structure. For example, one or more primitives of a scene object may be included in the following: Figure 4B One or more of the leaf nodes 481, 482 and / or 491 shown in Fig. 6A One or more of the leaf nodes 622, 624, and / or 614 shown in FIG. 6; and / or Figure 6B One or more of the leaf nodes 622, 624 and / or 614 shown in .
[0117] In some examples, the acceleration data structure may include a BLAS associated with a top-level acceleration structure (TLAS) leaf node. In examples where the acceleration data structure includes a BLAS, the BLAS may additionally or alternatively include one or more intermediate BLAS nodes. One or more of the intermediate BLAS nodes may include an axis-aligned bounding box (AABB) that surrounds a subset of one or more primitives of a scene object.
[0118] At block 704, process 700 includes sorting the two or more nodes into a sorted order based on a sorting parameter value determined for each respective node in the two or more nodes included in the same level of the hierarchical acceleration data structure. The sorting parameter value may be associated with determining a probability of a ray-opaque primitive intersection for each respective node in the two or more nodes. For example, a ray-opaque primitive intersection may be associated with determining a probability of a ray-opaque primitive intersection for each respective node in the two or more nodes. Figure 1C The example ray-opaque primitive intersection between shadow ray 164 and opaque primitive 135 depicted in FIG. 1 is the same or similar.
[0119] In some examples, sorting the two or more nodes may include determining a set of opaque nodes from the two or more nodes sorted into the sorted order, wherein each opaque node included in the set of opaque nodes includes one or more opaque primitives. For example, the set of opaque nodes may include Fig. 6A and Figure 6B , wherein opaque nodes 612 and 624 include opaque primitive 655, and opaque node 614 includes opaque primitives 657 and 659. Process 700 may further include determining a set of non-opaque nodes from the two or more nodes sorted into the sorted order, wherein each non-opaque node included in the set of non-opaque nodes includes a non-opaque primitive. For example, the set of non-opaque nodes may include Fig. 6A and Figure 6B The non-opaque node 622 is shown in FIG.
[0120] In some examples, process 700 can further include updating the sort order to include the set of opaque nodes before the set of non-opaque nodes. For example, one or more (or all) of opaque nodes 612, 624, and / or 614 can be included before non-opaque node 622 in the sort order (e.g., before Fig. 6A and Figure 6B ). In some examples, the sorting order can be based on a sorting parameter value, where the sorting parameter value is a subtree density value determined for each corresponding node in the two or more nodes. The sorting order can be based on a descending order of the subtree density values determined for each corresponding node in the two or more nodes.
[0121] In some examples, process 700 may further include determining the sorting parameter value as a relative surface area heuristic (SAH) value associated with each corresponding node in two or more nodes. In some cases, determining the sorting parameter value as a relative SAH value associated with each corresponding node in two or more nodes further includes: determining a total SAH value for one or more opaque primitives included in each corresponding node. The total SAH value may be additionally determined for one or more non-opaque primitives included in each corresponding node. The relative SAH value may be determined as a ratio of the total SAH value for one or more opaque primitives to the total SAH value for one or more non-opaque primitives. In some cases, the sorting order may be based on a decreasing order of the relative SAH associated with each corresponding node in two or more nodes.
[0122] In some examples, the sorting parameter value for each corresponding node in the two or more nodes may be determined as the bounding box area associated with each corresponding node. In some cases, the sorting parameter value for each corresponding node in the two or more nodes may be determined as a surface area heuristic (SAH) value associated with each corresponding node. In some examples, the sorting parameter value for each corresponding node in the two or more nodes may be determined as a subtree density value associated with each corresponding node. In some examples, the sorting parameter value for each corresponding node in the two or more nodes may be determined as the number of primitives included in the subtree associated with each corresponding node.
[0123] In some examples, determining a sort parameter value for each respective node in two or more nodes may be based on the number of non-opaque primitives included in each respective node, wherein the sort order is based on an increasing order of the number of non-opaque primitives. In some cases, the sort order may be updated based on performing additional sorting on one or more opaque nodes included in the sort order and determined to include opaque primitives, wherein the additional sorting is based on additional sort parameter values determined for each respective node in the one or more opaque nodes. For example, the additional sort parameter value may include at least one of the following: a bounding box area associated with each opaque node in the one or more opaque nodes, a surface area heuristic (SAH) value associated with each opaque node in the one or more opaque nodes, a subtree density value associated with each opaque node in the one or more opaque nodes, or the number of primitives included in a subtree associated with each opaque node in the one or more opaque nodes. In some cases, the additional sorting parameter value may be a surface area heuristic (SAH) value determined for each of the one or more opaque nodes, and the additional sorting may include sorting the one or more opaque nodes into an increasing order based on the SAH value determined for each of the one or more opaque nodes.
[0124] At block 706, process 700 includes determining, based on traversing the hierarchical acceleration data structure using a sorted order, intersections between shadow rays and opaque primitives in nodes included in two or more nodes. Figure 6B hierarchical acceleration data structure (e.g., BVH) 600b shown in FIG. 6B , determines the shadow ray and also Figure 6B In some examples, this sorted order can be used to traverse the nodes in the tree by initially traversing from node 602 to node 614, and from node 614 to the child opaque primitive 657. Figure 6B The hierarchical acceleration data structure 600b is shown in FIG.
[0125] In some examples, the processes described herein (e.g., process 700 and / or any other processes described herein) can be performed by a computing device, apparatus, or system. In one example, process 700 can be performed by a computer having Figure 8The computing device, apparatus or system may be executed by a computing device or system of the computing device architecture 800 of the present invention. The computing device, apparatus or system may include any suitable device, for example, a mobile device (e.g., a mobile phone), a desktop computing device, a tablet computing device, a wearable device (e.g., a VR headset, an AR headset, AR glasses, an extended reality (XR) headset, a network-connected watch or smart watch or other wearable device), a server computer, a vehicle or a computing device of a vehicle, a robotic device, a laptop computer, a smart TV, a camera and / or any other computing device with resource capabilities to perform the processes described herein (including process 700 and / or any other processes described herein). In some cases, the computing device or apparatus may include various components, for example, one or more input devices, one or more output devices, one or more processors, one or more microprocessors, one or more microcomputers, one or more cameras, one or more sensors and / or other components configured to perform the steps of the processes described herein. In some examples, the computing device may include a display, a network interface configured to transmit and / or receive data, any combination thereof and / or other components. The network interface may be configured to transmit and / or receive data based on an Internet Protocol (IP) or other types of data.
[0126] Components of a computing device may be implemented using circuitry. For example, a component may include and / or may be implemented using electronic circuits or other electronic hardware (which may include one or more programmable electronic circuits (e.g., microprocessors, graphics processing units (GPUs), digital signal processors (DSPs), central processing units (CPUs), and / or other suitable electronic circuits)), and / or may include and / or be implemented using computer software, firmware, or any combination thereof to perform the various operations described herein.
[0127] Process 700 is illustrated as a logic flow diagram, the operations of which represent a sequence of operations that can be implemented in hardware, computer instructions, or a combination thereof. In the context of computer instructions, the operations represent computer-executable instructions stored on one or more computer-readable storage media that, when executed by one or more processors, perform the recited operations. Typically, computer-executable instructions include routines, programs, objects, components, data structures, etc. that perform specific functions or implement specific data types. The order in which the operations are described is not intended to be construed as a limitation, and any number of the described operations may be combined in any order and / or in parallel to implement the processes.
[0128] In addition, process 700 and / or any other process described herein can be performed under the control of one or more computer systems configured with executable instructions, and can be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) that is executed together on one or more processors, implemented by hardware, or a combination thereof. As mentioned above, the code can be stored on a computer-readable or machine-readable storage medium, for example, in the form of a computer program including multiple instructions executable by one or more processors. The computer-readable storage medium or machine-readable storage medium can be non-transitory.
[0129] Figure 8 An example computing device architecture 800 of an example computing device that can implement the various techniques described herein is shown. In some examples, the computing device may include a mobile device, a wearable device, an extended reality device (e.g., a virtual reality (VR) device, an augmented reality (AR) device, an extended reality (XR) device, or a mixed reality (MR) device), a personal computer, a laptop computer, a video server, a vehicle (or a computing device of a vehicle), or other device. The components of the computing device architecture 800 are shown as being in electrical communication with each other using a connection 805 (e.g., a bus). The example computing device architecture 800 includes a processing unit (CPU or processor) 810 and a computing device connection 805 that couples various computing device components (including computing device memory 815, such as a read-only memory (ROM) 820 and a random access memory (RAM) 825) to the processor 810.
[0130] The computing device architecture 800 may include a cache of high-speed memory directly connected to the processor 810, in close proximity to the processor 810, or integrated as part of the processor 810. The computing device architecture 800 may copy data from the memory 815 and / or the storage device 830 to the cache 812 for quick access by the processor 810. In this way, the cache can provide a performance boost, which avoids delays in the processor 810 when waiting for data. These and other engines can control or be configured to control the processor 810 to perform various actions. Other computing device memories 815 may also be available. The memory 815 may include a variety of different types of memory with different performance characteristics. The processor 810 may include any general-purpose processor and hardware or software services (e.g., service 1 832, service 2 834, and service 3 836 stored in the storage device 830, which are configured to control the processor 810) and a dedicated processor (where software instructions are incorporated into the processor design). The processor 810 may be a self-contained system that includes multiple cores or processors, buses, memory controllers, caches, and the like. Multi-core processors can be symmetric or asymmetric.
[0131] To enable user interaction with the computing device architecture 800, the input device 845 may represent any number of input mechanisms, such as a microphone for voice, a touch-sensitive screen for gesture or graphic input, a keyboard, a mouse, motion input, voice, and the like. The output device 835 may also be one or more of a variety of output mechanisms known to those skilled in the art, such as a display, a projector, a television, a speaker device, and the like. In some cases, a multimodal computing device may enable a user to provide multiple types of input to communicate with the computing device architecture 1000. The communication interface 1040 may generally govern and manage user input and computing device output. There is no limitation on operation on any particular hardware arrangement, and therefore, the basic features herein may be easily replaced by improved hardware or firmware arrangements as they are developed.
[0132] The storage device 830 is a non-volatile memory and can be a hard disk or other type of computer-readable medium that can store data accessible by a computer, such as a magnetic tape, a flash memory card, a solid-state memory device, a digital versatile disk, a cassette tape, a random access memory (RAM) 825, a read-only memory (ROM) 820, and mixtures thereof. The storage device 830 may include services 832, 834, 836 for controlling the processor 810. Other hardware or software modules or engines are contemplated. The storage device 830 may be connected to the computing device connection 805. In one aspect, a hardware module that performs a particular function may include a software component stored in a computer-readable medium that is connected to the necessary hardware components (such as the processor 810, the connection 805, the output device 835, etc.) to perform the function.
[0133] Aspects of the present disclosure are applicable to any suitable electronic device (e.g., a security system, smart phone, tablet device, laptop computer, vehicle, or other device) that includes or is coupled to one or more active depth sensing systems. Although described below with respect to a device having or being coupled to one light projector, aspects of the present disclosure are applicable to devices having any number of light projectors and are therefore not limited to a particular device.
[0134] The term "device" is not limited to one or a specific number of physical objects (e.g., a smart phone, a controller, a processing system, etc.). As used herein, a device can be any electronic device having one or more parts that can implement at least some parts of the present disclosure. Although the following description and examples use the term "device" to describe various aspects of the present disclosure, the term "device" is not limited to a specific configuration, type, or number of objects. In addition, the term "system" is not limited to multiple components or specific aspects. For example, a system can be implemented on one or more printed circuit boards or other substrates and can have movable or static components. Although the following description and examples use the term "system" to describe various aspects of the present disclosure, the term "system" is not limited to a specific configuration, type, or number of objects.
[0135] Specific details are provided in the above description to provide a thorough understanding of the aspects and examples provided herein. However, it will be appreciated by those skilled in the art that these aspects can be put into practice without these specific details. For clarity of explanation, in some cases, the present technology may be presented as including a separate functional block, which includes a functional block comprising a device, a device component, a step or a routine in a method embodied in software, or a combination of hardware and software. In addition to those components shown in the figure and / or described herein, additional components can also be used. For example, circuits, systems, networks, processes and other components can be shown as components in the form of block diagrams, so as not to obscure various aspects in unnecessary details. In other cases, known circuits, processes, algorithms, structures and techniques can be shown without unnecessary details, so as to avoid blurring these aspects.
[0136] Various aspects can be described above as a process or method, which is depicted as a flow chart, a flow diagram, a data flow chart, a structure diagram or a block diagram. Although a flow chart can describe an operation as a sequential process, many operations can be performed in parallel or concurrently. In addition, the order of the operations can be rearranged. The process is terminated when its operation is completed, but there may be additional steps not included in the figure. The process may correspond to a method, a function, a process, a subroutine, a subprogram, etc. When a process corresponds to a function, its termination may correspond to the function returning to a calling function or a main function.
[0137] The processes and methods according to the above examples can be implemented using computer executable instructions, which are stored in or otherwise available from computer readable media. Such instructions may include, for example, instructions or data that cause a general-purpose computer, a special-purpose computer, or a processing device to perform or otherwise be configured to perform a certain function or a certain group of functions. Portions of the computer resources used may be accessed over a network. Computer executable instructions may be, for example, binary files, intermediate format instructions such as assembly language, firmware, source code, etc.
[0138] The term "computer-readable medium" includes, but is not limited to, portable or non-portable storage devices, optical storage devices, and various other media capable of storing, containing or carrying instructions and / or data. Computer-readable media may include non-transient media in which data may be stored and do not include carrier waves and / or temporary electronic signals that are propagated wirelessly or by wired connections. Examples of non-transient media may include, but are not limited to, disks or tapes, optical storage media (e.g., flash memory), memory or memory devices, disks or optical disks, flash memory, USB devices provided with non-volatile memory, networked storage devices, compact discs (CDs) or digital versatile discs (DVDs), any suitable combination thereof, and the like. Computer-readable media may have codes and / or machine-executable instructions stored thereon, which may represent any combination of processes, functions, subroutines, programs, routines, subroutines, modules, engines, software packages, classes, or instructions, data structures, or program statements. Code segments may be coupled to another code segment or hardware circuit by passing and / or receiving information, data, independent variables, parameters, or memory contents. Information, arguments, parameters, data, etc. may be passed, forwarded, or transmitted via any suitable means, including memory sharing, message passing, token passing, network transmission, etc.
[0139] In some aspects, computer readable storage devices, media, and memories may include cables or wireless signals containing bit streams, etc. However, when referred to, non-transitory computer readable storage media expressly excludes media such as energy, carrier signals, electromagnetic waves, and signals themselves.
[0140] The equipment implementing the process and method according to these disclosures may include hardware, software, firmware, middleware, microcode, hardware description language or any combination thereof, and may take any of various form factors. When implemented with software, firmware, middleware or microcode, the program code or code segment (e.g., computer program product) performing the necessary tasks may be stored in a computer-readable or machine-readable medium. The processor may perform the necessary tasks. Typical examples of form factors include personal computers, personal digital assistants, rack-mounted devices, stand-alone devices, etc., of laptop computers, smart phones, mobile phones, tablet devices or other small form factors. The functions described herein may also be embodied in peripheral devices or add-on cards. By further example, such functions may also be implemented on circuit boards between different chips or between different processes executed in a single device.
[0141] Instructions, media for communicating such instructions, computing resources for executing the same, and other structures for supporting such computing resources are example means for providing the functionality described in this disclosure.
[0142] In the foregoing description, various aspects of the present application are described with reference to specific aspects of the present application, but those skilled in the art will recognize that the present application is not limited thereto. Therefore, although the illustrative aspects of the present application have been described in detail herein, it will be understood that the innovative concept can be embodied and adopted differently in other ways, and the appended claims are intended to be interpreted as including such variations, except for variations limited by the prior art. The various features and aspects of the above-mentioned application can be used individually or collectively. In addition, without departing from the broader spirit and scope of this specification, various aspects can be used in any number of environments and applications other than the environment and application described herein. Therefore, the description and the accompanying drawings are considered to be illustrative rather than restrictive. For the purpose of illustration, the method is described in a specific order. It should be understood that in alternative aspects, the method can be performed in an order different from the described order.
[0143] One of ordinary skill will appreciate that the less than ("<") and greater than (">") symbols or terms used herein may be replaced with the less than or equal to ("≤") and greater than or equal to ("≥") symbols, respectively, without departing from the scope of the present specification.
[0144] When a component is described as being “configured to” perform certain operations, such configuration may be achieved, for example, by designing an electronic circuit or other hardware to perform the operation, by programming a programmable circuit (e.g., a microprocessor or other appropriate circuit) to perform the operation, or any combination thereof.
[0145] The phrase "coupled to" means that any component is directly or indirectly physically connected to another component, and / or any component is directly or indirectly in communication with another component (e.g., connected to another component via a wired or wireless connection and / or other suitable communication interface).
[0146] Claim language or other language that recites "at least one of" a set and / or "one or more of" a set indicates that one member of the set or multiple members of the set (in any combination) satisfies the claim. For example, claim language that recites "at least one of A and B" or "at least one of A or B" means A, B, or A and B. In another example, claim language that recites "at least one of A, B, and C" or "at least one of A, B, or C" means A, B, C, or A and B, or A and C, or B and C, or A and B and C. Language about "at least one of" a set and / or "one or more of" a set does not limit the set to the items listed in the set. For example, claim language that recites "at least one of A and B" or "at least one of A or B" may mean A, B, or A and B, and may additionally include items not listed in the set of A and B.
[0147] Various illustrative logic blocks, modules, engines, circuits and algorithmic steps described in conjunction with aspects disclosed herein can be implemented as electronic hardware, computer software, firmware or a combination thereof. In order to clearly illustrate this interchangeability of hardware and software, various illustrative parts, blocks, modules, engines, circuits and steps have been generally described around their functions above. Whether this function is implemented as hardware or software depends on specific applications and the design constraints imposed on the entire system. Technicians can implement the described functions in different ways for each specific application, but this implementation decision should not be interpreted as causing deviations from the scope of the application.
[0148] The technology described herein can also be implemented with electronic hardware, computer software, firmware, or any combination thereof. Such technology can be implemented in any of a variety of devices, such as a general-purpose computer, a wireless communication device mobile phone, or an integrated circuit device with multiple uses (including applications in wireless communication devices and other devices). Any features described as modules or components can be implemented together in an integrated logic device, or as separate but interoperable logic devices. If implemented with software, the technology can be implemented at least in part by a computer-readable data storage medium, which includes a program code, and the program code includes instructions for executing one or more of the above methods when executed. The computer-readable data storage medium can form a part of a computer program product, and the computer program product can include packaging materials. The computer-readable medium can include a memory or a data storage medium, such as a random access memory (RAM) (such as a synchronous dynamic random access memory (SDRAM)), a read-only memory (ROM), a non-volatile random access memory (NVRAM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a magnetic or optical data storage medium, etc. Additionally or alternatively, the techniques may be implemented at least in part by a computer-readable communication medium (such as a propagated signal or wave) that carries or communicates program code in the form of instructions or data structures and that can be accessed, read, and / or executed by a computer.
[0149] The program code can be executed by a processor, which may include one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuit systems. Such a processor can be configured to perform any technology described in this disclosure. A general-purpose processor can be a microprocessor, but in an alternative, the processor can be any conventional processor, controller, microcontroller, or state machine. The processor can also be implemented as a combination of computing devices, for example, a combination of a DSP and a microprocessor, a plurality of microprocessors, a combination of one or more microprocessors and a DSP core, or any other such configuration. Therefore, the term "processor" as used herein may refer to any of the aforementioned structures, any combination of the aforementioned structures, or any other structure or device suitable for implementing the technology described herein.
[0150] Illustrative aspects of the disclosure include:
[0151] Aspect 1: A method of ray tracing, the method comprising: obtaining a hierarchical acceleration data structure, the hierarchical acceleration data structure comprising one or more primitives of a scene object; sorting the two or more nodes into a sorted order based on a sorting parameter value determined for each corresponding node of two or more nodes included in a same level of the hierarchical acceleration data structure, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each corresponding node of the two or more nodes; and determining an intersection between a shadow ray and an opaque primitive in a node included in the two or more nodes based on traversing the hierarchical acceleration data structure using the sorted order.
[0152] Aspect 2: The method according to aspect 1, further comprising: determining the ranking parameter value as a relative surface area heuristic (SAH) value associated with each respective node of the two or more nodes.
[0153] Aspect 3: A method according to Aspect 2, wherein determining the sorting parameter value as a relative SAH value associated with each corresponding node of two or more nodes further includes: determining a total SAH value for one or more opaque primitives included in each corresponding node; determining a total SAH value for one or more non-opaque primitives included in each corresponding node; and determining the relative SAH value as a ratio of the total SAH value for one or more opaque primitives to the total SAH value for one or more non-opaque primitives.
[0154] Aspect 4: The method according to any one of aspects 2 to 3, wherein the sorting order is based on a decreasing order of relative SAH values associated with each respective node of the two or more nodes.
[0155] Aspect 5: The method according to any one of aspects 1 to 4, further comprising: determining the ranking parameter value for each corresponding node of the two or more nodes as a bounding box area associated with each corresponding node.
[0156] Aspect 6: The method according to any one of aspects 1 to 5, further comprising: determining the ranking parameter value for each respective node of the two or more nodes as a surface area heuristic (SAH) value associated with each respective node.
[0157] Aspect 7: The method according to any one of aspects 1 to 6, further comprising: determining the sorting parameter value for each corresponding node of the two or more nodes as a subtree density value associated with each corresponding node.
[0158] Aspect 8: The method according to any one of aspects 1 to 7, further comprising: determining the sorting parameter value for each respective node of the two or more nodes as the number of primitives included in a subtree associated with each respective node.
[0159] Aspect 9: A method according to any one of Aspects 1 to 8, wherein sorting two or more nodes further includes: determining a group of opaque nodes from the two or more nodes sorted into the sorted order, wherein each opaque node included in the group of opaque nodes includes one or more opaque primitives; and determining a group of non-opaque nodes from the two or more nodes sorted into the sorted order, wherein each non-opaque node included in the group of non-opaque nodes includes non-opaque primitives.
[0160] Aspect 10: The method according to aspect 9, further comprising: updating the sorting order to include the group of opaque nodes before the group of non-opaque nodes.
[0161] Aspect 11: A method according to Aspect 10, wherein: the sorting parameter value is a subtree density value determined for each corresponding node in two or more nodes; and the sorting order is based on the descending order of the subtree density value determined for each corresponding node in two or more nodes.
[0162] Aspect 12: The method according to any one of Aspects 1 to 11 further includes: determining the sorting parameter value for each corresponding node among two or more nodes as the number of non-opaque primitives included in each corresponding node, wherein the sorting order is based on the increasing order of the number of non-opaque primitives.
[0163] Aspect 13: The method according to Aspect 12 further includes: updating the sorting order based on performing additional sorting on one or more opaque nodes included in the sorting order and determined to include opaque primitives; wherein the additional sorting is based on additional sorting parameter values determined for each corresponding node in the one or more opaque nodes.
[0164] Aspect 14: A method according to Aspect 13, wherein the additional sorting parameter value includes at least one of the following: a bounding box area associated with each of the one or more opaque nodes, a surface area heuristic (SAH) value associated with each of the one or more opaque nodes, a subtree density value associated with each of the one or more opaque nodes, or a number of primitives included in a subtree associated with each of the one or more opaque nodes.
[0165] Aspect 15: A method according to any one of Aspects 13 to 14, wherein: the additional sorting parameter value is a surface area heuristic (SAH) value determined for each of the one or more opaque nodes; and the additional sorting includes sorting the one or more opaque nodes into an increasing order based on the SAH value determined for each of the one or more opaque nodes.
[0166] Aspect 16: A device for ray tracing, comprising: a memory; and one or more processors coupled to the memory, the one or more processors being configured to: obtain a hierarchical acceleration data structure, the hierarchical acceleration data structure comprising one or more primitives of a scene object; sort the two or more nodes into a sorted order based on a sorting parameter value determined for each corresponding node of two or more nodes included in the same level of the hierarchical acceleration data structure, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each corresponding node of the two or more nodes; and determine an intersection between a shadow ray and an opaque primitive in a node included in the two or more nodes based on traversing the hierarchical acceleration data structure using the sorted order.
[0167] Aspect 17: The apparatus of aspect 16, wherein the one or more processors are further configured to: determine the ranking parameter value as a relative surface area heuristic (SAH) value associated with each respective node of the two or more nodes.
[0168] Aspect 18: An apparatus according to Aspect 17, wherein, in order to determine the sorting parameter value as a relative SAH value associated with each corresponding node of two or more nodes, one or more processors are further configured to: determine a total SAH value for one or more opaque primitives included in each corresponding node; determine a total SAH value for one or more non-opaque primitives included in each corresponding node; and determine the relative SAH value as a ratio of the total SAH value for one or more opaque primitives to the total SAH value for one or more non-opaque primitives.
[0169] Aspect 19: An apparatus according to any one of Aspects 17 to 18, wherein the sorting order is based on a decreasing order of relative SAH values associated with each respective node of the two or more nodes.
[0170] Aspect 20: An apparatus according to any one of Aspects 16 to 19, wherein the one or more processors are further configured to: determine the sorting parameter value for each corresponding node of the two or more nodes as a bounding box area associated with each corresponding node.
[0171] Aspect 21: An apparatus according to any one of Aspects 16 to 20, wherein the one or more processors are further configured to: determine the sorting parameter value for each corresponding node among the two or more nodes as a surface area heuristic (SAH) value associated with each corresponding node.
[0172] Aspect 22: An apparatus according to any one of Aspects 16 to 21, wherein the one or more processors are further configured to: determine the sorting parameter value for each corresponding node among the two or more nodes as a subtree density value associated with each corresponding node.
[0173] Aspect 23: An apparatus according to any one of Aspects 16 to 22, wherein the one or more processors are further configured to: determine the sorting parameter value for each corresponding node among two or more nodes as the number of primitives included in the subtree associated with each corresponding node.
[0174] Aspect 24: An apparatus according to any one of Aspects 16 to 23, wherein, in order to sort two or more nodes, one or more processors are further configured to: determine a group of opaque nodes from the two or more nodes sorted into the sorted order, wherein each opaque node included in the group of opaque nodes includes one or more opaque primitives; and determine a group of non-opaque nodes from the two or more nodes sorted into the sorted order, wherein each non-opaque node included in the group of non-opaque nodes includes non-opaque primitives.
[0175] Aspect 25: The apparatus according to Aspect 24, wherein the one or more processors are further configured to: update the sorting order to include the group of opaque nodes before the group of non-opaque nodes.
[0176] Aspect 26: An apparatus according to Aspect 25, wherein: the sorting parameter value is a subtree density value determined for each corresponding node in two or more nodes; and the sorting order is based on a descending order of the subtree density values determined for each corresponding node in two or more nodes.
[0177] Aspect 27: An apparatus according to Aspect 26, wherein one or more processors are further configured to: determine a sorting parameter value for each corresponding node among two or more nodes as the number of non-opaque primitives included in each corresponding node, wherein the sorting order is based on an increasing order of the number of non-opaque primitives.
[0178] Aspect 28: An apparatus according to any one of Aspects 26 to 27, wherein one or more processors are further configured to: update the sorting order based on performing additional sorting on one or more opaque nodes included in the sorting order and determined to include opaque primitives; wherein the additional sorting is based on additional sorting parameter values determined for each corresponding node in the one or more opaque nodes.
[0179] Aspect 29: An apparatus according to Aspect 28, wherein the additional sorting parameter value includes at least one of the following: a bounding box area associated with each of the one or more opaque nodes, a surface area heuristic (SAH) value associated with each of the one or more opaque nodes, a subtree density value associated with each of the one or more opaque nodes, or a number of primitives included in a subtree associated with each of the one or more opaque nodes.
[0180] Aspect 30: An apparatus according to any one of Aspects 28 to 29, wherein: the additional sorting parameter value is a surface area heuristic (SAH) value determined for each of the one or more opaque nodes; and the additional sorting includes sorting the one or more opaque nodes into an increasing order based on the SAH value determined for each of the one or more opaque nodes.
[0181] Aspect 31: An apparatus comprising means for performing any of the operations of Aspects 1 to 30.
[0182] Aspect 32: A non-transitory computer-readable storage medium having instructions stored thereon, the instructions, when executed by one or more processors, causing the one or more processors to perform any of the operations of Aspects 1 to 30.
Claims
1. A ray tracing method, the method comprising: Obtaining a hierarchical acceleration data structure, the hierarchical acceleration data structure comprising one or more primitives of a scene object; sorting two or more nodes included in a same level of the hierarchical acceleration data structure into a sorted order based on a sorting parameter value determined for each respective one of the two or more nodes, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each respective one of the two or more nodes; as well as Based on traversing the hierarchical acceleration data structure using the sorted order, intersections between shadow rays and opaque primitives in nodes included in the two or more nodes are determined.
2. The method according to claim 1, further comprising: The ranking parameter value is determined as a relative surface area heuristic (SAH) value associated with each respective node of the two or more nodes.
3. The method according to claim 2, wherein: Determining the ranking parameter value as the relative SAH value associated with each respective node of the two or more nodes further comprises: determining an aggregate SAH value for one or more opaque primitives included in each respective node; determining an aggregate SAH value for one or more non-opaque primitives included in each respective node; and The relative SAH value is determined as a ratio of the aggregate SAH values for the one or more opaque primitives to the aggregate SAH values for the one or more non-opaque primitives.
4. The method according to claim 2, wherein: The sort order is based on a decreasing order of the relative SAH values associated with each respective node of the two or more nodes.
5. The method according to claim 1, further comprising: The ordering parameter value for each respective node of the two or more nodes is determined as a bounding box area associated with each respective node.
6. The method according to claim 1, further comprising: The ranking parameter value for each respective node of the two or more nodes is determined as a surface area heuristic (SAH) value associated with each respective node.
7. The method according to claim 1, further comprising: The ordering parameter value for each respective node of the two or more nodes is determined as a subtree density value associated with each respective node.
8. The method according to claim 1, further comprising: The ordering parameter value for each respective node of the two or more nodes is determined as a number of primitives included in a subtree associated with each respective node.
9. The method according to claim 1, wherein: Sorting the two or more nodes further comprises: determining a set of opaque nodes from the two or more nodes sorted into the sorted order, wherein each opaque node included in the set of opaque nodes includes one or more opaque primitives; and A set of non-opaque nodes is determined from the two or more nodes sorted into the sorted order, wherein each non-opaque node included in the set of non-opaque nodes includes a non-opaque primitive.
10. The method according to claim 9, further comprising: The sort order is updated to include the set of opaque nodes before the set of non-opaque nodes.
11. The method according to claim 10, wherein: The sorting parameter value is a subtree density value determined for each respective node of the two or more nodes; and The sort order is based on a decreasing order of the subtree density values determined for each respective node of the two or more nodes.
12. The method according to claim 1, further comprising: The sorting parameter value for each respective node of the two or more nodes is determined as a number of non-opaque primitives included in each respective node, wherein the sorting order is based on an increasing order of the number of non-opaque primitives.
13. The method according to claim 12, further comprising: updating the sort order based on performing additional sorting on one or more opaque nodes included in the sort order and determined to include opaque primitives; The additional sorting is based on additional sorting parameter values determined for each corresponding node in the one or more opaque nodes.
14. The method according to claim 13, wherein: The additional sorting parameter value includes at least one of: a bounding box area associated with each of the one or more opaque nodes, a surface area heuristic (SAH) value associated with each of the one or more opaque nodes, a subtree density value associated with each of the one or more opaque nodes, or a number of primitives included in a subtree associated with each of the one or more opaque nodes.
15. The method of claim 13, wherein: The additional sorting parameter value is a surface area heuristic (SAH) value determined for each of the one or more opaque nodes; and The additional sorting includes sorting the one or more opaque nodes into an increasing order based on the SAH value determined for each of the one or more opaque nodes.
16. An apparatus for ray tracing, comprising: Memory; as well as one or more processors coupled to the memory, the one or more processors configured to: Obtaining a hierarchical acceleration data structure, the hierarchical acceleration data structure comprising one or more primitives of a scene object; sorting two or more nodes included in a same level of the hierarchical acceleration data structure into a sorted order based on a sorting parameter value determined for each respective one of the two or more nodes, wherein the sorting parameter value is associated with a probability of determining a ray-opaque primitive intersection for each respective one of the two or more nodes; as well as Based on traversing the hierarchical acceleration data structure using the sorted order, intersections between shadow rays and opaque primitives in nodes included in the two or more nodes are determined.
17. The device according to claim 16, wherein: The one or more processors are further configured to determine the ranking parameter value as a relative surface area heuristic (SAH) value associated with each respective node of the two or more nodes.
18. The device according to claim 17, wherein: To determine the ranking parameter value as the relative SAH value associated with each respective node of the two or more nodes, the one or more processors are further configured to: determining an aggregate SAH value for one or more opaque primitives included in each respective node; determining an aggregate SAH value for one or more non-opaque primitives included in each respective node; and The relative SAH value is determined as a ratio of the aggregate SAH values for the one or more opaque primitives to the aggregate SAH values for the one or more non-opaque primitives.
19. The device according to claim 17, wherein: The sort order is based on a decreasing order of the relative SAH values associated with each respective node of the two or more nodes.
20. The device according to claim 16, wherein: The one or more processors are further configured to determine the ordering parameter value for each respective node of the two or more nodes as a bounding box area associated with each respective node.
21. The device according to claim 16, wherein: The one or more processors are further configured to determine the ranking parameter value for each respective node of the two or more nodes as a surface area heuristic (SAH) value associated with each respective node.
22. The device according to claim 16, wherein: The one or more processors are further configured to determine the ordering parameter value for each respective node of the two or more nodes as a subtree density value associated with each respective node.
23. The device according to claim 16, wherein: The one or more processors are further configured to determine the ordering parameter value for each respective node of the two or more nodes as a number of primitives included in a subtree associated with each respective node.
24. The device according to claim 16, wherein: To sort the two or more nodes, the one or more processors are further configured to: determining a set of opaque nodes from the two or more nodes sorted into the sorted order, wherein each opaque node included in the set of opaque nodes includes one or more opaque primitives; and A set of non-opaque nodes is determined from the two or more nodes sorted into the sorted order, wherein each non-opaque node included in the set of non-opaque nodes includes a non-opaque primitive.
25. The device according to claim 24, wherein: The one or more processors are further configured to update the sort order to include the set of opaque nodes before the set of non-opaque nodes.
26. The apparatus of claim 25, wherein: The sorting parameter value is a subtree density value determined for each respective node of the two or more nodes; and The sort order is based on a decreasing order of the subtree density values determined for each respective node of the two or more nodes.
27. The device according to claim 26, wherein: The one or more processors are further configured to determine the sorting parameter value for each respective node of the two or more nodes as the number of non-opaque primitives included in each respective node, wherein the sorting order is based on an increasing order of the number of non-opaque primitives.
28. The device according to claim 26, wherein The one or more processors are further configured to: updating the sort order based on performing additional sorting on one or more opaque nodes included in the sort order and determined to include opaque primitives; The additional sorting is based on additional sorting parameter values determined for each corresponding node in the one or more opaque nodes.
29. The device according to claim 28, wherein The additional sorting parameter value includes at least one of the following: a bounding box area associated with each of the one or more opaque nodes, a surface area heuristic (SAH) value associated with each of the one or more opaque nodes, a subtree density value associated with each of the one or more opaque nodes, or a number of primitives included in a subtree associated with each of the one or more opaque nodes.
30. The apparatus of claim 28, wherein: The additional sorting parameter value is a surface area heuristic (SAH) value determined for each of the one or more opaque nodes; and The additional sorting includes sorting the one or more opaque nodes into an increasing order based on the SAH value determined for each of the one or more opaque nodes.