Laminated bonding material, semiconductor package, and power module
Patent Information
- Application Number
- CN202380048638.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2022-06-22
- Filing Date
- 2023-05-12
- Publication Date
- 2025-01-21
AI Technical Summary
In high temperature environments, the strain problem caused by the difference in CTE between the semiconductor element and the substrate, resulting in cracks in the joints and shortening the life of the power semiconductor product.
Lead-free solder is used as the joining material, and strain is relaxed by adjusting the thickness and material in the solder and performing specific treatments on the base material. Specifically, a base material with a linear expansion coefficient in the range of 7.0 to 9.9 ppm/K is used, and lead-free solder with different thicknesses is used on the semiconductor element side and the substrate side.
It effectively alleviates the strain generated at the joint in high temperature environments, significantly extends the life of semiconductor packages and power modules, and complies with environmental restrictions such as RoHS.
Smart Images

Figure CN119343762A_ABST
Abstract
Citation Information
Patent Citations
Bonding material, method of manufacturing the same, and semiconductor apparatus
JP2009147111A
Method and apparatus for manufacturing stacked solder material having stress relaxation layer
JP2009269075A
Power module
JP2015023183A