A low power pseudo-continuous capacitance-to-voltage conversion circuit

Abstract

This invention discloses a low-power pseudo-continuous capacitor-to-voltage conversion circuit, comprising a signal modulator module, a capacitor differential module, a switched capacitor-resistor module, a C / V conversion core operational amplifier module, and a demodulator module. The signal modulator module is connected to the modulation port of a sensor; the sensor output, the capacitor differential module, the switched capacitor-resistor module, and the C / V conversion core operational amplifier module are connected; the C / V conversion core operational amplifier module is also connected to the demodulator module. This invention's conversion circuit simultaneously features low noise, signal continuity, and low power consumption. This invention can be widely applied in the field of conversion.

Description

Technical Field

[0001] This invention relates to the field of conversion circuits, and more particularly to a low-power pseudo-continuous capacitor-voltage conversion circuit. Background Technology

[0002] With the development of MEMS technology, the processable variable capacitance is becoming smaller and smaller, thus posing a challenge to the C / V (capacitance / voltage) conversion circuit of MEMS capacitive accelerometer interface circuits in terms of low noise and low power consumption. Traditional continuous C / V conversion circuit structures have the advantage of low noise, but they do not employ any auxiliary methods to address the gain error charge problem caused by operational amplifier gain error. Therefore, they can only suppress the operational amplifier gain error problem by increasing the power consumption of the operational amplifier to achieve high gain, resulting in high power consumption of traditional continuous C / V conversion circuits. Summary of the Invention

[0003] In view of this, in order to solve the technical problem of high power consumption in existing capacitor-to-voltage conversion circuits, this invention proposes a low-power pseudo-continuous capacitor-to-voltage conversion circuit, including a signal modulator module, a capacitor differential module, a switched capacitor and resistor module, a C / V conversion core operational amplifier module, and a demodulator module, wherein:

[0004] The signal modulator module is connected to the modulation port of the sensor; the output terminal of the sensor, the capacitor differential module, the switched capacitor resistor module, and the C / V conversion core operational amplifier module are connected; the C / V conversion core operational amplifier module is also connected to the demodulator module.

[0005] In some embodiments, the signal modulator module comprises switches, and the switch control signals include a first control signal and a second control signal. The capacitor differential module comprises switches, and the switch control signals include a first control signal and a second control signal. The switched capacitor resistor module comprises capacitors and switches, and the switch control signals include a third control signal, a fourth control signal, a fifth control signal, and a sixth control signal. The C / V conversion core operational amplifier module comprises an operational amplifier, a feedback capacitor, and auxiliary paths, wherein the first and second auxiliary paths are both composed of voltage storage capacitors and switches, and the switch control signals include the first and second control signals; the third auxiliary path is composed of a gain error charge storage capacitor; and the demodulator module comprises switches, and the switch control signals include the fifth and sixth control signals.

[0006] Based on the above scheme, this invention provides a low-power pseudo-continuous capacitor-to-voltage conversion circuit. It employs modulation and demodulation to suppress low-frequency noise. By replacing the actual resistor with a switched capacitor, the problems of large temperature drift and large area associated with the actual resistor are solved, thus improving signal accuracy. An auxiliary path is used to address the gain error charge problem caused by operational amplifier gain error, suppress dynamic errors caused by parasitic effects, and reduce operational amplifier power consumption. Attached Figure Description

[0007] Figure 1 This is a circuit structure diagram of a low-power pseudo-continuous capacitor-voltage conversion circuit according to the present invention;

[0008] Figure 2 This is a schematic diagram of the clock control signal of the conversion circuit in a specific embodiment of the present invention;

[0009] Figure 3 This is a schematic diagram of the working process of the switched capacitor and resistor in a specific embodiment of the present invention;

[0010] Figure 4 This is a schematic diagram comparing the C / V conversion of the conversion circuit of this invention with that of a conventional conversion circuit;

[0011] Figure 5 This is a schematic diagram comparing the demodulated signal output of the conversion circuit of this invention with that of a traditional conversion circuit;

[0012] Reference numerals: CLK_CV, system clock signal; VCLK1, first control signal; VCLK2, second control signal; CLK1, third control signal; CLK2, fourth control signal; CLK3, fifth control signal; CLK4, sixth control signal; K1, first switch; K2, second switch; K3, third switch; K4, fourth switch; K5, fifth switch; K6, sixth switch; K7, seventh switch; K8, eighth switch; K9, ninth switch; K10, tenth switch; K11, eleventh switch; K12, twelfth switch; K13, thirteenth switch; K14, fourteenth switch; K15, fifteenth switch; K16, sixteenth switch; K17, seventeenth switch; K18, eighteenth switch; K19, nineteenth switch; K20, twentieth switch; K21, twenty-first switch; K22, twenty-second switch; K23, twenty-third switch; K24, twenty-fourth switch. Detailed Implementation

[0013] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0014] It should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings. Unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0015] It should be understood that the terms "system," "apparatus," "unit," and / or "module" used in this application are a method of distinguishing different components, elements, parts, sections, or assemblies at different levels. However, if other terms can achieve the same purpose, they may be replaced by other expressions.

[0016] As indicated in this application and claims, unless the context clearly indicates otherwise, the words "a," "an," "a," and / or "the" are not specifically singular and may include the plural. Generally, the terms "comprising" and "including" only indicate the inclusion of expressly identified steps and elements, which do not constitute an exclusive list, and the method or apparatus may also include other steps or elements. An element defined by the phrase "comprising an..." does not exclude the presence of other identical elements in the process, method, product, or apparatus that includes the element.

[0017] In the description of the embodiments of this application, "a plurality of" refers to two or more. The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0018] Furthermore, flowcharts are used in this application to illustrate the operations performed by the system according to embodiments of this application. It should be understood that the preceding or following operations are not necessarily performed precisely in sequence. Instead, the steps can be processed in reverse order or simultaneously. Additionally, other operations can be added to these processes, or one or more steps can be removed from them.

[0019] Reference Figure 1 The above is a schematic flowchart of an optional example of the low-power pseudo-continuous capacitor-to-voltage conversion circuit proposed in this invention. The low-power conversion circuit proposed in this embodiment may include, but is not limited to, the following structures:

[0020] It includes a signal modulator module, a capacitor differential module, a switched capacitor and resistor module, a C / V conversion core operational amplifier module, and a demodulator module, among which:

[0021] The signal modulator module is connected to the modulation port of the sensor;

[0022] The sensor output terminal, the capacitor differential module, the switched capacitor resistor module, and the C / V conversion core operational amplifier module are connected;

[0023] The C / V conversion core operational amplifier module is also connected to the demodulator module.

[0024] In this embodiment, a MEMS accelerometer sensing unit is used as the sensor;

[0025] The signal modulator module:

[0026] It includes a first switch and a second switch. The first terminal of the first switch and the first terminal of the second switch are connected to the modulation port of the sensor. The second terminal of the first switch is grounded, and the second terminal of the second switch is connected to a reference voltage. The first switch is controlled by a first control signal VCLK1, and the second switch is controlled by a second control signal VCLK2.

[0027] The switch control signals VCLK1 / VCLK2 generate square wave modulation signals with a duty cycle of 1 / 2 by controlling the on and off of the switches. This enables high-frequency modulation of the MEMS accelerometer signal, shifting the low-frequency MEMS meter capacitance signal to a high frequency, effectively reducing the interference of low-frequency noise on the useful signal.

[0028] The capacitor differential module:

[0029] It includes a Cm capacitor, a third switch, and a fourth switch. The first terminal of the third switch, the first terminal of the fourth switch, and the first terminal of the Cm capacitor are connected together. The second terminal of the Cm capacitor is connected to the output terminal of the sensor. The second terminal of the third switch is connected to a reference voltage, and the second terminal of the fourth switch is grounded. The third switch is controlled by a first control signal VCLK1, and the fourth switch is controlled by a second control signal VCLK2.

[0030] The switch control signals VCLK2 / VCLK1 generate a differential square wave signal with a duty cycle of 1 / 2 and a phase difference of 180° from the carrier signal. The capacitor differential module generates a common-mode charge signal flowing in the opposite direction to the MEMS meter's output. This common-mode charge is added to the signal generated by the MEMS meter, eliminating the common-mode charge and retaining only the differential-mode charge signal. When VCLK2 is high, the MEMS accelerometer generates a single-ended charge Q under the influence of the carrier signal. CsAs shown in formula (1); under the action of the differential square wave signal, the charge generated by a single signal channel of the signal differential is As shown in formula (2). When C0 = C m In this case, the charge flowing to the main operational amplifier is Q, as shown in formula (3). Combining formulas (1), (2), and (3), we obtain that the charge transferred to the main operational amplifier is Q, which is equal to Q. diff As shown in formula (4), the signal differential module eliminates the common-mode charge in the signal and retains only the differential-mode charge.

[0031]

[0032] Q diff =(V REF -V bias )×ΔC (4)

[0033] The switched capacitor resistor module:

[0034] It includes a sampling capacitor, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, a tenth switch, an eleventh switch, and a twelfth switch; the sampling capacitor includes C. sh and C sl The low duty cycle control signals CLK3 / CLK4 control the switch to close after the high and low levels of the C / V transition stabilize in each cycle, respectively, and the capacitor C... sh and C sl Voltage sampling is performed separately. The low duty cycle control signals CLK1 / CLK2 control the switch to close at the start of the next cycle's high / low level, and capacitor C... sh and C sl Charge release is performed separately in the high and low level segments, such as Figure 3 As shown. The average current flowing from the output terminal VOP_CV to the input terminal VIP is defined as I. av The current is determined by the voltage V. VOP_CV -V VIP The difference is generated, as shown in formula (5), and can also be regarded as V. VOP_CV -V VIP The voltage value at the equivalent resistance R INT The current generated on it is shown in formula (6). Combining formulas (5), (6) and (7), the equivalent resistance R is obtained. INT As shown in formula (8).

[0035]

[0036] T = 1 / f CLK1(CLK2) (7)

[0037]

[0038] It can be seen that the equivalent resistance value is only related to the control signals CLK1 and CLK2 and the capacitor C. sh and C sl The capacitance value is related to the resistance of the switched capacitor. Compared to a resistor, a capacitor is a temperature-insensitive device within a limited temperature range (-40℃ to 80℃), so its equivalent resistance changes very little with temperature within this range. To ensure that the resistance value of the switched capacitor meets the static operating point requirements, a small resistance value is generally selected, typically in the fF range. According to chip layout knowledge, fF-level capacitors have an extremely small footprint. However, resistors in the MΩ range occupy a large area of ​​the chip; therefore, using switched capacitors can significantly save chip area.

[0039] The C / V conversion core operational amplifier module:

[0040] Including operational amplifier A1 and feedback capacitor C INT And auxiliary path. Utilizing the "virtual short" and "virtual open" effects at the op-amp input, charge is allowed to pass through the feedback capacitor C. INT The signal is transferred and converted into a voltage signal at the output. Since the input signal frequency satisfies a value greater than or equal to 1R... INT C INT Under these conditions, the circuit feedback capacitor C INT The dominant characteristic is that the circuit is capacitive, so the output voltage theoretically only depends on the amount of charge transferred by the system, ΔC, and the feedback capacitor C. INT and reference voltage V REF As shown in formula (9).

[0041]

[0042] First auxiliary path and second auxiliary path: The first auxiliary path consists of voltage storage capacitor C H It consists of switches thirteen, fourteen, fifteen, and sixteen, with switch control signal VCLK1. The second auxiliary path is composed of voltage storage capacitor C. L Together with switches seventeen, eighteen, nineteen, and twentieth, it forms a switch control signal VCLK2. The voltage storage capacitor C of the first auxiliary path... H No charge reset is performed during each acceleration signal cycle; the voltage of the nth high-level segment integral is stored. The voltage storage capacitor C of the second auxiliary path L No charge clearing is performed during each acceleration signal cycle; the voltage of the nth low-level segment integral is stored. Due to the voltage storage capacitor C H and C L The charge on the capacitor is not cleared during the signal period, therefore the voltage storage capacitor C H and C LIt only performs the function of voltage storage and does not affect the circuit's amplification factor. The circuit's amplification factor is determined solely by C. INT Decision. Due to the charge storage capacitance C H and C L The capacitance is greater than that of other capacitors, which enhances the transfer coefficient β of the C / V conversion circuit, as shown in formula (10). The increase in the transfer coefficient suppresses the influence of dynamic error on capacitor voltage conversion.

[0043]

[0044] Third auxiliary path: The third auxiliary path consists of the gain error charge storage capacitor C. ES Composition. Two gain error storage capacitors C ES The first terminal is connected to the operational amplifier input, which is equivalent to connecting it to ground. The second terminal is connected to the input terminal VIP / VIN and the integrating capacitor C. INT Connection. Therefore, the error storage capacitor C ES It does not participate in the integration operation of the operational amplifier; its only function is to absorb gain error charges. Capacitor C ES During each carrier signal cycle, the high-level segment absorbs the gain error charge of the high-level segment. When the clock jumps to the low level, the voltage storage capacitor C... ES It absorbs the gain error charge in the low-level segment. Because the gain error charge in the high-level segment is almost equal in magnitude and flows in opposite directions to the gain error charge in the low-level segment, the positive and negative charges cancel each other out, thus eliminating the gain error charge.

[0045] C / V conversion core operating status description:

[0046] like Figure 4 As shown, signals (a) and (b) represent the C / V conversion characteristics of a traditional continuous-mode C / V converter and a proposed pseudo-continuous-mode C / V converter, respectively, under the influence of a carrier modulation signal. As can be seen from the figure, under the influence of the carrier signal, the C / V converter performs alternating positive and negative integration of the input charge signal. During the high-level segment of the nth carrier cycle, V... VOP_CVn The integral is a positive voltage, V VON_CVn The integral is a negative voltage; in the low-level segment, V VOP_CVn The integral is a negative voltage, V VON_CVn The integral is a positive voltage. A traditional continuous-mode C / V converter circuit converts V in each carrier cycle. VOP_CVn / V VON_CVn Both involve integrating the bias voltage to reach the stable voltage. Therefore, a high-gain operational amplifier is needed to ensure the output voltage stabilizes quickly and with minimal gain and dynamic errors. This results in high power consumption in traditional continuous-mode C / V converters.

[0047] This invention employs a switched capacitor auxiliary path. When CV_CLK is high, the switch control signal VCLK1 is high, the switch controlled by VCLK1 closes, and auxiliary path 1 is activated. Two voltage storage capacitors C... H Store the voltage of the (n-1)th high-level segment integration. When CV_CLK is low, switch VCLK2 is high, the switch controlled by VCLK2 is closed, and auxiliary path 2 is turned on. Two voltage storage capacitors C... L Store the voltage of the (n-1)th low-level segment integration. During the nth integration, when CV_CLK is high, switch VCLK1 is high, the switch controlled by VCLK1 closes, auxiliary path 1 is turned on, and the voltage storage capacitor C... H Pull the voltage at the op-amp output to Therefore, in the nth C / V conversion operation, the voltage at the output of operational amplifier A1 changes from... Integral to voltage The gain voltage of the operational amplifier is As shown in formula (11); when CV_CLK is in the low-level segment, switch VCLK2 is in the high-level segment, the switch controlled by VCLK2 is closed, auxiliary path 2 is turned on, and voltage storage capacitor C L Pull the voltage at the op-amp output to Therefore, in the nth C / V conversion operation, the voltage at the output of operational amplifier A1 changes from... Integral to voltage The gain voltage of the operational amplifier is As shown in formula (12). With Gradually approaching the ideal value, It gets smaller and smaller. When n is large enough, It is infinitely close to the ideal value, with an error so small as to be negligible.

[0048]

[0049] Based on the above analysis, we know that the gain voltages of the high and low levels of the op-amp in each cycle are respectively Therefore, the gain error of the high and low levels in each cycle of the op-amp is As shown in equations (13) and (15). During the high-level segment of CV_CLK, the gain error charge storage capacitor C... ES Absorbing gain error charge As shown in formula (14). When CV_CLK is in a low-level range, the gain error storage capacitor C... ES Absorbing gain error charge As shown in formula (16). Based on the above analysis, the gain error charge is known. and These are charges of approximately equal magnitude but opposite direction. Therefore, each cycle involves the cancellation of positive and negative gain error charges. Through n integrations, the operational amplifier's gain voltage decreases, and the gain error also decreases, eventually being completely eliminated. Operational amplifiers that eliminate gain error do not require high gain to suppress it. Furthermore, since the gain voltage decreases with each iteration, the gain requirement for the operational amplifier is reduced, further lowering its power consumption.

[0050]

[0051] The demodulator circuit:

[0052] The demodulation module consists of switches 21, 22, 23, and 24, with low duty cycle signals CLK3 / CLK4 as the switch control signals. Under the action of these switches, the signal V output from the operational amplifier... VOP_CV and V VON_CV Under the action of switch control signals CLK3 / CLK4, the signal is demodulated from the modulated signal. The demodulated signal is V. VOP and V VON Using a low duty cycle clock ensures demodulation occurs after the signal has stabilized, improving the signal-to-noise ratio of the demodulated signal. Simultaneously, demodulation keeps noise within the carrier frequency range while shifting the useful signal back to the lower frequency band. A schematic diagram of the signal output from the demodulation module is shown below. Figure 5 As shown. Both the high and low levels of the system clock CV_CLK can be used as useful signals input to the next stage of processing, and it can be used in conjunction with both continuous and discrete ADCs.

[0053] like Figure 2 The diagram shown is a timing diagram of the circuit of this invention. CLK_CV is the input system clock signal of the overall C / V conversion circuit, with a period of T. The switch control signals VCLK1 / VCLK2 are control signals that maintain the same frequency as the system clock signal CLK_CV and do not overlap. Switch control signals CLK1 and CLK2 are control signals with the same frequency as CLK_CV and a duty cycle of T / 8. The rising edge of switch control signal CLK1 is consistent with that of VCLK1, and the rising edge of switch control signal CLK2 is consistent with that of VCLK2. Switch control signals CLK3 / CLK4 are control signals with the same frequency as CLK_CV and a duty cycle of T / 8. Switch control signal CLK3 is consistent with the falling edge of VCLK1, and switch control signal CLK4 is consistent with the falling edge of VCLK2.

[0054] Based on the above scheme, the present invention also provides relevant simulation data:

[0055] Simulation Environment Description: The proposed pseudo-continuous C / V conversion circuit has a static capacitor of 3pF and a variable capacitor of 60fF; the traditional continuous C / V conversion circuit has a static capacitor of 3pF and a variable capacitor of 30fF. Table 1 shows the percentage change in output amplitude with temperature and the change in quiescent operating point for both the traditional continuous C / V conversion circuit and the proposed pseudo-continuous C / V conversion circuit. The traditional continuous C / V conversion circuit exhibits a maximum amplitude change of 36.1% under temperature conditions ranging from -45℃ to 80℃. In contrast, the pseudo-continuous C / V conversion circuit shows a maximum change of 3%.

[0056] Table 1. Percentage change in output amplitude with temperature and quiescent operating point of traditional continuous-mode C / V converter circuit and proposed pseudo-continuous-mode C / V converter circuit.

[0057]

[0058] As shown in Table 2, the proposed pseudo-continuous C / V conversion circuit structure has a core operational amplifier current of 240.2μA and a power consumption of 792.66μW when the power supply voltage is 3.3V, the static capacitor is 3pF, and the sensitivity is 10mV / Ff.

[0059] Table 2 presents the basic performance indicators of the pseudo-continuous C / V conversion circuit.

[0060]

[0061] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the embodiments described. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of this application.

Claims

1. A pseudo-continuous capacitance-to-voltage conversion circuit with low power consumption, characterized by, It includes a signal modulator module, a capacitor differential module, a switched capacitor and resistor module, a C / V conversion core operational amplifier module, and a demodulator module, among which: The signal modulator module is connected to the modulation port of the sensor; The sensor output terminal, the capacitor differential module, the switched capacitor resistor module, and the C / V conversion core operational amplifier module are connected; The C / V conversion core operational amplifier module is also connected to the demodulator module; The C / V conversion core operational amplifier module includes an operational amplifier, a feedback capacitor, a first auxiliary path, a second auxiliary path, and a third auxiliary path, wherein: The first auxiliary path includes a voltage storage capacitor, a thirteenth switch, a fourteenth switch, a fifteenth switch, and a sixteenth switch, all of which are controlled by a first control signal. The second auxiliary path includes a voltage storage capacitor, a seventeenth switch, an eighteenth switch, a nineteenth switch, and a twentieth switch, all of which are controlled by a second control signal. The third auxiliary path includes a gain error charge storage capacitor; The first terminal of the thirteenth switch, the first terminal of the seventeenth switch, the first terminal of the first integrating capacitor, and the first terminal of the first gain error storage capacitor are connected together, and the second terminal of the first gain error storage capacitor is connected to the negative input terminal of the operational amplifier. The first terminal of the fourteenth switch, the first terminal of the eighteenth switch, and the second terminal of the first integrating capacitor are connected to the positive output terminal of the operational amplifier. The second terminal of the thirteenth switch is connected to the second terminal of the fourteenth switch through the first voltage storage capacitor; The second terminal of the seventeenth switch is connected to the second terminal of the eighteenth switch through the second voltage storage capacitor; The first terminal of the nineteenth switch, the first terminal of the fifteenth switch, the first terminal of the second integrating capacitor, and the first terminal of the second gain error storage capacitor are connected together, and the second terminal of the second gain error storage capacitor is connected to the positive input terminal of the operational amplifier. The first terminal of the twentieth switch, the first terminal of the sixteenth switch, and the second terminal of the second integrating capacitor are connected to the negative output terminal of the operational amplifier. The second terminal of the nineteenth switch is connected to the second terminal of the twentieth switch through the third voltage storage capacitor; The second terminal of the fifteenth switch is connected to the second terminal of the sixteenth switch through the fourth voltage storage capacitor; exist High level segment, switch control signal High level, being When the control switch is closed, the first auxiliary path is activated, and its two voltage storage capacitors... Store the voltage of the (n-1)th high-level segment integration. / ;exist Low level segment, switch High level, being When the control switch is closed, the second auxiliary path is activated, and its two voltage storage capacitors... Store the voltage of the (n-1)th low-level segment integration. / ; during the nth integration, when High level segment, switch High level, being When the control switch is closed, the first auxiliary path is activated, and its two voltage storage capacitors... Pull the voltage at the op-amp output to / In the nth C / V conversion operation, the voltage at the output of the operational amplifier changes from... / Integral to voltage / ;when Low level segment, switch High level, being When the control switch is closed, the second auxiliary path is activated, and its two voltage storage capacitors... Pull the voltage at the op-amp output to / In the nth C / V conversion operation, the voltage at the output of the operational amplifier changes from... / Integral to voltage / .

2. The low-power pseudo-continuous capacitor-voltage conversion circuit according to claim 1, characterized in that, The signal modulator module includes a first switch and a second switch, wherein the first switch is controlled by a first control signal and the second switch is controlled by a second control signal.

3. The low-power pseudo-continuous capacitor-voltage conversion circuit according to claim 1, characterized in that, The capacitor differential module includes a third switch and a fourth switch. The third switch is controlled by a first control signal, and the fourth switch is controlled by a second control signal.

4. The low-power pseudo-continuous capacitor-voltage conversion circuit according to claim 3, characterized in that, The switched capacitor-resistor module includes a sampling capacitor, a fifth switch, a sixth switch, a seventh switch, an eighth switch, a ninth switch, a tenth switch, an eleventh switch, and a twelfth switch, wherein: The sampling capacitor is used for voltage sampling; The fifth switch and the ninth switch are controlled by a third control signal; The sixth switch and the tenth switch are controlled by the fourth control signal; The seventh switch and the eleventh switch are controlled by the fifth control signal; The eighth switch and the twelfth switch are controlled by the sixth control signal.

5. The low-power pseudo-continuous capacitor-voltage conversion circuit according to claim 4, characterized in that, The demodulator module includes a twenty-first switch, a twenty-second switch, a twenty-third switch, and a twenty-fourth switch, wherein: Both the 21st and 23rd switches are controlled by the fifth control signal; Both the 22nd switch and the 24th switch are controlled by the 6th control signal.

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