FPGA-based laser display image backlight combined regulation and control device and method

Abstract

The invention discloses an FPGA (Field Programmable Gate Array)-based laser display image backlight combined regulation and control device, which is characterized in that the input end of an image processing system is connected with video image generation equipment, and the output end of the image processing system is connected with the input end of an image backlight combined regulation and control module; the output end of the image backlight combined regulation and control module and the output end of the video time sequence generation module are connected with the input end of the eDP TX module. The output end of the eDP TX module is connected with the input end of the display screen module. The input end of the PWM module is connected with the output end of the image backlight combined regulation and control module, and the output end of the PWM module is connected with the input end of the display screen module; the DDRSDRAM and the eDP TX module are respectively connected with the image processing system; the color data of each frame of image is analyzed through the image backlight combined regulation and control module, the RGB data value of the image is adjusted according to the color analysis result, and the intensity of the laser backlight is dynamically adjusted through the PWM module, so that accurate matching of the backlight and the image content is achieved, and the picture color cast phenomenon is effectively eliminated.

Description

Technical Field

[0001] The present invention relates to the field of laser display technology, and in particular to a laser display image backlight joint control device and method based on FPGA Background Art

[0002] With the rapid development of display technology, laser displays have shown irreplaceable advantages in the display field, especially in telemedicine video applications, due to their excellent performance in high color gamut, high color accuracy and high color gradation. In telemedicine scenarios, traditional LCD displays often have difficulty clearly displaying the patient's diseased parts due to insufficient color performance, which limits the accuracy and efficiency of medical diagnosis. Laser displays effectively solve this problem with their high color gamut characteristics, significantly improving the visual effects and diagnostic quality of telemedicine.

[0003] However, the mainstream laser display or TV products on the market still face challenges in backlight control. Most manufacturers use designs based on image processing IC chips such as MSTAR, Realtek, HiSilicon and Rockchip to control the laser light source through PWM signals generated by ARM. Although this control method realizes basic functions, it lacks the correlation and interaction between the image and the laser light source backlight, resulting in color cast (such as red, blue or green) when displaying specific pictures, affecting the viewing experience and may accelerate visual fatigue. Summary of the invention

[0004] The purpose of the present invention is to provide a laser display image optimization control device and method based on FPGA, so as to solve the problems of unclear image display and image color cast caused by the lack of correlation between controlling the laser backlight intensity and clear image display in the existing laser display designed based on IC chip.

[0005] In order to achieve the above object, the technical solution of the present invention is:

[0006] In a first aspect, an embodiment of the present invention provides a laser display image backlight joint control device based on FPGA, comprising an FPGA module, a display module and a DDR SDRAM;

[0007] The FPGA module includes an image processing system, a video timing generation module, an image backlight joint control module, an eDP TX module and a PWM module;

[0008] The input end of the image processing system is connected to the video image generating device, and the output end of the image processing system is connected to the input end of the image backlight joint control module; the output ends of the image backlight joint control module and the video timing generation module are respectively connected to the input end of the eDP TX module, and the output end of the eDPTX module is connected to the input end of the display screen module; the input end of the PWM module is connected to the output end of the image backlight joint control module, and the output end of the PWM module is connected to the input end of the display screen module;

[0009] The DDR SDRAM and eDP TX modules are respectively connected to the image processing system.

[0010] Optionally, the image processing system includes a video PHY controller module, an HDMI module, a VPSSscaler scaling module, a DDR bus control module, and an image overlay module;

[0011] The input end of the video PHY controller module is connected to the video image generating device, and the output end of the video PHY controller module is connected to the input end of the HDMI module; the output end of the HDMI module is connected to the input end of the VPSSscaler scaling module, and the output end of the VPSS scaler scaling module is connected to the input end of the DDR bus control module; the output end of the DDR bus control module is connected to the input end of the image overlay module, and the output end of the image overlay module is connected to the input end of the image backlight joint control module;

[0012] The DDR bus control module is connected to the DDR SDRAM.

[0013] Optionally, the image processing system further includes a MicroBlaze soft core module; the MicroBlaze soft core module is respectively connected to the video PHY controller module, the VPSS scaler scaling module and the eDP TX module.

[0014] Optionally, the display screen module includes a TCON board module and a high-definition display screen;

[0015] The input end of the TCON board module is connected to the output end of the eDP TX module, and the output end of the TCON board module is connected to the input end of the high-definition display screen.

[0016] Optionally, the display screen module further includes a laser constant current source module and a laser backlight panel;

[0017] The input end of the laser constant current source module is connected to the output end of the PWM module, and the output end of the laser constant current source module is connected to the input end of the laser backlight panel; the output end of the laser backlight panel is connected to the input end of the high-definition display screen.

[0018] Optionally, it is characterized in that the video image generating device is connected to the video PHYcontroller module via an HDMI interface.

[0019] In a second aspect, an embodiment of the present invention provides a laser display image backlight joint control method based on FPGA, which is implemented based on the laser display image backlight joint control device based on FPGA as described above, and includes the following steps:

[0020] The MicroBlaze soft core module controls the video PHY controller module, receives the TMDS video signal transmitted by the video image generation device, decodes the TMDS video signal, and transmits it to the HDMI module;

[0021] The HDMI module parses the decoded TMDS video signal and sends the parsed RGB video image data to the VPSS scaler module;

[0022] The MicroBlaze soft core module controls the VPSS scaler module to enlarge the received RGB video image data to 4K resolution and send it to the DDR bus control module;

[0023] The DDR bus control module receives RGB video image data with a resolution of 4K and writes it into the DDR SDRAM;

[0024] The image overlay module reads the 4K video image data in the DDR SDRAM through the DDR bus control module, and after data preprocessing, sends it to the image backlight joint control module;

[0025] The image backlight joint control module receives the pre-processed 4K video image data, analyzes the color data of each frame of the image, adjusts the color of each frame of the image pixel according to the color analysis result, and sends the adjusted 4K video image data to the eDP module;

[0026] The video timing generation module converts the pre-processed 4K video image data into an eDP signal according to the control timing of the eDP module, and writes the eDP signal into the eDPTX module;

[0027] The MicroBlaze soft core module controls the eDPTX module, so that the eDPTX module inputs the adjusted 4K video image data and the eDP signal to the display module through the eDPTX hardware interface.

[0028] Optionally, the method further includes:

[0029] Based on the color analysis results, the image backlight joint control module controls the PWM wave generated by the PWM module to adjust the current output by the laser constant current source module, thereby changing the intensity of the red, green and blue light of the laser backlight panel to eliminate the image color cast.

[0030] Optionally, the data preprocessing includes contrast adjustment, image data denoising and image enhancement.

[0031] Optionally, the VPSS scaler scaling module uses a dual trilinear interpolation algorithm to enlarge the resolution of the received video image data in RGB format to 4K.

[0032] The beneficial effects brought by the embodiments provided by the present invention include:

[0033] The embodiment of the present invention analyzes the color data of each frame of the image through the image backlight joint control module, adjusts the image RGB data value according to the color analysis result, and dynamically adjusts the intensity of the laser backlight through the PWM module to achieve accurate matching of the backlight and the image content, effectively eliminate the color cast phenomenon of the picture, and ensure the accuracy and naturalness of the displayed color;

[0034] The embodiment of the present invention amplifies the resolution of RGB video image data through the VPSS Scaler scaling module, and writes the RGB video image data into the DDRSDRAM chip using the DDR bus control module, thereby realizing high-speed and stable image data transmission and storage, and ensuring the integrity and real-time performance of the image data. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0036] Figure 1 A schematic diagram of a laser display image backlight joint control device based on FPGA according to an embodiment of this specification is shown;

[0037] Figure 2A flowchart of a laser display image backlight joint control method based on FPGA according to an embodiment of this specification is shown;

[0038] Figure 3 A workflow diagram of an image backlight joint control module according to an embodiment of this specification is shown. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0040] However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the present disclosure. In the following detailed description, for ease of explanation, many specific details are set forth to provide a comprehensive understanding of the embodiments of the present disclosure. However, it is obvious that one or more embodiments can also be implemented without these specific details. In addition, in the following description, descriptions of well-known technologies are omitted to avoid unnecessary confusion of the concepts of the present disclosure.

[0041] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0042] Example 1

[0043] Figure 1 A schematic diagram of a laser display image backlight joint control device based on FPGA according to an embodiment of this specification is shown;

[0044] like Figure 1 As shown, an embodiment of the present invention provides a laser display image backlight joint control device based on FPGA, including an FPGA module, a display module and a DDR SDRAM;

[0045] In some embodiments, the FPGA module includes a video PHYcontroller module, an HDMI module, a MicroBlaze soft core module, a VPSS scaler scaling module, a DDR3 bus control module, an image overlay module, a video timing generation module, an image backlight joint control module, an eDPTX module, and a PWM module;

[0046] Exemplarily, the video PHYcontroller module is controlled by the MicroBlaze soft core module and connected to the HDMI module to connect to the video image generating device through the HDMI-RX hardware interface, receive the TMDS video signal transmitted by the video image generating device, and transmit the TMDS video signal to the HDMI module after decoding the TMDS video signal;

[0047] The HDMI module is connected to the VPSS scaler module to parse the decoded TMDS video signal and send the parsed RGB video image data to the VPSS scaler module;

[0048] The VPSS scaler module is controlled by the MicroBlaze soft core module and connected to the DDR3 bus control module. It uses the bi-trilinear interpolation algorithm Bicubic to enlarge the resolution of the received RGB video image data to 4K or any resolution and sends it to the DDR3 bus control module.

[0049] A DDR3 bus control module is connected to the DDR3 SDRAM to receive RGB video image data with a resolution of 4K and write it into the DDR3 SDRAM;

[0050] The image overlay module is connected to the DDR3 bus control module and the image backlight joint control module respectively, and is used to read the 4K video image data in the DDR3 SDRAM through the DDR3 bus control module, and after performing OSD menu overlay processing, send it to the image backlight joint control module; wherein the OSD menu overlay processing includes contrast adjustment, image data denoising and image enhancement.

[0051] The image backlight joint control module is connected to the eDP TX module and the PWM module respectively, and is used to receive the pre-processed 4K video image data, analyze the color data of each frame of the image using the image color statistical analysis algorithm, adjust the color of each frame of the image pixel according to the color analysis result, and send the adjusted 4K video image data to the eDP module; it is also used to send a backlight adjustment instruction to the PWM module based on the color analysis result and use the laser constant current source control algorithm to adjust the laser backlight;

[0052] PWM module, used to generate PWM wave to control the current of laser constant current source; wherein the PWM module adopts microsecond time resolution;

[0053] The video timing generation module is connected to the eDP TX module, and is used to convert the pre-processed 4K video image data into an eDP signal according to the control timing of the eDP module, and write the eDP signal into the eDP TX module;

[0054] Among them, the eDP signal includes the VS field signal, HS line signal and DE valid data signal of 4K vesa timing;

[0055] The eDP TX module is controlled by the MicroBlaze soft core module and the display module to input the adjusted 4K video image data and the eDP signal to the display module through the eDP TX hardware interface.

[0056] In some embodiments, the display screen module includes a TCON board module, a high-definition display screen, a laser constant current source module, and a laser backlight panel;

[0057] Exemplarily, the TCON board module is connected to the eDP TX module and the high-definition display screen respectively, so as to receive the 4K image data and eDP signal sent by the eDP interface, and drive the high-definition display screen to display images; wherein the eDP interface is a standard eDP 4lane interface;

[0058] The laser constant current source module is connected to the PWM module and the laser backlight panel respectively, and is used to adjust the current output by the laser constant current source module through the PWM wave generated by the PWM module, thereby changing the intensity of the red, green and blue light of the laser backlight panel.

[0059] The laser backlight panel is connected to the high-definition display screen to provide uniform and high-brightness background light for the high-definition display screen, so that the display screen can present clear and vivid images in various environments; among them, the laser backlight panel includes 16 groups of laser groups, and the laser group consists of 3 lasers. The laser group can emit red, green and blue lasers at the same time.

[0060] Exemplarily, the image color statistical analysis algorithm includes the following steps:

[0061] A1. Initialize the three arrays R_sum, G_sum, and B_sum, set the boundaries of the region segmentation, and divide the 4K (3840x2160) resolution image into 16 regions, each with a size of 240x135 pixels;

[0062] A2, start capturing image data when the falling edge of the 4K resolution vertical synchronization signal (VS) arrives;

[0063] A3, traverse each pixel point and determine the 240x135 area to which it belongs according to its coordinates;

[0064] A4. Accumulate the R, G, and B values ​​of each pixel, update the R_sum, G_sum, and B_sum values ​​of the corresponding area respectively, and count the accumulated sum values ​​as R_sum[23:0], G_sum[23:0], and B_sum[23:0] respectively; wherein, a 24-bit accumulator is used in this embodiment, but in actual use, it may need to be adjusted according to specific circumstances.

[0065] A5. After traversing all pixels in an area, find the maximum and second largest values ​​of the cumulative sum of the three colors R, G, and B in the area, and subtract a specific value sub from each pixel value of the maximum value;

[0066] For example, if R_sum[23:0] is the maximum value, the intensity of the red laser is reduced, and each R pixel value is set to subtract a specific value [7:0] R_sub, so the final displayed pixel value R_data=R-R_sub.

[0067] Among them, those skilled in the art can adjust parameters such as the empirical value R_sub of color reduction according to actual application requirements.

[0068] Exemplarily, the PWM microsecond laser constant current source control algorithm includes the following steps:

[0069] B1. Divide the PWM control constant current source adjustment range into equally divided control gears of 0-255, and each gear corresponds to a different duty cycle;

[0070] B2. According to the accumulated sum of the three colors R, G, and B in the image, the PWM duty cycle adjustment value n is calculated according to the maximum and second largest values. The calculation formula is as follows:

[0071] n = (maximum value - second largest value) / maximum value;

[0072] For example, if R_sum[23:0] is the maximum value and G_sum[23:0] is the second largest value, the duty cycle adjustment value is:

[0073] n=(R_sum[23:0]-G_sum[23:0]) / R_sum[23:0]

[0074] B3. According to the calculated PWM duty cycle adjustment value, adjust the constant current source intensity of the corresponding color laser to change the intensity of the red, green and blue light of the laser backlight panel to achieve dynamic adjustment of the intensity of the laser backlight.

[0075] Example 2

[0076] Figure 2 A flowchart of a laser display image backlight joint control method based on FPGA according to an embodiment of this specification is shown;

[0077] like Figure 2 As shown, the embodiment of the present invention provides a laser display image backlight joint control method based on FPGA, which is implemented based on the laser display image backlight joint control device based on FPGA as described in Example 1, and includes the following steps:

[0078] S1, MicroBlaze soft core module controls the video PHY controller module, receives the TMDS video signal transmitted by the video image generation device, decodes the TMDS video signal, and transmits it to the HDMI module;

[0079] S2, the HDMI module parses the decoded TMDS video signal and sends the parsed RGB video image data to the VPSS scaler module;

[0080] S3, MicroBlaze soft core module controls VPSS scaler module, enlarges the received RGB video image data to 4K resolution, and sends it to DDR bus control module;

[0081] S4, the DDR bus control module receives the RGB video image data with a resolution of 4K and writes it into the DDR SDRAM;

[0082] S5, the image overlay module reads the 4K video image data in the DDR SDRAM through the DDR bus control module, performs OSD menu overlay processing, and then sends it to the image backlight joint control module;

[0083] S6, the image backlight joint control module receives the pre-processed 4K video image data, analyzes the color of each frame of the image, adjusts the color of the pixel points of each frame of the image, and sends it to the eDP module; at the same time, based on the color analysis, the intensity of the red, green and blue light of the laser backlight panel is adjusted by controlling the PWM module;

[0084] S7, the video timing generation module converts the pre-processed 4K video image data into an eDP signal according to the control timing of the eDP module, and writes the eDP signal into the eDP TX module;

[0085] S8, MicroBlaze soft core module controls the eDP TX module, so that the eDP TX module inputs the adjusted 4K video image data and the eDP signal to the TCON board module through the eDP TX hardware interface.

[0086] Figure 3 A flowchart of the image backlight joint control module according to an embodiment of this specification is shown;

[0087] like Figure 3 As shown, the specific working steps of the image backlight joint control module in S6 are as follows:

[0088] Accumulate and count the R, G, and B values ​​of each pixel in each frame of the image;

[0089] After counting all pixels in a sub-region, find the maximum and second largest values ​​of the cumulative sum of the three colors R, G, and B in the region;

[0090] The PWM duty cycle adjustment value is calculated according to the maximum value and the second maximum value. The PWM module outputs a PWM wave based on the duty cycle adjustment value to adjust the constant current source intensity of the corresponding color laser, thereby changing the intensity of the red, green and blue light of the laser backlight panel;

[0091] By uniformly subtracting a specific value from each pixel value of the maximum value, the light intensity of the color corresponding to the maximum value is weakened to adjust the image RGB pixel value.

[0092] The FPGA-based laser display image backlight joint control device and method provided in the above embodiment has the following advantages compared with the traditional laser display system:

[0093] 1. The embodiment of the present invention analyzes the color data of each frame of the image through the image backlight joint control module, adjusts the image RGB data value according to the color analysis result, and adjusts the intensity of the laser backlight through the PWM module to achieve dynamic matching of the backlight and the image content, effectively eliminate the color cast of the picture, ensure the accuracy and naturalness of the displayed color, and reduce the eye fatigue caused by long-term viewing.

[0094] 2. The embodiment of the present invention enlarges the resolution of RGB video image data through the VPSS Scaler scaling module, and writes the RGB video image data into the DDRSDRAM chip using the DDR bus control module, thereby realizing high-speed and stable image data transmission and storage, and ensuring the integrity and real-time performance of the image data.

[0095] 3. The device designed based on FPGA in the embodiment of the present invention gives the laser backlight display higher flexibility and scalability. The programmable characteristics of FPGA enable the system to easily adapt to video signal inputs of different resolutions and formats, and can perform functional upgrades and performance optimization according to actual needs.

[0096] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A laser display image backlight joint control device based on FPGA, characterized in that: Including FPGA module, display module and DDR SDRAM; The FPGA module includes an image processing system, a video timing generation module, an image backlight joint control module, an eDP TX module and a PWM module; The input end of the image processing system is connected to the video image generating device, and the output end of the image processing system is connected to the input end of the image backlight joint control module; the output ends of the image backlight joint control module and the video timing generation module are respectively connected to the input end of the eDP TX module, and the output end of the eDP TX module is connected to the input end of the display screen module; the input end of the PWM module is connected to the output end of the image backlight joint control module, and the output end of the PWM module is connected to the input end of the display screen module; The DDR SDRAM and eDP TX modules are respectively connected to the image processing system.

2. The device according to claim 1, characterized in that The image processing system includes a video PHYcontroller module, an HDMI module, a VPSS scaler module, a DDR bus control module, and an image overlay module; The input end of the video PHY controller module is connected to the video image generating device, and the output end of the video PHY controller module is connected to the input end of the HDMI module; the output end of the HDMI module is connected to the input end of the VPSS scaler scaling module, and the output end of the VPSS scaler scaling module is connected to the input end of the DDR bus control module; the output end of the DDR bus control module is connected to the input end of the image overlay module, and the output end of the image overlay module is connected to the input end of the image backlight joint control module; The DDR bus control module is connected to the DDR SDRAM.

3. The device according to claim 2, characterized in that The image processing system also includes a MicroBlaze soft core module; the MicroBlaze soft core module is respectively connected to the video PHY controller module, the VPSS scaler scaling module and the eDP TX module.

4. The device according to claim 1, characterized in that The display screen module includes a TCON board module and a high-definition display screen; The input end of the TCON board module is connected to the output end of the eDP TX module, and the output end of the TCON board module is connected to the input end of the high-definition display screen.

5. The device according to claim 4, characterized in that The display screen module also includes a laser constant current source module and a laser backlight panel; The input end of the laser constant current source module is connected to the output end of the PWM module, and the output end of the laser constant current source module is connected to the input end of the laser backlight panel; the output end of the laser backlight panel is connected to the input end of the high-definition display screen.

6. The device according to claim 2, characterized in that The video image generating device is connected to the video PHY controller module via an HDMI interface.

7. A laser display image backlight joint control method based on FPGA, characterized in that: The laser display image backlight joint control device based on FPGA as claimed in any one of claims 1 to 6 is implemented, comprising the following steps; The MicroBlaze soft core module controls the video PHY controller module, receives the TMDS video signal transmitted by the video image generation device, decodes the TMDS video signal, and transmits it to the HDMI module; The HDMI module parses the decoded TMDS video signal and sends the parsed RGB video image data to the VPSS scaler module; The MicroBlaze soft core module controls the VPSS scaler module to enlarge the received RGB video image data to 4K resolution and send it to the DDR bus control module; The DDR bus control module receives RGB video image data with a resolution of 4K and writes it into the DDR SDRAM; The image overlay module reads the 4K video image data in the DDR SDRAM through the DDR bus control module, and after data preprocessing, sends it to the image backlight joint control module; The image backlight joint control module receives the pre-processed 4K video image data, analyzes the color data of each frame of the image, adjusts the color of each frame of the image pixel according to the color analysis result, and sends the adjusted 4K video image data to the eDP module; The video timing generation module converts the pre-processed 4K video image data into an eDP signal according to the control timing of the eDP module, and writes the eDP signal into the eDP TX module; The MicroBlaze soft core module controls the eDP TX module, so that the eDP TX module inputs the adjusted 4K video image data and the eDP signal to the display module through the eDP TX hardware interface.

8. The device according to claim 7, characterized in that The method further comprises: Based on the color analysis results, the image backlight joint control module controls the PWM wave generated by the PWM module to adjust the current output by the laser constant current source module, thereby changing the intensity of the red, green and blue light of the laser backlight panel to eliminate the image color cast.

9. The device according to claim 7, characterized in that The data preprocessing includes contrast adjustment, image data denoising and image enhancement.

10. The device according to claim 7, characterized in that The VPSS scaler scaling module uses a dual trilinear interpolation algorithm to enlarge the resolution of the received RGB format video image data to 4K.

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