Test connecting pad of display panel and preparation method of test connecting pad in display panel
By setting up the interval structure of the connection in the testing of the display panel to ensure the complete etching of the conductive membrane layer, it solves the flash screen problem caused by the connection of the conductive membrane layer, and improves the accuracy of the test.
Patent Information
- Application Number
- CN202411487765.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-23
- Publication Date
- 2025-01-24
AI Technical Summary
During the testing process of the display panel, it is difficult to completely etch the conductive film layers in the test pads, resulting in the connection of the conductive film layers, which easily leads to the splash screen problem, affecting the accuracy of the test.
Design a test pad, including multiple signal detection structures. Each signal detection structure includes substrates, organic membrane layers and conductive membrane layers. By setting up the intermittent structure of the electrical connection, the electrical connection area of the adjacent signal detection structure is disconnected, so as to ensure that the conductive membrane layer can be completely carved and avoid connection.
By increasing the etching accuracy of the conductive membrane layer in the test pad, the flash screen problem is solved, and the accuracy of the test is improved.
Smart Images
Figure CN119361579A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure generally relates to the technical field of display panels, and more particularly to a test pad of a display panel and a method for preparing the test pad in the display panel. Background Art
[0002] With the development of electronic devices, display panels are also constantly developing and their functions are constantly enriched.
[0003] In order to ensure the signal transmission of each functional module in the display panel, a test pad (CT PAD) is often set in the non-display area of the display panel. The test pad can perform a CT test (Cell Test) on the display panel during the production process of the display panel. The test pad provides a signal to the test pad on the display panel through the fixture, and the test pad transmits the signal to the various functional modules of the display panel, thereby testing the various functional modules of the display panel.
[0004] However, in this process, since it is often difficult to completely etch the conductive film layers corresponding to different functional modules in the test pads for transmitting signals, the conductive film layers between different functional modules will be connected. Therefore, problems such as screen flickering are likely to occur during the test phase, affecting the accuracy of the test. Summary of the invention
[0005] In view of the above-mentioned defects or deficiencies in the related art, it is desired to provide a test pad for a display panel and a method for preparing the test pad in the display panel, which can solve the problem that the conductive film layers corresponding to different functional modules in the test pad for transmitting signals are often difficult to be completely etched, which in turn causes the conductive film layers between different functional modules to be connected, and ultimately easily causes screen flickering during the test stage, affecting the test accuracy. The etching accuracy of each conductive film layer corresponding to different functional modules in the test pad can be greatly improved, thereby ultimately improving the test accuracy.
[0006] In a first aspect, a test pad of a display panel is provided, the test pad comprising: A test pad is arranged in a non-display area of the display panel, the test pad includes a plurality of signal detection structures, the signal detection structure includes a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on a side of the organic film layer away from the substrate; An electrical connection discontinuity structure is arranged between adjacent signal detection structures; the electrical connection discontinuity structure is any one of the following: an electrical connection discontinuity structure corresponding to the signal spacing area on the organic film layer, an electrical connection area between the conductive film layer and the substrate; the electrical connection areas of adjacent signal detection structures are disconnected.
[0007] In the present application, the test pad is arranged in the non-display area of the display panel, and the test pad includes a plurality of signal detection structures including a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on the side of the organic film layer away from the substrate; an electrical connection discontinuity structure is arranged between adjacent signal detection structures, and the electrical connection discontinuity structure can be any of the following: an electrical connection discontinuity structure corresponding to the signal spacing area on the organic film layer and an electrical connection area between the conductive film layer and the substrate; wherein the electrical connection areas of adjacent signal detection structures are disconnected. In this way, by setting the electrical connection discontinuity structure, the conductive film layer between different detection areas can be completely etched, or the electrical connection area for transmitting the detection signal can be directly improved, so that different detection signals are transmitted through the disconnected electrical connection area, thereby overcoming and avoiding the problem of screen flickering that is easy to occur during the test stage and affecting the accuracy of the test, and can greatly improve the etching accuracy of each conductive film layer corresponding to different functional modules in the test pad, and finally improve the test accuracy.
[0008] In a second aspect, a display panel is provided, the display panel comprising: the display panel comprises a display area and a non-display area, the non-display area comprises the test pad of the display panel as described in the first aspect.
[0009] In a third aspect, a method for preparing a test pad in a display panel is provided, wherein the display panel comprises: a test pad, wherein the test pad is arranged in a non-display area of the display panel, wherein the test pad comprises a plurality of signal detection structures, wherein the signal detection structures comprise a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on a side of the organic film layer away from the substrate; The method comprises: Etching the film layer in the test pad through a target mask so that an electrical connection discontinuity structure is provided between adjacent signal detection structures; The target mask includes any one of the following: a mask corresponding to the organic film layer, or a mask corresponding to the film layer between the organic film layer and the conductive film layer and the substrate; The electrical connection discontinuity structure is any one of the following: an electrical connection discontinuity structure corresponding to a signal spacing region on the organic film layer, an electrical connection region between the conductive film layer and the substrate; and a disconnection between electrical connection regions of adjacent signal detection structures.
[0010] In a fourth aspect, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the method described in the third aspect is implemented.
[0011] In a fifth aspect, a computer-readable storage medium is provided, on which a computer program is stored, characterized in that when the program is executed by a processor, the method described in the third aspect is implemented.
[0012] In a sixth aspect, a computer program product is provided, wherein the computer program product includes instructions, and the instructions are executed by a processor to implement the method described in the third aspect.
[0013] Additional aspects and advantages of the present invention will be given in part in the following description and in part will be obvious from the following description, or will be learned through practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0014] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 This is one of the schematic diagrams of a display panel in the related art; Figure 2 The second schematic diagram of a display panel of the related art; Figure 3 The third schematic diagram of a display panel of the related art; Figure 4 One of the schematic diagrams of a display panel provided in an embodiment of the present application; Figure 5 A second schematic diagram of a display panel provided in an embodiment of the present application; Figure 6 A third schematic diagram of a display panel provided in an embodiment of the present application; Figure 7 A fourth schematic diagram of a display panel provided in an embodiment of the present application; Figure 8 A fifth schematic diagram of a display panel provided in an embodiment of the present application; Fig. 9 A sixth schematic diagram of a display panel provided in an embodiment of the present application; Fig.10 A seventh schematic diagram of a display panel provided in an embodiment of the present application; Fig.11 A schematic diagram of a process for preparing a test pad in a display panel provided in an embodiment of the present application; Fig.12 A schematic diagram of the structure of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0015] The present application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant inventions, rather than to limit the inventions. It should also be noted that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.
[0016] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The applicable scenarios of the embodiments of the present application are described below.
[0017] With the development of electronic devices, display panels are also constantly developing and their functions are constantly enriched.
[0018] In order to ensure the signal transmission of each functional module in the display panel, a test pad (CT PAD) is often set in the non-display area of the display panel. The test pad can perform a CT test (Cell Test) on the display panel during the production process of the display panel. The test pad provides a signal to the test pad on the display panel through the fixture, and the test pad transmits the signal to the various functional modules of the display panel, thereby testing the various functional modules of the display panel.
[0019] However, in this process, since it is often difficult to completely etch the conductive film layers corresponding to different functional modules in the test pads for transmitting signals, the conductive film layers between different functional modules will be connected. Therefore, problems such as screen flickering are likely to occur during the test phase, affecting the accuracy of the test.
[0020] Specifically, Figure 1 As shown, Figure 1 The test pad CTPAD 12 is located in the non-display area 11 of the display panel. In the process of testing the display panel in actual production, it is found that the display panel may have a periodic screen flickering problem as the VDDO / VDDE signal switches during the test.
[0021] Further, the display panel with this problem was analyzed and it was found that the periodic flickering of the display panel was due to the corresponding micro-flickering of the GOA signal in the display panel. Specifically, the impedance between the VCOM and VDDO / VDDE lines is only tens of kilo-ohms, while the impedance between the VCOM and VDDO / VDDE lines of a good display panel that does not flicker is 20MΩ, which is a large difference. Specifically in the film layer of the display panel, since the display panel needs to be quality tested, the CT Pad used to detect each functional module in the display panel needs to lead the jumper wires of different signal detection structures to the outside of the display panel through the indium tin oxide film layer (ITO).
[0022] When dividing the display panel into different signal detection structure cutting lines, the organic film layer (ORG film layer) is usually grooved to form grooves, and then the ITO film layer is covered on the ORG film layer, and the ITO film layer is used as a jumper line for transmitting different signal detection structures. Since the ORG film layer (about 20000-25000Å) is thicker than the ITO film layer (about 700-900Å), the slope angle formed by the ORG film layer in the above groove is larger (60-75º). Figure 2 and Figure 3 As shown, Figure 2 is a top view of the display panel. Figure 3 The slope diagram of the side section of the display panel, the area framed by the dotted frame 21 is the area where the groove is located, and the area where the dotted frame 22 in the groove is located is the jumper area, which is the area where the electrical connection between different signal detection structures is disconnected. Figure 2 It can be seen that the electrical connection here is complete. Figure 3 It can be seen that Figure 3 The groove includes an organic film layer 31 and a conductive film layer 32, and the side plate slope α of the groove is relatively large.
[0023] In this way, when the ITO film layer is subsequently covered on the surface of the ORG film layer that has been grooved, during the subsequent etching process, it is very likely that the ITO film layer inside the groove cannot be etched cleanly, resulting in the ITO film layer still being connected between different signal detection structures, ultimately causing micro shorts.
[0024] Based on this, the present application proposes a test pad for a display panel and a method for preparing a test pad in a display panel, which can solve the problem that the conductive film layers corresponding to different functional modules in the test pad for transmitting signals are often difficult to be completely etched, which in turn causes the conductive film layers between different functional modules to be connected, and ultimately easily causes screen flickering during the test phase, affecting the test accuracy. It can greatly improve the etching accuracy of each conductive film layer corresponding to different functional modules in the test pad, and ultimately improve the test accuracy.
[0025] Figure 4 A schematic diagram of a test pad of a display panel provided in an embodiment of the present application. Figure 4 As shown, the test pad is disposed in the non-display area of the display panel.
[0026] Exemplarily, the above-mentioned test pad (CT PAD) is mainly used to test different functional modules in the display panel.
[0027] Exemplarily, the non-display area may be an area corresponding to the frame area or other areas in the display panel, which is not limited in the embodiments of the present application.
[0028] In an embodiment of the present application, the test pad includes a plurality of signal detection structures, and the signal detection structures include a substrate, an organic film layer disposed on one side of the substrate, and a conductive film layer disposed on a side of the organic film layer away from the substrate.
[0029] Exemplarily, different signal detection structures are used to detect different functional modules of the display panel.
[0030] Exemplarily, the conductive film layer may be an ITO film layer, and the organic film layer may be an ORG film layer.
[0031] In the embodiment of the present application, an electrical connection discontinuity structure is provided between adjacent signal detection structures.
[0032] It can be understood that in order to ensure that each signal detection structure can detect different functional modules in the display panel independently, accurately and without interference from other signal detection modules, an electrical connection interruption structure can be set between adjacent signal detection structures. The electrical connection interruption structure can achieve the effect of electrical connection interruption by not physically making an electrical connection, and can also achieve the effect of electrical connection interruption by changing the transmission path of the electrical signal corresponding to the electrical connection.
[0033] In the embodiment of the present application, the electrical connection discontinuity structure is any one of the following: an electrical connection discontinuity structure corresponding to the signal spacing region on the organic film layer, an electrical connection region between the conductive film layer and the substrate, or a disconnection between the electrical connection regions of adjacent signal detection structures.
[0034] It can be understood that when the electrical connection interruption structure is an electrical connection interruption structure corresponding to the signal spacing area on the above-mentioned organic film layer, that is, by changing the structure of the organic film layer in the jumper area, a physical electrical connection interruption is formed between adjacent signal detection structures, that is, the conductive film layer between adjacent signal detection areas is disconnected, so that adjacent signal detection areas do not interfere with each other; when the electrical connection interruption structure is an electrical connection area between the above-mentioned conductive film layer and the above-mentioned substrate, the signal transmission area (that is, the electrical connection area) of the conductive film layer of each signal detection structure itself when transmitting electrical signals can be changed, so that adjacent signal detection areas do not interfere with each other.
[0035] Furthermore, when the electrical connection discontinuity structure is an electrical connection discontinuity structure on the organic film layer corresponding to the signal spacing region, the electrical connection discontinuity structure can be arranged in a jumper region, wherein the jumper region is the region between different signal detection structures.
[0036] In the present application, the test pad is arranged in the non-display area of the display panel, and the test pad includes a plurality of signal detection structures including a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on the side of the organic film layer away from the substrate; an electrical connection discontinuity structure is arranged between adjacent signal detection structures, and the electrical connection discontinuity structure can be any of the following: an electrical connection discontinuity structure corresponding to the signal spacing area on the organic film layer and an electrical connection area between the conductive film layer and the substrate; wherein the electrical connection areas of adjacent signal detection structures are disconnected. In this way, by setting the electrical connection discontinuity structure, the conductive film layer between different detection areas can be completely etched, or the electrical connection area for transmitting the detection signal can be directly improved, so that different detection signals are transmitted through the disconnected electrical connection area, thereby overcoming and avoiding the problem of screen flickering that is easy to occur during the test stage and affecting the accuracy of the test, and can greatly improve the etching accuracy of each conductive film layer corresponding to different functional modules in the test pad, and finally improve the test accuracy.
[0037] The two different electrical connection discontinuity structures mentioned above will be described below.
[0038] First, the two different electrical connection discontinuity structures are briefly described: The first type: when the above-mentioned electrical connection discontinuity structure is an electrical connection discontinuity structure corresponding to the signal spacing area on the organic film layer, 1) the electrical connection discontinuity structure can be set as a protruding structure between the signal detection structures; 2) a slope structure corresponding to the illumination angle of the photolithography process can also be set on the side of the organic film layer close to the edge of the display panel.
[0039] The second type: when the above-mentioned electrical connection interruption structure is the electrical connection area between the conductive film layer and the substrate, the transmission path of the electrical signal of the conductive film layer can be changed, and different transmission paths are in different electrical connection areas, and different electrical connection areas are spaced from each other.
[0040] Optionally, when the electrical connection interruption structure is an electrical connection interruption structure on the organic film layer corresponding to the signal spacing area, and the electrical connection interruption structure can be set as a protruding structure between the signal detection structures, the orthographic projection of the organic film layer on the substrate includes a first area and a second area, and the second area is the orthographic projection of the electrical connection interruption structure on the substrate.
[0041] Exemplarily, the organic film layer corresponding to the second region is: the organic film layer corresponding to the first region has a convex shape extending toward the edge of the conductive film layer on the edge close to the display panel, and the convex shape at least exceeds the edge of the conductive film layer.
[0042] For example, Figure 4 As shown, Figure 4 is a top view of the display panel. Figure 4 It can be seen that the orthographic projection of the organic film layer 40 on the display panel substrate is the first area 41 and the second area 42. The organic film layer corresponding to the second area 42 is the protruding area of the organic film layer extending from the organic film layer corresponding to the first area 41 toward the edge of the display panel in the jumper area of the test pad. Figure 5 As shown, Figure 5 For display panels along Figure 4 The cross-sectional side view of the jumper line region of AA shown in FIG. 1 shows that the organic film layer 40 is smaller than that of Figure 3 The organic film layer in the related art shown extends all the way to the edge area of the test pad close to the edge of the display panel.
[0043] It can be understood that the reason for setting the above-mentioned convex shape is that after the side of the organic film layer away from the substrate is completely covered with the ITO film layer, the ITO film layer on the spacing area between the signal detection structures needs to be etched so that the electrical connection of the adjacent signal detection structures can be isolated and the flash screen will not be formed. In the related art, it can be known from the above content that the slope angle of the groove formed at the edge of the organic film layer is too large and the groove is too deep, which exceeds the range of light in the photolithography process, so that the ITO film layer in the groove cannot be etched cleanly in the process of photolithography. Based on this, the height of the organic film layer on the jumper line area, that is, between the adjacent signal detection structures, can be raised to form a convex structure of the organic film layer on the jumper line area (that is, the organic film layer corresponding to the second area 42 corresponding to the top view), so that after the side of the organic film layer away from the substrate is completely covered with the ITO film layer, the jumper line area, that is, the ITO film layer between the adjacent signal detection structures can also be illuminated by the light in the photolithography process, and then the ITO film layer in the jumper line area can be completely etched away.
[0044] Exemplarily, the protrusion may be flush with the edge of the display panel, or may extend beyond the edge of the display panel.
[0045] Optionally, in an embodiment of the present application, the height of the electrical connection discontinuity structure corresponds to the illumination depth of the photolithography of the organic film layer.
[0046] From the above content, it can be seen that during the photolithography process, affected by the illumination angle, illumination range, light propagation distance, etc., excessively deep grooves may not be illuminated during the photolithography process. Therefore, in order to overcome the situation in the related art that the ITO film layer located in the jumper area sometimes cannot be etched cleanly by photolithography, the electrical connection discontinuity structure, that is, the structure of the organic film layer corresponding to the first area is set to a height from close to the substrate to the direction away from the substrate to correspond to the illumination depth of the photolithography of the above-mentioned organic film layer, thereby ensuring that the electrical connection discontinuity structure of the display panel can be illuminated by the photolithography light, and then the ITO film layer covering the surface of the organic film layer and corresponding to the electrical connection discontinuity structure is etched clean.
[0047] Optionally, in an embodiment of the present application, the edge of the organic film layer corresponding to the second region includes any one of the following: a straight line edge, including edges of a plurality of recessed portions.
[0048] For example, Figure 4 As shown, the edges of the organic film layer corresponding to the second region 42 are all straight line edges.
[0049] For example, Figure 6 As shown, the edge of the organic film layer corresponding to the second region 42 is an edge including a plurality of recessed portions.
[0050] In one example, the above Figure 6 The multiple recessed portions are recessed portions composed of multiple grooves.
[0051] It can be understood that by setting the edge of the organic film layer corresponding to the second area formed by the above-mentioned multiple recessed portions, on the one hand, the cross-sectional path of the organic film layer corresponding to the second area is extended, and at the same time, ORG forms multiple protruding corners, which is more conducive to preventing ITO from not being cleanly etched by photolithography, thereby causing micro-conduction between different signal detection areas.
[0052] Optionally, when the electrical connection discontinuity structure is an electrical connection discontinuity structure corresponding to the signal spacing area on the organic film layer, and the electrical connection discontinuity structure is a slope structure corresponding to the illumination angle of the photolithography process arranged on the side of the organic film layer close to the edge of the display panel, the organic film layer includes a slope structure between the first edge on the side close to the edge of the display panel and the substrate.
[0053] Exemplarily, the slope between the first edge and the substrate on a side away from the edge of the display panel is smaller than a preset slope, and the preset slope corresponds to a light angle of a photolithography process.
[0054] It is understandable that, as mentioned above, due to Figure 3In the related art shown, the angle α between the edge side of the organic film layer close to the display panel and the substrate is substantially large, reaching 60° to 75°, so the groove on the edge side of the organic film layer cannot be illuminated by the light of the photolithography process, and the ITO film layer covering the side of the organic film layer away from the substrate and located in the electrical connection discontinuity area is not etched cleanly. Therefore, in the embodiment of the present application, the angle between the edge side of the organic film layer close to the display panel and the substrate can be reduced, and the slope of the slope formed between the edge side of the organic film layer close to the display panel and the substrate is set to be less than the preset slope, so as to ensure that the slope can be illuminated by the light of the photolithography process.
[0055] Exemplarily, the preset slope may be user-defined or preset, and this is not limited in the embodiments of the present application.
[0056] Optionally, in an embodiment of the present application, the edge region includes at least two step structures, and a slope between an edge of each step in the step structure and the substrate on a side away from an edge of the display panel is smaller than a preset slope.
[0057] It is understandable that when the preset slope is reduced, the area of the orthographic projection of the slope on the display panel will become larger, and it is possible that the area of the orthographic projection of the slope on the display panel extends all the way to or even exceeds the edge of the display panel. In order to prevent this from happening, the edge area of the organic film layer can be set to at least two step structures, and the slope between the edge of each step and the substrate on one side of the edge of the display panel is less than the preset slope, thereby ensuring that the surface of each step structure is an area that can be illuminated by light during the photolithography process.
[0058] like Figures 7 to 9 As shown, Figure 7 is a top view of the display panel. Figure 8 is a side view of the display panel. Figure 7 The top view of the organic film layer of the display panel near the edge of the display panel shows a two-layer stepped structure (dashed line frame 71). Figure 7 The BB corresponds to the side cross-section of the display panel. Figure 8 The side cross-section of the CC corresponding display panel is formed Fig. 9 It can be seen that Figure 8 and Fig. 9 The organic film layer 40 on the side close to the edge of the display panel has two step structures. Figure 8 is a side cross-sectional view corresponding to the jumper area of the adjacent signal detection area. In this side cross-sectional view, the ITO film layer on the side of the organic film layer away from the display panel is etched cleanly by the photolithography process, and there is no ITO film layer. Correspondingly, Fig. 9It is a side cross-sectional view of the position of any signal detection area. In this side cross-sectional view, the side of the organic film layer away from the display panel is covered with an ITO film layer 72 .
[0059] In the above Figure 8 and Fig. 9 In the embodiment, the angles between the two step structures and the substrate are both smaller than the preset slope.
[0060] Optionally, in an embodiment of the present application, when the above-mentioned electrical connection interruption structure is an electrical connection area between the conductive film layer and the above-mentioned substrate, a plurality of the above-mentioned electrical connection areas are arranged on the side of the above-mentioned organic film layer close to the above-mentioned substrate, different electrical connection areas correspond to different signal detection areas, and electrical connection holes corresponding to the above-mentioned electrical connection areas are arranged in the above-mentioned organic film layer.
[0061] Exemplarily, an orthographic projection of a first edge of the conductive film layer on a side close to an edge of the display panel on the substrate is aligned with an orthographic projection of an edge of the organic film layer close to the display panel on the substrate.
[0062] Exemplarily, the conductive film layer is coated on a side of the organic film layer away from the substrate, and is electrically connected to the electrical connection region through the electrical connection via.
[0063] It is understandable that in order to prevent electrical connection between different signal detection areas, the electrical signals obtained by the conductive film layer can be transferred by utilizing the existing electrical connection area in the display panel, thereby transmitting the electrical signals between different signal detection areas separately.
[0064] Optionally, in an embodiment of the present application, the electrical connection region is a source-drain electrode layer of the organic film layer close to the display panel, and adjacent source-drain electrode layers are disconnected.
[0065] Exemplarily, since the source drain layers (SD layers) corresponding to adjacent signal detection areas are disconnected and not connected, the detection signals of the signal detection areas obtained by the adjacent source drain layers represent different signals. Based on this, the detection signal of the signal detection area received by the conductive film layer can be obtained through the source drain layer, and then the signal of the signal detection area is transmitted through the source drain layer. In this way, the signal of the transmitted signal detection area is used to indicate the information of the area, and there will be no signal transmission error.
[0066] For example, Fig.10 As shown, in Fig.10It can be seen that the source-drain electrode layer 101 corresponding to each signal detection area in the display panel serves as the above-mentioned electrical connection area. Since different source-drain electrode layers 101 correspond to different signal detection areas, a number of electrical connection transfer holes 102 corresponding to the source-drain electrode layer 101 can be set in the organic film layer (the rectangles identical to the electrical connection transfer holes 102 marked in the figure are all electrical connection transfer holes), and then in the process of covering the conductive film layer on the side of the organic film layer away from the substrate, the conductive film layer can be connected to the source-drain electrode layer through the electrical connection transfer hole, and then the electrical signal can be transferred through the source-drain electrode layer, and then the source-drain electrode layer crosses the organic film layer to the outside of the display panel. It can be understood that the source-drain electrode layer 101 is set below the conductive film layer, and in the process of covering the conductive film layer, the conductive film layer will be connected to the electrical connection transfer hole 102, and then the signal of the organic film layer can be received.
[0067] It can be understood that since different source and drain layers correspond to different signal detection areas, when the conductive film layer is connected to the source and drain layer through the electrical connection vias, the corresponding different signal detection areas are not actually electrically connected to each other, and the electrical signals corresponding to different signal detection areas are connected to the outside of the display panel through different source and drain layers across the organic film layer.
[0068] An embodiment of the present application further provides a display panel, which includes a display area and a non-display area, wherein the non-display area includes the test pad of the aforementioned display panel.
[0069] Fig.11 FIG. 1 is a flow chart of a method for preparing a test pad in a display panel according to an embodiment of the present application. Fig.11 As shown, the display panel comprises: a test pad, the test pad is arranged in a non-display area of the display panel, the test pad comprises a plurality of signal detection structures, the signal detection structure comprises a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on a side of the organic film layer away from the substrate; The method comprises the following steps 301: Step 301: etching the film layer in the test pad through a target mask so that an electrical connection discontinuity structure is provided between adjacent signal detection structures.
[0070] In an embodiment of the present application, the target mask includes any one of the following: a mask corresponding to the organic film layer, or a mask corresponding to the organic film layer and the film layer between the conductive film layer and the substrate.
[0071] In the embodiment of the present application, the electrical connection discontinuity structure is any one of the following: an electrical connection discontinuity structure corresponding to the signal spacing region on the organic film layer, an electrical connection region between the conductive film layer and the substrate, or a disconnection between the electrical connection regions of adjacent signal detection structures.
[0072] It is understandable that after the organic layer is covered on the front side of the substrate of the display panel, the organic film layer needs to be etched through the mask corresponding to the organic film layer to generate the required organic film layer structure before the conductive film layer can be continued to be covered on the side of the etched organic film layer away from the substrate.
[0073] In one example, when the electrical connection discontinuity structure is an electrical connection discontinuity structure corresponding to the signal spacing region on the organic film layer, the target mask can be set to generate Figure 4-Figure 10 Mask for the structure shown.
[0074] For example, the target mask can be set to a mask that can etch the organic film layer into a protruding shape with a straight edge at the edge of the protruding shape; the target mask can also be set to a mask that can etch the organic film layer into a protruding shape with a plurality of recessed edges at the edge of the protruding shape; the target mask can also be set to at least two sub-masks that can etch the side of the organic film layer close to the edge of the display panel into at least two step structures with a slope less than a preset slope, wherein one step structure corresponds to one sub-mask, and the number of sub-masks is the same as the number of step structures.
[0075] In one example, when the electrical connection structure is an electrical connection region between the conductive film layer and the substrate, the target mask may be set to a structure capable of etching the organic film layer to form an electrical connection via.
[0076] In the method provided in the embodiment of the present application, the test pad of the display panel is arranged in the non-display area of the display panel, and the test pad includes a plurality of signal detection structures including a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on the side of the organic film layer away from the substrate. The film layer in the test pad is etched by setting a target mask, so that an electrical connection discontinuity structure (a mask corresponding to the organic film layer, or a mask corresponding to the film layer between the organic film layer and the conductive film layer and the substrate) is arranged between adjacent signal detection areas; wherein the electrical connection discontinuity structure can be any one of the following: an electrical connection discontinuity structure corresponding to the signal spacing area on the organic film layer and an electrical connection area between the conductive film layer and the substrate; wherein the electrical connection areas of adjacent signal detection structures are disconnected. In this way, the electrical connection structure is etched through the target mask and the electrical connection discontinuity structure is set so that the conductive film layer between different detection areas can be completely etched, or the electrical connection area for transmitting the detection signal can be directly improved so that different detection signals are transmitted through the discontinuous electrical connection area, thereby overcoming and avoiding the problem of screen flickering that is prone to occur during the test phase and affecting the accuracy of the test. The etching accuracy of each conductive film layer corresponding to different functional modules in the test pad can be greatly improved, thereby ultimately improving the test accuracy.
[0077] The present application also provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the training rule determination method described in the present application is implemented. For example, the following can be executed: Fig.11 The individual steps of the method are shown.
[0078] The present invention provides a computer program product, which includes instructions that are executed by a processor when the processor executes the instructions. Fig.11 The individual steps of the method are shown.
[0079] It should be noted that although the operations of the method of the present invention are described in a particular order in the drawings, this does not require or imply that the operations must be performed in this particular order or that all illustrated operations must be performed to achieve desired results.
[0080] For the several modules or units mentioned in the above detailed description, this division is not mandatory. In fact, according to the embodiments of the present disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. On the contrary, the features and functions of one module or unit described above can be further divided into multiple modules or units to be embodied.
[0081] Reference below Fig.12 , Fig.12 FIG. 1 is a schematic diagram showing a structure of a computer device suitable for implementing an embodiment of the present application. Fig.12As shown, the computer system 1700 includes a central processing unit (CPU) 1701, which can perform various appropriate actions and processes according to the program stored in the read-only memory (ROM) 1702 or the program loaded from the storage part 1708 to the random access memory (RAM) 1703. In the RAM 1703, various programs and data required for the operation instructions of the system are also stored. The CPU 1701, the ROM 1702, and the RAM 1703 are connected to each other through a bus 1704. An input / output (I / O) interface 1705 is also connected to the bus 1704.
[0082] The following components are connected to the I / O interface 1705: an input section 1706 including a keyboard, a mouse, etc.; an output section 1707 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and a speaker, etc.; a storage section 1708 including a hard disk, etc.; and a communication section 1709 including a network interface card such as a LAN card, a modem, etc. The communication section 1709 performs communication processing via a network such as the Internet. A drive 1710 is also connected to the I / O interface 1705 as needed. A removable medium 1711, such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 1710 as needed, so that a computer program read therefrom is installed into the storage section 1708 as needed.
[0083] In particular, according to an embodiment of the present application, the above reference flow chart Fig.11 The described process can be implemented as a computer software program. For example, an embodiment of the present application includes a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program includes a program code for executing the method shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network through the communication part 1709, and / or installed from a removable medium 1711. When the computer program is executed by the central processing unit (CPU) 1701, the above-mentioned functions defined in the system of the present application are executed.
[0084] It should be noted that the computer-readable medium shown in the present application may be a computer-readable signal medium or a computer-readable storage medium or any combination of the above two. The computer-readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In the present application, a computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in combination with an instruction execution system, device or device. In the present application, a computer-readable signal medium may include a data signal propagated in a baseband or as part of a carrier wave, which carries a computer-readable program code. This propagated data signal may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium such as a computer-readable storage medium that can send, propagate or transmit a program for use by or in conjunction with an instruction execution system, device or device. The program code contained on the computer-readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wire, optical cable, RF, etc., or any suitable combination of the above.
[0085] The flow chart and block diagram in the accompanying drawings illustrate the possible architecture, functions and operating instructions of the system, method and computer program product according to various embodiments of the present application. In this regard, each box in the flow chart or block diagram can represent a module, a program segment or a part of a code, and the aforementioned module, program segment or a part of a code contains one or more executable instructions for realizing the specified logical function. It should also be noted that in some implementations as replacements, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, the boxes represented by two connections can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs a specified function or operating instruction, or can be implemented with a combination of dedicated hardware and computer instructions.
[0086] The units or modules involved in the embodiments described in the present application may be implemented by software or hardware. The units or modules described may also be set in a processor. For example, it may be described as: a processor includes a first receiving module, a second receiving module, and a sending module. The names of these units or modules do not, in some cases, constitute limitations on the units or modules themselves.
[0087] As another aspect, the present application further provides a computer-readable storage medium, which may be included in the electronic device described in the above embodiment, or may exist independently without being assembled into the electronic device. The above computer-readable storage medium stores one or more programs, and when the above programs are used by one or more processors to execute the method for preparing the test pad in the display panel described in the present application.
[0088] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of disclosure involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the aforementioned disclosed concept. For example, the above features are replaced with the technical features with similar functions disclosed in the present application (but not limited to) by each other to form a technical solution.
Claims
1. A test pad for a display panel, characterized in that: include: A test pad is arranged in a non-display area of the display panel, the test pad includes a plurality of signal detection structures, the signal detection structure includes a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on a side of the organic film layer away from the substrate; An electrical connection discontinuity structure is arranged between adjacent signal detection structures; the electrical connection discontinuity structure is any one of the following: an electrical connection discontinuity structure corresponding to the signal spacing area on the organic film layer, an electrical connection area between the conductive film layer and the substrate; the electrical connection areas of adjacent signal detection structures are disconnected.
2. The test pad according to claim 1, wherein the orthographic projection of the organic film layer on the substrate includes a first area and a second area, and the second area is the orthographic projection of the electrical connection discontinuity structure on the substrate; The organic film layer corresponding to the second region is: the organic film layer corresponding to the first region has a convex shape extending toward the edge of the conductive film layer on the edge close to the display panel, and the convex shape at least exceeds the edge of the conductive film layer.
3. The test pad according to claim 2, characterized in that: The height of the electrical connection discontinuity structure corresponds to the illumination depth of the photolithography of the organic film layer.
4. The test pad according to claim 2, wherein: The edge of the organic film layer corresponding to the second region includes any one of the following: a straight line edge, including edges of a plurality of recessed portions.
5. The test pad according to claim 1, wherein: A plurality of electrical connection areas are provided on a side of the organic film layer close to the substrate, different electrical connection areas correspond to different signal detection areas, and electrical connection vias corresponding to the electrical connection areas are provided in the organic film layer; The orthographic projection of a first edge of the conductive film layer close to the edge of the display panel on the substrate is aligned with the orthographic projection of an edge of the organic film layer close to the display panel on the substrate; The conductive film layer is coated on a side of the organic film layer away from the substrate and is electrically connected to the electrical connection area through the electrical connection via.
6. The test pad according to claim 5, characterized in that: The electrical connection area is the source and drain electrode layer of the organic film layer close to the display panel, and adjacent source and drain electrode layers are disconnected.
7. The test pad according to claim 1, characterized in that: The organic film layer includes a slope structure between the first edge on the side close to the edge of the display panel and the substrate, and the slope between the first edge and the substrate on the side away from the edge of the display panel is less than a preset slope, and the preset slope corresponds to the illumination angle of the photolithography process.
8. The test pad according to claim 7, characterized in that: The edge region includes at least two step structures, and a slope between an edge of each step in the step structures and the substrate on a side away from an edge of the display panel is smaller than the preset slope.
9. A display panel, characterized in that: The display panel comprises a display area and a non-display area, and the non-display area comprises the test pad of the display panel according to any one of claims 1 to 8.
10. A method for preparing a test pad in a display panel, characterized in that: The display panel comprises: a test pad, the test pad is arranged in a non-display area of the display panel, the test pad comprises a plurality of signal detection structures, the signal detection structure comprises a substrate, an organic film layer arranged on one side of the substrate, and a conductive film layer arranged on a side of the organic film layer away from the substrate; The method comprises: Etching the film layer in the test pad through a target mask so that an electrical connection discontinuity structure is provided between adjacent signal detection structures; The target mask includes any one of the following: a mask corresponding to the organic film layer, or a mask corresponding to the film layer between the organic film layer and the conductive film layer and the substrate; The electrical connection discontinuity structure is any one of the following: an electrical connection discontinuity structure corresponding to a signal spacing region on the organic film layer, an electrical connection region between the conductive film layer and the substrate; and a disconnection between electrical connection regions of adjacent signal detection structures.
11. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the program, the method according to claim 10 is implemented.
12. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method according to claim 10 is implemented.
13. A computer program product, comprising instructions, characterized in that: When the instructions are executed by a processor, the method according to claim 10 is implemented.