Sparse modular multilevel matrix converter topology, design and control method

Abstract

The application provides a sparse modular multilevel matrix converter topology, a design method and a control method, and the topology has three-phase symmetry on the input and output sides. The design method is for the purpose of reserving the functions and performance of a conventional M3C and reducing the cost, and comprises the following steps: setting the input side and the output side AC frequency of the matrix converter as an integer frequency division relationship; improving the utilization rate of the DC voltage and reducing the modulation amplitude of each bridge arm through a two-side phase coordination control method; and determining the number of bridge arm sub-modules to be less than the number of bridge arm sub-modules of the conventional M3C based on the modulation amplitude. Through the phase coordination technology, the number of bridge arm sub-modules is reduced on the basis of reserving the functions and performance of the conventional M3C, so that the cost is reduced, and the operation efficiency is improved to a certain extent.

Description

Technical Field

[0001] The present invention relates to the field of electronic power and control, and in particular to a sparse modular multi-level matrix converter topology, design and control method. Background Art

[0002] my country boasts a vast territory and abundant offshore wind energy resources, offering significant development potential. In recent years, the focus of wind power development has gradually shifted from onshore to offshore. As the installed capacity and transmission distances of offshore wind farms continue to increase, achieving economical and reliable transmission of offshore wind power has become a critical issue that needs to be addressed. Researchers have discovered that frequency-splitting AC transmission can overcome the challenges inherent in traditional power-frequency AC and HVDC transmission methods.

[0003] As the core of low-frequency AC transmission technology, inverters play a key role in converting low-frequency wind power into industrial frequency power for smooth grid integration. They can also convert industrial frequency power into low-frequency power to meet specific transmission requirements. With the continuous increase in transmission line voltage levels and transmission capacity, research on high-voltage, high-capacity inverters for low-frequency transmission has become particularly important. Among various inverter types, the AC-AC matrix converter has attracted considerable attention due to its unique advantages. This converter not only eliminates the intermediate DC link, resulting in a more compact structure, but also facilitates modular design, making it highly suitable for high-voltage, high-capacity applications. Furthermore, the AC-AC matrix converter features bidirectional energy flow and low low-order harmonic content in the output voltage and current, ensuring efficient and stable power conversion. Among AC-AC matrix converters, the modular multilevel matrix converter, with its high degree of modularity and strong scalability, holds great promise for application in high-voltage, high-capacity power conversion.

[0004] As the transmission capacity of low-frequency AC systems continues to increase, M3C faces limitations in high-voltage, high-power applications. These limitations are primarily due to factors such as capacitor capacitance, capacitor withstand voltage, and the withstand voltage of switching devices. To overcome these limitations, a common solution is to increase the number of bridge arm submodules. This effectively improves the M3C's withstand voltage and power handling capabilities, adapting it to higher voltage and higher power applications. However, this comes at a high cost. Summary of the Invention

[0005] In view of the defects in the prior art, the present invention aims to provide a sparse modular multi-level matrix converter topology, design and control method.

[0006] According to one aspect of the present invention, there is provided a sparse modular multi-level matrix converter topology, wherein the topology has three-phase symmetry on the input and output sides;

[0007] From the input side, the nine bridge arms are divided into three sub-converters: the A-phase sub-converter consisting of the Aa, Ab, and Ac bridge arms, the B-phase sub-converter consisting of the Ba, Bb, and Bc bridge arms, and the C-phase sub-converter consisting of the Ca, Cb, and Cc bridge arms.

[0008] From the output side, the nine bridge arms are also divided into three sub-converters: the a-phase sub-converter including the Aa, Ba, and Ca bridge arms, the b-phase sub-converter including the Ab, Bb, and Cb bridge arms, and the c-phase sub-converter including the Ac, Bc, and Cc bridge arms.

[0009] Each phase input side is provided with an equivalent resistance and inductance, each phase output side is provided with an equivalent resistance and inductance, and each bridge arm has a bridge arm resistance and inductance;

[0010] The number of submodules of the bridge arm of at least one phase converter is less than the number of submodules of the bridge arm of the corresponding phase converter of the conventional M3C.

[0011] Preferably, the working principle of the topology is specifically as follows:

[0012] When the system is running stably, the circulating current of the matrix converter topology is completely suppressed, and the voltage drop caused by the current flowing through the resistor and inductor is ignored. At this time, the voltage and current on the input and output sides are three-phase symmetrical sinusoidal waves, and the input and output currents are evenly distributed in each phase, that is, the following is satisfied:

[0013] u xy =u ix -u oy =U im cos(w i t+θ i )-U om cos(w o t+θ o )

[0014]

[0015] where u ix 、u iy are the AC voltages at the input and output sides respectively; i ix 、i iy are the AC currents at the input and output sides respectively; i xy 、u xy are the current and voltage on the bridge arms x and y respectively; U im 、U om Respectively represent the amplitude of input and output voltage; I im , I om Respectively represent the amplitude of input and output current; w i 、w oRepresent the angular velocity of the input and output sides respectively; θ i ,θ o Respectively represent the initial phases of the input and output voltages; Respectively represent the power factor angles of the input and output sides;

[0016] Preferably, the mathematical decoupling model of the topology is specifically:

[0017] The voltage equation of the topology in the rectangular coordinate system is obtained from Kirchhoff's voltage law:

[0018]

[0019] where u ix 、i ix are the input side voltage and current respectively; u oy 、i oy are the output side voltage and current respectively; i xy 、u xy， Where x = A, B, C; y = a, b, c are bridge arm voltage and current respectively; R is 、R os , L is , L os are the equivalent resistance and inductance of the input system side and the output system side respectively; R0 and L0 are the resistance and inductance of the bridge arm, u OO’ Respectively represent the neutral point voltage difference between the three-phase voltage on the input side and the three-phase voltage on the output side;

[0020] Perform double αβ0 transformation on the voltage equation of the topology in the rectangular coordinate system to obtain the equivalent circuit diagrams of the input, output and circulating sides; wherein the αβ0 transformation coefficient matrix under equal power conversion is:

[0021]

[0022] The double αβ0 transformation process is:

[0023]

[0024] The voltage equation of the topology in the rectangular coordinate system is applied with the double αβ0 transformation to obtain the voltage equation in the double αβ0 coordinate system:

[0025]

[0026] Among them, i αα 、i αβ 、i βα 、i ββ 、i 0α 、i 0β 、i α0 、iβ0 、i 00 is the current component of the bridge arm current after double αβ0 transformation; u αα 、u αβ 、u βα 、u ββ 、u 0α 、u 0β 、u α0 、u β0 、u 00 is the voltage component of the bridge arm voltage after double αβ0 transformation;

[0027] Based on the three-phase symmetry of the input and output sides of the topology, the simplified equation is obtained:

[0028]

[0029] Based on the simplified equations, the eighth-order decoupling mathematical equations describing the input side, output side, and circulation side are obtained respectively: the decoupling mathematical equation on the input side is:

[0030]

[0031] The decoupling mathematical equation on the output side is:

[0032]

[0033] The decoupling mathematical equation on the circulation side is:

[0034]

[0035] u 00 =-3u OO'

[0036] where L' i , L' o , R' i , R' o The definition is as follows:

[0037]

[0038]

[0039] According to a second aspect of the present invention, a design method for a sparse modular multilevel matrix converter topology is provided, wherein the design method is intended to retain conventional M3C functionality and performance while reducing costs, comprising the steps of:

[0040] Setting the AC frequencies on the input and output sides of the matrix converter to an integer division relationship;

[0041] Based on the integer frequency division relationship, the utilization rate of the DC voltage is improved and the modulation wave amplitude of each bridge arm is reduced through the control method of phase coordination on both sides;

[0042] Based on the modulation wave amplitude, it is determined that the number of bridge arm sub-modules is less than that of the conventional M3C.

[0043] Preferably, the control method of phase coordination on both sides is used to improve the utilization rate of the DC voltage and reduce the modulation wave amplitude of each bridge arm, and the number of bridge arm submodules is determined to be less than the number of bridge arm submodules of the conventional M3C based on the modulation wave amplitude, including:

[0044] When the system is running stably, the sparse modular multi-level matrix converter modulation wave u ref , specifically:

[0045] u ref =m i sin(w i t+θ i )-m o sin(w o t+θ o )

[0046] where w i 、w o are the AC frequencies at the input and output sides, θ i ,θ o are the AC frequencies at the input and output sides respectively; m i 、m o are the voltage modulation ratios on the input and output sides of the frequency-divided AC transmission system, m i =U im / NU c , m o =U om / NU c , where N is the number of bridge arm submodules and Uc is the rated voltage of the submodule capacitor.

[0047] Based on the three-phase symmetry of the input and output side systems, the phases of the input side AC voltage and the output side AC voltage are defined as follows: input side phase A is wt, phase B is wt-120°, phase C is wt+120°, and output side phase a is Phase b is Phase C is

[0048] The minimum value of the modulation wave amplitude of each bridge arm is obtained by traversal. For sub-converter A, when the initial phase angle of the output voltage is equal to When the modulation wave amplitudes of the three bridge arms reach their minimum values ​​at the same time; for sub-converter B, when the phase angle is equal to When the modulation wave amplitudes of the three bridge arms reach their minimum values ​​at the same time; for sub-converter C, when the phase angle is equal to When , the modulation wave amplitudes of the three bridge arms reach the minimum value;

[0049] From the traversal process, it is concluded that changing the initial phase angle of the voltage can change the amplitude of the modulation wave of the three-phase sub-converter;

[0050] Based on the above conclusions and the proportional relationship between the modulation wave amplitude and the number of bridge arm submodules, it is determined that reducing the number of bridge arm submodules accordingly can improve the utilization rate of DC voltage and retain the original conventional M3C functions and performance.

[0051] Preferably, the design method is applicable when there is a frequency division relationship between the input and output side systems.

[0052] According to a third aspect of the present invention, a control method for a sparse modular multilevel matrix converter topology is provided, wherein outer-loop control of a fixed DC capacitor voltage is adopted on the input side, and outer-loop control of fixed active and reactive power is adopted on the output side. The two outer-loop controls provide the required reference value input for the current inner-loop control, and the outer-loop control and the current inner-loop control together constitute a dual closed-loop vector control. Bridge arm capacitor voltage balancing control, circulating current suppression, and sub-module capacitor voltage balancing control are added to the dual closed-loop vector control to achieve capacitor voltage balancing between the bridge arms of each sub-converter.

[0053] Preferably, the mathematical model of the current inner loop control is specifically:

[0054] Determine the transformation matrix from the αβ0 coordinate system to the dq coordinate system, specifically:

[0055]

[0056]

[0057] where w i 、w o Represent the input and output side AC angular frequencies respectively, Represent the transformation matrices of the input side and output side respectively;

[0058] Applying the transformation matrix to the decoupling model in the αβ0 coordinate system and simplifying it yields:

[0059]

[0060]

[0061] where u d0 、u q0 is the αβ axis component of the input side AC voltage after αβ0 / dq transformation; u0d 、u 0q is the αβ axis component of the output side AC voltage obtained after αβ0 / dq transformation; u id 、u iq is the dq axis component of the input side AC voltage; i id 、i iq is the dq axis component of the input side AC current; u od 、u oq is the dq axis component of the output side AC voltage; i od 、i oq is the dq-axis component of the output side AC current.

[0062] Performing Laplace transform on both sides of the simplified equation yields the mathematical model of the sM3C input and output sides in the dq coordinate system, specifically:

[0063]

[0064]

[0065] s is the operation factor in the complex frequency domain after Laplace transform.

[0066] Preferably, the current inner loop control is specifically:

[0067]

[0068]

[0069] where u d0_ref 、u q0_ref The reference value output by the input side current inner loop control; u 0d_ref 、u 0q_ref k is the reference value output by the output side current inner loop control; p 、k i PI controller parameters used for current inner loop control; i id_ref 、i iq_ref Current reference value provided for input side outer loop control; i od_ref 、i oq_ref Current reference value provided for output side outer loop control;

[0070] Income d0_ref 、u q0_ref 、u 0d_ref 、u 0q_ref Then transform it back to the αβ0 coordinate system through the αβ0 / dq inverse transformation.

[0071] Preferably, the input side adopts outer loop control of constant DC capacitor voltage, and the output side adopts outer loop control of constant active and reactive power, and the two outer loop controls provide the required reference value input for the current inner loop control, including:

[0072] The relationship between the bridge arm capacitor voltage and the bridge arm power is as follows:

[0073]

[0074] Among them U cxy is the sum of the capacitor voltages of all submodules in the xy bridge arm; P xy is the active power on the xy bridge arm; U c0 is the rated voltage value of the submodule capacitor; N is the number of submodules in the bridge arm of the B and C phase subconverters; N' is the number of submodules in the bridge arm of the A phase subconverter; C is the submodule capacitor value;

[0075] Applying double αβ0 transformation to the relationship between the bridge arm capacitor voltage and the bridge arm power yields:

[0076]

[0077] If U cxy =NU c0 or N'U c0 When the voltage of each bridge arm capacitor is controlled, the relationship between the bridge arm capacitor voltage and the bridge arm power after the double αβ0 transformation is changed to:

[0078]

[0079] Control U c00 The quantity is (2+N' / N)U c0 , so that the voltage of each bridge arm capacitor is balanced, and P 00 The difference between the active power flowing into and out of the converter:

[0080]

[0081] P out As a disturbance term, P in The following relationship is satisfied:

[0082]

[0083] where u id 、i id P is the d-axis component of the input side AC voltage and current. in Substitute P 00 get:

[0084]

[0085] From this design:

[0086]

[0087] According to the instantaneous power theory in the dq coordinate system, the expressions of active and reactive power when the system is running stably are:

[0088]

[0089] From the expressions of active and reactive power, it is determined that the control of active power and reactive power can be achieved by controlling the active and reactive components of the system current, that is:

[0090]

[0091] The constant power control model is obtained as:

[0092]

[0093] Preferably, the circulation suppression is performed directly in the αβ0 coordinate system, including:

[0094]

[0095] where u αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref is the output of the circulation suppression control link; i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the following bridge arm capacitor voltage balance control link; i αα 、i αβ 、i βα 、i ββ is the bridge arm current i xy The current obtained after double αβ0 conversion;

[0096] Income αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref Together with the value obtained by the αβ0 / dq inverse transformation of the current inner loop control output, it constitutes the reference value of the bridge arm voltage in the αβ0 coordinate system. Then, through the double αβ0 inverse transformation, the reference value of the bridge arm voltage in the abc coordinate system can be obtained and applied to the generation of the modulation wave signal.

[0097] 12. The control method for a sparse modular multilevel matrix converter topology according to claim 7, wherein the balanced control of the bridge arm capacitor voltage is achieved by injecting a circulating current capable of balancing the power of each bridge arm within a sub-converter and between sub-converters, specifically:

[0098]

[0099] where i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the bridge arm capacitor voltage balance control link; U cαα 、U cβα 、U cαβ 、U cββ 、U c0α 、U c0β 、U cα0 、U cβ0 They are the total capacitance voltage of the bridge arm U cxy Obtained after double αβ0 transformation; K1, K2, K3 are known constants.

[0100] Preferably, the submodule capacitor voltage balancing control is achieved by adjusting the duty cycle of the modulation voltage of each submodule respectively.

[0101] Compared with the prior art, the embodiments of the present invention have at least one of the following beneficial effects:

[0102] The sparse modular multilevel matrix converter topology and design method in the embodiments of the present invention, through phase coordination technology, reduces the number of bridge arm submodules while retaining the functions and performance of conventional M3C, thereby reducing costs and improving operating efficiency to a certain extent.

[0103] The control method for the sparse modular multilevel matrix converter topology in the embodiment of the present invention has been verified by simulation, and each control link (dual closed-loop control, circulating current suppression, and capacitor voltage balancing control) can achieve the control target, thereby ensuring that the sparse modular multilevel matrix converter has excellent input and output characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0104] Other features, objects and advantages of the present invention will become more apparent upon reading the detailed description of non-limiting embodiments with reference to the following drawings:

[0105] Figure 1 4 is a topology diagram of a sparse modular multilevel matrix converter topology (hereinafter referred to as sM3C) in an embodiment of the present invention;

[0106] Figure 2 sM3C overall closed-loop control strategy block diagram in an embodiment of the present invention;

[0107] Figure 3 is a graph showing how the modulation wave amplitude of a single-phase sub-converter varies with the phase angle in the phase coordination technology according to an embodiment of the present invention;

[0108] Figure 4 is a graph showing how the modulation wave amplitude of the three-phase sub-converter changes with the phase angle in the phase coordination technology in an embodiment of the present invention;

[0109] Figure 5 1 is a diagram of the sub-converter architecture of the sM3C from the input side / output side perspective in an embodiment of the present invention;

[0110] Figure 6 is the mathematical model of sM3C in the dq coordinate system in the embodiment of the present invention;

[0111] Figure 7 This is a block diagram of the input-side current inner loop controller of the sM3C in an embodiment of the present invention;

[0112] Figure 8 This is a block diagram of the output-side current inner loop controller of the sM3C in an embodiment of the present invention;

[0113] Figure 9 This is a block diagram of the input-side constant voltage outer loop controller of the sM3C in an embodiment of the present invention;

[0114] Figure 10 This is a block diagram of the output-side constant power outer loop controller of the sM3C in an embodiment of the present invention;

[0115] Figure 11 This is a block diagram of the capacitor voltage balancing control of the sM3C submodule in an embodiment of the present invention;

[0116] Figure 12 (a) and (b) are the AC voltage and current curves on the power frequency side of the frequency-divided power transmission system in the embodiment of the present invention, respectively;

[0117] Figure 12 (c) and (d) are the AC voltage and current curves of the frequency division side in the frequency division power transmission system according to the embodiment of the present invention;

[0118] Figure 13 (a) and (b) are the AC current spectrum analysis results of the power frequency side and the divided frequency side of the divided frequency transmission system according to the embodiment of the present invention respectively;

[0119] Figure 14 (a) and (b) are the AC voltage and current curves of the sM3C bridge arm Aa in the embodiment of the present invention, respectively;

[0120] Figure 15 (a) and (b) are the control effect curves of the sM3C input side voltage outer loop and output side power outer loop respectively in the embodiment of the present invention;

[0121] Figure 15(c) and (d) are the current inner loop control effect curves of the sM3C input side and output side respectively in the embodiment of the present invention;

[0122] Figure 16 This is the sM3C capacitor voltage balancing control result curve in the implementation scheme of the present invention;

[0123] Figure 17 This is the capacitor voltage control result curve of each submodule of sM3C in the implementation scheme of the present invention. DETAILED DESCRIPTION

[0124] The present invention will be described in detail below with reference to specific embodiments. The following embodiments will help those skilled in the art to further understand the present invention, but are not intended to limit the present invention in any form. It should be noted that, for those skilled in the art, several variations and improvements can be made without departing from the scope of the present invention. These all fall within the scope of protection of the present invention.

[0125] In one embodiment of the present invention, a sparse modular multilevel matrix converter (sM3C) topology is provided. This topology is optimized for the purpose of retaining the functions and performance of a conventional M3C while reducing costs.

[0126] Furthermore, in a preferred embodiment, a detailed topology is provided. Figure 1 As shown, let the input side voltage and current be u ix 、i ix , the output side voltage and current are u oy 、i oy , the bridge arm voltage and current are i xy 、u xy (where x=A,B,C; y=a,b,c). R is 、R os , L is , L os are the equivalent resistance and inductance of the input system side and the output system side, respectively. R0 and L0 are the resistance and inductance of the bridge arm, and O and O' represent the neutral points of the three-phase voltage on the input side and the three-phase voltage on the output side, respectively. Figure 5This is an sM3C topology from the input / output perspective, demonstrating three-phase symmetry between the input and output sides. From the input side, the nine bridge arms can be divided into three sub-converters: the A-phase sub-converter (including arms Aa, Ab, and Ac), the B-phase sub-converter (including arms Ba, Bb, and Bc), and the C-phase sub-converter (including arms Ca, Cb, and Cc). From the output side, the three sub-converters can also be divided: the a-phase sub-converter (including arms Aa, Ba, and Ca), the b-phase sub-converter (including arms Ab, Bb, and Cb), and the c-phase sub-converter (including arms Ac, Bc, and Cc). At least one of the bridge arms of the conventional M3C converter has fewer submodules than the corresponding arm of the corresponding phase.

[0127] Based on the same inventive concept, another embodiment of the present invention provides a design method for a sparse modular multi-level matrix converter topology, wherein the design steps are as follows:

[0128] Step 1: Set the AC frequencies on the input and output sides of the matrix converter to an integer division relationship;

[0129] Step 2: Based on the integer frequency division relationship of the previous step, the utilization rate of the DC voltage is improved and the modulation wave amplitude of each bridge arm is reduced through the phase coordination control method on both sides;

[0130] Step 3: Based on the modulation wave amplitude in step 2, it is determined that the number of bridge arm submodules is less than the number of bridge arm submodules of a conventional M3C.

[0131] In this embodiment, by coordinating the phases on both sides of the frequency-divided AC system and optimizing the bridge arm modulation wave amplitude on a conventional M3C topology, a low-cost, high-efficiency, and high-reliability sM3C is provided.

[0132] In a preferred embodiment of the present invention, a preferred solution of step 2 and step 3 in the above embodiment is provided, namely, the principle of converter optimization design based on phase coordination, specifically as follows:

[0133] When the system is running stably, the expression of the sM3C modulation wave is as follows:

[0134] u ref =m i sin(w i t+θ i )-m o sin(w o t+θ o ) (1)

[0135] where w i 、w o are the AC frequencies at the input and output sides, θ i,θ o are the AC frequencies at the input and output sides respectively; m i 、m o They are the voltage modulation ratios on the input and output sides of the frequency-divided AC transmission system, respectively. This value is related to the amplitude of the AC voltage.

[0136] It should be noted that this phase coordination design method is applicable when there is a frequency division relationship between the input and output systems.

[0137] Furthermore, in a preferred embodiment, a triple frequency relationship is taken as an example for description.

[0138] Considering the three-phase symmetry of the input and output side systems, the phases of the input side AC voltage and the output side AC voltage are defined as shown in the following table.

[0139] Table 1 Input side and output side AC voltage phase

[0140]

[0141] This embodiment uses a traversal method to find the minimum value of the modulation wave amplitude of each bridge arm. Taking the Aa bridge arm as an example, the initial phase angle When the modulation amplitude changes between 0 and 2π, The period varies between 1.5398 and 2, such as Figure 3 shown.

[0142] For bridge arm Aa, the initial phase angle equal When (k=0,±1,±2,…), the amplitude of the modulated wave can reach the minimum value; similarly, for the bridge arm Ab, when the phase angle is equal to When the amplitude of the modulated wave can reach the minimum value; for the bridge arm Ac, the initial phase angle is equal to When , the amplitude of the modulation wave can achieve the minimum value; In summary, for sub-converter A, when the initial phase angle of the output side voltage is equal to When , the modulation wave amplitudes of the three bridge arms reach the minimum at the same time.

[0143] The same analysis can also be applied to sub-converters B and C. When the phase angle is equal to When the phase angle is equal to When , the modulation wave amplitudes of the three bridge arms of sub-converter C reach the minimum value.

[0144] Depend on Figure 4It can be seen that by changing the initial voltage phase angle, the amplitude of the modulation wave of the three-phase sub-converter can be changed. For a particular bridge arm, reducing the modulation wave amplitude means that the number of bridge arm sub-modules can be reduced accordingly, thereby improving the utilization of the DC voltage. Due to the mutual coupling of the input and output three-phase voltages within the bridge arm, the modulation wave of the three-phase sub-converter cannot simultaneously achieve the minimum value. The following are two possible optimal results.

[0145] Initial phase angle equal The change of modulation wave amplitude is shown in the following table.

[0146] Table 2 Table of changes in the amplitude of the modulation wave

[0147]

[0148] Initial phase angle equal The change of modulation wave amplitude is shown in the following table.

[0149] Table 3 Table of changes in the amplitude of the modulation wave

[0150]

[0151] From Table 2, we know that the initial phase angle When it is equal to π3, the modulation wave amplitude of phase A will be reduced by 23.02%, which means that theoretically the number of submodules of the three bridge arms of phase A can be reduced by 23% on the original basis, which will greatly reduce the construction cost of the converter station. The designed sM3C topology is as follows Figure 1 shown.

[0152] Based on the sparse modular multi-level matrix converter topology obtained by the optimization design method in the above embodiment, a preferred embodiment of the present invention provides an sM3C working principle. Specifically,

[0153] Assume that when the system is operating stably, the circulating current in the sM3C is completely suppressed, and the voltage drop caused by the current flowing through the resistor and inductor is very small and can be ignored. At this time, the voltage and current on the input and output sides are both three-phase symmetrical sinusoidal waves, and the input and output currents are evenly distributed among the phases, that is, they satisfy:

[0154] u xy =u ix -u oy =U im cos(w i t+θ i )-U om cos(w o t+θ o) (2)

[0155]

[0156] where u ix 、u iy are the AC voltages at the input and output sides respectively; i ix 、i iy are the AC currents at the input and output sides respectively; i xy 、u xy are the current and voltage on the bridge arms x and y respectively; U im 、U om Respectively represent the amplitude of input and output voltage; I im , I om Respectively represent the amplitude of input and output current; w i 、w o Represent the angular velocity of the input and output sides respectively; θ i ,θ o Respectively represent the initial phases of the input and output voltages; Respectively represent the power factor angle of the input and output sides; respectively define the voltage modulation ratio m of the input and output sides i 、m o for:

[0157] m i =U im / NU c (4)

[0158] m o =U om / NU c (5)

[0159] Where N is the number of bridge arm submodules, U c is the rated voltage of the submodule capacitor.

[0160] Based on the sparse modular multi-level matrix converter topology obtained by the optimization design method of the above embodiment, in a preferred embodiment of the present invention, a mathematical decoupling model of the topology is provided, specifically:

[0161] The voltage equation of the sparse modular multilevel matrix converter topology sM3C in the rectangular coordinate system is obtained from Kirchhoff's voltage law:

[0162]

[0163] where u ix 、i ix are the input side voltage and current respectively; u oy 、i oy are the output side voltage and current respectively; i xy 、uxy , where x = A, B, C; y = a, b, c are the bridge arm voltage and current respectively; R is 、R os , L is , L os are the equivalent resistance and inductance of the input system side and the output system side respectively; R0 and L0 are the resistance and inductance of the bridge arm, u OO’ Respectively represent the neutral point voltage difference between the three-phase voltage on the input side and the three-phase voltage on the output side;

[0164] Analysis of the basic operating principles of sM3C reveals that both the bridge arm voltage and current are composed of multiple frequency components, including input and output frequency components. To achieve frequency decoupling, a double αβ0 transformation is required on the rectangular coordinate mathematical model to obtain equivalent circuit diagrams for the input, output, and circulating current sides. The αβ0 transformation coefficient matrix for isopower conversion is shown below:

[0165]

[0166] The double αβ0 transformation process is shown below.

[0167]

[0168] Applying double αβ0 transformation to equation (6) yields the voltage equation in the double αβ0 coordinate system:

[0169]

[0170] Among them, i αα 、i αβ 、i βα 、i ββ 、i 0α 、i 0β 、i α0 、i β0 、i 00 is the current component of the bridge arm current after double αβ0 transformation; u αα 、u αβ 、u βα 、u ββ 、u 0α 、u 0β 、u α0 、u β0 、u 00 is the voltage component of the bridge arm voltage after double αβ0 transformation.

[0171] The above formula describes the mathematical model of sM3C in the dual αβ0 coordinate system. Assuming that the input and output systems are three-phase symmetrical, formula (9) can be further simplified as:

[0172]

[0173] From formula (10), we can get the 8th-order decoupled mathematical equations describing the input side, output side, and circulation side respectively. Among them, the input side is:

[0174]

[0175] The output side is:

[0176]

[0177] The circulation side is:

[0178]

[0179] u 00 =-3u OO' (14)

[0180] where L' i , L' o , R' i , R' o The definition is as follows:

[0181]

[0182] Based on the same inventive concept, another embodiment of the present invention provides a control method for a sparse modular multi-level matrix converter topology, such as Figure 2 As shown, an outer loop control of a fixed DC capacitor voltage is adopted on the input side, and an outer loop control of fixed active and reactive power is adopted on the output side. The two outer loop controls provide the required reference value input for the current inner loop control. The outer loop control and the current inner loop control together constitute a dual closed-loop vector control; bridge arm capacitor voltage balancing control, circulating current suppression, and sub-module capacitor voltage balancing control are added to the dual closed-loop vector control to achieve a balance of capacitor voltages between the bridge arms of each sub-converter.

[0183] To avoid the difficulty of ensuring the controller's steady-state zero-error characteristics and good dynamic performance when the controlled variable is an AC variable, a preferred embodiment of the present invention implements the design of the current inner loop through dq transformation based on the frequency decoupling of the input and output sides achieved by double αβ0 transformation. Specifically, the control model design process of the current inner loop is as follows:

[0184] The transformation matrix from the αβ0 coordinate system to the dq coordinate system is shown in Equations (6) and (7).

[0185]

[0186] Where, is the transformation matrix of the input side angular velocity from the αβ0 coordinate system to the dq coordinate system, is the transformation matrix of the output side angular velocity from the αβ0 coordinate system to the dq coordinate system;

[0187] Apply the above transformation to the decoupled model obtained in the αβ0 coordinate system and simplify it to obtain

[0188]

[0189] Performing Laplace transform on both sides of the equation yields the mathematical model of the sM3C input and output sides in the dq coordinate system, as Figure 6 shown.

[0190]

[0191] In another preferred embodiment of the present invention, sM3C can adopt a dq decoupled current inner loop control method. The structure of the current inner loop controller is as follows, which can be seen in Figure 7 、 Figure 8 :

[0192]

[0193] where u d0_ref 、u q0_ref The reference value output by the input side current inner loop control; u 0d_ref 、u 0q_ref k is the reference value output by the output side current inner loop control; p 、k i PI controller parameters used for current inner loop control; i id_ref 、i iq_ref Current reference value provided for input side outer loop control; i od_ref 、i oq_ref The current reference value provided for the output side outer loop control.

[0194] Income d0_ref 、u q0_ref 、u 0d_ref 、u 0q_ref Then transform it back to the αβ0 coordinate system through the αβ0 / dq inverse transformation.

[0195] In another preferred embodiment of the present invention, the outer loop controller of sM3C will provide the required reference value input for the current inner loop control, and the outer loop control and the current inner loop together constitute a double closed loop vector control. The present invention adopts an outer loop control strategy of constant DC capacitor voltage on the input side and an outer loop control strategy of constant active and reactive power on the output side. Among them, the outer loop control strategy of constant DC capacitor voltage on the input side is adopted, such as Figure 9 As shown, specifically:

[0196] The relationship between the bridge arm capacitor voltage and the bridge arm power in sM3C is shown in formula (25).

[0197]

[0198] Among them U cxy is the sum of the capacitor voltages of all submodules in the xy bridge arm, P xy is the active power on the xy bridge arm; U c0 is the submodule capacitor voltage rating, N is the number of submodules in the B and C phase subconverter bridge arms, N' is the number of submodules in the A phase subconverter bridge arms, and C is the submodule capacitor value. Applying double αβ0 transformation to Equation (14) yields:

[0199]

[0200] If U cxy =NU c0 or N'U c0 When the capacitor voltages of each bridge arm are controlled, equation (26) becomes:

[0201]

[0202] From formula (27), we can see that in order to control the balance of the capacitor voltage of each bridge arm, it is necessary to control U c00 The quantity is (2+N' / N)U c0 .

[0203] Furthermore, an outer loop control strategy of fixed active and reactive power is adopted on the output side, such as Figure 10 As shown, specifically:

[0204] According to formula (26), we can get:

[0205]

[0206] P 00 is the difference between the active power flowing into and out of the converter. In formula (28), P out can be regarded as a disturbance term and not considered, and P in The following relationship is satisfied:

[0207]

[0208] where u id 、i id is the d-axis component of the AC voltage and current on the input side. Substituting equation (29) into equation (28) yields:

[0209]

[0210] From this design:

[0211]

[0212] According to the instantaneous power theory in the dq coordinate system, the expressions of active and reactive power when the system is running stably are:

[0213]

[0214] From formula (32), it can be seen that the active power and reactive power can be controlled by controlling the active and reactive components of the system current, that is:

[0215]

[0216] The constant power control model is as follows:

[0217]

[0218] During sM3C operation, the voltage on the submodule capacitors fluctuates as the capacitors charge and discharge, causing the bridge arm power to fluctuate accordingly, generating circulating currents within the circuit. The frequency structure of the circulating currents within the sM3C is very complex and cannot be directly converted into DC quantities for control. Therefore, in a preferred embodiment of the present invention, sM3C circulating current suppression control is performed directly in the αβ0 coordinate system.

[0219]

[0220] where u αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref is the output of the circulation suppression control link; i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the following bridge arm capacitor voltage balance control link; i αα 、i αβ 、i βα 、i ββ is the bridge arm current i xy The current obtained after double αβ0 conversion.

[0221] Income αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref Together with the value obtained by the αβ0 / dq inverse transformation of the current inner loop control output, it constitutes the reference value of the bridge arm voltage in the αβ0 coordinate system. Then, through the double αβ0 inverse transformation, the reference value of the bridge arm voltage in the abc coordinate system can be obtained and applied to the generation of the modulation wave signal.

[0222] In formula (26), U cαα 、Ucαβ 、U cβα 、U cββ 、U c0α 、U c0β 、U cα0 、U cβ0 These eight quantities respectively reflect the fluctuations of the bridge arm capacitor voltage within the same sub-converter and between sub-converters, among which U cαα 、U cαβ 、U cβα 、U cββ represents the unbalance of the capacitor voltage within the same sub-converter, and U c0α 、U c0β 、U cα0 、U cβ0 Represents the imbalance of capacitor voltages between different sub-converters. During system operation, these eight quantities need to be controlled to 0 to reduce the fluctuation of capacitor voltage. In one embodiment of the present invention, the balanced control of bridge arm capacitor voltage is achieved by injecting a circulating current that can balance the power of each bridge arm within the sub-converter and between the sub-converters. Figure 11 , the injected circulation expression is shown in formula (36):

[0223]

[0224] where i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the bridge arm capacitor voltage balance control link; U cαα 、U cβα 、U cαβ 、U cββ 、U c0α 、U c0β 、U cα0 、U cβ0 They are the total capacitance voltage of the bridge arm U cxy Obtained after double αβ0 transformation; K1, K2, K3 are known constants.

[0225] In addition to the balanced control of the bridge arm capacitors, due to inconsistencies in parameters such as the switching action time of the submodules, the DC side capacitor value, and the internal active power loss, the capacitor voltages of each submodule still differ. Specifically, there may be inconsistencies in the submodule capacitor voltages between the three-phase bridge arms, and there may also be differences in the capacitor voltages of each submodule within each bridge arm. In order to achieve balance between the submodule capacitor voltages between phases and within a phase, in one embodiment of the present invention, this is achieved by separately adjusting the duty cycle of the modulation voltage of each submodule. This submodule capacitor voltage balancing control strategy is consistent with the strategy commonly used in modular multilevel converters.

[0226] In order to further verify the feasibility and effect of the sparse modular multi-level matrix converter topology and control method in the above embodiment, in a specific embodiment of the present invention, based on Figure 1 The sM3C structure shown in the figure uses MATLAB / Simulink software to build an AC-AC frequency conversion system. The simulation verification is carried out for this topology. The simulation parameters are shown in the following table.

[0227]

[0228] Under the working conditions shown in the table above, when the system is running stably, the AC voltage and current waveforms on the input and output sides are both sinusoidal waves, with the AC phase voltage amplitude being 8.165kV, consistent with the set value; the fundamental frequencies of the AC current on the input side and the AC current on the output side are 50Hz and 50 / 3Hz respectively, and the current harmonic distortion rates are 0.25% and 0.80% respectively, with relatively small harmonic components. Figure 12 、 Figure 13 shown.

[0229] Figure 14 The waveforms of the bridge arm current (Figure a) and the bridge arm voltage (Figure b) are shown. The spectrum analysis results show that the main frequency components of the bridge arm current and the bridge arm voltage are 50 Hz and 50 / 3 Hz, which are consistent with the theoretical analysis results.

[0230] Figure 15 It is the control result of the double closed-loop vector. From the relevant design links in the above embodiment, it can be seen that the input side outer loop adopts constant voltage control. When the voltage of all bridge arm capacitors is equal to the rated value, U c00 The component will be equal to (2+N' / N) times U c0 , i.e. 57.5kV, in order to obtain the current reference value required for the input side current inner loop control;

[0231] The output side outer loop adopts constant power control, which requires controlling the output side active power to 1MW and reactive power to 0. Figure 15 (a) and (b) show the results of outer loop control, where both the voltage component and the power component are well controlled. Figure 15 (c) and (d) are the dq components of the input-side AC current and the output-side AC current. The simulation results show that under the action of the current inner loop, both can track the reference value well.

[0232] From the capacitor voltage balance control design process, we can know that U cαα 、U cαβ 、U cβα 、U cββ 、U c0α 、U c0β 、U cα0 、U cβ0These 8 quantities need to be controlled to 0 to achieve capacitor voltage balance. Some results are as follows: Figure 16 shown.

[0233] Figure 17 The figure shows the voltage fluctuations of the seven submodule capacitors in bridge arm Aa. The reference value of each submodule capacitor voltage is 2.5kV. After bridge arm capacitor voltage balancing control and submodule capacitor voltage balancing control, the submodule capacitor voltages fluctuate around the reference value.

[0234] The above describes specific embodiments of the present invention. It should be understood that the present invention is not limited to the specific embodiments described above, and those skilled in the art may make various modifications or variations within the scope of the claims without affecting the essence of the present invention. The above preferred features may be used in any combination as long as they do not conflict with each other.

Claims

1. A design method for a sparse modular multi-level matrix converter, characterized in that: The design method aims to retain the conventional M3C functions and performance while reducing costs, and includes the following steps: Setting the AC frequencies on the input and output sides of the matrix converter to an integer division relationship; Based on the integer frequency division relationship, the utilization rate of the DC voltage is improved and the modulation wave amplitude of each bridge arm is reduced through the control method of phase coordination on both sides; Determining based on the modulation wave amplitude that the number of bridge arm submodules is less than the number of bridge arm submodules of a conventional M3C; The control method of phase coordination between both sides is used to improve the utilization rate of the DC voltage, reduce the modulation wave amplitude of each bridge arm, and determine that the number of bridge arm submodules is less than that of the conventional M3C based on the modulation wave amplitude, including: When the system is running stably, the sparse modular multi-level matrix converter modulation wave u ref , specifically: you ref =m i sin(w i t+θ i )-m o sin(w o t+θ o ) where w i 、w o are the AC frequencies at the input and output sides, θ i ,θ o are the AC frequencies at the input and output sides respectively; m i 、m o are the voltage modulation ratios on the input and output sides of the frequency-divided AC transmission system, m i =U im / NU c , m o =U om / NU c , where N is the number of bridge arm submodules and Uc is the rated voltage of the submodule capacitor; Based on the three-phase symmetry of the input and output side systems, the phases of the input side AC voltage and the output side AC voltage are defined as follows: input side phase A is wt, phase B is wt-120°, phase C is wt+120°, and output side phase a is Phase b is Phase C is The minimum value of the modulation wave amplitude of each bridge arm is obtained by traversal. For sub-converter A, when the initial phase angle of the output voltage is equal to When the modulation wave amplitudes of the three bridge arms reach their minimum values ​​at the same time; for sub-converter B, when the phase angle is equal to When the modulation wave amplitudes of the three bridge arms reach their minimum values ​​at the same time; for sub-converter C, when the phase angle is equal to When , the modulation wave amplitudes of the three bridge arms reach the minimum value; From the traversal process, it is concluded that changing the initial phase angle of the voltage can change the amplitude of the modulation wave of the three-phase sub-converter; Based on the above conclusions and the proportional relationship between the modulation wave amplitude and the number of bridge arm sub-modules, it is determined that reducing the number of bridge arm sub-modules accordingly can improve the utilization rate of the DC voltage while retaining the original conventional M3C functions and performance.

2. The design method of a sparse modular multi-level matrix converter according to claim 1, characterized in that: The design method is applicable when there is a frequency division relationship between the input and output side systems.

3. A sparse modular multi-level matrix converter, characterized in that: The topology of the converter has three-phase symmetry on the input and output sides; From the input side, the nine bridge arms are divided into three sub-converters: the A-phase sub-converter consisting of the Aa, Ab, and Ac bridge arms, the B-phase sub-converter consisting of the Ba, Bb, and Bc bridge arms, and the C-phase sub-converter consisting of the Ca, Cb, and Cc bridge arms. From the output side, the nine bridge arms are also divided into three sub-converters: the a-phase sub-converter including the Aa, Ba, and Ca bridge arms, the b-phase sub-converter including the Ab, Bb, and Cb bridge arms, and the c-phase sub-converter including the Ac, Bc, and Cc bridge arms. Each phase input side is provided with an equivalent resistance and inductance, each phase output side is provided with an equivalent resistance and inductance, and each bridge arm has a bridge arm resistance and inductance; wherein the number of submodules of the bridge arm of at least one phase converter is less than the number of submodules of the bridge arm of the corresponding phase converter of the conventional M3C; The working principle of the topology is as follows: When the system is running stably, the circulating current of the matrix converter topology is completely suppressed, and the voltage drop caused by the current flowing through the resistor and inductor is ignored. At this time, the voltage and current on the input and output sides are three-phase symmetrical sinusoidal waves, and the input and output currents are evenly distributed in each phase, that is, the following is satisfied: u xy =u ix -u oy =U im cos(w i t+θ i )-U om cos(w o t+θ o ) where u ix 、u oy are the AC voltages at the input and output sides respectively; i ix 、i oy are the AC currents at the input and output sides respectively; i xy 、u xy are the current and voltage on the bridge arms x and y respectively; U im 、U om Respectively represent the amplitude of input and output voltage; I im , I om Respectively represent the amplitude of input and output current; w i 、w o Represent the angular velocity of the input and output sides respectively; θ i ,θ o Respectively represent the initial phases of the input and output voltages; Represent the power factor angles on the input and output sides respectively.

4. The sparse modular multi-level matrix converter according to claim 3, characterized in that: The mathematical decoupling model of the topology is specifically: The voltage equation of the topology in the rectangular coordinate system is obtained from Kirchhoff's voltage law: where u ix 、i ix are the input side voltage and current respectively; u oy 、i oy are the output side voltage and current respectively; i xy 、u xy， Where x = A, B, C; y = a, b, c are bridge arm voltage and current respectively; R is 、R os 、L is 、L os are the equivalent resistance and inductance of the input system side and the output system side respectively; R0 and L0 are the resistance and inductance of the bridge arm, u OO 'represents the neutral point voltage difference between the three-phase voltage on the input side and the three-phase voltage on the output side; Perform double αβ0 transformation on the voltage equation of the topology in the rectangular coordinate system to obtain the equivalent circuit diagrams of the input, output and circulating sides; wherein the αβ0 transformation coefficient matrix under equal power conversion is: The double αβ0 transformation process is: The voltage equation of the topology in the rectangular coordinate system is applied with the double αβ0 transformation to obtain the voltage equation in the double αβ0 coordinate system: Among them, i αα 、i αβ 、i βα 、i ββ 、i 0α 、i 0β 、i α0 、i β0 、i 00 is the current component of the bridge arm current after double αβ0 transformation; u αα 、u αβ 、u βα 、u ββ 、u 0α 、u 0β 、u α0 、u β0 、u 00 is the voltage component of the bridge arm voltage after double αβ0 transformation; Based on the three-phase symmetry of the input and output sides of the topology, the simplified equation is obtained: Based on the simplified equations, the 8th-order decoupling mathematical equations describing the input side, output side, and circulation side are obtained respectively: the decoupling mathematical equation on the input side is: The decoupling mathematical equation on the output side is: The decoupling mathematical equation on the circulation side is:

5. A control method for a sparse modular multi-level matrix converter, applied to the sparse modular multi-level matrix converter according to claim 3 or 4, characterized in that: The input side adopts outer loop control of fixed DC capacitor voltage, and the output side adopts outer loop control of fixed active and reactive power. The two outer loop controls provide the required reference value input for the current inner loop control. The outer loop control and the current inner loop control together constitute a dual closed-loop vector control; bridge arm capacitor voltage balancing control, circulating current suppression, and sub-module capacitor voltage balancing control are added to the dual closed-loop vector control to achieve the balance of capacitor voltage between the bridge arms of each sub-converter.

6. The control method of a sparse modular multi-level matrix converter according to claim 5, characterized in that: The mathematical model of the current inner loop control is specifically: Determine the transformation matrix from the αβ0 coordinate system to the dq coordinate system, specifically: where w i 、w o Represent the input and output side AC angular frequencies respectively, Represent the transformation matrices of the input side and output side respectively; Applying the transformation matrix to the decoupling model in the αβ0 coordinate system and simplifying it yields: where L' i , L' o 、R i '、R' o The definition is as follows: where u d0 、u q0 is the αβ axis component of the input side AC voltage after αβ0 / dq transformation; u 0d 、u 0q is the αβ axis component of the output side AC voltage obtained after αβ0 / dq transformation; u id 、u iq is the dq axis component of the input side AC voltage; i id 、i iq is the dq axis component of the input side AC current; u od 、u oq is the dq axis component of the output side AC voltage; i od 、i oq is the dq-axis component of the output side AC current; Performing Laplace transform on both sides of the simplified equation yields the mathematical model of the sM3C input and output sides in the dq coordinate system, specifically: s is the operation factor in the complex frequency domain after Laplace transform.

7. The control method of a sparse modular multi-level matrix converter according to claim 6, characterized in that: The current inner loop control is specifically as follows: where u d0_ref 、u q0_ref The reference value output by the input side current inner loop control; u 0d_ref 、u 0q_ref k is the reference value output by the output side current inner loop control; p 、k i PI controller parameters used for current inner loop control; i id_ref 、i iq_ref Current reference value provided for input side outer loop control; i od_ref 、i oq_ref Current reference value provided for output side outer loop control; Income d0_ref 、u q0_ref 、u 0d_ref 、u 0q_ref Then transform it back to the αβ0 coordinate system through the αβ0 / dq inverse transformation.

8. The control method of a sparse modular multi-level matrix converter according to claim 7, characterized in that: The input side adopts outer loop control of fixed DC capacitor voltage, and the output side adopts outer loop control of fixed active and reactive power. The two outer loop controls provide the required reference value input for the current inner loop control, including: The relationship between the bridge arm capacitor voltage and the bridge arm power is as follows: Among them U cxy is the sum of the capacitor voltages of all submodules in the xy bridge arm; P xy is the active power on the xy bridge arm; U c0 is the rated voltage value of the submodule capacitor; N is the number of submodules in the bridge arm of the B and C phase subconverters; N' is the number of submodules in the bridge arm of the A phase subconverter; C is the submodule capacitor value; Applying double αβ0 transformation to the relationship between the bridge arm capacitor voltage and the bridge arm power yields: If U cxy =NU c0 or N'U c0 When the voltage of each bridge arm capacitor is controlled, the relationship between the bridge arm capacitor voltage and the bridge arm power after the double αβ0 transformation is changed to: Control U c00 The amount is (2+N' / N )U c0 , so that the voltage of each bridge arm capacitor is balanced, and P 00 The difference between the active power flowing into and out of the converter: P out As a disturbance term, P in The following relationship is satisfied: where u id 、i id P is the d-axis component of the input side AC voltage and current. in Substitute P 00 get: From this design: According to the instantaneous power theory in the dq coordinate system, the expressions of active and reactive power when the system is running stably are: From the expressions of active and reactive power, it is determined that the control of active power and reactive power can be achieved by controlling the active and reactive components of the system current, that is: The constant power control model is obtained as:

9. The control method of a sparse modular multi-level matrix converter according to claim 5, characterized in that: The circulation suppression is performed directly in the αβ0 coordinate system, including: where u αα _ ref 、u αβ _ref,u βα_ref 、u ββ_ref is the output of the circulation suppression control link; i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the following bridge arm capacitor voltage balance control link; i αα 、i αβ 、i βα 、i ββ is the bridge arm current i xy The current obtained after double αβ0 conversion; Income αα_ref 、u αβ_ref 、u βα_ref 、u ββ_ref Together with the value obtained by the αβ0 / dq inverse transformation of the current inner loop control output, it constitutes the reference value of the bridge arm voltage in the αβ0 coordinate system. Then, through the double αβ0 inverse transformation, the reference value of the bridge arm voltage in the abc coordinate system can be obtained and applied to the generation of the modulation wave signal.

10. The control method of a sparse modular multi-level matrix converter according to claim 5, characterized in that: The balanced control of the bridge arm capacitor voltage is achieved by injecting a circulating current that can balance the power of each bridge arm within the sub-converter and between the sub-converters, specifically: where i αα_ref 、i αβ_ref 、i βα_ref 、i ββ_ref is the output of the bridge arm capacitor voltage balance control link; U cαα 、U cβα 、U cαβ 、U cββ 、U c0α 、U c0β 、U cα0 、U cβ0 They are the total capacitance voltage of the bridge arm U cxy Obtained after double αβ0 transformation; K1, K2, K3 are known constants.

11. The control method of a sparse modular multi-level matrix converter according to claim 5, characterized in that: The submodule capacitor voltage balancing control is achieved by adjusting the duty cycle of the modulation voltage of each submodule respectively.

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