Linear phase-frequency characteristic finite impulse response filter optimization implementation method
By cutting the timing principle and modularization optimization, the symmetrical structure of the linear frequency frequency characteristics is transformed into a assembly line structure, which solves the problem of too long key paths in existing technologies and large resource consumption. Efficient resource utilization and system throughput.
Patent Information
- Application Number
- CN202411352738.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-26
- Publication Date
- 2025-01-24
AI Technical Summary
When implementing the existing linear phase frequency finite impulse response filter, the critical path is too long and consumes a large amount of addition computing resources, making it difficult to meet the timing requirements.
The method of cutting the setting of the cutting of the limited rinse streaming filter is adopted to optimize the data flow diagram of the limited rinse response filter, converted to the assembly line structure, and through modular optimization to make full use of the multiplication resources to reduce the consumption of additional resources.
It shortens the critical path, improves system throughput, reduces resource consumption, and is suitable for engineering implementation, especially with FPGA.
Smart Images
Figure CN119363070A_ABST
Abstract
Description
Technical Field
[0001] The present application belongs to the technical field of optimization design of linear phase-frequency characteristic finite impulse response filters, and specifically relates to an optimization implementation method of linear phase-frequency characteristic finite impulse response filters. Background Art
[0002] Digital filters are an important type of linear time-invariant systems, which are used to change the spectral characteristics of the input signal to meet specific design requirements. Among them, finite impulse response filters, also known as non-recursive filters, are an important type of digital filters and are the most basic components in digital signal processing systems. In particular, finite impulse response filters with linear phase-frequency characteristics can have strict linear phase-frequency characteristics while ensuring arbitrary amplitude-frequency characteristics, and are often used in digital signal processing systems.
[0003] The coefficients of the finite impulse response filter with linear phase-frequency characteristics are symmetrical, and optimization based on this can save half of the multipliers. When implementing the finite impulse response filter in the prior art, it is implemented by multiplication and addition operations based on the coefficient symmetry structure. The critical path is too long, consuming a large amount of addition operation resources, which is very unfavorable to meeting the timing.
[0004] This application is proposed in view of the above-mentioned technical defects. Summary of the invention
[0005] The purpose of the present application is to provide a method for optimizing a linear phase-frequency characteristic finite impulse response filter to overcome or alleviate at least one of the known technical deficiencies.
[0006] The technical solution of this application is:
[0007] A method for optimizing a linear phase-frequency characteristic finite impulse response filter, comprising:
[0008] Step 1: List the symmetrical structure data flow diagram of the linear phase-frequency characteristic finite impulse response filter:
[0009] The symmetrical structure data flow graphs of the linear phase-frequency characteristic finite impulse response filter are listed in two types, one with an even number of coefficients and the other with an odd number of coefficients;
[0010] Step 2: Use the cut set retiming principle to optimize the symmetrical structure data flow graph and transform the linear phase-frequency characteristic finite impulse response filter into a pipeline structure:
[0011] The cut set retiming principle is used to optimize the symmetrical structure data flow graph with an even number of coefficients and the symmetrical structure data flow graph with an odd number of coefficients respectively, and the linear phase-frequency characteristic finite impulse response filter is transformed into a pipeline structure.
[0012] According to at least one embodiment of the present application, the above-mentioned linear phase-frequency characteristic finite impulse response filter optimization implementation method further includes:
[0013] Step 3: Modularize and optimize the pipeline structure of the linear phase-frequency characteristic finite impulse response filter:
[0014] The pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients are respectively optimized modularly.
[0015] According to at least one embodiment of the present application, in the above-mentioned linear phase-frequency characteristic finite impulse response filter optimization implementation method, in step three, the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients have the same basic module after modular optimization.
[0016] According to at least one embodiment of the present application, in the above-mentioned linear phase-frequency characteristic finite impulse response filter optimization implementation method, in step three, the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients, the basic module after modular optimization includes three delay devices, two adders, and one multiplier, wherein the functions of some adders are realized by the pre-addition function of the multiplier.
[0017] According to at least one embodiment of the present application, in the above-mentioned linear phase-frequency characteristic finite impulse response filter optimization implementation method, in step three, the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients after modular optimization can be implemented by chip design, or can be implemented using FPGA. Specifically, the basic module is first implemented, and then the connection of the basic module is determined according to the parity of the number of coefficients.
[0018] This application has at least the following beneficial technical effects:
[0019] The invention provides an optimization implementation method of a finite impulse response filter with linear phase-frequency characteristics. The cut set retiming principle is used to further optimize the structure of the finite impulse response filter to shorten the critical path and improve the system throughput. The characteristics of the multiplier resource structure are fully utilized to implement part of the addition operation with the multiplier pre-addition function to reduce the consumption of the addition resource, thereby effectively reducing the resource consumption of the finite impulse response filter. Meanwhile, modular optimization is performed to fully utilize the internal delay of each module and reuse the internal delay of the module, thereby reducing the consumption of delay resources, facilitating modular implementation, being more suitable for engineering implementation, and being particularly suitable for implementation using FPGA. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 It is a schematic diagram of a method for optimizing a linear phase-frequency characteristic finite impulse response filter provided in an embodiment of the present application;
[0021] Figure 2 1 is a schematic diagram of a symmetrical structure data flow graph with an even number of coefficients provided in an embodiment of the present application, which is optimized using the cut set retiming principle;
[0022] Figure 3 1 is a schematic diagram of a symmetrical structure data flow graph with an odd number of coefficients provided by an embodiment of the present application, which is optimized using the cut set retiming principle;
[0023] Figure 4 It is a schematic diagram of an optimized symmetric structure data flow graph with an even number of coefficients provided in an embodiment of the present application;
[0024] Figure 5 1 is a schematic diagram of an optimized symmetric structure data flow graph with an odd number of coefficients provided by an embodiment of the present application;
[0025] Figure 6 It is a schematic diagram of a modularly optimized pipeline structure of a linear phase-frequency characteristic finite impulse response filter with an even number of coefficients provided in an embodiment of the present application;
[0026] Figure 7 It is a schematic diagram of a modularly optimized pipeline structure of a linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients provided in an embodiment of the present application.
[0027] In order to better illustrate the present embodiment, some parts of the drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product. In addition, the drawings are only used for illustrative purposes and should not be construed as limitations on the present application. DETAILED DESCRIPTION
[0028] In order to make the technical solution and advantages of the present application clearer, the technical solution of the present application will be described in further detail in detail and in detail with reference to the accompanying drawings. It can be understood that the specific embodiments described here are only partial embodiments of the present application, which are only used to explain the present application, not to limit the present application. It should be noted that, for the convenience of description, only the parts related to the present application are shown in the accompanying drawings, and other related parts can refer to the general design.
[0029] In addition, unless otherwise defined, the technical terms or scientific terms used in the description of this application shall have the usual meanings understood by those of ordinary skill in the art to which this application belongs. The words used in the description of this application to indicate orientation are only used to indicate relative directions or positional relationships. When the absolute position of the described object changes, its relative positional relationship may also change accordingly. The word "include" used in the description of this application indicates that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, but does not exclude other elements or objects.
[0030] In addition, it should be noted that, unless otherwise clearly specified and limited, the words "installation", "connection" and similar terms used in the description of this application should be understood in a broad sense. For example, the connection can be a fixed connection or a detachable connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. Technical personnel in the field can understand its specific meaning in this application according to the specific circumstances.
[0031] The present application provides a method for optimizing a linear phase-frequency characteristic finite impulse response filter. Figure 1 shown.
[0032] Step 1: List the symmetrical structure data flow graph of the linear phase-frequency characteristic finite impulse response filter.
[0033] There are two types of symmetric structure data flow graphs, one of which has an even number of coefficients, such as Figure 2 As shown, one type of coefficient is an odd number, such as Figure 3 shown.
[0034] Step 2: Use the cut set retiming principle to optimize the symmetrical structure data flow graph and transform the linear phase-frequency characteristic finite impulse response filter into a pipeline structure.
[0035] The symmetrical structure data flow graphs with even and odd coefficients are optimized by using the cut set retiming principle, and the linear phase-frequency characteristic finite impulse response filter is transformed into a pipeline structure. The symmetrical structure data flow graph with even coefficients is optimized as follows Figure 4 As shown, the symmetric structure data flow graph with an odd number of coefficients is optimized as follows Figure 5As shown, the optimization of this step can shorten the critical path and improve the throughput.
[0036] Step 3: Modularize and optimize the pipeline structure of the linear phase-frequency characteristic finite impulse response filter.
[0037] The pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and an odd number of coefficients is modularly optimized. The pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients is modularly optimized. Figure 6 As shown in the figure, the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients is modularly optimized as shown in Figure 7 As shown in the figure, it can be seen that the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with even and odd coefficient numbers has the same basic module after modular optimization, which makes modular implementation convenient after optimization.
[0038] The pipeline structure of the linear phase-frequency characteristic finite impulse response filter with even and odd coefficient numbers, the basic module after modular optimization includes three delays, two adders, and one multiplier. Among them, the pre-addition function of the multiplier can be utilized in the internal solid line frame, and both multiplication and addition are implemented in the multiplier to save resources.
[0039] The optimized data flow graph of the linear phase-frequency characteristic finite impulse response filter can be implemented by chip design or FPGA. Specifically, the basic module can be implemented first, and then the connection of the basic module can be determined according to the parity of the number of coefficients. This can make the finite impulse response filter more universal.
[0040] The linear phase-frequency characteristic finite impulse response filter optimization implementation method disclosed in the above embodiment uses the cut set retiming principle to further optimize the finite impulse response filter structure to shorten the critical path and improve the system throughput. It also makes full use of the multiplier resource structure characteristics to implement part of the addition operation with the multiplier pre-addition function to reduce the addition resource consumption, thereby effectively reducing the resource consumption of the finite impulse response filter. At the same time, modular optimization is performed to make full use of the internal delay of each module and reuse the internal delay of the module, which can reduce the delay resource consumption, facilitate modular implementation, and is more suitable for engineering implementation, especially for FPGA implementation.
[0041] The various embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In the absence of conflict, the embodiments in this application and the technical features in the embodiments can be combined with each other to obtain new embodiments.
[0042] So far, the technical solution of the present application has been described in conjunction with the preferred embodiments shown in the accompanying drawings. Those skilled in the art should understand that the scope of protection of the present application is obviously not limited to these specific embodiments. Without departing from the principles of the present application, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after these changes or substitutions will fall within the scope of protection of the present application.
Claims
1. A method for optimizing a linear phase-frequency characteristic finite impulse response filter, characterized in that: include: Step 1: List the symmetrical structure data flow diagram of the linear phase-frequency characteristic finite impulse response filter: The symmetrical structure data flow graphs of the linear phase-frequency characteristic finite impulse response filter are listed in two types, one with an even number of coefficients and the other with an odd number of coefficients; Step 2: Use the cut set retiming principle to optimize the symmetrical structure data flow graph and transform the linear phase-frequency characteristic finite impulse response filter into a pipeline structure: The cut set retiming principle is used to optimize the symmetrical structure data flow graph with an even number of coefficients and the symmetrical structure data flow graph with an odd number of coefficients respectively, and the linear phase-frequency characteristic finite impulse response filter is transformed into a pipeline structure.
2. The method for optimizing the linear phase-frequency characteristic finite impulse response filter according to claim 1, characterized in that: Also includes: Step 3: Modularize and optimize the pipeline structure of the linear phase-frequency characteristic finite impulse response filter: The pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients are respectively optimized modularly.
3. The method for optimizing the linear phase-frequency characteristic finite impulse response filter according to claim 2, characterized in that: In step three, the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients have the same basic module after modular optimization.
4. The method for optimizing and implementing the linear phase-frequency characteristic finite impulse response filter according to claim 3, characterized in that: In step three, the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients, the basic module after modular optimization includes three delay devices, two adders, and one multiplier, among which the functions of some adders are realized by the pre-addition function of the multiplier.
5. The method for optimizing and implementing a linear phase-frequency characteristic finite impulse response filter according to claim 1, characterized in that: In step three, the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an even number of coefficients after modular optimization and the pipeline structure of the linear phase-frequency characteristic finite impulse response filter with an odd number of coefficients can be implemented by chip design or by FPGA. Specifically, the basic modules are first implemented, and then the connection of the basic modules is determined according to the parity of the number of coefficients.