Display device and control method thereof

Abstract

The invention discloses a display device and a control method of the display device. The display device comprises a plurality of sub-pixel circuits, and each sub-pixel circuit comprises a light-emitting element, a pulse width modulation (PWM) circuit, a plurality of sub-pixel circuits and a plurality of sub-pixel circuits, a pulse width modulation (PWM) driving circuit and a pulse amplitude modulation (PWM) driving circuit; the invention relates to a PAM drive circuit. The PAM driving circuit is used for controlling the current value of the light-emitting element. The PWM driving circuit is used for controlling the light-emitting time of the light-emitting element. The PWM drive circuit and the PAM drive circuit receive a data signal to perform a PWM control mode or a PAM control mode on the light emitting element according to a value of the data signal, and provide a circuit architecture (16T3C) of 16 transistors and 3 capacitors. The control method of the display device comprises a reset operation, a plurality of compensation operations, a plurality of light-emitting control operations, a stabilizing operation and a closing operation.

Description

Technical Field

[0001] The present disclosure relates to a display device and a control method of the display device, and more particularly to a micro light emitting diode (micro LED) display device and a control method of the display device. Background Art

[0002] In recent years, display devices have played an important role in various electronic products to provide high-quality images to users. These display devices include liquid crystal displays (LCDs), organic light-emitting diode (OLED) displays, micro-light-emitting diode (Micro LED) displays, etc. Among them, micro-light-emitting diode (Micro LED) displays have self-luminous display characteristics and simple component structures, which can achieve low energy consumption and high brightness display design. Summary of the invention

[0003] The present invention provides a display device and a control method of the display device, which can effectively compensate for the threshold voltage (V TH ) variation and IR drop / rise, and can increase grayscale control capability by adjusting the current size when displaying low grayscale. In addition, the voltage between the power supply and the ground can be reduced to reduce power consumption.

[0004] According to one embodiment of the present invention, the display device comprises a plurality of sub-pixel circuits, each of which comprises: a light-emitting element, a pulse width modulation (PWM) driving circuit and a pulse amplitude modulation (PAM) driving circuit. The PWM driving circuit is electrically connected to the light-emitting element to control the light-emitting time of the light-emitting element. The PAM driving circuit is electrically connected to the light-emitting element to control the current value of the light-emitting element. The PWM driving circuit and the PAM driving circuit are used to receive a data signal to perform a PWM control mode or a PAM control mode on the light-emitting element according to the value of the data signal. The PAM driving circuit comprises: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor and a first capacitor. Each of the first to eighth transistors has a control terminal, a first terminal and a second terminal. The first terminal of the second transistor is electrically connected to the second terminal of the first transistor to form a first node. The first terminal of the third transistor is electrically connected to the first node. The second terminal of the fourth transistor is electrically connected to the control terminal of the first transistor to form a second node. The second terminal of the fifth transistor is electrically connected to the second node. The second end of the sixth transistor is electrically connected to the control end of the first transistor. The first end of the seventh transistor is electrically connected to the above-mentioned second node. The second end of the eighth transistor is electrically connected to the second end of the seventh transistor to form a third node. The first capacitor is electrically connected between the first node and the third node. The PWM drive circuit includes: a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor, a second capacitor and a third capacitor. Each of the ninth to sixteenth transistors has a control end, a first end and a second end. The control end of the tenth transistor is electrically connected to the second capacitor to form a fourth node. The first end of the eleventh transistor is electrically connected to the fourth node. The second end of the twelfth transistor is electrically connected to the first end of the eleventh transistor, and the first end of the twelfth transistor is electrically connected to the second end of the tenth transistor. The second end of the thirteenth transistor is electrically connected to the first end of the tenth transistor. The second end of the fourteenth transistor is electrically connected to the second end of the thirteenth transistor. The second end of the fifteenth transistor is electrically connected to the first end of the tenth transistor. The first terminal of the sixteenth transistor is electrically connected to the second terminal of the tenth transistor, and the second terminal of the sixteenth transistor is electrically connected to the first terminal of the ninth transistor and the control terminal of the second transistor. The third capacitor is electrically connected to the control terminal of the second transistor to form a fifth node.

[0005] In some embodiments, the first terminal of the first transistor is electrically connected to a ground reference voltage; the second terminal of the third transistor is electrically connected to the first reference voltage; the control terminal of the third transistor is electrically connected to a first gate signal; the first terminal of the fourth transistor is electrically connected to the first reference voltage; the control terminal of the fourth transistor is electrically connected to the first gate signal; the first terminal of the fifth transistor is electrically connected to a data signal; the control terminal of the fifth transistor is electrically connected to a second gate signal; the first terminal of the sixth transistor is electrically connected to a sweep signal; the control terminal of the sixth transistor is electrically connected to the third gate signal; the control terminal of the seventh transistor is electrically connected to an emission signal; the control terminal of the eighth transistor is electrically connected to the fourth gate signal; the control terminal of the ninth transistor is electrically connected to the fifth gate signal; the second capacitor is electrically connected to connected between the control terminal of the tenth transistor and the sweep signal; the control terminal of the eleventh transistor is electrically connected to the first gate signal; the control terminal of the twelfth transistor is electrically connected to the fourth gate signal; the first terminal of the thirteenth transistor is electrically connected to the data signal; the control terminal of the thirteenth transistor is electrically connected to the second gate signal; the first terminal of the fifteenth transistor is electrically connected to the second reference voltage; the control terminal of the fifteenth transistor is electrically connected to the emission signal; the first terminal of the fourteenth transistor is electrically connected to the third reference voltage; the control terminal of the fourteenth transistor is electrically connected to the third gate signal; the third capacitor is connected between the control terminal of the second transistor and the third reference voltage; the first terminal of the eighth transistor is electrically connected to the fourth reference voltage; the control terminal of the sixteenth transistor is electrically connected to the emission signal.

[0006] In some embodiments, when the voltage value of the data signal is greater than the third reference voltage, the PWM driving circuit and the PAM driving circuit perform a PWM control mode.

[0007] In some embodiments, when the voltage value of the data signal is less than the high level voltage of the frequency sweep signal, the PWM driving circuit and the PAM driving circuit perform the PAM control mode.

[0008] In some embodiments, the second transistor, the first transistor, and the light emitting element are electrically connected in series between a power supply voltage and a ground reference voltage.

[0009] According to an embodiment of the present invention, the control method of the display device comprises: providing a light-emitting element, a PWM driving circuit and a PAM driving circuit, wherein the PAM driving circuit comprises: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor and a first capacitor, the PWM driving circuit comprises: a ninth transistor, a second capacitor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor and a third capacitor, the third transistor and the fourth transistor are electrically connected to a first reference voltage, the fifteenth transistor is electrically connected to a second reference voltage, the third capacitor is electrically connected to the third reference voltage, the eighth transistor is electrically connected to a fourth reference voltage, a first node is provided between the third transistor and the first capacitor, a second node is provided between the first transistor and the fourth transistor, a third node is provided between the eighth transistor and the first capacitor, a fourth node is provided between the tenth transistor and the second capacitor, and a fifth node is provided between the second transistor and the third capacitor; performing a PWM control mode or a PAM control mode on the light-emitting element by using the PWM driving circuit and the PAM driving circuit according to the value of the data signal, wherein the PWM control mode and the PAM control mode comprise: performing a reset operation and a first compensation operation. The reset operation turns off the first transistor, the second transistor, the fifth transistor, the sixth transistor, the seventh transistor, the ninth transistor, the thirteenth transistor, the fourteenth transistor, the fifteenth transistor, and the sixteenth transistor, and turns on the third transistor, the fourth transistor, the eighth transistor, the tenth transistor, the eleventh transistor, and the twelfth transistor to turn off the light emitting element, and makes the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation:

[0010] V A =V REF1

[0011] V B =V REF1

[0012] V C =V REF4

[0013] V D =V SS

[0014] V E =V REF2

[0015] Where V A is the voltage value of the first node, V B is the voltage value of the second node, V C is the voltage value of the third node, V Dis the voltage value of the fourth node, V E is the voltage value of the fifth node, V REF1 The value of the first reference voltage; V REF4 is the value of the fourth reference voltage; V SS is the value of the ground reference voltage; V REF2 The first compensation operation turns off the second transistor, the third transistor, the fourth transistor, the sixth transistor, the seventh transistor, the ninth transistor, the eleventh transistor, the fourteenth transistor, the fifteenth transistor and the sixteenth transistor, and turns on the first transistor, the fifth transistor, the eighth transistor, the tenth transistor, the twelfth transistor and the thirteenth transistor to turn off the light emitting element, and makes the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equations:

[0016] V A =V data +|V TH_T1 |

[0017] V B =V data

[0018] V C =V REF4

[0019] V D =V data –|V TH_T10 |

[0020] V E =V REF2

[0021] Where V data is the voltage value of the data signal, V TH_T1 is the threshold voltage of the first transistor, V TH_T10 is the threshold voltage of the tenth transistor.

[0022] In some embodiments, the PWM control mode further includes: performing a second compensation operation to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the seventh transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the thirteenth transistor, the fifteenth transistor, and the sixteenth transistor, and turning on the first transistor, the sixth transistor, the eighth transistor, the twelfth transistor, and the fourteenth transistor to turn off the light-emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equations:

[0023] V A =V SWEEP_H +|V TH_T1 |

[0024] V B =V SWEEP_H

[0025] V C =V REF4

[0026] V D =V data –|V TH_T10 |

[0027] V E =V REF2

[0028] Where V SWEEP_H is the high level voltage value of a frequency sweep signal.

[0029] In some embodiments, the PWM control mode further includes: performing a first light emitting control operation to turn off the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor, and turning on the first transistor, the second transistor, the seventh transistor, the ninth transistor, the fifteenth transistor, and the sixteenth transistor to turn on the light emitting element, and making the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation:

[0030] V A =V DD –V LED

[0031] V B =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 |

[0032] V C =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 |

[0033] V D =V data –|V TH_T10 |+ΔV SWEEP

[0034] V E =V SS

[0035] Where V LEDis the voltage across the light emitting element, ΔV SWEEP It is the difference between the high level voltage value and the low level voltage value of the sweep signal.

[0036] In some embodiments, the PWM control mode further includes: performing a second light emitting control operation to turn off the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor, and turn on the first transistor, the second transistor, the seventh transistor, the fifteenth transistor, and the sixteenth transistor to turn on the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation:

[0037] V A =V DD –V LED

[0038] V B =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 |

[0039] V C =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 |

[0040] V D =V data –|V TH_T10 |+ΔV SWEEP

[0041] V E =V SS .

[0043] In some embodiments, the PWM control mode further includes: performing a third light emitting control operation to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the seventh transistor, the tenth transistor, the fifteenth transistor and the sixteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation:

[0044] V A =V SS

[0045] V B =V REF4 +V SS –V SWEEP_H –|V TH_T1 |

[0046] V C =V REF4 +V SS –V SWEEP_H –|V TH_T1 |

[0047] V D =V data –|V TH_T10 |+ΔV SWEEP

[0048] V E =V REF2 .

[0050] In some embodiments, the PWM control mode further includes: performing a stable operation to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor, and turn on the first transistor, the seventh transistor, the fifteenth transistor, and the sixteenth transistor to turn off the light-emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation:

[0051] V A =V SS

[0052] V B =V REF4 +V SS –V SWEEP_H –|V TH_T1 |

[0053] V C =V REF4 +V SS –V SWEEP_H –|V TH_T1 |

[0054] V D =V data –|V TH_T10 |

[0055] V E =V REF2 .

[0057] In some embodiments, the PWM control mode further includes: performing a shut-down operation to shut down the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, the fourteenth transistor, the fifteenth transistor, and the sixteenth transistor, and turning on the first transistor to shut down the light-emitting element, so that the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equations:

[0058] V A =V SS

[0059] V B =V REF4 +V SS –V SWEEP_H –|V TH_T1 |

[0060] V C =V REF4 +V SS –V SWEEP_H –|V TH_T1 |

[0061] V D =V data –|V TH_T10 |

[0062] V E =V REF2 .

[0064] In some embodiments, the PAM control mode further includes: performing a second compensation operation to turn off the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the seventh transistor, the ninth transistor, the eleventh transistor, the thirteenth transistor, the fifteenth transistor, and the sixteenth transistor, and turn on the sixth transistor, the eighth transistor, the tenth transistor, the twelfth transistor, and the fourteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation:

[0065] V A =V data +|V TH_T1 |

[0066] V B =V SWEEP_H

[0067] V C =V REF4

[0068] V D =V REF3 –|V TH_T10 |

[0069] V E =V REF2

[0070] Where V SWEEP_H is the high level voltage value of the sweep signal.

[0071] In some embodiments, the PAM control mode further includes: performing a first light emitting control operation to turn off the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor, and turning on the first transistor, the second transistor, the seventh transistor, the ninth transistor, the fifteenth transistor, and the sixteenth transistor to turn on the light emitting element, and making the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation:

[0072] V A =V DD –V LED

[0073] V B =V REF4 +V DD –V LED –V data –|V TH_T1 |

[0074] V C =V REF4 +V DD –V LED –V data –|V TH_T1 |

[0075] V D =V REF3 –|V TH_T10 |+ΔV SWEEP

[0076] V E =V SS

[0077] Where V LED is the voltage across the light emitting element, ΔV SWEEP is the difference between the high level voltage value and the low level voltage value of the sweep frequency signal.

[0078] In some embodiments, the PAM control mode further includes: performing a second light emitting control operation to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor, and turning on the first transistor, the seventh transistor, the tenth transistor, the fifteenth transistor, and the sixteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation:

[0079] V A =V SS

[0080] V B =V REF4 +V SS –V data –|V TH_T1 |

[0081] V C =V REF4 +V SS –V data –|V TH_T1 |

[0082] V D =V REF3 –|V TH_T10 |+ΔV SWEEP

[0083] V E =V REF2 .

[0085] In some embodiments, the PAM control mode further includes: performing a stable operation to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, and the fourteenth transistor, and turn on the first transistor, the seventh transistor, the fifteenth transistor, and the sixteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equations:

[0086] V A =V SS

[0087] V B =V REF4 +V SS –V data –|V TH_T1 |

[0088] VC =V REF4 +V SS –V data –|V TH_T1 |

[0089] V D =V REF3 –|V TH_T10 |

[0090] V E =V REF2 .

[0092] In some embodiments, the PAM control mode further includes: performing a shutdown operation to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, the fourteenth transistor, the fifteenth transistor, and the sixteenth transistor, and turning on the first transistor to turn off the light emitting element, so that the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equations:

[0093] V A =V SS

[0094] V B =V REF4 +V SS –V data –|V TH_T1 |

[0095] V C =V REF4 +V SS –V data –|V TH_T1 |

[0096] V D =V REF3 –|V TH_T10 |

[0097] V E =V REF2 . BRIEF DESCRIPTION OF THE DRAWINGS

[0098] In order to make the above and other objects, features, advantages and embodiments of the present invention more understandable, the accompanying drawings are described as follows:

[0099] Figure 1 is a functional block diagram of a display device according to an embodiment of the present invention;

[0100] Figure 2 is a schematic diagram illustrating the structure of a sub-pixel circuit according to an embodiment of the present invention;

[0101] Figure 3 is a timing diagram illustrating a control signal transmitted by a driver according to an embodiment of the present invention;

[0102] Figure 4 is a schematic flow chart illustrating a method for controlling a display device according to an embodiment of the present invention;

[0103] Figure 5 is a schematic diagram illustrating a flow chart of a PWM control mode according to an embodiment of the present invention;

[0104] Figure 6 1 is a diagram illustrating a working cycle of a control signal according to an embodiment of the present invention;

[0105] Figures 7 to 14 is a schematic diagram illustrating transistor operation in each step of a PWM control mode according to an embodiment of the present invention;

[0106] Fig.15 is a schematic diagram illustrating a flow chart of a PAM control mode according to an embodiment of the present invention; and

[0107] Figures 16 to 22 FIG. 4 is a schematic diagram illustrating transistor operations in various steps of a PAM control mode according to an embodiment of the present invention.

[0108] Wherein, the reference numerals are:

[0109] 100: Display device

[0110] 110:Drive

[0111] 120: Display panel

[0112] 210:PWM drive circuit

[0113] 220:PAM drive circuit

[0114] 400: Control method of display device

[0115] 410, 420: Steps

[0116] 501~508: Steps

[0117] 1501~1507: Steps

[0118] A: First Node

[0119] B: Second Node

[0120] C: The third node

[0121] C1: First capacitor

[0122] C2: Second capacitor

[0123] C3: The third capacitor

[0124] D: The fourth node

[0125] E: Fifth Node

[0126] EL: Light Emitting Element

[0127] EM[n]: luminescent signal

[0128] S1[n-1]: gate signal

[0129] S1[n]: Gate signal

[0130] S1[n+1]: gate signal

[0131] S2[n]: Gate signal

[0132] S3[n]: Gate signal

[0133] T1: First transistor

[0134] T2: Second transistor

[0135] T3: The third transistor

[0136] T4: The fourth transistor

[0137] T5: The fifth transistor

[0138] T6: The sixth transistor

[0139] T7: Seventh transistor

[0140] T8: The eighth transistor

[0141] T9: The ninth transistor

[0142] T10: The tenth transistor

[0143] T11: Eleventh transistor

[0144] T12: 12th transistor

[0145] T13: Thirteenth transistor

[0146] T14: The fourteenth transistor

[0147] T15: The fifteenth transistor

[0148] T16: The sixteenth transistor

[0149] V data :Data signal

[0150] V DD :Power supply voltage

[0151] V GH : High level voltage

[0152] V GL : Low level voltage

[0153] V REF1 :First reference voltage

[0154] V REF2 : Second reference voltage

[0155] V REF3 : Third reference voltage

[0156] V REF4 : The fourth reference voltage

[0157] V SS : Ground reference voltage

[0158] V SWEEP :Sweep frequency signal

[0159] V SWEEP_H : High level voltage

[0160] V SWEEP_L : Low level voltage DETAILED DESCRIPTION

[0161] The following describes embodiments of the present invention. However, it is understood that the embodiments provide many applicable concepts that can be implemented in a variety of specific contexts. The embodiments discussed and disclosed are for illustration only and are not intended to limit the scope of the present invention.

[0162] The terms “first”, “second”, etc. used in this document do not particularly refer to an order or sequence, but are only used to distinguish elements or operations described with the same technical terms.

[0163] Please refer to Figure 1 , Figure 1 1 is a functional block diagram of a display device 100 according to an embodiment of the present invention. The display device 100 includes a driver 110 and a display panel 120. The driver 110 is used to provide a plurality of control signals to the display panel 120 to control the display panel 120 to display an image. The control signals include: a data signal, a gate signal, a sweep signal, etc. The display panel 120 includes a plurality of sub-pixel circuits to display colors such as red, blue or green, respectively, and to form a plurality of pixels to display an image.

[0164] Please refer to Figure 2 , which is a schematic diagram showing the structure of a sub-pixel circuit according to an embodiment of the present invention. Figure 2 As shown, the sub-pixel circuit includes a light-emitting element EL, a pulse width modulation (PWM) driving circuit 210, and a pulse amplitude modulation (PAM) driving circuit 220. The PWM driving circuit 210 is electrically connected to the light-emitting element EL to control the light-emitting time of the light-emitting element EL. The PAM driving circuit 220 is electrically connected to the light-emitting element EL to control the current value of the light-emitting element EL. In the present embodiment, the light-emitting element EL is a micro light-emitting diode (microLED), but the embodiments of the present invention are not limited thereto.

[0165] The PAM driving circuit 220 includes: a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, and a first capacitor C1. The PWM driving circuit 210 includes: a ninth transistor T9, a tenth transistor T10, an eleventh transistor T11, a twelfth transistor T12, a thirteenth transistor T13, a fourteenth transistor T14, a fifteenth transistor T15, a sixteenth transistor T16, a second capacitor C2, and a third capacitor C3.

[0166] In the embodiment of the present invention, the PWM driving circuit 210 and the PAM driving circuit 220 receive four reference voltages (hereinafter referred to as the first reference voltage, the second reference voltage, the third reference voltage and the fourth reference voltage) and the control signal provided by the driver 110 to perform the PWM control mode or the PAM control mode. In this way, the sub-pixel circuit of the embodiment of the present invention only needs one data signal to simultaneously control the current size and the light-emitting time; the compensation driving transistor and the control transistor threshold voltage (V TH ) variation and IR drop / rise; medium and high grayscales modulate the luminous time, and low grayscales modulate the current size. The following will describe in detail the architecture and working method of the PWM driving circuit 210 and the PAM driving circuit 220.

[0167] Please also refer to Figure 2 and Figure 3 , Figure 3 1 is a timing diagram of control signals transmitted by the driver 110 according to an embodiment of the present invention. The control signals are, for example, gate signal S1[n-1], gate signal S1[n], gate signal S1[n+1], gate signal S2[n], emission signal EM[n], gate signal S3[n], and sweep signal V SWEEP Where n represents the signal corresponding to the nth gate line. Sweep signal V SWEEP With a high level voltage VSWEEP_H And the low level voltage V SWEEP_L Similarly, other signals also have high-level voltages V GH And the low level voltage V GL .

[0168] First, the structure of the PAM driving circuit 220 is described. The first end of the second transistor T2 is electrically connected to the first transistor T1, the second end is electrically connected to the light emitting element EL, and the control end is electrically connected to the third capacitor C3. The first end of the first transistor T1 is electrically connected to the ground reference voltage V SS , the second end is electrically connected to the second end of the second transistor T2, so that the first transistor T1, the second transistor T2 and the light emitting element EL are electrically connected in series to the power supply voltage V DD and the ground reference voltage V SS between.

[0169] The first end of the third transistor T3 is electrically connected to the first node A between the first transistor T1 and the second transistor T2, and the second end is electrically connected to the first reference voltage V REF1 , the control terminal is electrically connected to the gate signal S1[n-1].

[0170] The first terminal of the fourth transistor T4 is electrically connected to the first reference voltage V REF1 , the second end is electrically connected to the control end of the first transistor T1, and the control end is electrically connected to the gate signal S1[n-1].

[0171] The first terminal of the fifth transistor T5 is electrically connected to the data signal V transmitted by the driver 110. data The second end is electrically connected to a second node B between the first transistor T1 and the fourth transistor T4, and the control end is electrically connected to a gate signal S1[n].

[0172] The first terminal of the sixth transistor T6 is electrically connected to the sweep signal V transmitted by the driver 110. SWEEP The second end is electrically connected to the control end of the first transistor T1 , and the control end is electrically connected to the gate signal S1 [n+1] transmitted by the driver 110 .

[0173] A first terminal of the seventh transistor T7 is electrically connected to the second node B, a second terminal of the seventh transistor T7 is electrically connected to the eighth transistor T8 and the first capacitor C1 , and a control terminal of the seventh transistor T7 is electrically connected to the light emitting signal EM[n] transmitted by the driver 110 .

[0174] The first terminal of the eighth transistor T8 is electrically connected to the fourth reference voltage V REF4 , the second end is electrically connected to the second end of the seventh transistor T7, and the control end is electrically connected to the gate signal S2[n] transmitted by the driver 110.

[0175] The first capacitor C1 is electrically connected between the first node A and a third node C, wherein the third node C is located between the seventh transistor and the eighth transistor.

[0176] Next, the structure of the PWM driving circuit 210 is described.

[0177] The first terminal of the ninth transistor T9 is electrically connected to the sixteenth transistor T16, and the second terminal is electrically connected to the ground reference voltage V SS , the control end is electrically connected to the gate signal S3[n] transmitted by the driver 110.

[0178] One end of the second capacitor C2 is electrically connected to the sweep signal V transmitted by the driver 110. SWEEP , and the other end is electrically connected to the tenth transistor T10.

[0179] The first terminal of the tenth transistor T10 is electrically connected to the fifteenth transistor T15 , the second terminal of the tenth transistor T10 is electrically connected to the sixteenth transistor T16 , and the control terminal of the tenth transistor T10 is electrically connected to the second capacitor C2 .

[0180] The first end of the eleventh transistor T11 is electrically connected to the fourth node D between the tenth transistor T10 and the second capacitor C2, and the second end of the eleventh transistor T11 is electrically connected to the ground reference voltage V SS , the control end is electrically connected to the gate signal S1[n-1] transmitted by the driver 110.

[0181] The first end of the twelfth transistor T12 is electrically connected to the second end of the tenth transistor T10 , the second end is connected to the first end of the eleventh transistor T11 , and the control end is electrically connected to the gate signal S2 [n] transmitted by the driver 110 .

[0182] The first terminal of the thirteenth transistor T13 is electrically connected to the data signal V transmitted by the driver 110. data The second end is electrically connected to the first end of the tenth transistor T10 , and the control end is electrically connected to the gate signal S1 [n] transmitted by the driver 110 .

[0183] The first terminal of the fourteenth transistor T14 is electrically connected to the fourth reference voltage V REF4 The second end is electrically connected to the second end of the thirteenth transistor T13 , and the control end is electrically connected to the gate signal S1 [n+1] transmitted by the driver 110 .

[0184] The first terminal of the fifteenth transistor T15 is electrically connected to the second reference voltage V REF2 The second end is electrically connected to the first end of the tenth transistor T10 , and the control end is electrically connected to the light emitting signal EM[n] transmitted by the driver 110 .

[0185] The first end of the sixteenth transistor T16 is electrically connected to the second end of the tenth transistor T10, the second end is electrically connected to the first end of the ninth transistor T9, and the control end is electrically connected to the light emitting signal EM[n] transmitted by the driver 110. One end of the third capacitor C3 is electrically connected to the fifth node E between the second transistor T2 and the ninth transistor T9, and the other end is electrically connected to the third reference voltage V REF3 .

[0186] In the embodiments of the present invention, although the transistors are all represented by PMOS transistors, the embodiments of the present invention are not limited thereto. In other embodiments of the present invention, NMOS transistors may be used to replace PMOS transistors, wherein Figure 2 The components shown are arranged in a mirrored manner. For example, the light emitting element EL is electrically connected to the ground reference voltage V SS Between the transistors.

[0187] In the sub-pixel circuit of the embodiment of the present invention, since the power supply voltage V DD With ground reference voltage V SS There are only the first transistor T1 and the second transistor T2 in between, so the IR drop / rise of the power supply voltage / ground reference voltage can be greatly improved.

[0188] Please refer to Figure 4 , which is a flow chart of a control method 400 of a display device according to an embodiment of the present invention. First, step 410 is performed to provide the above-mentioned light emitting element EL, PWM driving circuit 210 and PAM driving circuit 220. Then, step 420 is performed to control the display device according to the data signal V data The value of the data signal V is used to utilize the PWM driving circuit and the PAM driving circuit to perform the PWM control mode or the PAM control mode on the light emitting element. In step 420, when the data signal V data The value is greater than the third reference voltage V REF3 The value of the data signal V data The value is less than the sweep signal V SWEEP The high level voltage value V SWEEP_H When , PAM control mode is implemented.

[0189] Please refer to Figure 5, which is a flow chart of the PWM control mode according to an embodiment of the present invention. In the embodiment of the present invention, the PWM control mode includes: a reset operation, a plurality of compensation operations, a plurality of light control operations, a stable operation, and a turn-off operation. These operations are repeated in sequence until the control mode is switched. In order to facilitate the description of the timing relationship between these operations and the control signal, the following will be used together with Figure 6 Let's explain together, Figure 6 The time period corresponding to each operation of the PWM control mode is shown.

[0190] First, consider step 501, which performs a reset operation, such as Figure 7 During the reset operation, according to Figure 6 The control signal corresponding to the period (1) shown is used to turn off the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the ninth transistor T9, the thirteenth transistor T13, the fourteenth transistor T14, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the third transistor T3, the fourth transistor T4, the eighth transistor T8, the tenth transistor T10, the eleventh transistor T11 and the twelfth transistor T12 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0191] V A = V REF1 (1)

[0192] V B = V REF1 (2)

[0193] V C = V REF4 (3)

[0194] V D = V SS (4)

[0195] V E = V REF2 (5)

[0196] Where V A is the voltage value of the first node A, V B is the voltage value of the second node B, V C is the voltage value of the third node C, V D is the voltage value of the fourth node D, V E is the voltage value of the fifth node E, and V REF1>V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V S .

[0197] The arrows in the figure illustrate the direction of the signal (or current). In the reset operation, because the third transistor T3, the fourth transistor T4 and the eighth transistor T8 are turned on, the first node A, the second node B and the third node C are charged to the first reference voltage V REF1 and the fourth reference voltage V REF4 Similarly, because the eleventh transistor T11 is turned on, the fourth node D is discharged to the ground reference voltage V SS In addition, the second reference voltage V REF2 The voltage value at the fifth node E is retained for the last turn-off operation.

[0198] Next, consider step 502, which performs a first compensation operation, such as Figure 8 In the first compensation operation, according to Figure 6 The control signal corresponding to the period (2) shown is used to turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the sixth transistor T6, the seventh transistor T7, the ninth transistor T9, the eleventh transistor T11, the fourteenth transistor T14, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the first transistor T1, the fifth transistor T5, the eighth transistor T8, the tenth transistor T10, the twelfth transistor T12 and the thirteenth transistor T13 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0199] V A = V data + |V TH_T1 | (6)

[0200] V B = V data (7)

[0201] V C = V REF4 (8)

[0202] V D = V data – |V TH_T10 | (9)

[0203] V E = V REF2 (10)

[0204] Where V TH_T1 is the threshold voltage of the first transistor T1, V TH_T10 is the threshold voltage of the tenth transistor T10, and V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V SS .

[0205] In the first compensation operation, since the first transistor T1, the fifth transistor T5 and the eighth transistor T8 are turned on, the voltage value of the first node A is changed to V data +|V TH_T1 | Similarly, because the tenth transistor T10, the twelfth transistor T12, and the thirteenth transistor T13 are turned on, the voltage value of the fourth node D is changed to V data –|V TH_T10 |.

[0206] Then, consider step 503, which performs a second compensation operation, such as Fig. 9 In the second compensation operation, according to Figure 6 The control signal corresponding to the period (3) shown is used to turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the seventh transistor T7, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the thirteenth transistor T13, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the first transistor T1, the sixth transistor T6, the eighth transistor T8, the twelfth transistor T12 and the fourteenth transistor T14 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0207] V A = V SWEEP_H + |V TH_T1 | (11)

[0208] V B = V SWEEP_H (12)

[0209] V C = V REF4 (13)

[0210] V D = V data – |V TH_T10 | (14)

[0211] V E = V REF2 (15)

[0212] Where V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V SS .

[0213] In the second compensation operation, since the first transistor T1, the sixth transistor T6 and the eighth transistor T8 are turned on, the voltage value of the first node A is changed to V SWEEP_H +|V TH_T1 |.

[0214] Next, consider step 504, which performs a first light emission control operation, such as Fig.10 In the first light emission control operation, according to Figure 6 The control signal corresponding to the period (4) shown is used to turn off the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13 and the fourteenth transistor T14, and turn on the first transistor T1, the second transistor T2, the seventh transistor T7, the ninth transistor T9, the fifteenth transistor T15 and the sixteenth transistor T16, so as to turn on the light emitting element EL to emit light, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0215] V A = V DD – V LED (16)

[0216] V B =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | (17)

[0217] V C =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | (18)

[0218] V D = V data – |V TH_T10 | + ΔVSWEEP (19)

[0219] V E = V SS (20)

[0220] Where V LED is the voltage across the light emitting element EL, ΔV SWEEP is the frequency sweep signal V SWEEP The difference between the high level voltage value and the low level voltage value.

[0221] In the first light emitting control operation, since the first transistor T1 and the second transistor T2 are turned on, the light emitting element EL is turned on to emit light. In addition, since the voltages of the first node A and the third node C are coupled, the voltage values ​​of the second node B and the third node C are changed to V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 |. Similarly, the swept voltage V SWEEP is also coupled to the fourth node D. Thus, the current value of the light emitting element EL can be expressed as follows:

[0222]

[0223] Among them I LED is the current value of the light emitting element EL, and k is the process parameter. From the above formula, it can be seen that the possible variation of the threshold voltage V TH_T1 was eliminated.

[0224] Then, consider step 505, which performs a second light emission control operation, such as Fig.11 In the second light emitting control operation, according to Figure 6 The control signal corresponding to the cycle (5) shown in the figure controls the transistor, wherein the second light emitting control operation corresponds to the earlier part (V SWEEP The second light emitting control operation can turn off the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13 and the fourteenth transistor T14, and turn on the first transistor T1, the second transistor T2, the seventh transistor T7, the fifteenth transistor T15 and the sixteenth transistor T16 to turn on the light emitting element EL to emit light, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0225] V A = V DD – VLED (twenty two)

[0226] V B =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | (23)

[0227] V C =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | (24)

[0228] V D = V data – |V TH_T10 | + ΔV SWEEP (25)

[0229] V E = V SS (26)

[0230] In the second light emitting control operation, the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D, the fifth node E, and the current value of the light emitting element EL are similar to those in the first light emitting control operation, so they are not repeated here.

[0231] Next, consider step 506, which performs a third light control operation, such as Fig.12 In the third light emitting control operation, according to Figure 6 The control signal corresponding to the cycle (5) shown in the figure controls the transistor, wherein the third light emitting control operation corresponds to the later part (V SWEEP The third light emitting control operation can turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, the ninth transistor T9, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13 and the fourteenth transistor T14, and turn on the first transistor T1, the seventh transistor T7, the tenth transistor T10, the fifteenth transistor T15 and the sixteenth transistor T16 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0232] V A = V SS (27)

[0233] V B= V REF4 + V SS – V SWEEP_H – |V TH_T1 | (28)

[0234] V C = V REF4 + V SS – V SWEEP_H – |V TH_T1 | (29)

[0235] V D = V data – |V TH_T10 | + ΔV SWEEP (30)

[0236] V E = V REF2 (31)

[0237] The source-gate voltage difference V SG_T10 and threshold voltage |V TH_T10 The relationship between | can be expressed as follows:

[0238] V SG_T10 > |V TH_T10 | (32)

[0239] →V REF2 –(V data –|V TH_T10 |+ΔV SWEEP )>|V TH_T10 | (33)

[0240] →The tenth transistor T10 is turned on (connected)

[0241] Then, consider step 507, which performs a stabilization operation, such as Fig.13 In stable operation, according to Figure 6 The control signal corresponding to the period (6) shown is used to turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13 and the fourteenth transistor T14, and turn on the first transistor T1, the seventh transistor T7, the fifteenth transistor T15 and the sixteenth transistor T16 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0242] V A= V SS (34)

[0243] V B = V REF4 + V SS – V SWEEP_H – |V TH_T1 | (35)

[0244] V C = V REF4 + V SS – V SWEEP_H – |V TH_T1 | (36)

[0245] V D = V data – |V TH_T10 | (37)

[0246] V E = V REF2 (38)

[0247] Where V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V SS .

[0248] In the embodiment of the present invention, cycles (4) to (6) may be repeated several times, that is, steps 504 to 507 may be repeated several times, and then the process proceeds to cycle (7).

[0249] Next, consider step 508, which performs a closing operation, such as Fig.14 In the closing operation, according to Figure 6 The control signal corresponding to the period (7) shown is used to turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13, the fourteenth transistor T14, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the first transistor T1 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0250] V A = V SS (39)

[0251] V B = V REF4 + V SS – V SWEEP_H – |V TH_T1 | (40)

[0252] V C = V REF4 + V SS – V SWEEP_H – |V TH_T1 | (41)

[0253] V D = V data – |V TH_T10 | (42)

[0254] V E = V REF2 (43)

[0255] In the embodiment of the present invention, after cycle (7) ends, the process returns to cycle (1), that is, after step 508 ends, the process returns to step 501.

[0256] Please refer to Fig.15 , which is a flow chart of the PAM control mode according to an embodiment of the present invention. In the embodiment of the present invention, the PAM control mode includes: a reset operation, a plurality of compensation operations, a plurality of light control operations, a stable operation, and a turn-off operation. These operations are repeated in sequence until the control mode is switched. In order to facilitate the description of the timing relationship between these operations and the control signal, the following will be used together with Figure 6 Let's explain together, Figure 6 The time period corresponding to each operation of the PAM control mode is shown.

[0257] First, consider step 1501, which performs a reset operation, such as Fig.16 During the reset operation, according to Figure 6 The control signal corresponding to the period (1) shown is used to turn off the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the ninth transistor T9, the thirteenth transistor T13, the fourteenth transistor T14, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the third transistor T3, the fourth transistor T4, the eighth transistor T8, the tenth transistor T10, the eleventh transistor T11 and the twelfth transistor T12 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0258] V A = V REF1 (44)

[0259] V B = V REF1 (45)

[0260] V C = V REF4 (46)

[0261] V D = V SS (47)

[0262] V E = V REF2 (48)

[0263] Where V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V S .

[0264] In the reset operation, since the third transistor T3, the fourth transistor T4 and the eighth transistor T8 are turned on, the first node A, the second node B and the third node C are charged to the first reference voltage V REF1 and the fourth reference voltage V REF4 Similarly, because the eleventh transistor T11 is turned on, the fourth node D is discharged to the ground reference voltage V SS In addition, the second reference voltage V REF2 The voltage value at the fifth node E is retained for the last turn-off operation.

[0265] Next, consider step 1502, which performs a first compensation operation, such as Fig.17 In the first compensation operation, according to Figure 6 The control signal corresponding to the period (2) shown is used to turn off the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the sixth transistor T6, the seventh transistor T7, the ninth transistor T9, the eleventh transistor T11, the fourteenth transistor T14, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the first transistor T1, the fifth transistor T5, the eighth transistor T8, the tenth transistor T10, the twelfth transistor T12 and the thirteenth transistor T13 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0266] V A = V data + |V TH_T1 | (49)

[0267] V B = V data (50)

[0268] V C = V REF4 (51)

[0269] V D = V data – |V TH_T10 | (52)

[0270] V E = V REF2 (53)

[0271] Where V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V SS .

[0272] In the first compensation operation, since the first transistor T1, the fifth transistor T5 and the eighth transistor T8 are turned on, the voltage value of the first node A is changed to V data +|V TH_T1 | Similarly, because the tenth transistor T10, the twelfth transistor T12, and the thirteenth transistor T13 are turned on, the voltage value of the fourth node D is changed to V data –|V TH_T10 |.

[0273] Then, consider step 1503, which performs a second compensation operation, such as Fig.18 In the second compensation operation, according to Figure 6 The control signal corresponding to the period (3) shown is used to turn off the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the seventh transistor T7, the ninth transistor T9, the eleventh transistor T11, the thirteenth transistor T13, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the sixth transistor T6, the eighth transistor T8, the tenth transistor T10, the twelfth transistor T12 and the fourteenth transistor T14 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0274] VA = V data + |V TH_T1 | (54)

[0275] V B = V SWEEP_H (55)

[0276] V C = V REF4 (56)

[0277] V D = V REF3 – |V TH_T10 | (57)

[0278] V E = V REF2 (58)

[0279] Where V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V SS .

[0280] Next, consider step 1504, which performs a first light emission control operation, such as Fig.19 In the first light emission control operation, according to Figure 6 The control signal corresponding to the period (4) shown is used to turn off the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13 and the fourteenth transistor T14, and turn on the first transistor T1, the second transistor T2, the seventh transistor T7, the ninth transistor T9, the fifteenth transistor T15 and the sixteenth transistor T16 to turn on the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0281] V A = V DD – V LED (59)

[0282] V B = V REF4 +V DD –V LED –V data –|V TH_T1 | (60)

[0283] VC = V REF4 + V DD –V LED –V data –|V TH_T1 | (61)

[0284] V D = V REF3 – |V TH_T10 | + ΔV SWEEP (62)

[0285] V E = V SS (63)

[0286] Thus, the current value of the light emitting element EL can be expressed as follows:

[0287]

[0288] Then, consider step 1505, which performs a second light emission control operation, such as Fig. 20 In the second light emitting control operation, according to Figure 6 The control signal corresponding to the period (5) shown is used to turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, the ninth transistor T9, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13 and the fourteenth transistor T14, and turn on the first transistor T1, the seventh transistor T7, the tenth transistor T10, the fifteenth transistor T15 and the sixteenth transistor T16 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0289] V A = V SS (65)

[0290] V B = V REF4 + V SS – V data – |V TH_T1 | (66)

[0291] V C = V REF4 + V SS – V data – |V TH_T1 | (67)

[0292] V D = VREF3 – |V TH_T10 | + ΔV SWEEP (68)

[0293] V E = V REF2 (69)

[0294] The source-gate voltage difference V SG_T10 and threshold voltage |V TH_T10 The relationship between | can be expressed as follows:

[0295] V SG_T10 > |V TH_T10 | (70)

[0296] →V REF2 –(V REF3 –|V TH_T10 |+ ΔV SWEEP ) > |V TH_T10 | (71)

[0297] →The tenth transistor T10 is turned on (connected)

[0298] Then, consider step 1506, which performs a stabilization operation, such as Fig.21 In stable operation, according to Figure 6 The control signal corresponding to the period (6) shown is used to turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13 and the fourteenth transistor T14, and turn on the first transistor T1, the seventh transistor T7, the fifteenth transistor T15 and the sixteenth transistor T16 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0299] V A = V SS (72)

[0300] V B = V REF4 + V SS – V data – |V TH_T1 | (73)

[0301] V C = V REF4 + V SS – V data – |VTH_T1 | (74)

[0302] V D = V REF3 – |V TH_T10 | (75)

[0303] V E = V REF2 (76)

[0304] Where V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V SS .

[0305] Next, consider step 1507, which performs a closing operation, such as Fig. 22 In the closing operation, according to Figure 6 The control signal corresponding to the period (7) shown is used to turn off the second transistor T2, the third transistor T3, the fourth transistor T4, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, the eighth transistor T8, the ninth transistor T9, the tenth transistor T10, the eleventh transistor T11, the twelfth transistor T12, the thirteenth transistor T13, the fourteenth transistor T14, the fifteenth transistor T15 and the sixteenth transistor T16, and turn on the first transistor T1 to turn off the light emitting element EL, and make the voltage values ​​of the first node A, the second node B, the third node C, the fourth node D and the fifth node E satisfy the following equations:

[0306] V A = V SS (77)

[0307] V B = V REF4 + V SS – V data – |V TH_T1 | (78)

[0308] V C = V REF4 + V SS – V data – |V TH_T1 | (79)

[0309] V D = V REF3 – |V TH_T10 | (80)

[0310] VE = V REF2 (81)

[0311] Where V REF1 >V REF2 >V REF3 =V DD >V SWEEP_H >V REF4 >V SS .

[0312] From the above description, it can be seen that the display device and the control method of the display device according to the embodiment of the present invention use the data signal V data The voltage value can be used to select PWM control mode or PAM control mode, so that only one V DATA The current value and the luminous time can be controlled at the same time, and at high grayscale (V DATA >V REF3 ) uses the PWM control mode to modulate the light-emitting time of the light-emitting element EL, and at low grayscale (V DATA <V SWEEP_H In addition, the sub-pixel circuit architecture (18T3C) of the display device of the embodiment of the present invention can compensate for the threshold voltage variation of the driving transistor and the control transistor and the voltage drop / rise (IR drop / rise) of the power supply voltage / ground reference voltage, thereby improving the brightness uniformity.

[0313] Although the present invention has been disclosed as above in various embodiments, they are not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application.

Claims

1. A display device, characterized in that: It comprises a plurality of sub-pixel circuits, each of which comprises: a light emitting element; a pulse width modulation (PWM) driving circuit, electrically connected to the light emitting element, for controlling a light emitting time of the light emitting element; as well as a pulse amplitude modulation (PAM) driving circuit, electrically connected to the light emitting element, for controlling a current value of the light emitting element; The PWM driving circuit and the PAM driving circuit are used to receive a data signal, so as to perform a PWM control mode or a PAM control mode on the light emitting element according to the value of the data signal; The PAM driving circuit comprises: A first transistor having a control terminal, a first terminal and a second terminal; a second transistor having a control terminal, a first terminal and a second terminal, wherein the first terminal of the second transistor is electrically connected to the second terminal of the first transistor to form a first node; a third transistor having a control terminal, a first terminal and a second terminal, wherein the first terminal of the third transistor is electrically connected to the first node; a fourth transistor having a control terminal, a first terminal and a second terminal, wherein the second terminal of the fourth transistor is electrically connected to the control terminal of the first transistor to form a second node; a fifth transistor having a control terminal, a first terminal and a second terminal, wherein the second terminal of the fifth transistor is electrically connected to the second node; a sixth transistor having a control terminal, a first terminal and a second terminal, wherein the second terminal of the sixth transistor is electrically connected to the control terminal of the first transistor; a seventh transistor having a control terminal, a first terminal and a second terminal, wherein the first terminal of the seventh transistor is electrically connected to the second node; an eighth transistor having a control terminal, a first terminal and a second terminal, wherein the second terminal of the eighth transistor is electrically connected to the second terminal of the seventh transistor to form a third node; and a first capacitor electrically connected between the first node and the third node; The PWM drive circuit includes: a ninth transistor having a control terminal, a first terminal and a second terminal; a second capacitor; a tenth transistor having a control terminal, a first terminal and a second terminal, wherein the control terminal of the tenth transistor is electrically connected to the second capacitor to form a fourth node; an eleventh transistor having a control terminal, a first terminal and a second terminal, wherein the first terminal of the eleventh transistor is electrically connected to the fourth node; a twelfth transistor having a control terminal, a first terminal and a second terminal, wherein the second terminal of the twelfth transistor is electrically connected to the first terminal of the eleventh transistor, and the first terminal of the twelfth transistor is electrically connected to the second terminal of the tenth transistor; a thirteenth transistor having a control terminal, a first terminal and a second terminal, wherein the second terminal of the thirteenth transistor is electrically connected to the first terminal of the tenth transistor; a fourteenth transistor having a control end, a first end and a second end, wherein the second end of the fourteenth transistor is electrically connected to the second end of the thirteenth transistor; a fifteenth transistor having a control terminal, a first terminal and a second terminal, wherein the second terminal of the fifteenth transistor is electrically connected to the first terminal of the tenth transistor; a sixteenth transistor having a control terminal, a first terminal and a second terminal, wherein the first terminal of the sixteenth transistor is electrically connected to the second terminal of the tenth transistor, and the second terminal of the sixteenth transistor is electrically connected to the first terminal of the ninth transistor and the control terminal of the second transistor; and A third capacitor is electrically connected to the control terminal of the second transistor to form a fifth node.

2. The display device according to claim 1, wherein: in The first terminal of the first transistor is electrically connected to a ground reference voltage; The second terminal of the third transistor is electrically connected to a first reference voltage; The control terminal of the third transistor is electrically connected to a first gate signal; The first terminal of the fourth transistor is electrically connected to the first reference voltage; The control terminal of the fourth transistor is electrically connected to the first gate signal; The first terminal of the fifth transistor is electrically connected to the data signal; The control terminal of the fifth transistor is electrically connected to a second gate signal; The first terminal of the sixth transistor is electrically connected to a frequency sweep signal; The control terminal of the sixth transistor is electrically connected to a third gate signal; The control terminal of the seventh transistor is electrically connected to a light emitting signal; The control terminal of the eighth transistor is electrically connected to a fourth gate signal; The control terminal of the ninth transistor is electrically connected to a fifth gate signal; The second capacitor is electrically connected between the control terminal of the tenth transistor and the frequency sweep signal; The control terminal of the eleventh transistor is electrically connected to the first gate signal; The control terminal of the twelfth transistor is electrically connected to the fourth gate signal; The first terminal of the thirteenth transistor is electrically connected to the data signal; The control terminal of the thirteenth transistor is electrically connected to the second gate signal; The first terminal of the fifteenth transistor is electrically connected to a second reference voltage; The control terminal of the fifteenth transistor is electrically connected to the light emitting signal; The first terminal of the fourteenth transistor is electrically connected to a third reference voltage; The control terminal of the fourteenth transistor is electrically connected to the third gate signal; The third capacitor is connected between the control terminal of the second transistor and the third reference voltage; The first terminal of the eighth transistor is electrically connected to a fourth reference voltage; The control terminal of the sixteenth transistor is electrically connected to the light emitting signal.

3. The display device according to claim 2, wherein: When the voltage value of the data signal is greater than the third reference voltage, the PWM driving circuit and the PAM driving circuit perform the PWM control mode.

4. The display device according to claim 3, characterized in that When the voltage value of the data signal is less than a high level voltage of the frequency sweep signal, the PWM driving circuit and the PAM driving circuit perform the PAM control mode.

5. The display device according to claim 1, wherein: The second transistor, the first transistor and the light emitting element are electrically connected in series between a power supply voltage and a ground reference voltage.

6. A method for controlling a display device, characterized in that: Include: A light emitting element, a pulse width modulation (PWM) driving circuit and a pulse amplitude modulation (PAM) driving circuit are provided, wherein The PAM driving circuit comprises: a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, an eighth transistor and a first capacitor; The PWM driving circuit comprises: a ninth transistor, a second capacitor, a tenth transistor, an eleventh transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, a sixteenth transistor and a third capacitor; The third transistor and the fourth transistor are electrically connected to a first reference voltage, the fifteenth transistor is electrically connected to a second reference voltage, the third capacitor is electrically connected to a third reference voltage, and the eighth transistor is electrically connected to a fourth reference voltage; There is a first node between the third transistor and the first capacitor, a second node between the first transistor and the fourth transistor, a third node between the eighth transistor and the first capacitor, a fourth node between the tenth transistor and the second capacitor, and a fifth node between the second transistor and the third capacitor; Using the PWM driving circuit and the PAM driving circuit to perform a PWM control mode or a PAM control mode on the light emitting element according to the value of a data signal; The PWM control mode and the PAM control mode include: A reset operation is performed to turn off the first transistor, the second transistor, the fifth transistor, the sixth transistor, the seventh transistor, the ninth transistor, the thirteenth transistor, the fourteenth transistor, the fifteenth transistor and the sixteenth transistor, and turn on the third transistor, the fourth transistor, the eighth transistor, the tenth transistor, the eleventh transistor and the twelfth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V REF1 V B =V REF1 V C =V REF4 V D =V SS V E =V REF2 Where V A is the voltage value of the first node, V B is the voltage value of the second node, V C is the voltage value of the third node, V D is the voltage value of the fourth node, V E is the voltage value of the fifth node, V REF1 is the value of the first reference voltage; V REF4 is the value of the fourth reference voltage; V SS is the value of a ground reference voltage; V REF2 is the value of the second reference voltage; A first compensation operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the sixth transistor, the seventh transistor, the ninth transistor, the eleventh transistor, the fourteenth transistor, the fifteenth transistor and the sixteenth transistor, and turn on the first transistor, the fifth transistor, the eighth transistor, the tenth transistor, the twelfth transistor and the thirteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V data +|V TH_T1 | V B =V data V C =V REF4 V D =V data –|V TH_T10 | V E =V REF2 Where V data is the voltage value of a data signal, V TH_T1 is the threshold voltage of the first transistor, V TH_T10 is the threshold voltage of the tenth transistor.

7. The control method of the display device according to claim 6, characterized in that: The PWM control mode further includes: A second compensation operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the seventh transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the thirteenth transistor, the fifteenth transistor and the sixteenth transistor, and turn on the first transistor, the sixth transistor, the eighth transistor, the twelfth transistor and the fourteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V SWEEP_H +|V TH_T1 | V B =V SWEEP_H V C =V REF4 V D =V data –|V TH_T10 | V E =V REF2 Where V SWEEP_H is the high level voltage value of a frequency sweep signal.

8. The control method of the display device according to claim 7, characterized in that: The PWM control mode further includes: A first light emitting control operation is performed to turn off the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the second transistor, the seventh transistor, the ninth transistor, the fifteenth transistor and the sixteenth transistor to turn on the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V DD –V LED V B =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | V C =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | V D =V data –|V TH_T10 |+ΔV SWEEP V E =V SS Where V LED is the voltage across the light emitting element, ΔV SWEEP is the difference between the high level voltage value and the low level voltage value of the sweep frequency signal.

9. The control method of the display device according to claim 8, characterized in that: The PWM control mode further includes: A second light emitting control operation is performed to turn off the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the second transistor, the seventh transistor, the fifteenth transistor and the sixteenth transistor to turn on the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V DD –V LED V B =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | V C =V REF4 +V DD –V LED –V SWEEP_H –|V TH_T1 | V D =V data –|V TH_T10 |+ΔV SWEEP V E =V SS 。 10. The control method of the display device according to claim 9, characterized in that: The PWM control mode further includes: A third light emitting control operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the seventh transistor, the tenth transistor, the fifteenth transistor and the sixteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V SS V B =V REF4 +V SS –V SWEEP_H –|V TH_T1 | V C =V REF4 +V SS –V SWEEP_H –|V TH_T1 | V D =V data –|V TH_T10 |+ΔV SWEEP V E =V REF2 。 11. The control method of the display device according to claim 10, characterized in that: The PWM control mode further includes: A stable operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the seventh transistor, the fifteenth transistor and the sixteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V SS V B =V REF4 +V SS –V SWEEP_H –|V TH_T1 | V C =V REF4 +V SS –V SWEEP_H –|V TH_T1 | V D =V data –|V TH_T10 | V E =V REF2 。 12. The control method of the display device according to claim 11, characterized in that: The PWM control mode further includes: A shutdown operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, the fourteenth transistor, the fifteenth transistor, and the sixteenth transistor, and to turn on the first transistor to turn off the light emitting element, so that the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation: V A =V SS V B =V REF4 +V SS –V SWEEP_H –|V TH_T1 | V C =V REF4 +V SS –V SWEEP_H –|V TH_T1 | V D =V data –|V TH_T10 | V E =V REF2 。 13. The control method of the display device according to claim 6, characterized in that: The PAM control mode further includes: A second compensation operation is performed to turn off the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the seventh transistor, the ninth transistor, the eleventh transistor, the thirteenth transistor, the fifteenth transistor and the sixteenth transistor, and turn on the sixth transistor, the eighth transistor, the tenth transistor, the twelfth transistor and the fourteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V data +|V TH_T1 | V B =V SWEEP_H V C =V REF4 V D =V REF3 –|V TH_T10 | V E =V REF2 Where V SWEEP_H is the high level voltage value of a frequency sweep signal.

14. The control method of the display device according to claim 13, characterized in that: The PAM control mode further includes: A first light emitting control operation is performed to turn off the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the second transistor, the seventh transistor, the ninth transistor, the fifteenth transistor and the sixteenth transistor to turn on the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V DD –V LED V B =V REF4 +V DD –V LED –V data –|V TH_T1 | V C =V REF4 +V DD –V LED –V data –|V TH_T1 | V D =V REF3 –|V TH_T10 |+ΔV SWEEP V E =V SS Where V LED is the voltage across the light emitting element, ΔV SWEEP is the difference between the high level voltage value and the low level voltage value of the sweep frequency signal.

15. The control method of the display device according to claim 14, characterized in that: The PAM control mode further includes: A second light emitting control operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the seventh transistor, the tenth transistor, the fifteenth transistor and the sixteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V SS V B =V REF4 +V SS –V data –|V TH_T1 | V C =V REF4 +V SS –V data –|V TH_T1 | V D =V REF3 –|V TH_T10 |+ΔV SWEEP V E =V REF2 。 16. The control method of the display device according to claim 15, characterized in that: The PAM control mode further includes: A stable operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor and the fourteenth transistor, and turn on the first transistor, the seventh transistor, the fifteenth transistor and the sixteenth transistor to turn off the light emitting element, and make the voltage values ​​of the first node, the second node, the third node, the fourth node and the fifth node satisfy the following equation: V A =V SS V B =V REF4 +V SS –V data –|V TH_T1 | V C =V REF4 +V SS –V data –|V TH_T1 | V D =V REF3 –|V TH_T10 | V E =V REF2 。 17. The control method of the display device according to claim 16, characterized in that: The PAM control mode further includes: A shutdown operation is performed to turn off the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the seventh transistor, the eighth transistor, the ninth transistor, the tenth transistor, the eleventh transistor, the twelfth transistor, the thirteenth transistor, the fourteenth transistor, the fifteenth transistor, and the sixteenth transistor, and to turn on the first transistor to turn off the light emitting element, so that the voltage values ​​of the first node, the second node, the third node, the fourth node, and the fifth node satisfy the following equation: V A =V SS V B =V REF4 +V SS –V data –|V TH_T1 | V C =V REF4 +V SS –V data –|V TH_T1 | V D =V REF3 –|V TH_T10 | V E =V REF2 。

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