Integrated power supply conversion topology circuit based on APFC and AHB

Abstract

The invention relates to the technical field of power electronics, in particular to an integrated power conversion topology circuit based on an APFC and an AHB. The power supply conversion topology circuit comprises an alternating current source AC1 which is rectified into sine half-wave voltage through a bridge rectifier BR1 and a filter capacitor C1; the energy storage inductor L1 is connected with the second switch tube Q2 in series, and when the second switch tube Q2 is switched on, the energy storage inductor L1 is charged through a first diode D1 to store energy; and the first switching tube Q1 and the output filter capacitor C2 are connected in series and in parallel into a loop, and zero-voltage switching is realized by setting dead time. The APFC active power factor correction function and the AHB asymmetric half-bridge soft switch topology are integrated in one circuit, the circuit structure is remarkably simplified, the number of components is reduced, and therefore the cost of the power converter is greatly reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to an integrated power conversion topology circuit based on APFC and AHB. Background Art

[0002] In recent years, the field of power electronics has developed rapidly. Various advanced soft-switching power conversion topologies have gradually replaced traditional hard-switching topologies, making power converters have higher power density and conversion efficiency. In order to reduce harmonic pollution to the power grid and increase the energy utilization rate of the power grid, APFC active power factor correction circuits are needed to solve the above problems.

[0003] Therefore, in many high-power power converters, APFC active power factor correction circuits are usually used together with soft switching conversion topologies to perform power conversion in order to meet the needs of various power-consuming devices for refined power supply. However, such a combination of circuits undoubtedly brings about higher costs and increases the complexity of the circuit. In the context of increasingly fierce global industrialization and commercial competition, it is urgent to solve the contradiction between achieving PFC power factor correction and soft switching efficient conversion while reducing the cost of power converters. Summary of the invention

[0004] The present invention provides an integrated power conversion topology circuit based on APFC and AHB to solve the technical problem of how to reduce the cost of a power converter under the premise of achieving PFC power factor correction and soft switch high-efficiency conversion.

[0005] The technical solution of the present invention to solve the above technical problems is as follows:

[0006] An integrated power conversion topology circuit based on APFC and AHB is provided, and the power conversion topology circuit includes:

[0007] An AC source (AC1) which is rectified into a half-sine wave voltage by a bridge rectifier (BR1) and a filter capacitor (C1);

[0008] An energy storage inductor (L1) is connected in series with a second switch tube (Q2), and when the second switch tube (Q2) is turned on, the energy storage inductor (L1) is charged and stored with energy through a first diode (D1);

[0009] A first switch tube (Q1) is connected in series with an output filter capacitor (C2) and connected to a loop, and realizes zero voltage switching by setting a dead time;

[0010] A transformer (T1), wherein a primary winding (NP) is coupled to the output filter capacitor (C2) via a coupling capacitor (C3), and a secondary winding (NS) of the transformer (T1) is rectified and filtered via a second diode (D2) and an output filter capacitor (C4) to generate an output voltage (VOUT);

[0011] and a third diode (D3), which is connected in parallel with the filter capacitor (C1) through the energy storage inductor (L1) and is used to clamp the reverse voltage at -1V to ensure circuit stability.

[0012] Furthermore, the working process of the power conversion topology circuit includes a first switching cycle and a second switching cycle;

[0013] The steps of the first switching cycle include:

[0014] The second switch tube (Q2) is turned on, and the first diode (D1) charges the energy storage inductor (L1) to store energy;

[0015] The second switch tube (Q2) is turned off, the induced voltage of the energy storage inductor (L1) is superimposed on the voltage on the filter capacitor (C1), and the output filter capacitor (C2) is charged and stored with energy through the first diode (D1) and the first switch tube (Q1);

[0016] The first switch tube (Q1) is turned on after the dead time to reduce loop loss;

[0017] The steps of the second switching cycle include:

[0018] The first switch tube (Q1) is turned off, and the second switch tube (Q2) is turned on after the dead time, and the energy storage process of the energy storage inductor (L1) is repeated, and at the same time, the primary winding (NP) is coupled to the voltage stored on the output filter capacitor (C2) through the coupling capacitor (C3) to store energy;

[0019] The second switch tube (Q2) is turned off, the energy storage inductor (L1) and the primary winding (NP) are in reverse phase, and the first switch tube (Q1) is turned on at zero voltage;

[0020] The energy storage inductor (L1) repeats the charging and energy storage process of the output filter capacitor (C2), and the primary winding (NP) and the leakage inductance are clamped and magnetically reset through the coupling capacitor (C3);

[0021] The energy stored in the transformer (T1) is coupled through the secondary winding (NS), and is rectified and filtered by the second diode (D2) and the output filter capacitor (C4) to output an output voltage (VOUT);

[0022] After the energy is released, the first switch tube (Q1) is turned off, the primary winding (NP) is reversed, and the second switch tube (Q2) is turned on at zero voltage.

[0023] Furthermore, the turn-on and turn-off processes of the first switch tube (Q1) and the second switch tube (Q2) are used to achieve zero voltage switching (ZVS) by accurately controlling the dead time;

[0024] The drain of the first switch tube (Q1) is connected to the positive electrode of the output filter capacitor (C2), and the negative electrode of the filter capacitor (C2) is grounded; the source of the second switch tube (Q2) is grounded, and the drain is connected to the source of the first switch tube (Q1);

[0025] Controlling the on and off of the first switch tube (Q1) and the second switch tube (Q2) through complementary PWM control signals;

[0026] Dead time is set between the first switch tube (Q1) being turned off and the second switch tube (Q2) being turned on, and between the second switch tube (Q2) being turned off and the first switch tube (Q1) being turned on, respectively, so as to enable the switch tubes to be turned on at zero voltage or close to zero voltage.

[0027] Furthermore, by adjusting the on-time ratio of the first switch tube (Q1) and the second switch tube (Q2), an asymmetric half bridge (AHB) is realized;

[0028] The conduction time of the first switch tube (Q1) accounts for 99%-40% of the total switch period, and the conduction time of the second switch tube (Q2) accounts for 1%-60% of the total switch period;

[0029] By controlling the charging and discharging process of the energy storage inductor (L1), the inductor is used in discontinuous mode with equal conduction time to achieve a sinusoidal waveform of the input current for active power factor correction (APFC);

[0030] One end of the energy storage inductor (L1) is connected to the positive electrode of the bridge rectifier (BR1), and the other end is connected to the anode of the first diode (D1).

[0031] Furthermore, the voltage waveform between the primary winding (NP) and the secondary winding (NS) is adjusted by the coupling capacitor (C3), and the capacitance C3 of the coupling capacitor (C3) is determined as follows:

[0032] Where ω is the angular frequency of the switching frequency, L T is the leakage inductance of the transformer.

[0033] Furthermore, the power conversion topology circuit further includes a control algorithm for adjusting the duty cycle of the PWM control signal according to load changes;

[0034] The steps of the control algorithm include:

[0035] Detect output voltage (VOUT) and output current (IOUT);

[0036] Calculate the current output power: POUT = VOUT × IOUT;

[0037] According to the current output power, the optimal duty cycle D is determined using a lookup table or interpolation method. opt ;

[0038] Calculate the deviation between the current duty cycle and the optimal duty cycle: ΔD = D current -D opt ;

[0039] Calculate the duty cycle adjustment using a PI controller:

[0040] ΔD adj =K p ΔD+K i ∫ΔDdt, where K p is the proportionality coefficient, K i is the integration coefficient;

[0041] Update the duty cycle of the PWM control signal: D new =D current +ΔD adj ;

[0042] Limiting the updated duty cycle to a valid range;

[0043] Applying the updated duty cycle to the PWM controller;

[0044] Repeat the above process periodically;

[0045] The power conversion topology circuit also includes:

[0046] An overcurrent protection mechanism, when it is detected that the output current (IOUT) exceeds a preset threshold, immediately shuts down the first switch tube (Q1) and the second switch tube (Q2), and restarts after a delay;

[0047] Soft start mechanism: when powered on, the duty cycle of the PWM control signal starts from 0 and gradually increases to the normal working value according to the preset slope to avoid the large current shock at the startup moment.

[0048] Furthermore, the power conversion topology circuit further includes an output voltage feedback control loop, which is used to adjust the output voltage (VOUT) by adjusting the duty cycle of the PWM control signal;

[0049] The control loop comprises:

[0050] A voltage sampling circuit, using a voltage divider resistor network to sample the output voltage (VOUT);

[0051] An error amplifier compares the sampled voltage with the reference voltage and outputs an error signal;

[0052] A PWM comparator compares the error signal with the triangle wave to generate the PWM control signal;

[0053] The driving circuit converts the PWM control signal into a level and a timing for driving the first switch tube (Q1) and the second switch tube (Q2).

[0054] Furthermore, the position of the coupling capacitor (C3) is changed as follows:

[0055] The first end of the coupling capacitor (C3) is connected to the positive electrode of the output filter capacitor (C2), and the second end of the coupling capacitor (C3) is connected to the first end of the primary winding (NP).

[0056] Furthermore, the power conversion topology circuit further includes a reverse polarity connection, and the reverse polarity connection is in the following manner:

[0057] The output end 3 of the bridge rectifier (BR1) serves as a first connection point, and the output end 4 serves as a second connection point; the first end of the filter capacitor (C1), the anode of the third diode (D3), the drain of the first switch tube (Q1), the positive electrode of the output filter capacitor (C2) and the first end of the primary winding (NP) are all connected to the first connection point; the second end of the filter capacitor (C1) and the first end of the energy storage inductor (L1) are all connected to the second connection point; the second end of the energy storage inductor (L1) serves as a third connection point. point, the cathode of the first diode (D1) and the cathode of the third diode (D3) are both connected to the third connection point; the anode of the first diode (D1) serves as a fourth connection point, the source of the first switch tube (Q1), the drain of the second switch tube (Q2) and the first end of the coupling capacitor (C3) are all connected to the fourth connection point, and the second end of the coupling capacitor (C3) is connected to the second end of the primary winding (NP); the source of the second switch tube (Q2) and the negative electrode of the output filter capacitor (C2) are both grounded.

[0058] Furthermore, the power conversion topology circuit also includes a reverse polarity connection and a coupling capacitor (C3) position change mode, and the position change mode is:

[0059] The first end of the coupling capacitor (C3) is connected to the negative electrode of the output filter capacitor (C2), and the second end of the coupling capacitor (C3) is connected to the first end of the primary winding (NP).

[0060] The beneficial effects of the present invention are:

[0061] The present invention integrates the APFC active power factor correction function and the AHB asymmetric half-bridge soft switching topology into one circuit, significantly simplifies the circuit structure, reduces the number of components, and thus greatly reduces the cost of the power converter. A single PWM control signal is used to control two switch tubes, realizing ZVS zero voltage switching, improving power conversion efficiency, and reducing switching losses and electromagnetic interference.

[0062] Furthermore, the present invention realizes the APFC active power factor correction function and ensures the efficient operation of the AHB asymmetric half-bridge soft switch topology by accurately controlling the dead time and the switch conduction time ratio, thus solving the problem that APFC and soft switch are difficult to take into account in traditional circuits. The circuit structure of the present invention is simple, reliable, easy to manufacture, and suitable for industrial production. At the same time, due to the use of a single control signal, the EMI filter design is simplified, and the cost is further reduced.

[0063] In addition, the present invention provides a variety of circuit variations, such as C3 position change, reverse polarity connection, and reverse polarity connection with C3 position change, which increases the flexibility of circuit design and can adapt to the needs of different scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0064] Figure 1 A power conversion topology circuit diagram in one embodiment of the present invention;

[0065] Figure 2 A simulation diagram of a power conversion topology circuit in one embodiment of the present invention;

[0066] Figure 3 This is a diagram showing the effect of implementing the APFC active power factor correction function in one embodiment of the present invention;

[0067] Figure 4 This is a diagram showing the ZVS effect of a switch tube in one embodiment of the present invention;

[0068] Figure 5 A power conversion topology circuit diagram of a coupling capacitor C3 position change in an embodiment of the present invention;

[0069] Figure 6A power conversion topology circuit diagram of a reverse polarity connection in one embodiment of the present invention;

[0070] Figure 7 1 is a power conversion topology circuit diagram of reverse polarity connection and change of coupling capacitor C3 position in one embodiment of the present invention. DETAILED DESCRIPTION

[0071] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0072] The term "comprise" and any variation thereof in the specification and claims of the present application are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units need not be limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices. In addition, the use of "and / or" in the specification and claims to indicate at least one of the connected objects, such as A and / or B, means including A alone, B alone, and A and B.

[0073] In the embodiments of the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0074] The present invention provides the following preferred embodiments:

[0075] Embodiment 1

[0076] In order to solve the high cost problem caused by the separation of APFC and soft switching topology in traditional power converters, this embodiment provides an integrated power conversion topology circuit based on APFC and AHB. The integrated power conversion topology circuit based on APFC and AHB of the present invention integrates APFC function and AHB soft switching topology, achieving the goals of circuit simplification and cost reduction.

[0077] like Figures 1 to 4 As shown, the power conversion topology circuit includes:

[0078] The AC source AC1 is rectified into a half-sine wave voltage by a bridge rectifier BR1 and a filter capacitor C1;

[0079] An energy storage inductor L1 is connected in series with the second switch tube Q2, and when the second switch tube Q2 is turned on, the energy storage inductor L1 is charged and stored through the first diode D1;

[0080] The first switch tube Q1 is connected in series with the output filter capacitor C2 and connected in parallel to the loop, and realizes zero voltage switching by setting the dead time;

[0081] A transformer T1, wherein the primary winding NP is coupled to the output filter capacitor C2 via a coupling capacitor C3, and the secondary winding NS of the transformer T1 is rectified and filtered via a second diode D2 and an output filter capacitor C4 to generate an output voltage VOUT; and

[0082] The third diode D3 is connected in parallel with the filter capacitor C1 through the energy storage inductor L1 and is used to clamp the reverse voltage at -1V to ensure circuit stability.

[0083] Specifically, the AC source AC1 is rectified into a half-sine wave voltage through the bridge rectifier BR1 and the filter capacitor C1. This process is the first step of power conversion and provides a basis for the subsequent APFC function. It should be understood that the capacitance of the filter capacitor C1 can be optimized according to parameters such as input voltage and power.

[0084] Furthermore, the energy storage inductor L1 is connected in series with the second switch tube Q2. When the second switch tube Q2 is turned on, the energy storage inductor L1 is charged and stored through the first diode D1. This design realizes the functional part of APFC, such as Figure 3 As shown, the 4-channel waveform is the input current waveform. The current envelope is sinusoidal and in phase with the voltage waveform (1 channel) of the input AC source, which proves that the APFC active power factor correction function is realized. By controlling the charging and discharging process of the energy storage inductor, the input current waveform can be made approximately sinusoidal, thereby improving the power factor.

[0085] Furthermore, the first switch tube Q1 is connected in series with the output filter capacitor C2 and connected in parallel to the loop. By setting an appropriate dead time, the first switch tube Q1 can achieve zero voltage switching ZVS, such as Figure 4 As shown, channel 3 is the DS waveform of the lower tube of the half-bridge switch tube, and channel 2 is the drive of the tube, which proves that the switch tube is turned on at zero voltage, realizing the ZVS of the switch tube. It can be understood that the ZVS technology can significantly reduce switching losses and improve power conversion efficiency.

[0086] Furthermore, the primary winding NP of the transformer T1 is coupled to the output filter capacitor C2 through the coupling capacitor C3. The secondary winding NS of the transformer T1 is rectified and filtered through the second diode D2 and the output filter capacitor C4, and finally a stable output voltage VOUT is generated. This design realizes voltage isolation and conversion, and the introduction of the coupling capacitor C3 helps to optimize the energy transmission efficiency.

[0087] Furthermore, the third diode D3 is connected in parallel with the filter capacitor C1 through the energy storage inductor L1. Its main function is to clamp the reverse voltage at about -1V to ensure the stable operation of the circuit. This design effectively prevents the potential damage of the reverse voltage spike to the circuit components.

[0088] The benefit of this embodiment is that by integrating the APFC function and the AHB soft switching topology into one circuit, the circuit structure is significantly simplified, the number of components is reduced, and the cost of the power converter is reduced. At the same time, the application of ZVS technology improves power efficiency and reduces electromagnetic interference. In addition, the use of a single PWM control signal simplifies the control strategy and EMI filter design.

[0089] Embodiment 2

[0090] In order to solve the problems of complex circuit structure and high cost of traditional APFC and AHB power converters, this embodiment further refines the working process of the integrated power conversion topology circuit based on APFC and AHB to make it more efficient and stable.

[0091] In this embodiment, the working process of the circuit is divided into two switching cycles, which handle different charging and energy storage tasks respectively. In the first switching cycle, the second switch tube Q2 is turned on, and the first diode D1 charges and stores energy through the energy storage inductor L1. When the second switch tube Q2 is turned off, the induced voltage of the energy storage inductor L1 is superimposed on the voltage on the filter capacitor C1, and the output filter capacitor C2 is charged and stored through the first diode D1 and the body diode of the first switch tube Q1. Subsequently, the first switch tube Q1 is turned on to achieve zero voltage switching ZVS, further reducing loop losses. This process utilizes the interaction between inductance and capacitance to accurately control the transfer and storage of electrical energy.

[0092] It should be understood that the second switching cycle begins after the first switching cycle ends. When the first switch tube Q1 is turned off, the second switch tube Q2 is turned on after the dead time, repeating the energy storage process of the energy storage inductor L1 in the first switching cycle. At the same time, the primary winding NP of the transformer T1 stores energy through the coupling capacitor C3 and the voltage stored on the output filter capacitor C2. After the energy storage is completed, the second switch tube Q2 is turned off, and the energy storage inductor L1 and the primary winding NP of the transformer T1 are in reverse phase, so that the body diode of the first switch tube Q1Q1 is turned on, and the first switch tube Q1Q1 is turned on again after the dead time to achieve zero voltage ZVS. This process not only repeats the charging and energy storage of the output filter capacitor C2, but also utilizes the primary winding and leakage inductance characteristics of the transformer T1 to clamp and magnetically reset through the coupling capacitor C3, so that the electric energy can be efficiently transmitted.

[0093] It should be understood that the energy stored in the transformer T1 is coupled through the secondary winding NS, and after being rectified and filtered by the second diode D2 and the output filter capacitor C4, a stable DC output voltage VOUT is generated. The capacitance range of these filter capacitors needs to take into account the power requirements in the actual application and be optimized to ensure a smooth and stable output voltage.

[0094] It can be understood that by accurately setting the dead time, the first switch tube Q1 and the second switch tube Q2 can achieve zero voltage conduction after being turned off. This design greatly reduces switching losses and improves power conversion efficiency. At the same time, the dead time control of the second switch tube Q2 not only enables it to repeat the energy storage process in the first switching cycle, but also enables the primary winding of the transformer T1 and its leakage inductance to better achieve magnetic reset during operation, ensuring efficient and stable energy transfer.

[0095] Furthermore, this embodiment optimizes the setting of the dead time so that it can adapt to the current changes under different working conditions. Specifically, when the first switch tube Q1 is turned off, the primary winding of the transformer T1 is reversed, so that the body diode of the second switch tube Q2 is turned on, and the second switch tube Q2 can also achieve zero voltage conduction after the dead time. This process is repeated to achieve the integrated power conversion of APFC and AHB, and realize the full ZVS soft switching process of the switch tube.

[0096] The benefit of this embodiment is that by adopting a precise switch control strategy, efficient power factor correction APFC and asymmetric half-bridge AHB power conversion are achieved. The extensive application of ZVS soft switching technology further improves the conversion efficiency of the power supply, reduces the operating temperature and electromagnetic interference, and improves the overall performance of the power converter. At the same time, the precise control of the dead time and the switch tube in the circuit enables this embodiment to provide an efficient, stable and reliable power conversion solution in a variety of application scenarios.

[0097] Embodiment 3

[0098] In order to solve the problems of high switching loss and low conversion efficiency in traditional power converters, this embodiment further optimizes the switch control strategy and circuit connection method in the integrated power conversion topology circuit based on APFC and AHB, and realizes high-efficiency zero voltage switching ZVS operation.

[0099] In this embodiment, a method of accurately controlling the dead time is adopted to achieve zero voltage switching of the first switch tube Q1 and the second switch tube Q2. This control strategy can significantly reduce switching losses and improve power conversion efficiency. It should be understood that the setting of the dead time needs to consider factors such as the characteristics of the switch tube, circuit parameters, and load conditions. In practical applications, the optimal dead time can be determined through experimental testing or simulation analysis to achieve the optimal ZVS effect.

[0100] Furthermore, this embodiment optimizes the connection mode of the switch tube. The drain of the first switch tube Q1 is connected to the positive electrode of the output filter capacitor C2, and the negative electrode of the filter capacitor C2 is grounded; the source of the second switch tube Q2 is grounded, and the drain is connected to the source of the first switch tube Q1. This connection mode enables the first switch tube Q1 to effectively control the charging and discharging process of the output filter capacitor C2. At the same time, the source of the second switch tube Q2 is connected to the negative electrode of the filter capacitor C1, and the drain is connected to one end of the energy storage inductor L1. This connection mode enables the second switch tube Q2 to accurately control the charging and discharging process of the energy storage inductor L1, thereby achieving effective power factor correction.

[0101] Furthermore, this embodiment controls the on and off of the first switch tube Q1 and the second switch tube Q2 through complementary PWM control signals. The rising edge of the PWM control signal triggers the on-state of the first switch tube Q1, and the falling edge triggers the on-state of the second switch tube Q2. This control method simplifies the control circuit, reduces the control complexity, and also reduces possible control signal interference. It is understandable that the frequency and duty cycle of the PWM control signal can be adjusted according to actual application requirements to achieve the best power conversion effect.

[0102] Furthermore, in this embodiment, dead time is set between the first switch tube Q1 being turned off and the second switch tube Q2 being turned on, and between the second switch tube Q2 being turned off and the first switch tube Q1 being turned on. The setting of these dead times enables the switch tube to be turned on at zero voltage or close to zero voltage, thereby greatly reducing switching losses and improving conversion efficiency. It should be noted that the setting of the dead time requires a balance between the relationship between switching losses and conduction losses. Too long a dead time may lead to increased conduction losses, while too short a dead time may not achieve effective ZVS.

[0103] Furthermore, the control circuit of this embodiment can be implemented using a digital controller or an analog controller. A digital controller, such as a DSP or FPGA, can provide a more flexible control strategy and a more accurate dead time adjustment, while an analog controller may have a lower cost and a faster response speed. The choice of controller needs to be determined according to the specific application scenario and performance requirements.

[0104] Furthermore, in order to improve the reliability of ZVS, this embodiment can add an auxiliary inductor or capacitor network to the circuit. These auxiliary components can help form more ideal switching conditions to ensure effective ZVS operation under various load conditions. At the same time, it is possible to consider using an adaptive dead time control algorithm to dynamically adjust the dead time according to the circuit parameters detected in real time to adapt to the optimal ZVS conditions under different working conditions.

[0105] The benefit of this embodiment is that by accurately controlling the dead time and optimizing the switch tube connection mode, efficient zero voltage switching operation is achieved. The use of a single PWM control signal simplifies the control circuit and improves the reliability of the system. This design not only reduces switching losses and improves power conversion efficiency, but also reduces electromagnetic interference EMI and improves the overall performance of the power converter.

[0106] Embodiment 4

[0107] In order to solve the problem that the asymmetric half-bridge AHB and active power factor correction APFC functions in traditional power converters are difficult to integrate efficiently, this embodiment further optimizes the control strategy and circuit design of the integrated power conversion topology circuit based on APFC and AHB to achieve a more efficient and flexible power conversion solution.

[0108] Furthermore, this embodiment realizes the asymmetric half-bridge AHB function by accurately adjusting the on-time ratio of the first switch tube Q1 and the second switch tube Q2. Specifically, the on-time of the first switch tube Q1 accounts for 99%-40% of the total switching cycle, while the on-time of the second switch tube Q2 accounts for 1%-60% of the total switching cycle. This asymmetric control strategy can effectively expand the operating range of the transformer and improve the adaptability of the power converter under different input voltage and load conditions. It should be understood that the specific selection of the on-time ratio needs to be optimized according to factors such as the actual application scenario, input voltage range and load characteristics. In practical applications, the on-time ratio can be dynamically adjusted to adapt to different working conditions, thereby achieving optimal conversion efficiency.

[0109] Furthermore, this embodiment achieves the purpose of active power factor correction APFC by precisely controlling the charging and discharging process of the energy storage inductor L1 and using the inductor in the discontinuous mode with equal conduction time to realize the sinusoidal waveform of the input current. One end of the energy storage inductor L1 is connected to the positive electrode of the bridge rectifier BR1, and the other end is connected to the drain of the second switch tube Q2 and the anode of the first diode D1. This connection method enables the energy storage inductor L1 to store energy when the second switch tube Q2 is turned on, and release energy to the output end when the second switch tube Q2 is turned off, thereby realizing the continuous conduction mode CCM of the input current. It can be understood that the selection of the inductance value of the energy storage inductor L1 has a direct impact on the performance of APFC. The selection of the inductance value needs to comprehensively consider factors such as the input voltage range, output power, switching frequency, and desired current ripple.

[0110] Furthermore, in order to optimize the design of the energy storage inductor L1, the following formula can be used for preliminary calculation:

[0111]

[0112] Among them, V in_min is the minimum input voltage, D is the maximum duty cycle, f s is the switching frequency, P in is the input power, ΔI L % is the expected current ripple percentage. The inductance value calculated by this formula can be used as the starting point of the design, and then further optimized through simulation and experiment. In practical applications, materials such as magnetic powder core or sendust core can be selected to make the energy storage inductor L1 to obtain good high-frequency characteristics and lower losses.

[0113] Furthermore, the control circuit of this embodiment can use a digital controller such as a DSP or an MCU to implement a complex control algorithm. The controller can monitor the input voltage, output voltage and current in real time, and dynamically adjust the on-time ratio of the first switch tube Q1 and the second switch tube Q2 according to these parameters, and optimize the APFC control strategy. In addition, the controller can also implement safety functions such as soft start, overvoltage protection, and overcurrent protection to improve the reliability of the power converter.

[0114] Furthermore, in order to improve the performance of APFC, this embodiment can introduce feedforward compensation and current prediction control into the control algorithm. Feedforward compensation can quickly adjust the control parameters according to the change of input voltage, thereby improving the dynamic response capability of the system. Current prediction control can predict the current value of the next switching cycle according to the current circuit state, thereby achieving more accurate current control and reducing current distortion. This advanced control strategy can reduce the total harmonic distortion THD of the input current to less than 5% and increase the power factor to more than 0.99.

[0115] Furthermore, the present embodiment may also consider adding an auxiliary winding to the circuit to provide power for the control circuit and realize bootstrap power supply. This design can simplify the power supply system and improve the overall efficiency. At the same time, the auxiliary winding can also be used to realize synchronous rectification to further improve the conversion efficiency. In practical applications, a suitable synchronous rectification MOSFET can be selected, such as a device with low on-resistance and fast switching characteristics, to maximize the effect of synchronous rectification.

[0116] The benefit of this embodiment is that by optimizing the asymmetric half-bridge control strategy and the energy storage inductor design, efficient integration of APFC and AHB functions is achieved. This design not only improves the power factor of the power converter and reduces the input current harmonics, but also expands the operating range of the transformer, and improves the adaptability and efficiency of the system. At the same time, the design of this embodiment has strong flexibility and can adapt to different application requirements by adjusting the control parameters, providing a reliable technical solution for various high-efficiency, high-power factor power supply applications. Through the implementation of this embodiment, high-efficiency DC-DC conversion and high-performance power factor correction can be achieved simultaneously in a single topology, providing strong support for the miniaturization and high efficiency of modern power electronic systems.

[0117] Embodiment 5

[0118] In order to solve the adaptability problem of the integrated power conversion topology circuit based on APFC and AHB under different output voltage requirements, and to optimize the parameter selection of each key component in the circuit, this embodiment further refines the design scheme of the transformer winding ratio and each capacitor parameter.

[0119] Furthermore, the voltage waveform between the primary winding NP and the secondary winding NS is adjusted by the coupling capacitor C3, and the capacitance C3 of the coupling capacitor C3 is determined as follows:

[0120] Where ω is the angular frequency of the switching frequency, L T is the leakage inductance value of the transformer. It can be understood that the coupling capacitor C3 plays the role of energy transfer and isolation in the circuit. Therefore, it is necessary to balance the energy transfer efficiency and isolation effect when selecting. A larger coupling capacitor can improve the energy transfer efficiency, but may reduce the isolation effect; a smaller coupling capacitor can provide better isolation effect, but may limit energy transfer. In practical applications, the optimal coupling capacitor value can be determined through simulation and experiment to achieve the best balance between energy transfer efficiency and isolation effect.

[0121] Furthermore, in order to further optimize the circuit performance, for the filter capacitor C1 and the coupling capacitor C3, a film capacitor or a ceramic capacitor with low ESR and high frequency characteristics can be selected. For the output filter capacitor C2 and the output filter capacitor C4, a low ESR aluminum electrolytic capacitor or a solid electrolytic capacitor can be selected to improve the ripple suppression capability and reliability.

[0122] Furthermore, this embodiment may also consider adding a temperature compensation network in the circuit to deal with the problem of capacitance parameters changing with temperature. For example, a resistor or thermistor with a positive temperature coefficient may be added at a key node to compensate for the tendency of capacitance parameters to decrease with increasing temperature, thereby maintaining the stability of the circuit at different temperatures.

[0123] The benefit of this embodiment is that by optimizing the design of transformer winding ratio and capacitor parameters, the flexibility and adaptability of the power conversion topology circuit are improved. Reasonable winding ratio design enables the circuit to meet various output voltage requirements, and the optimized capacitor parameter selection ensures that the circuit can maintain good performance under various working conditions. Through the implementation of this embodiment, not only the efficiency and stability of the power converter are improved, but also its applicability in different application scenarios is enhanced.

[0124] Embodiment 6

[0125] In order to solve the efficiency and stability problems of the integrated power conversion topology circuit based on APFC and AHB under load variation conditions and to improve the safety and reliability of the circuit, this embodiment further optimizes the control algorithm and introduces a protection mechanism and a soft start function.

[0126] Furthermore, this embodiment designs an adaptive control algorithm for dynamically adjusting the duty cycle of the PWM control signal according to load changes, thereby optimizing circuit efficiency and stability. The core idea of ​​the control algorithm is to calculate the current output power by real-time monitoring of the output voltage VOUT and the output current IOUT, and adjust the duty cycle of the PWM signal according to the output power, so that the circuit always operates at the optimal efficiency point. It should be understood that this adaptive control method can effectively cope with load changes and input voltage fluctuations, and maintain high-efficiency operation of the circuit.

[0127] Furthermore, the specific implementation steps of the control algorithm are as follows: First, detect the output voltage VOUT and the output current IOUT, and calculate the current output power POUT = VOUT × IOUT. Then, according to the current output power, use a pre-established lookup table or interpolation method to determine the optimal duty cycle Dopt. This lookup table or interpolation function can be obtained through a large amount of experimental data or theoretical analysis, which reflects the optimal operating point under different output powers. Next, calculate the deviation ΔD between the current duty cycle and the optimal duty cycle = D current -Dopt , and use the PI controller to calculate the duty cycle adjustment:

[0128] ΔD adj =K p ∫ΔD+K i ∫ΔDdt

[0129] Where Kp is the proportional coefficient and Ki is the integral coefficient. It can be understood that the parameter selection of the PI controller directly affects the response speed and stability of the control system and needs to be optimized according to the actual system characteristics.

[0130] Furthermore, the algorithm updates the duty cycle D of the PWM control signal new =D current +ΔD adj The updated duty cycle is limited to a valid range, such as 30% to 70%. This limitation can prevent circuit abnormalities caused by excessive or insufficient duty cycle. Finally, the updated duty cycle is applied to the PWM controller, and the above process is repeated periodically to achieve real-time regulation of the system.

[0131] Furthermore, in order to improve the robustness and adaptability of the algorithm, it is possible to consider introducing an adaptive PI parameter adjustment mechanism. For example, the Kp and Ki values ​​can be dynamically adjusted according to the magnitude and speed of the load change. When the load changes rapidly, Kp is increased to increase the response speed, and when the load is stable, Ki is increased to reduce the steady-state error. In addition, it is also possible to consider introducing feedforward control to pre-adjust the duty cycle according to the change of the input voltage to further improve the dynamic response capability of the system.

[0132] Furthermore, this embodiment also introduces an overcurrent protection mechanism. When it is detected that the output current IOUT exceeds the preset threshold, the first switch tube Q1 and the second switch tube Q2 are immediately turned off, and restarted with a delay. This protection mechanism can effectively prevent the circuit from being damaged due to short circuit or overload. It is understandable that the setting of the overcurrent protection threshold needs to comprehensively consider the rated power of the circuit, the tolerance of the components, and the actual application requirements. In actual implementation, a fast-response current detection circuit, such as a Hall current sensor or a precision shunt resistor, can be used to ensure that the overcurrent condition can be detected in time.

[0133] Furthermore, the present embodiment also designs a soft start mechanism. When the circuit is powered on, the duty cycle of the PWM control signal starts from 0 and gradually increases to a normal operating value according to a preset slope to avoid a large current shock at the start-up moment. This soft start mechanism can effectively protect circuit components and extend the life of the system. It is understandable that the selection of the soft start slope requires a balance between the start-up time and the current shock suppression effect. In practical applications, the optimal soft start parameters can be determined through experiments based on circuit characteristics and load requirements.

[0134] Furthermore, in order to further improve the reliability of the system, this embodiment may also consider introducing a temperature protection mechanism. For example, a temperature sensor may be set near key components such as switch tubes and transformers. When the temperature is detected to exceed the safety threshold, the system operating frequency is reduced or the system is temporarily shut down to prevent overheating damage.

[0135] The benefit of this embodiment is that, by implementing an adaptive control algorithm, the efficiency and stability of the power conversion topology circuit under different load conditions are significantly improved. At the same time, the introduced overcurrent protection and soft start mechanism enhance the safety and reliability of the circuit.

[0136] Embodiment 7

[0137] In order to solve the problem of output voltage stability and precise control in the integrated power conversion topology circuit based on APFC and AHB, this embodiment further optimizes the design of the output voltage feedback control loop to achieve precise regulation and rapid response of the output voltage.

[0138] Furthermore, this embodiment designs a complete output voltage feedback control loop, which accurately adjusts the output voltage VOUT by adjusting the duty cycle of the PWM control signal. The control loop continuously compares the actual output voltage with the expected voltage to generate a corresponding PWM control signal, thereby achieving closed-loop control of the output voltage. It should be understood that this closed-loop control method can effectively suppress the impact of load changes and input voltage fluctuations on the output voltage, and ensure the stability of the power supply output.

[0139] Furthermore, the voltage sampling circuit uses a voltage divider resistor network to sample the output voltage VOUT. It can be understood that the selection of the voltage divider resistor directly affects the sampling accuracy and power consumption. Generally, a thin film resistor with an accuracy of 0.1% or higher can be selected as a voltage divider resistor to ensure the sampling accuracy. At the same time, the design of the voltage divider ratio needs to consider the input voltage range of the subsequent error amplifier. For example, if the reference voltage of the error amplifier is 2.5V and the output voltage is 12V, the voltage divider ratio can be designed to be 5:1. In addition, a small-capacitance ceramic capacitor, such as 100pF, can be connected in parallel in the voltage divider network to filter out high-frequency noise and improve the quality of the sampled signal.

[0140] Furthermore, the error amplifier compares the sampled voltage with the reference voltage and outputs an error signal. The selection of the error amplifier needs to consider parameters such as its bandwidth, open-loop gain, and input bias current. You can choose an integrated programmable precision reference source and error amplifier such as TL431, or use a high-precision operational amplifier such as OPA277 with a precision reference voltage source such as REF3025 to build an error amplifier circuit. In actual design, a compensation network, such as a type III compensation network, can be added to the feedback loop of the error amplifier to optimize the frequency response characteristics of the system and improve the stability and dynamic response capability of the control loop.

[0141] Further, the PWM comparator compares the error signal with the triangle wave to generate a PWM control signal. The frequency of the triangle wave generator directly determines the switching frequency, which can usually be selected in the range of 50kHz to 500kHz, depending on power requirements and efficiency considerations. The PWM comparator can use a high-speed comparator such as LM311 or the newer LMV7219 to ensure accurate timing and low jitter of the PWM signal. It should be noted that the selection of the PWM comparator should take into account parameters such as its bandwidth, propagation delay, and output rise / fall time to ensure normal operation at the selected switching frequency.

[0142] Further, the drive circuit converts the PWM control signal into the level and timing for driving the first switch tube Q1 and the second switch tube Q2. Considering the particularity of the AHB topology, the drive circuit needs to be able to provide isolation and level conversion functions. An integrated half-bridge driver IC, such as IR2110 or the newer Si8233, can be selected. These drivers have built-in bootstrap circuits that can directly drive high-side and low-side MOSFETs. In practical applications, it may be necessary to add small-value resistors and fast recovery diodes at the output of the drive circuit to control the switching speed of the switch tube, suppress parasitic oscillations, and improve EMI performance.

[0143] Furthermore, in order to further improve the reliability and performance of the system, the present embodiment may also consider the following optimization measures:

[0144] 1. Introduce dead-time control in the PWM control signal generation circuit to prevent direct short circuit caused by simultaneous conduction of high-side and low-side switch tubes. The dead-time can be optimized according to the switching characteristics of the selected MOSFET, usually in the range of tens to hundreds of nanoseconds.

[0145] 2. Introduce feedforward compensation in the control loop to pre-adjust the PWM duty cycle according to the change of input voltage and improve the system's response speed to input voltage changes.

[0146] 3. Use digital control technology, such as using a microcontroller or digital signal processor to implement the control algorithm, which can more flexibly implement complex control strategies such as adaptive control and predictive control.

[0147] 4. Add an overvoltage protection function to the voltage sampling circuit. When it is detected that the output voltage exceeds the safety threshold, the switch tube is immediately turned off to protect the subsequent circuit.

[0148] The benefit of this embodiment is that, through a carefully designed output voltage feedback control loop, accurate regulation and rapid response of the output voltage are achieved. At the same time, by selecting high-performance components and optimizing circuit design, the stability and reliability of the system are improved. Through the implementation of this embodiment, not only the performance of the power converter is improved, but also its adaptability in various application scenarios is enhanced, providing a technical solution for modern power electronic systems.

[0149] Embodiment 8

[0150] In order to optimize the performance and reliability of the integrated power conversion topology circuit based on APFC and AHB, the present embodiment further improves the position of the coupling capacitor C3 and improves the energy transmission efficiency and circuit stability by adjusting the circuit topology.

[0151] Specifically, the present embodiment changes the position of the coupling capacitor C3. In the new topology, the coupling capacitor C3 is connected in series between the positive electrode of the output filter capacitor C2 and the primary winding NP. It should be understood that this topology change maintains the basic working principle and function of the original circuit.

[0152] Furthermore, the design of directly connecting the coupling capacitor C3 to the primary winding NP enables the coupling capacitor C3 to bear part of the voltage stress during the energy transmission process. It is understandable that this setting helps to reduce the voltage stress of the first switch tube Q1, especially at the switching moment. Since the coupling capacitor is connected in series with the primary winding, they share the voltage fluctuation during the switching process, thereby reducing the peak voltage of the switch tube and improving the stability of the circuit.

[0153] Furthermore, this topology also improves the efficiency of energy transmission. After the coupling capacitor C3 is connected in series with the primary winding NP, a resonant circuit is formed. During the switching process, this resonant circuit can achieve soft switching and reduce switching losses. It can be understood that soft switching technology can significantly reduce the electromagnetic interference EMI at the switching moment and improve the overall efficiency of the circuit.

[0154] Furthermore, in order to give full play to the advantages of this new topology, the coupling capacitor C3 can use ceramic capacitors or film capacitors with high quality factor Q value in practical applications. For example, NPO type ceramic capacitors or polypropylene film capacitors can be selected. These capacitors have the advantages of low loss and good high-frequency characteristics, and can maintain stable performance in high-frequency switching environments. The selection of capacitance value needs to match the inductance value of the primary winding to achieve the best resonance effect. Usually, the optimal capacitance value can be determined by combining simulation and experiment.

[0155] Furthermore, this change in topology also affects the EMI characteristics of the circuit. Since the coupling capacitor is connected in series with the primary winding, they together form a filtering network that can effectively suppress the propagation of high-frequency noise. It can be understood that this built-in filtering effect helps to reduce the electromagnetic interference level of the circuit and reduce the dependence on external EMI filters, thereby simplifying the overall circuit design.

[0156] Furthermore, in order to further optimize the performance of this new topology, it is possible to consider adding a small inductor in the series branch between the coupling capacitor C3 and the primary winding NP. This additional inductor can form an LLC resonant network with the coupling capacitor, further enhancing the soft switching effect and widening the soft switching operating range. The selection of the inductor value needs to consider the switching frequency and load range, which can usually be obtained through simulation optimization.

[0157] Furthermore, this topology change also provides a new solution for the circuit control strategy. For example, the resonance characteristics formed by the coupling capacitor and the primary winding can be used to achieve frequency modulation control. By adjusting the switching frequency, energy transfer can be controlled more flexibly to adapt to different load conditions. This control method can be combined with traditional PWM control to form a hybrid control strategy to further improve the adaptability and efficiency of the circuit.

[0158] The benefit of this embodiment is that by changing the position of the coupling capacitor C3, the topology of the circuit is optimized, which not only improves the energy transmission efficiency, but also improves the EMI characteristics and reliability of the circuit. This innovative topology design provides new performance improvement space for the integrated power conversion circuit based on APFC and AHB, making it have better performance in terms of high efficiency, low EMI and high reliability.

[0159] Embodiment 9

[0160] In order to further optimize the performance and efficiency of the integrated power conversion topology circuit based on APFC and AHB, this embodiment improves the connection method of the circuit and introduces a reverse polarity connection structure, thereby achieving circuit characteristics equivalent to those in Example 1, but with two different implementation methods.

[0161] Furthermore, this embodiment adjusts the connection mode of the energy storage inductor L1, the bridge rectifier BR1, the second switch tube Q2 and the first diode D1. In the new topological structure, the output terminal 3 of the bridge rectifier (BR1) serves as the first connection point, and the output terminal 4 serves as the second connection point; the first end of the filter capacitor (C1), the anode of the third diode (D3), the drain of the first switch tube (Q1), the positive electrode of the output filter capacitor (C2) and the first end of the primary winding (NP) are all connected to the first connection point; the second end of the filter capacitor (C1) and the first end of the energy storage inductor (L1) are all connected to the second connection point; the second end of the energy storage inductor (L1) serves as The third connection point, the cathode of the first diode (D1) and the cathode of the third diode (D3) are both connected to the third connection point; the anode of the first diode (D1) serves as the fourth connection point, the source of the first switch tube (Q1), the drain of the second switch tube (Q2) and the first end of the coupling capacitor (C3) are all connected to the fourth connection point, and the second end of the coupling capacitor (C3) is connected to the second end of the primary winding (NP); the source of the second switch tube (Q2) and the negative electrode of the output filter capacitor (C2) are both grounded. It can be understood that this connection method changes the charging and discharging path of the energy storage inductor, but still maintains the basic working principle of the circuit. It should be understood that this reverse polarity connection has an impact on the performance and characteristics of the circuit.

[0162] Specifically, the connection mode of the first diode D1 forms a new energy transmission path. It is understandable that this reverse polarity connection structure changes the flow direction of the current, but does not affect the basic function and working principle of the circuit. It is also a different implementation method and should belong to the protection scope of the present invention.

[0163] Furthermore, the primary winding NP of transformer T1 maintains the same connection mode as the original circuit. This design ensures that the working mode of the AHB part is not affected, while allowing the improvement of the APFC part to be combined with the original advantages of the AHB part. It can be understood that keeping the primary winding connection of the transformer unchanged can maximize the advantages of the original circuit, while achieving performance improvement through improvements in other parts.

[0164] Furthermore, this reverse polarity connection structure has a positive effect on the EMI characteristics of the circuit. Since the energy storage inductor L1 is directly connected to the bridge rectifier BR1, the intermediate connection points are reduced, and the influence of parasitic capacitance and parasitic inductance is reduced. This design helps to suppress the generation and propagation of high-frequency noise, thereby improving the electromagnetic compatibility of the circuit. In practical applications, ferrite beads or common-mode inductors can be considered to further optimize EMI performance.

[0165] Furthermore, in order to fully utilize the advantages of this new topology, it is necessary to select components and optimize parameters. For example, the selection of energy storage inductor L1 needs to consider its operating characteristics under reverse polarity connection. Low-loss, high-saturation current iron powder core or sendust core inductor can be selected to adapt to the new working mode. The selection of inductance value requires a balance between ripple current and inductor volume, and the optimal value can usually be determined by combining simulation and experiment.

[0166] Furthermore, the selection of the second switch tube Q2 also needs to adapt to the new topology. Since it undertakes the main switching function, it can be considered to use a super junction MOSFET or SiC MOSFET with low on-resistance and fast switching characteristics. These advanced semiconductor devices can effectively reduce switching losses and improve the overall efficiency of the circuit. At the same time, attention should also be paid to the gate drive circuit design of the switch tube to ensure fast and reliable switching operation under the new topology.

[0167] Furthermore, in order to further optimize the circuit performance, it is possible to consider adding an absorption circuit with a small damping resistor and a capacitor in parallel at the connection point between the energy storage inductor L1 and the second switch tube Q2. This absorption circuit can effectively suppress the voltage spike at the switching moment, protect the switch tube from overvoltage damage, and also help improve EMI performance. The values ​​of the resistor and capacitor need to be optimized according to the switching frequency and power level of the circuit.

[0168] Furthermore, this reverse polarity connection structure provides a new control strategy for the circuit. For example, more accurate current control and power factor correction can be achieved by monitoring the voltage across the energy storage inductor L1. This method can be combined with traditional current sampling technology to form a hybrid control strategy to further improve the dynamic response capability and stability of the circuit.

[0169] The benefit of this embodiment is that, by introducing the reverse polarity connection structure, the topological design of the circuit is optimized, and the EMI characteristics and dynamic response capability of the circuit are improved. Through the implementation of this embodiment, the needs of various application scenarios can be better met, and it is particularly suitable for high-end power supply systems with strict requirements on efficiency and EMI performance.

[0170] Embodiment 10

[0171] In order to further improve the performance of the integrated power conversion topology circuit based on APFC and AHB, this embodiment has carried out dual optimization of the circuit structure. It not only adopts reverse polarity connection, but also adjusts the position of the coupling capacitor C3. The performance of the power conversion topology circuit in the aforementioned embodiment is equivalent to that of the power conversion topology circuit in the aforementioned embodiment, and belongs to a different implementation mode. Therefore, it should fall within the scope of protection of the present invention.

[0172] Specifically, the position of the coupling capacitor C3 is also adjusted in this embodiment. In the new topology, the coupling capacitor C3 is connected between the primary winding NP and the negative electrode of the output filter capacitor C2. This design introduces the coupling capacitor C3 into the energy transmission path to form a resonant network. It can be understood that this configuration can realize soft switching technology, reduce switching losses, and improve the EMI characteristics of the circuit.

[0173] Furthermore, the coupling capacitor C3 in this embodiment directly participates in the energy transmission of the main circuit, so it is necessary to pay attention to its quality factor and withstand voltage characteristics. It is possible to consider using high-quality polypropylene film capacitors or ceramic capacitors, which have the advantages of low equivalent series resistance ESR and good high-frequency characteristics. The selection of the capacitance value needs to match the inductance of the primary winding to achieve the best resonance effect and soft switching performance.

[0174] Furthermore, the selection of switch tubes also needs to adapt to the new topology. For the first switch tube Q1 and the second switch tube Q2, a new generation of wide bandgap semiconductor devices, such as GaN HEMT or SiC MOSFET, can be considered. These devices have low on-resistance, fast switching characteristics and high temperature working ability, which can give full play to the advantages of the new topology and further improve the efficiency and power density of the circuit.

[0175] Furthermore, in order to optimize the control performance of the circuit, it is possible to consider introducing an adaptive algorithm into the control strategy. For example, the frequency and duty cycle of the PWM signal can be dynamically adjusted according to the load conditions and changes in the input voltage to achieve the optimal operating point. This adaptive control can be implemented through a digital signal processor DSP or a field programmable gate array FPGA, thereby improving the flexibility and adaptability of the circuit.

[0176] Furthermore, in order to further improve the reliability of the circuit, protection circuits can be added at key nodes. For example, overvoltage protection and undervoltage lockout functions are added to the gate drive circuits of the first switch tube Q1 and the second switch tube Q2 to prevent the switch tubes from being damaged due to abnormal driving voltage. At the same time, overcurrent protection and short-circuit protection circuits can be added at the output end to ensure the safety of the circuit under abnormal working conditions.

[0177] The benefit of this embodiment is that by combining the reverse polarity connection and the optimization of the coupling capacitor position, the circuit performance is comprehensively improved. This innovative design not only improves the energy conversion efficiency, but also improves the dynamic response capability and EMI characteristics of the circuit. Through the implementation of this embodiment, a new solution is provided for high-performance power supply systems, which is particularly suitable for application scenarios with high requirements for efficiency, power density and reliability, such as data centers, electric vehicle charging systems and other fields.

Claims

1. An integrated power conversion topology circuit based on APFC and AHB, characterized in that: The power conversion topology circuit comprises: An AC source (AC1) which is rectified into a half-sine wave voltage by a bridge rectifier (BR1) and a filter capacitor (C1); An energy storage inductor (L1) is connected in series with a second switch tube (Q2), and when the second switch tube (Q2) is turned on, the energy storage inductor (L1) is charged and stored with energy through a first diode (D1); A first switch tube (Q1) is connected in series with an output filter capacitor (C2) and connected to a loop, and realizes zero voltage switching by setting a dead time; A transformer (T1), wherein a primary winding (NP) is coupled to the output filter capacitor (C2) via a coupling capacitor (C3), and a secondary winding (NS) of the transformer (T1) is rectified and filtered via a second diode (D2) and an output filter capacitor (C4) to generate an output voltage (VOUT); and a third diode (D3), which is connected in parallel with the filter capacitor (C1) through the energy storage inductor (L1) and is used to clamp the reverse voltage at -1V to ensure circuit stability.

2. The integrated power conversion topology circuit based on APFC and AHB according to claim 1, characterized in that: The working process of the power conversion topology circuit includes a first switching cycle and a second switching cycle; The steps of the first switching cycle include: The second switch tube (Q2) is turned on, and the first diode (D1) charges the energy storage inductor (L1) to store energy; The second switch tube (Q2) is turned off, the induced voltage of the energy storage inductor (L1) is superimposed on the voltage on the filter capacitor (C1), and the output filter capacitor (C2) is charged and stored with energy through the first diode (D1) and the first switch tube (Q1); The first switch tube (Q1) is turned on after the dead time to reduce loop loss; The steps of the second switching cycle include: The first switch tube (Q1) is turned off, and the second switch tube (Q2) is turned on after the dead time, and the energy storage process of the energy storage inductor (L1) is repeated, and at the same time, the primary winding (NP) is coupled to the voltage stored on the output filter capacitor (C2) through the coupling capacitor (C3) to store energy; The second switch tube (Q2) is turned off, the energy storage inductor (L1) and the primary winding (NP) are in reverse phase, and the first switch tube (Q1) is turned on at zero voltage; The energy storage inductor (L1) repeats the charging and energy storage process of the output filter capacitor (C2), and the primary winding (NP) and the leakage inductance are clamped and magnetically reset through the coupling capacitor (C3); The energy stored in the transformer (T1) is coupled through the secondary winding (NS), and is rectified and filtered by the second diode (D2) and the output filter capacitor (C4) to output an output voltage (VOUT); After the energy is released, the first switch tube (Q1) is turned off, the primary winding (NP) is reversed, and the second switch tube (Q2) is turned on at zero voltage.

3. The integrated power conversion topology circuit based on APFC and AHB according to claim 1, characterized in that: The turn-on and turn-off processes of the first switch tube (Q1) and the second switch tube (Q2) are used to achieve zero voltage switching (ZVS) by accurately controlling the dead time; The drain of the first switch tube (Q1) is connected to the positive electrode of the output filter capacitor (C2), and the negative electrode of the filter capacitor (C2) is grounded; the source of the second switch tube (Q2) is grounded, and the drain is connected to the source of the first switch tube (Q1); Controlling the on and off of the first switch tube (Q1) and the second switch tube (Q2) through complementary PWM control signals; Dead time is set between the first switch tube (Q1) being turned off and the second switch tube (Q2) being turned on, and between the second switch tube (Q2) being turned off and the first switch tube (Q1) being turned on, respectively, so as to enable the switch tubes to be turned on at zero voltage or close to zero voltage.

4. The integrated power conversion topology circuit based on APFC and AHB according to claim 1, characterized in that: By adjusting the on-time ratio of the first switch tube (Q1) and the second switch tube (Q2), an asymmetric half bridge (AHB) is realized; The conduction time of the first switch tube (Q1) accounts for 99%-40% of the total switch period, and the conduction time of the second switch tube (Q2) accounts for 1%-60% of the total switch period; By controlling the charging and discharging process of the energy storage inductor (L1), the inductor is used in discontinuous mode with equal conduction time to achieve a sinusoidal waveform of the input current for active power factor correction (APFC); One end of the energy storage inductor (L1) is connected to the positive electrode of the bridge rectifier (BR1), and the other end is connected to the anode of the first diode (D1).

5. The integrated power conversion topology circuit based on APFC and AHB according to claim 1, characterized in that: The voltage waveform between the primary winding (NP) and the secondary winding (NS) is adjusted by the coupling capacitor (C3), and the capacitance C3 of the coupling capacitor (C3) is determined as follows: Where ω is the angular frequency of the switching frequency, L T is the leakage inductance of the transformer.

6. The integrated power conversion topology circuit based on APFC and AHB as claimed in claim 3, characterized in that: The power conversion topology circuit also includes a control algorithm for adjusting the duty cycle of the PWM control signal according to load changes; The steps of the control algorithm include: Detect output voltage (VOUT) and output current (IOUT); Calculate the current output power: POUT = VOUT × IOUT; According to the current output power, the optimal duty cycle D is determined using a lookup table or interpolation method. opt ; Calculate the deviation between the current duty cycle and the optimal duty cycle: ΔD = D current -D opt ; Calculate the duty cycle adjustment using a PI controller: ΔD adj =K p ΔD+K i ∫ΔDdt, where K p is the proportionality coefficient, K i is the integration coefficient; Update the duty cycle of the PWM control signal: D new =D current +ΔD adj ; Limiting the updated duty cycle to a valid range; Applying the updated duty cycle to the PWM controller; Repeat the above process periodically; The power conversion topology circuit also includes: An overcurrent protection mechanism, when it is detected that the output current (IOUT) exceeds a preset threshold, immediately shuts down the first switch tube (Q1) and the second switch tube (Q2), and restarts after a delay; Soft start mechanism: when powered on, the duty cycle of the PWM control signal starts from 0 and gradually increases to the normal working value according to the preset slope to avoid the large current shock at the startup moment.

7. The integrated power conversion topology circuit based on APFC and AHB as claimed in claim 3, characterized in that: The power conversion topology circuit also includes an output voltage feedback control loop, which is used to adjust the output voltage (VOUT) by adjusting the duty cycle of the PWM control signal; The control loop comprises: A voltage sampling circuit, using a voltage divider resistor network to sample the output voltage (VOUT); An error amplifier compares the sampled voltage with the reference voltage and outputs an error signal; A PWM comparator compares the error signal with the triangle wave to generate the PWM control signal; The driving circuit converts the PWM control signal into a level and a timing for driving the first switch tube (Q1) and the second switch tube (Q2).

8. The integrated power conversion topology circuit based on APFC and AHB as claimed in claim 3, characterized in that: The position of the coupling capacitor (C3) is changed as follows: The first end of the coupling capacitor (C3) is connected to the positive electrode of the output filter capacitor (C2), and the second end of the coupling capacitor (C3) is connected to the first end of the primary winding (NP).

9. The integrated power conversion topology circuit based on APFC and AHB according to claim 8, characterized in that: The power conversion topology circuit also includes a reverse polarity connection, and the reverse polarity connection is in the following manner: The output end 3 of the bridge rectifier (BR1) serves as a first connection point, and the output end 4 serves as a second connection point; the first end of the filter capacitor (C1), the anode of the third diode (D3), the drain of the first switch tube (Q1), the positive electrode of the output filter capacitor (C2) and the first end of the primary winding (NP) are all connected to the first connection point; the second end of the filter capacitor (C1) and the first end of the energy storage inductor (L1) are all connected to the second connection point; the second end of the energy storage inductor (L1) serves as a third connection point. point, the cathode of the first diode (D1) and the cathode of the third diode (D3) are both connected to the third connection point; the anode of the first diode (D1) serves as a fourth connection point, the source of the first switch tube (Q1), the drain of the second switch tube (Q2) and the first end of the coupling capacitor (C3) are all connected to the fourth connection point, and the second end of the coupling capacitor (C3) is connected to the second end of the primary winding (NP); the source of the second switch tube (Q2) and the negative electrode of the output filter capacitor (C2) are both grounded.

10. The integrated power conversion topology circuit based on APFC and AHB according to claim 9, characterized in that: The power conversion topology circuit also includes a reverse polarity connection and a coupling capacitor (C3) position change mode, and the position change mode is: The first end of the coupling capacitor (C3) is connected to the negative electrode of the output filter capacitor (C2), and the second end of the coupling capacitor (C3) is connected to the first end of the primary winding (NP).

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