Equivalent capacitance circuit and device thereof, equivalent capacitance calculation method, system and Buck circuit

Abstract

The embodiment of the present application discloses an equivalent capacitance circuit and its device, an equivalent capacitance calculation method, a system and a Buck circuit, which belongs to the technical field of circuit impedance calculation. The equivalent capacitance circuit includes an operational transconductance amplifier, a first resistor and a first capacitor. The equivalent capacitance circuit is applied to the Buck circuit, and the equivalent capacitance circuit is connected between the first operational transconductance amplifier and the PWM comparator of the Buck circuit. The embodiment of the present application solves the problem that some circuits in the related art cannot use miller compensation by setting an equivalent capacitance circuit in the Buck circuit and reasonably setting the operational transconductance amplifier in the equivalent capacitance circuit. By designing an equivalent capacitance circuit, the equivalent impedance is increased in the Buck circuit, and the equivalent capacitance circuit can be regarded as a capacitor with a large capacitance value.

Description

Technical Field

[0001] The embodiments of the present application relate to an equivalent capacitance circuit and device thereof, an equivalent capacitance calculation method, a system and a Buck circuit, and belong to the technical field of circuit impedance calculation. Background Art

[0002] When the chip circuit requires a larger capacitor, especially when designing loop stability, a larger capacitor is needed as the main pole. If a larger capacitor is simply placed, the area will be very large, which is unacceptable. The technical means used in the related technology is Miller compensation, that is, increasing the equivalent capacitance, but the related technology requires the amplifier to be in the system loop to ensure that the amplifier has a constant static operating point, which is not suitable for all circuit application scenarios. For the above problems, no effective technical solutions have been proposed so far, and they are in urgent need of improvement. Summary of the invention

[0003] The main purpose of the embodiments of the present application is to provide an equivalent capacitance circuit and its device, an equivalent capacitance calculation method, a system and a Buck circuit to solve the problems in the related art such as the chip area is too large and the constant static operating point cannot be guaranteed.

[0004] According to one aspect of an embodiment of the present application, an equivalent capacitance circuit is provided, comprising: an operational transconductance amplifier, wherein the operational transconductance amplifier is configured such that an output terminal is connected to an inverting input terminal; a first resistor is configured to be connected across a non-inverting input terminal and an inverting input terminal of the operational transconductance amplifier; and a first capacitor is configured such that one end is connected to the non-inverting input terminal of the operational transconductance amplifier and the other end is grounded.

[0005] According to at least one specific implementation of the embodiments of the present application, the equivalent capacitance circuit is applied to the Buck circuit, the operational transconductance amplifier is a second operational transconductance amplifier, the equivalent capacitance circuit is connected between the first operational transconductance amplifier and the PWM comparator of the Buck circuit, and also includes: a second resistor, one end of the second resistor is connected to the first resistor, and the other end is connected between the first operational transconductance amplifier and the PWM comparator.

[0006] According to another aspect of the embodiments of the present application, an equivalent capacitor device is provided, in which the equivalent capacitor circuit is provided.

[0007] According to another aspect of the embodiments of the present application, a Buck circuit is provided, comprising the equivalent capacitance circuit, wherein the output end of the first operational transconductance amplifier is connected to the inverting input end of the PWM comparator, the non-inverting input end of the first operational transconductance amplifier is used to input a reference voltage, the inverting end of the first operational transconductance amplifier is connected to a feedforward path of the Buck circuit, the output end of the PWM comparator is connected to the gate of a first MOS tube via a latch, the drain of the first MOS tube is connected to a power supply, and the source of the first MOS tube is connected to the feedforward path via a first inductor.

[0008] According to at least one embodiment of the embodiments of the present application, the feedforward path includes a third resistor, a fourth resistor, a feedforward capacitor, and a load resistor, wherein: one end of the third resistor is connected to the first inductor, and the other end is connected to the fourth resistor, the other end of the fourth resistor is grounded, one end of the feedforward capacitor is connected to the first inductor, and the other end is grounded, and one end of the load resistor is connected to the first inductor, and the other end is grounded.

[0009] According to at least one implementation of the embodiments of the present application, an inverting output terminal of the first operational transconductance amplifier is connected between the third resistor and the fourth resistor.

[0010] According to at least one implementation of the embodiments of the present application, a first diode is further included, wherein a cathode of the first diode is connected between a source of the first MOS tube and the first inductor, and an anode of the first diode is grounded.

[0011] According to at least one implementation of the embodiments of the present application, the non-inverting input terminal of the PWM comparator is connected between the drain of the first MOS tube and a power supply.

[0012] According to another aspect of an embodiment of the present application, a method for calculating an equivalent capacitance is provided, comprising: inputting an alternating current into an input terminal of a second operational transconductance amplifier, and obtaining a voltage at a non-inverting input terminal and a voltage at an inverting input terminal according to a node voltage equation; obtaining an alternating voltage at the input of the second operational transconductance amplifier according to the voltage at the non-inverting input terminal and the voltage at the inverting input terminal; dividing the alternating voltage by the alternating current to obtain an equivalent impedance at the input terminal of the second operational transconductance amplifier; the equivalent impedance comprises a capacitive reactance part and a resistive part, and obtaining a corresponding equivalent capacitance in a Buck circuit according to different frequencies of the alternating current.

[0013] According to other aspects of the embodiments of the present application, an equivalent capacitance calculation system is provided, which is used to implement the equivalent capacitance calculation method, including: an input voltage acquisition module, which is used to input an alternating current into the input terminal of the second operational transconductance amplifier, and obtain the voltage of the in-phase input terminal and the voltage of the inverting input terminal according to the node voltage equation; an alternating voltage calculation module, which is used to obtain the alternating voltage of the input of the second operational transconductance amplifier according to the voltage of the in-phase input terminal and the voltage of the inverting input terminal; an equivalent impedance calculation module, which is used to divide the alternating voltage by the alternating current to obtain the equivalent impedance of the input terminal of the second operational transconductance amplifier; an equivalent capacitance generation module, wherein the equivalent impedance includes a capacitive reactance part and a resistive part, and the corresponding equivalent capacitance in the Buck circuit is obtained according to the frequency of the alternating current.

[0014] The beneficial technical effects of the embodiments of the present application are:

[0015] By setting an equivalent capacitor circuit in the Buck circuit and by reasonably setting an operational transconductance amplifier in the equivalent capacitor circuit, the problem that some circuits in the related technology cannot use Miller compensation is solved. By designing an equivalent capacitor circuit, the equivalent impedance is increased in the Buck circuit. The equivalent capacitor circuit can be regarded as a capacitor with a large capacitance.

[0016] The equivalent capacitance circuit provided in the embodiment of the present application can be applied to Buck circuits, and can also be applied to other circuits or devices that require equivalent capacitance. It only needs to reasonably set the operational transconductance amplifier and its peripheral circuits to indirectly increase a smaller capacitance in the circuit to a larger capacitance value, thereby reducing the design and production costs of the circuit and achieving a larger circuit function through a smaller improvement. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the specific implementation methods of the embodiments of the present application or the technical solutions in the related technologies, the drawings required for use in the specific implementation methods or the related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some implementation methods of the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 A basic application scenario diagram of an equivalent capacitor circuit provided in an embodiment of the present application;

[0019] Figure 1A It is a circuit schematic diagram of miller compensation in the related art;

[0020] Figure 2 is a circuit schematic diagram of a DC-DC Buck circuit according to an embodiment of the present application;

[0021] Figure 3 is the equivalent circuit diagram of the increased equivalent capacitance;

[0022] Figure 4 It is a flow chart of the equivalent capacitance calculation method;

[0023] Figure 5 It is the architecture diagram of the equivalent capacitance calculation system. DETAILED DESCRIPTION

[0024] In order to enable those skilled in the art to better understand the embodiments of the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only implementation methods of a part of the embodiments of the present application, rather than all implementation methods. Based on the embodiments in the embodiments of the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the embodiments of the present application.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the embodiments of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0026] In addition, the terms "installed", "set", "provided with", "connected", "connected", and "socketed" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate medium, or it can be an internal connection between two devices, elements, or components. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0027] It should be noted that, in the absence of conflict, the implementation methods and features in the embodiments of the present application can be combined with each other. The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0028] like Figure 1The basic application scenario of the embodiment of the present application shown is a Buck circuit application scenario, including: an equivalent capacitance unit A, a comparison signal generating unit B, a PWM control unit C, and a feedforward path unit D, wherein:

[0029] The equivalent capacitance unit A is connected between the comparison signal generating unit B and the PWM control unit C, the feedforward path unit D is connected to the PWM control unit C, the equivalent capacitance unit A mainly includes a second operational transconductance amplifier gm2, and the comparison signal generating unit B is provided with a first operational transconductance amplifier gm1, the first operational transconductance amplifier is used to convert the voltage into current in the Buck circuit and control the PWM comparator. The combination of the comparison signal generating unit B and the PWM control unit C can control the state of the switching device, thereby adjusting the energy of the inductance in the Buck circuit, achieving the regulation and stabilization of the output voltage, and controlling the relationship between the input voltage and the output voltage by changing the duty cycle of the signal to achieve the purpose of voltage reduction or voltage increase. The PWM control unit C generates a PWM signal according to the comparison result of the feedback voltage and the reference voltage provided by the comparison signal generating unit B. When the feedback voltage is higher than the reference voltage, the PWM control unit C outputs a high level to turn on the MOS tube, and when the feedback voltage is lower than the reference voltage, the PWM control unit C outputs a low level to turn off the MOS tube. The feedforward path unit D includes a feedback resistor and a feedforward capacitor. New zeros and poles are formed by the feedforward capacitor and the feedback resistor, which have a significant impact on the gain and phase characteristics of the system loop. Specifically, the feedforward path unit D adjusts the phase margin and gain of the loop by introducing zeros and poles, thereby optimizing the overall performance of the Buck circuit. The feedforward capacitor introduces gain improvement by reducing the phase lag of the capacitor after the zero frequency, and the phase improvement reaches the maximum value between the zero frequency and the pole frequency, which has a significant impact on the phase characteristics through the change of the capacitor impedance.

[0030] The working principle of the operational transconductance amplifier (OTA) in the embodiment of the present application can be briefly described as follows: the operational transconductance amplifier converts the input differential voltage into an output current, and the output current is proportional to the input voltage difference. The input end of the operational transconductance amplifier (OTA) has a high impedance and can work in conjunction with a negative feedback loop to reduce the load effect on the previous circuit. The input end of the operational transconductance amplifier includes a non-inverting input end and an inverting input end, forming a differential input structure, so that the operational transconductance amplifier can amplify the voltage difference between the two input ends. For example, the output current of the feedforward path can be fed back to the input end, and the gain and stability of the OTA can be controlled by adjusting the value of the feedback resistor.

[0031] like Figure 1AAs shown, in the related art, when the chip circuit requires a larger capacitor, especially when designing loop stability, a larger capacitor is required as the main pole. However, if a larger capacitor is simply placed, the chip area will increase. For example, the Miller compensation method commonly used in the related art is used to increase the equivalent capacitance. This is unacceptable in chip design work. Therefore, the basic application scenario of the embodiment of the present application is not adopted. Figure 1A The miller compensation method shown increases the equivalent capacitance.

[0032] like Figure 2 As shown, an embodiment of the present application provides an equivalent capacitance circuit, the equivalent capacitance circuit is arranged in an equivalent capacitance unit A, the equivalent capacitance circuit and the device thereof can be applied to a Buck circuit, the equivalent capacitance circuit is connected between a first operational transconductance amplifier gm1 of the equivalent capacitance unit A in the Buck circuit and a PWM comparator CP1 of a PWM control unit C, and the equivalent capacitance unit A at least includes:

[0033] A second operational transconductance amplifier gm2, wherein the second operational transconductance amplifier gm2 is configured such that an output terminal is connected to an inverting input terminal;

[0034] A first resistor R1 is configured to be connected between a non-inverting input terminal and an inverting input terminal of a second operational amplifier gm2;

[0035] The first capacitor C1 is configured such that one end is connected to the non-inverting input terminal of the second operational transconductance amplifier gm2 and the other end is grounded.

[0036] A second resistor R2, one end of the second resistor R2 is connected to the first resistor R1, and the other end of the second resistor R2 is connected between the first operational transconductance amplifier gm1 of the comparison signal generating unit B and the PWM comparator of the PWM control unit C.

[0037] like Figure 3 As shown, combined Figure 2 and Figure 1 From the description of the equivalent capacitance unit A, it can be seen that the capacitance of the first capacitor C1 is relatively small and is connected in series with the first resistor R1. The second operational transconductance amplifier gm2 is connected in the form of a unit increase buffer. The in-phase terminal VP of the second operational transconductance amplifier gm2 is connected to the upper plate of the first capacitor C1, and the inverting terminal VN is connected to the upper end of the first resistor R1. Through mathematical calculations, it can be known that Figure 3 The equivalent impedance of point Y to ground can be regarded as resistance With capacitor series resistance It is equivalent to the inverse of the gain of the operational transconductance amplifier, and the capacitance is equivalent to C times, that is:

[0038] …… (1)

[0039] …… (2)

[0040] Therefore, if Larger, It is small and can be ignored when connected in series with other larger resistors, so the equivalent capacitance unit A can be regarded as a capacitor with a larger capacitance.

[0041] The equivalent impedance of point Y to ground is calculated as follows:

[0042] List the node voltage equation:

[0043] …… (3)

[0044] …… (4)

[0045] Therefore, the equivalent impedance seen by the AC source is:

[0046] …… (5)

[0047] In formula (5), the equivalent impedance Z has capacitive reactance on the left and resistance on the right. At low frequencies, , the capacitor is regarded as an open circuit, and the impedance is infinite; at high frequencies, the capacitor is regarded as a short circuit, ,if ,but Therefore, the circuit in the figure can be equivalent to a series connection of a resistor and a capacitor. The derivation of the equivalent capacitance expression is obtained by analyzing the expression of the impedance Z using the limiting assumptions of extremely low frequency and extremely high frequency.

[0048] Figure 3 The equivalent capacitance formula can also be seen intuitively that when the AC source has a signal, there will be an AC current. , and the amplifier will Most of the current is drawn away, resulting in a smaller current flowing to capacitor C. The voltage fluctuation is small, just like the capacitor C is large, indirectly increasing a smaller capacitor C to .

[0049] Combine the following Figure 2 , Figure 3 The equivalent capacitor circuit and Buck circuit of the embodiment of the present application are further described in detail:

[0050] An embodiment of the present application provides a Buck circuit, including an equivalent capacitor circuit, wherein an output end of a first operational transconductance amplifier gm1 is connected to an inverting input end of a PWM comparator, a non-inverting input end of the first operational transconductance amplifier gm1 is used to input a reference voltage Vref, an inverting end of the first operational transconductance amplifier gm1 is connected to a feedforward path unit D of the Buck circuit, an output end of a PWM comparator CP1 is connected to a gate of a first MOS tube Q1 through a latch LATCH, a drain of the first MOS tube Q1 is connected to a power supply VS, a non-inverting input end of the PWM comparator CP1 is connected between the drain of the first MOS tube Q1 and the power supply VS, and a source of the first MOS tube Q1 is connected to an L1 feedforward path through a first inductor.

[0051] In the Buck circuit of the embodiment of the present application, there is a latch LATCH, which has an R input terminal and an S input terminal, and a Q output terminal, wherein the R input terminal is connected to the output terminal of the PWM comparator CP1, the S input terminal is used to input the clock signal CLK, and the Q output terminal of the latch LATCH is connected to the gate of the first MOS tube Q1. The latch LATCH is a logic element with a memory function, which can maintain the input state at its output terminal until the next valid control signal arrives. The PWM signal generated by the PWM comparator CP1 is transmitted to the gate of the first MOS tube after passing through the latch LATCH, so that the switching state of the first MOS tube can be ensured to remain stable within the cycle of the PWM comparator C1, and is not affected by external interference. The switching action of the first MOS tube can be synchronously controlled, and the switching state of the MOS tube can be synchronously updated within the specified clock signal CLK cycle, ensuring the accuracy and synchronization of the synchronous action of the switching device, and reducing the false triggering of the MOS tube due to circuit noise or jitter.

[0052] The feedforward path unit D is provided with a feedforward path, in which the feedback network of the feedforward circuit is included, the feedforward path includes a third resistor R3, a fourth resistor R4, a feedforward capacitor CL and a load resistor RL, one end of the third resistor R3 is connected to the first inductor L1, the other end is connected to the fourth resistor R4, the other end of the fourth resistor R4 is grounded, one end of the feedforward capacitor CL is connected to the first inductor L1, the other end is grounded, one end of the load resistor RL is connected to the first inductor L1, and the other end is grounded. The inverting output end of the first operational transconductance amplifier gm1 is connected between the third resistor R3 and the fourth resistor R4. The Buck circuit also includes a first diode D1, the cathode of the first diode D1 is connected between the source of the first MOS tube Q1 and the first inductor L1, and the anode of the first diode D1 is grounded. The non-inverting input end of the PWM comparator CP1 is connected between the drain of the first MOS tube Q1 and the power supply VS.

[0053] The feedforward path unit D adjusts the phase margin and gain of the loop by introducing new zeros and poles, thereby optimizing the dynamic response and stability of the Buck circuit. The feedforward capacitor CL reduces the phase lag within a specific frequency range and introduces gain boost, so that the phase boost reaches its maximum value between the zero frequency and the pole frequency. The configuration of the feedforward path unit D has a significant impact on the phase characteristics of the loop. By adjusting the parameters of the capacitor and resistor, the desired phase and gain characteristics can be achieved at different frequencies, achieving precise regulation and stabilization of the Buck circuit output voltage, while optimizing the circuit's dynamic response and stability, and improving the overall performance and efficiency of the circuit.

[0054] like Figure 4 The equivalent capacitance calculation method shown is applied to any implementation of the embodiment of the present application, including:

[0055] Step S1, input an alternating current to the input terminal of the second operational transconductance amplifier, and obtain the voltage of the non-inverting input terminal and the voltage of the inverting input terminal according to the node voltage equation; in the embodiment of the present application, the input terminal of the second operational transconductance amplifier includes a non-inverting input terminal and an inverting input terminal.

[0056] Step S2, obtaining an alternating voltage at the input of the second operational transconductance amplifier according to the voltage at the non-inverting input terminal and the voltage at the inverting input terminal.

[0057] Step S3, dividing the alternating voltage by the alternating current to obtain an equivalent impedance of the input end of the second operational transconductance amplifier.

[0058] Step S4: the equivalent impedance includes a capacitive reactance part and a resistive part. According to the frequency of the alternating current, the corresponding equivalent capacitance in the Buck circuit is obtained.

[0059] The technical solution provided by steps S1 to S4 measures and calculates the equivalent impedance in the Buck circuit through an operational transconductance amplifier (OTA), measures the voltage of the OTA in-phase input terminal and the inverting input terminal according to the node voltage equation, calculates the alternating voltage of the OTA input terminal based on the measured voltage of the in-phase and inverting input terminals, and divides the alternating voltage by the alternating current to obtain the equivalent impedance of the OTA input terminal. The equivalent impedance obtained here includes a resistance part and a capacitive reactance part. Since the impedance includes a capacitive reactance part, the equivalent impedance will change with the frequency of the alternating current and voltage, and finally obtain the corresponding equivalent impedance in the Buck circuit. At low frequencies, the equivalent impedance tends to infinity, while at high frequencies, the capacitor is regarded as a short circuit, and the equivalent impedance approaches the resistance part, so the equivalent impedance obtained from steps S1 to S4 can be regarded as a series connection of a resistor and a capacitor. In the equivalent impedance, only a small part of the AC current provided by the AC source will flow to the equivalent capacitor unit A, and the voltage VP at the in-phase input terminal of the second operational transconductance amplifier fluctuates very little, just like a large capacitor, which indirectly amplifies a smaller capacitor. The equivalent capacitance expression is derived by analyzing the expression of impedance Z using the limiting assumptions of extremely low frequency and extremely high frequency.

[0060] For the method steps disclosed in the above embodiments, the method steps are expressed as a series of action combinations for the purpose of simple description, but those skilled in the art should be aware that the embodiments of the present application are not limited by the described order of actions, because according to the embodiments of the present application, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present application.

[0061] like Figure 5 The equivalent capacitance calculation system shown is used to implement the equivalent capacitance calculation method disclosed in any implementation of the embodiments of the present application, including:

[0062] An input terminal voltage acquisition module, used to input an alternating current into the input terminal of the second operational transconductance amplifier, and obtain a voltage at the in-phase input terminal and a voltage at the inverting input terminal according to a node voltage equation;

[0063] An alternating voltage calculation module, used for obtaining an alternating voltage of an input of the second operational transconductance amplifier according to a voltage at the in-phase input terminal and a voltage at the inverting input terminal;

[0064] an equivalent impedance calculation module, configured to divide the alternating voltage by the alternating current to obtain an equivalent impedance of an input end of the second operational transconductance amplifier;

[0065] The equivalent capacitance generation module, the equivalent impedance includes a capacitive reactance part and a resistive part, and the corresponding equivalent capacitance in the Buck circuit is obtained according to the frequency of the alternating current.

[0066] The implementation methods of the system described above are merely illustrative, for example, the various functional modules, units, or subsystems in the system may or may not be physically separated, or may or may not be physical units, that is, they may be located in the same place, or they may be distributed to multiple different systems and their subsystems or modules. Those skilled in the art may select some or all of the functional modules, units, or subsystems according to actual needs to achieve the purpose of the embodiments of the present application, and those of ordinary skill in the art may understand and implement the above-mentioned situations without creative work.

[0067] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0068] In the description of the specification of the embodiments of the present application, the description with reference to the terms "one embodiment", "example", "specific example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the embodiments of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0069] All features disclosed in the specification of the embodiment of the present application, or steps in all disclosed methods or processes, except mutually exclusive features and / or steps, can be combined in any way. Any feature disclosed in this specification, unless otherwise described, can be replaced by other equivalent or alternative features with similar purposes. That is, unless otherwise described, each feature is just an example in a series of equivalent or similar features. Throughout the specification, the same reference numerals indicate the same elements.

[0070] Although the implementation methods of the embodiments of the present application are described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the embodiments of the present application, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A Buck circuit, characterized in that: An equivalent capacitance circuit is included, and the equivalent capacitance circuit is connected between the first operational transconductance amplifier and the PWM comparator of the Buck circuit, and includes: a second operational transconductance amplifier, wherein the second operational transconductance amplifier is configured such that an output terminal is connected to an inverting input terminal; A first resistor is configured to be connected across a non-inverting input terminal and an inverting input terminal of the second operational transconductance amplifier; a second resistor, wherein one end of the second resistor is connected to the first resistor, and the other end of the second resistor is connected between the first operational transconductance amplifier and the PWM comparator; A first capacitor is configured to have one end connected to the non-inverting input terminal of the second operational transconductance amplifier and the other end connected to ground; The output end of the first operational transconductance amplifier is connected to the inverting input end of the PWM comparator, the non-inverting input end of the first operational transconductance amplifier is used to input a reference voltage, the inverting end of the first operational transconductance amplifier is connected to the feedforward path of the Buck circuit, the output end of the PWM comparator is connected to the gate of the first MOS tube through a latch, the drain of the first MOS tube is connected to the power supply, and the source of the first MOS tube is connected to the feedforward path through a first inductor.

2. The Buck circuit according to claim 1, characterized in that: The feedforward path includes a third resistor, a fourth resistor, a feedforward capacitor, and a load resistor, wherein: one end of the third resistor is connected to the first inductor, and the other end is connected to the fourth resistor, the other end of the fourth resistor is grounded, one end of the feedforward capacitor is connected to the first inductor, and the other end is grounded, and one end of the load resistor is connected to the first inductor, and the other end is grounded.

3. The Buck circuit according to claim 2, characterized in that: An inverting output terminal of the first operational transconductance amplifier is connected between the third resistor and the fourth resistor.

4. The Buck circuit according to claim 1, characterized in that: It also includes a first diode, wherein the cathode of the first diode is connected between the source of the first MOS tube and the first inductor, and the anode of the first diode is grounded.

5. The Buck circuit according to claim 1, characterized in that: The non-inverting input terminal of the PWM comparator is connected between the drain of the first MOS tube and a power supply.

6. A method for calculating equivalent capacitance, characterized in that: The Buck circuit applied to any one of claims 1 to 5, comprising: Inputting an alternating current to the input terminal of the second operational transconductance amplifier, and obtaining a voltage at a non-inverting input terminal and a voltage at an inverting input terminal according to a node voltage equation; Obtaining an alternating voltage at the input of the second operational transconductance amplifier according to the voltage at the non-inverting input terminal and the voltage at the inverting input terminal; Dividing the alternating voltage by the alternating current to obtain an equivalent impedance of an input terminal of the second operational transconductance amplifier; The equivalent impedance includes a capacitive reactance part and a resistive part. According to the frequency of the alternating current, the corresponding equivalent capacitance in the Buck circuit is obtained.

7. An equivalent capacitance calculation system, characterized in that: The method for calculating equivalent capacitance according to claim 6 comprises: An input terminal voltage acquisition module, used to input an alternating current into the input terminal of the second operational transconductance amplifier, and obtain a voltage at the in-phase input terminal and a voltage at the inverting input terminal according to a node voltage equation; An alternating voltage calculation module, used for obtaining an alternating voltage of an input of the second operational transconductance amplifier according to a voltage at the in-phase input terminal and a voltage at the inverting input terminal; an equivalent impedance calculation module, configured to divide the alternating voltage by the alternating current to obtain an equivalent impedance of an input end of the second operational transconductance amplifier; The equivalent capacitance generation module, the equivalent impedance includes a capacitive reactance part and a resistive part, and the corresponding equivalent capacitance in the Buck circuit is obtained according to the frequency of the alternating current.

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