DDR frequency adjustment method and device, electronic equipment and readable storage medium

Abstract

The application discloses a DDR frequency adjustment method and device, electronic equipment and a readable storage medium, and belongs to the technical field of electronics. The DDR frequency adjustment method comprises the following steps: acquiring M working frequencies, each working frequency being an average working frequency of one CPU in M CPUs of the electronic equipment within a first time period, and M being a positive integer; determining a first DDR frequency according to the M working frequencies; and adjusting a DDR frequency of the electronic equipment within a second time period according to the first DDR frequency; wherein the first time period and the second time period are time periods in drawing the same frame of image, and the first time period is earlier than the second time period.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of electronics, and particularly relates to a DDR frequency adjustment method and device, electronic equipment and a readable storage medium. BACKGROUND

[0002] Generally, an electronic device can adjust the DDR frequency of the electronic device according to the DDR frequency required by core components in the electronic device, so as to ensure that the electronic device can meet the bandwidth requirements of the core components.

[0003] In the related art, taking the core components in the electronic device as the central processing unit (CPU) as an example, the electronic device can adjust the DDR frequency of the electronic device based on the DDR frequency required by the CPU. When determining the DDR frequency required by the CPU, the electronic device usually adopts two ways of bandwidth mechanism and delay mechanism. The bandwidth mechanism is that the electronic device periodically acquires the DDR bandwidth, and calculates the DDR frequency required by the CPU according to the DDR bandwidth; the delay mechanism is that the electronic device periodically acquires the working frequency of the CPU, and determines the DDR frequency required by the CPU from a frequency mapping table according to the working frequency of the CPU.

[0004] However, since the acquisition period of the above two ways is fixed, and the DDR frequency required by the CPU in the next period is predicted according to the relevant information acquired in the previous period, the DDR frequency required by the CPU in the previous period and the next period may not be the same, so that the DDR frequency required by the CPU determined by the electronic device is inaccurate, thereby reducing the accuracy of adjusting the DDR frequency of the electronic device. SUMMARY

[0005] The embodiments of the application provide a DDR frequency adjustment method, device, electronic equipment and readable storage medium, which can improve the accuracy of the DDR frequency required by the CPU determined by the electronic device, thereby improving the accuracy of adjusting the DDR frequency of the electronic device.

[0006] In a first aspect, the embodiments of the application provide a DDR frequency adjustment method, which comprises: acquiring M working frequencies, each working frequency being an average working frequency of one CPU of M CPUs of an electronic device in a first time period, M being a positive integer; determining a first DDR frequency according to the M working frequencies; and adjusting the DDR frequency of the electronic device in a second time period according to the first DDR frequency; wherein the first time period and the second time period are time periods in drawing the same frame of image, and the first time period is earlier than the second time period.

[0007] In a second aspect, an embodiment of the present application provides a DDR frequency adjustment apparatus, which comprises an obtaining module, a determining module and an adjusting module. The obtaining module is configured to obtain M working frequencies, each of which is an average working frequency of one of M CPUs of an electronic device in a first time period, and M is a positive integer. The determining module is configured to determine a first DDR frequency according to the M working frequencies. The adjusting module is configured to adjust a DDR frequency of the electronic device in a second time period according to the first DDR frequency. The first time period and the second time period are time periods in drawing a same frame of image, and the first time period is earlier than the second time period.

[0008] In a third aspect, an embodiment of the present application provides an electronic device, which comprises a processor and a memory. The memory stores programs or instructions executable on the processor. When the programs or instructions are executed by the processor, the steps of the DDR frequency adjustment method according to the first aspect are implemented.

[0009] In a fourth aspect, an embodiment of the present application provides a readable storage medium, which stores programs or instructions. When the programs or instructions are executed by a processor, the steps of the DDR frequency adjustment method according to the first aspect are implemented.

[0010] In a fifth aspect, an embodiment of the present application provides a chip, which comprises a processor and a communication interface. The communication interface is coupled to the processor. The processor is configured to run programs or instructions, so as to implement the DDR frequency adjustment method according to the first aspect.

[0011] In a sixth aspect, an embodiment of the present application provides a computer program product, which is stored in a storage medium. The computer program product is executed by at least one processor to implement the DDR frequency adjustment method according to the first aspect.

[0012] In the embodiment of the present application, M working frequencies are acquired, each of which is the average working frequency of one of the M CPUs of the electronic device in a first time period; then according to the M working frequencies, a first DDR frequency is determined, and then according to the first DDR frequency, the DDR frequency of the electronic device in a second time period is adjusted; wherein the first time period and the second time period are time periods in drawing the same frame of image, and the first time period is earlier than the second time period. In this way, since the first time period and the second time period are time periods for performing the same frame drawing task (i.e. drawing the same frame of image), the demand for DDR frequency of the CPU in the electronic device is basically the same in the first time period and in the second time period, therefore, the DDR frequency required by the CPU in the electronic device in the second time period determined according to the working frequency of the CPU in the first time period is accurate, and thus adjusting the DDR frequency of the electronic device according to the DDR frequency can improve the accuracy of DDR frequency adjustment. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 is a schematic diagram of thread execution of a drawing task provided by the embodiment of the present application;

[0014] Figure 2 is one of the flow schematic diagrams of the DDR frequency adjustment method provided by the embodiment of the present application;

[0015] Figure 3 is another of the flow schematic diagrams of the DDR frequency adjustment method provided by the embodiment of the present application;

[0016] Figure 4 is a third of the flow schematic diagrams of the DDR frequency adjustment method provided by the embodiment of the present application;

[0017] Figure 5 is a fourth of the flow schematic diagrams of the DDR frequency adjustment method provided by the embodiment of the present application;

[0018] Figure 6 is a fifth of the flow schematic diagrams of the DDR frequency adjustment method provided by the embodiment of the present application;

[0019] Figure 7 is a structural schematic diagram of the DDR frequency adjustment apparatus provided by the embodiment of the present application;

[0020] Figure 8 is a structural schematic diagram of the electronic device provided by the embodiment of the present application;

[0021] Figure 9 is a hardware structural schematic diagram of the electronic device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0022] Clearly, the described embodiments are only some, but not all of embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art are within the scope of protection of the present application.

[0023] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described herein, and the objects distinguished by "first", "second", etc. are generally of a kind and do not limit the number of objects, for example, the first object can be one or more. In addition, "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / ", generally indicates that the objects before and after are in a "or" relationship.

[0024] The terms "at least one", "at least one of", etc. in the specification and claims of the present application refer to any one, any two or a combination of two or more of the objects. For example, at least one of a, b and c can mean "a", "b", "c", "a and b", "a and c", "b and c", and "a, b and c", where a, b and c can be single or multiple. Similarly, "at least two" means two or more, and its meaning is similar to "at least one".

[0025] The DDR frequency adjustment method, device, electronic equipment and readable storage medium provided by the embodiments of the present application will be described in detail below in combination with the drawings and specific embodiments and their application scenarios.

[0026] First, the technical terms involved in the embodiments of the present application are explained.

[0027] DDR bandwidth: DDR bandwidth is an indicator used to describe the data transmission speed of a computer memory or bus system. It represents the amount of data that can be transmitted per unit time, usually measured in bits per second (bps). Higher DDR bandwidth generally means faster data transmission speed.

[0028] DDR frequency: DDR frequency refers to the working frequency of DDR memory modules, usually measured in megahertz (MHz). DDR frequency affects data transmission rate, because the higher the DDR frequency, the more data transmissions per unit time.

[0029] Activity Monitoring Unit (AMU): The purpose of the AMU is system management and monitoring, in particular power consumption and performance management.

[0030] QueueBuf: In the rendering thread of the game, QueueBuf indicates that the current frame rendering is completed, and the Buffer is submitted to the downstream consumer. According to the game rendering and rendering pipeline mechanism, the time length between two QueueBufs is usually defined as the rendering time length of a frame rendering task, that is, the single frame rendering time length.

[0031] Next, the application scenario of the DDR frequency provided in the embodiments of the present application is introduced.

[0032] The DDR frequency adjustment method provided in the embodiments of the present application can be applied to a game scenario.

[0033] In the game scenario, taking the Unity engine as an example, UnityMain is the main thread (logical thread), responsible for the rendering of the game interface, and sends the content to be rendered to the UnityGfxDeviceW thread for rendering. The UnityGfxDeviceW receives the rendering task submitted by the main thread, completes the rendering, and submits the GPU for rendering. The whole process relationship diagram is as shown in Figure 1 .

[0034] As can be seen from Figure 1 , the time between two queuebufs can be understood as the time consumed for executing a frame rendering task, that is, rendering a frame interface. During this time period, the UnityGfxDeviceW thread executes the rendering task of the current frame, while the UnityMain thread can execute the rendering task of the next frame, that is, determine the content to be rendered for the rendering task of the next frame, and then send the content to be rendered for the rendering task of the next frame to the UnityGfxDeviceW thread.

[0035] In the related art, during the process of executing the rendering task by the electronic device, the DDR frequency required by the CPU is determined as an example. When determining the DDR frequency required by the CPU, the electronic device usually adopts two ways of bandwidth mechanism and delay mechanism to determine.

[0036] For the bandwidth mechanism, the DDR bandwidth is currently obtained by the workqueue of the kernel at a fixed period, and the DDR frequency is calculated according to the DDR bandwidth. For example, assuming that the fixed period is 40 ms, for a game with a frame rate of 60 frames per second, the DDR frequency is calculated once every 2.5 frames. For the delay mechanism, the key events (such as the number of instructions and the number of level cache misses on the DDR) in the AMU on the CPU are read periodically at a period of 16 ms, and whether the DDR needs to be adjusted is determined by the ratio of the two, for example, when the number of instructions (Instruction) / Cache Miss is lower than the set threshold, the DDR frequency needs to be adjusted, and the working frequency of the CPU at this moment is obtained, and the DDR frequency required by the CPU is determined based on the working frequency of the CPU.

[0037] However, both the above two methods predict the DDR frequency required by the CPU in the next period according to the relevant information obtained in the previous period, and the requirements of the CPU for the DDR frequency in the previous period and the next period may not be the same, so that the DDR frequency required by the CPU determined by the electronic device is inaccurate, thereby causing poor accuracy of adjusting the DDR frequency of the electronic device.

[0038] Therefore, an embodiment of the present application provides a DDR frequency adjustment method. The electronic device first obtains M working frequencies, each of which is the average working frequency of one of the M CPUs of the electronic device in a first time period. Then, according to the M working frequencies, a first DDR frequency is determined, and then the DDR frequency of the electronic device in a second time period is adjusted according to the first DDR frequency. The first time period and the second time period are time periods in drawing the same frame image, and the first time period is earlier than the second time period. In this way, since the first time period and the second time period are time periods for performing the same frame drawing task, the requirements of the CPUs in the electronic device for the DDR frequency in the first time period and in the second time period are basically the same. Therefore, the DDR frequency required by the CPUs in the electronic device in the second time period is accurately determined according to the M working frequencies in the first time period, so that the accuracy of the DDR frequency adjustment can be improved by adjusting the DDR frequency of the electronic device according to the DDR frequency.

[0039] The execution subject of the DDR frequency adjustment method provided by the embodiment of the present application can be a DDR frequency adjustment device. Illustratively, the DDR frequency adjustment device can be an electronic device, or a functional component or functional entity in the electronic device. The DDR frequency adjustment method provided by the embodiment of the present application will be exemplarily described below taking the execution subject as an electronic device.

[0040] Figure 2is a flowchart of a DDR frequency adjustment method provided by an embodiment of the present application, as shown in Figure 2 The DDR frequency adjustment method provided by the embodiment of the present application can include the following steps 101 to 103.

[0041] In step 101, the electronic device obtains M working frequencies.

[0042] In the embodiment of the present application, each of the M working frequencies can be an average working frequency of one of the M CPUs of the electronic device in a first time period, and M is a positive integer.

[0043] It should be noted that the value of M can be determined according to the number of CPUs in the electronic device. For example, the value of M can be the number of CPUs in the electronic device, or the number of large CPUs with more cores in the electronic device.

[0044] For example, if the electronic device includes 6 CPUs, the value of M can be 6. Alternatively, if the electronic device includes 10 CPUs, of which 2 are small cores, the value of M can be 10-2 = 8.

[0045] Alternatively, in the embodiment of the present application, the M CPUs of the electronic device can be M CPUs of the same type. For example, one CPU can be a single-core CPU or a multi-core CPU or one core of a multi-core CPU.

[0046] Alternatively, in the embodiment of the present application, step 101 can be implemented through the following steps 1011 and 1012.

[0047] In step 1011, the electronic device obtains M first working cycle numbers and M second working cycle numbers.

[0048] In the embodiment of the present application, the working cycle number is the number of working cycles, which can be represented by a cycle value.

[0049] In the embodiment of the present application, the M first working cycle numbers can be the number of working cycles that the M CPUs have run at a first time. That is, one first working cycle number can be the number of working cycles that one CPU has run at a first time, which can be understood as the number of working cycles that the one CPU has run before the first time.

[0050] In the embodiments of the present application, the M second work cycle numbers can be the work cycle numbers of the M CPUs at the second time point. That is, the first work cycle number can be the work cycle number of the CPU at the first time point, and the work cycle number of the CPU at the second time point can be understood as the number of work cycles of the CPU before the second time point.

[0051] In the embodiments of the present application, the first time point can be the start time point of the first time period, and the second time point can be the end time point of the first time period.

[0052] Optionally, in the embodiments of the present application, the first time period can be a time period in a target time period, and the target time period can be a time period for drawing a frame of image, that is, a time period for performing a frame drawing task. In addition, the length of the first time period is less than the length of the target time period.

[0053] For example, the frame of image can be a frame of game interface.

[0054] Optionally, in the embodiments of the present application, the length of the first time period can be determined according to the application running frame rate and the average drawing length of the previous drawing image, or the length of the first time period can also be set by default, which is not limited in the embodiments of the present application.

[0055] Optionally, in the embodiments of the present application, the first time point can be the start time point of the target time period, or the middle time point of the target time period. That is, the first time period can be a part of the target time period at the beginning, or a part of the target time period in the middle.

[0056] For example, assuming that the target time period is from 10:00 to 10:00 16 milliseconds, the first time point can be 10:00, or the first time point can be 10:00 2 milliseconds.

[0057] It should be noted that the specific implementation of determining the length of the first time period and determining the first time period in the target time period can be referred to the related descriptions of steps 201 to 203 below.

[0058] Optionally, in the embodiments of the present application, the electronic device can obtain the cycle values recorded by the AMUs on the M CPUs at the first time point, that is, the M first work cycle numbers, and obtain the cycle values recorded by the AMUs on the M CPUs at the second time point, that is, the M second work cycle numbers, in the process of performing the drawing task of the current frame, that is, drawing the current frame of image.

[0059] Exemplarily, taking 2 CPUs as the M CPUs, a start time of drawing the current frame image as the first time, and the 6th ms of drawing the current frame image as the second time as examples, the electronic device can obtain the cycle values recorded by the AMU on each of the 2 CPUs at the start time of drawing the current frame image, to obtain 2 first working cycle numbers; and at the 6th ms of drawing the current frame image, the electronic device can obtain the cycle values recorded by the AMU on each of the 2 CPUs at the 6th ms, to obtain 2 second working cycle numbers.

[0060] It should be noted that the electronic device can also start a timer at the same time of obtaining the M first working cycle numbers at the first time, and set a timing duration of the timer as a duration of the first time period, and obtain the M second working cycle numbers when the timer expires.

[0061] Optionally, the step 1011 can be implemented through the following step 10111 in the embodiment of the application.

[0062] The step 10111 includes that the electronic device invokes an asynchronous message processing (handler) thread or triggers a work queue (workqueue) to obtain the M first working cycle numbers and the M second working cycle numbers.

[0063] Optionally, the electronic device can invoke the handler thread to obtain the M first working cycle numbers and the M second working cycle numbers in the embodiment of the application. Alternatively, the electronic device can trigger the work queue workqueue to obtain the M first working cycle numbers and the M second working cycle numbers. Alternatively, the electronic device can invoke the handler thread to obtain the M first working cycle numbers and trigger the workqueue to obtain the M second working cycle numbers. Alternatively, the electronic device can trigger the work queue workqueue to obtain the M first working cycle numbers and invoke the handler thread to obtain the M second working cycle numbers.

[0064] Optionally, in the process of invoking the Render thread to execute the drawing task of the current frame by the electronic device, when the first time is reached, the electronic device invokes the handler thread to read the cycle values recorded by the AMU on each of the M CPUs at the moment, to obtain the M first working cycle numbers. Then the electronic device continues to invoke the Render thread to continue to execute the drawing task of the current frame, and when the second time is reached, the electronic device again invokes the handler thread to read the cycle values recorded by the AMU on each of the M CPUs at the moment, to obtain the M second working cycle numbers.

[0065] Optionally, in the embodiments of the present application, in the process of calling the Render thread to execute the drawing task of the current frame, when the first time point is reached, the electronic device calls the interface function queue_work and sends a task of reading the cycle value recorded by the AMU on each of the M CPUs at the moment to the workqueue through the queue_work. After receiving the task, the workqueue reads the cycle value recorded by the AMU on each of the CPUs at the moment to obtain M first working cycle numbers. Then, the electronic device continues to call the Render thread to execute the drawing task of the current frame, and when the second time point is reached, the electronic device calls the interface function queue_work again and sends a task of reading the cycle value recorded by the AMU on each of the M CPUs at the moment to the workqueue through the queue_work. After receiving the task, the workqueue reads the cycle value recorded by the AMU on each of the CPUs at the moment to obtain M second working cycle numbers.

[0066] Optionally, in the embodiments of the present application, in the process of calling the Render thread to execute the drawing task of the current frame, when the first time point is reached, the electronic device calls the handler thread to read the cycle value recorded by the AMU on each of the M CPUs at the moment to obtain M first working cycle numbers. Then, the electronic device continues to call the Render thread to execute the drawing task of the current frame, and when the second time point is reached, the electronic device calls the interface function queue_work again and sends a task of reading the cycle value recorded by the AMU on each of the M CPUs at the moment to the workqueue through the queue_work. After receiving the task, the workqueue reads the cycle value recorded by the AMU on each of the CPUs at the moment to obtain M second working cycle numbers.

[0067] Exemplarily, the M first working cycle numbers obtained by the electronic device can be denoted as {CPU0 t1 , CPU1 t1 , CPU2 t1 , …, CPUm t1}, where CPUm represents the mth CPU, and t1 represents the first time point, i.e., the time point of obtaining the first working cycle number. Similarly, the M second working cycle numbers obtained by the electronic device can be denoted as {CPU0 t2 , CPU1 t2 , CPU2 t2 , …, CPUm t2}, where t2 represents the second time point, i.e., the time point of obtaining the second working cycle number.

[0068] It should be noted that, taking the game scene as an example, the handler thread described above can be a newly created kernel thread of the electronic device, and is not a game thread. Using the handler thread to obtain the number of work periods, instead of using the game thread, can reduce the interference on the game thread.

[0069] In step 1012, the electronic device determines an i-th work frequency based on the i-th first number of work periods, the i-th second number of work periods, and the length of the first time period, to obtain M work frequencies.

[0070] In the embodiments of the present application, i ∈ [1, M], that is, the value of i is at most 1 and at least M.

[0071] It should be noted that each of the M work frequencies can be understood as an average work frequency of each CPU in the first time period.

[0072] Optionally, in the embodiments of the present application, the electronic device can calculate the difference between the i-th first number of work periods and the i-th second number of work periods, and determine the ratio of the difference to the length of the first time period as the i-th work frequency.

[0073] Optionally, in the embodiments of the present application, when calculating the difference between the i-th first number of work periods and the i-th second number of work periods, the electronic device can subtract the i-th second number of work periods from the i-th first number of work periods, or subtract the i-th first number of work periods from the i-th second number of work periods; then take the absolute value of the difference, and divide the absolute value of the difference by the length of the first time period, to determine the ratio as the i-th work frequency.

[0074] For example, the first work frequency can be represented by CPUiFreq avg . Assuming that the length of the first time period is ΔT, the first number of work periods of CPU i is CPUi t1 , the second number of work periods of CPU i is CPUi t2 , and CPUi t1 is greater than CPUi t2 , the i-th work frequency can be determined by the formula: CPUiFreq avg = (CPUi t2 – CPUi t1 ) / ΔT.

[0075] Optionally, in the embodiments of the present application, the electronic device can continue to call the handler thread or trigger the workqueue to calculate the M work frequencies after obtaining the M second numbers of work periods.

[0076] In the embodiment of the present application, the electronic device obtains the first working cycle number of each CPU at the first time and the second working cycle number of each CPU at the second time, and then calculates the average working frequency (i.e. the first working frequency) of each CPU in the first time period. Since the average working frequency can reflect the load of the electronic device when drawing the current frame image in the first time period, and the load of the electronic device remains basically unchanged during drawing a frame image, the DDR frequency required by the electronic device when drawing the current frame image in the subsequent time period can be predicted based on the first working frequency, thereby improving the accuracy of the electronic device in determining the DDR frequency required by the CPU.

[0077] In step 102, the electronic device determines the first DDR frequency according to the M working frequencies.

[0078] In the embodiment of the present application, the first DDR frequency is the ideal DDR frequency of the electronic device when working in the first time period. It can be understood that the first DDR frequency is the DDR frequency that makes the load of the electronic device smaller and the performance of the electronic device better when the electronic device works at the first working frequency.

[0079] Optionally, in the embodiment of the present application, step 102 can be implemented through the following step 1021 and step 1022.

[0080] In step 1021, the electronic device determines the first working frequency according to the M working frequencies.

[0081] Optionally, in the embodiment of the present application, the electronic device can remove the small CPU from the M CPUs according to the sizes of the M CPUs, i.e. remove the working frequency of the small CPU from the M working frequencies, and then determine the first working frequency from the remaining working frequencies.

[0082] Optionally, in the embodiment of the present application, step 1021 can be implemented through the following step 10211.

[0083] In step 10211, the electronic device determines the maximum working frequency in the M working frequencies as the first working frequency.

[0084] Optionally, in the embodiment of the present application, the electronic device can select the maximum working frequency from the M working frequencies and determine the maximum working frequency as the first working frequency. Alternatively, the electronic device can remove the working frequency of the small CPU from the M working frequencies, then select the maximum working frequency from the remaining working frequencies, and determine the maximum working frequency as the first working frequency.

[0085] For example, assuming that the value of M is 3, and the three working frequencies are 3.0 GHz, 3.5 GHz and 3.2 GHz, the electronic device determines the first working frequency as 3.5 GHz.

[0086] In this way, the maximum working frequency is selected as the first working frequency, and the DDR frequency determined based on the maximum working frequency is compatible with all CPUs, that is, the final determined DDR frequency in the electronic device meets the requirements of each CPU, and the performance of the electronic device is improved.

[0087] Further, the electronic device can increase a preset value on the maximum working frequency to obtain the first working frequency after the maximum working frequency is selected. The preset value can be set according to experience or by default, and the embodiments of the present application do not limit this.

[0088] In step 1022, the electronic device determines a first DDR frequency corresponding to the first working frequency according to the first working frequency and the first mapping relationship.

[0089] Optionally, in the embodiments of the present application, the first mapping relationship can be a mapping relationship between a first working frequency range and a first DDR frequency, and the first working frequency can be a working frequency in the first working frequency range. Alternatively, the first mapping relationship can be a mapping relationship between the first working frequency and the first DDR frequency.

[0090] It should be noted that the first mapping relationship reflects the relationship between the working frequency of the CPU and the DDR frequency, and can also be understood as the relationship between the DDR frequency and the performance of the electronic device. The first mapping relationship can be set by default by the electronic device, or can be pre-set or adjusted according to experience, and the embodiments of the present application do not limit this.

[0091] For example, assuming that the first working frequency is 0.8 GHz, the working frequency range included in the first mapping relationship is 0 GHz-1 GHz, and the DDR frequency included is 2 GHz, then the first DDR frequency corresponding to the first working frequency can be determined as 2 GHz.

[0092] In this way, the first DDR frequency determined by the electronic device can be understood as a DDR frequency that makes the load of the electronic device smaller and the performance of the electronic device better when the electronic device works at the first working frequency, and the performance of the electronic device is improved.

[0093] Optionally, in the embodiments of the present application, the first mapping relationship can be one of a plurality of mapping relationships, and each mapping relationship in the plurality of mapping relationships can be a mapping relationship between a working frequency range and a DDR frequency. The plurality of mapping relationships can be understood as the relationship between the DDR frequency and the performance of the electronic device under different loads. In this case, the electronic device can find the working frequency range in which the first working frequency is located from the plurality of mapping relationships, and determine the DDR frequency corresponding to the working frequency range as the first DDR frequency.

[0094] Alternatively, in the embodiments of the present application, the plurality of mapping relationships can also be represented in the form of a mapping table, in which one column is the operating frequency range and the other column is the DDR frequency, the operating frequency range and the DDR frequency in the same row correspond to form a mapping relationship. Alternatively, in the mapping table, one column is the operating frequency, and the operating frequency represents the operating frequency range.

[0095] For example, it is assumed that the mapping table includes two groups of mapping relationships. The first row is the first group of mapping relationships, the left column of the first row is 0-0.5GHz, or 0.5GHz, indicating the operating frequency range 0-0.5GHz, and the right column of the first row is the DDR frequency 2GHz. The second row is the second group of mapping relationships, the left column of the second row is 0.5-1GHz, or 1GHz, indicating the operating frequency range 0.5-1GHz, and the right column of the first row is the DDR frequency 3GHz.

[0096] Step 103, the electronic device adjusts the DDR frequency of the electronic device in the second time period according to the first DDR frequency.

[0097] In the embodiments of the present application, the first time period and the second time period are time periods in drawing the same frame image, and the first time period is earlier than the second time period.

[0098] Alternatively, in the embodiments of the present application, the duration of the first time period can be less than or equal to the duration of the second time period. In this way, when the same frame drawing task (i.e. drawing the same frame image) is performed, using the case of drawing task in a shorter time period to adjust the DDR frequency required for drawing task in a longer time period can shorten the drawing duration and improve the drawing efficiency of the image.

[0099] Alternatively, in the embodiments of the present application, the electronic device can adjust the first DDR frequency to the DDR frequency of the electronic device in the second time period.

[0100] In the embodiments of the present application, the step 103 can be understood as adjusting the DDR frequency in the second time period of drawing a frame image according to the DDR frequency determined in the first time period of drawing a frame image, realizing the adjustment of the DDR frequency in the frame, so that the DDR frequency of the electronic device in the drawing process of each frame image is the optimal DDR frequency, improving the accuracy of the DDR frequency adjustment, and using the DDR frequency at which time can also reduce the frame rate fluctuation.

[0101] Alternatively, in the embodiments of the present application, the step 103 can be implemented by the following steps 1031 to 1033.

[0102] Step 1031, the electronic device obtains the second DDR frequency.

[0103] In this embodiment of the application, the second DDR frequency can be a DDR frequency determined based on the operating frequency of other components in the electronic device. The second DDR frequency can be understood as the DDR frequency required by other components of the electronic device.

[0104] Optionally, in the embodiments of this application, the above-mentioned electronic device may be configured with a system on a chip (SOC), and the other components may be core components in the SOC such as a graphics processing unit (GPU) or a neural processing unit (NPU).

[0105] Step 1032: The electronic device determines the maximum DDR frequency between the first DDR frequency and the second DDR frequency.

[0106] Step 1033: The electronic device adjusts its DDR frequency to the maximum DDR frequency.

[0107] It should be noted that when adjusting the DDR frequency, electronic devices may increase the DDR frequency. With a higher DDR frequency, the efficiency of the electronic device in performing drawing tasks will be faster. Therefore, the components of the electronic device (such as the CPU) do not need to operate at a high frequency. Thus, the electronic device can reduce the operating frequency of the components, thereby reducing the power consumption of the electronic device.

[0108] In this way, the electronic device adjusts its DDR frequency to a determined maximum DDR frequency, which can meet the DDR frequency requirements of various components in the electronic device and improve the performance of the electronic device.

[0109] Optionally, in the embodiments of this application, combined with Figure 2 ,like Figure 3 As shown, prior to step 101 above, the DDR frequency adjustment method provided in this application embodiment may further include steps 201 to 203.

[0110] Step 201: The electronic device obtains the application running frame rate and the first rendering time of N frames of images.

[0111] Optionally, in this embodiment of the application, the aforementioned application frame rate can be the number of frames per second that the application runs. For example, in a game scenario, the aforementioned application frame rate can be the game frame rate. For instance, a game frame rate of 60 means that 60 frames of game footage are played per second during game execution.

[0112] For example, an electronic device can monitor the application's frame rate in real time and obtain the application's frame rate at the time of starting to execute the drawing task of the current frame or when obtaining M first working cycles.

[0113] In this embodiment of the application, the first rendering duration can be the average rendering duration of the previous N frames of the current frame, where N is a positive integer.

[0114] It should be noted that the value of N can be set by the default setting of the electronic device or by the user based on experience; this application embodiment does not limit this. For example, the value of N can be 10 or 8.

[0115] Optionally, in this embodiment of the application, the electronic device can obtain the drawing time of each frame in the previous N images before drawing the current frame image, then calculate the total drawing time of the N frames, and then calculate the average drawing time based on the total drawing time.

[0116] For example, the electronic device can record the drawing time of completing each frame drawing task. Then, when the electronic device starts executing the drawing task of the current frame, or when it obtains M first working cycles, it calculates the first drawing time based on the drawing time of each frame in the recorded N frames.

[0117] Step 202: The electronic device determines the target duration based on the application's running frame rate and the first rendering duration.

[0118] Optionally, in the embodiments of this application, combined with Figure 3 ,like Figure 4 As shown, step 202 above can be implemented through steps 2021 to 2023.

[0119] Step 2021: The electronic device determines the single-frame rendering duration of a single frame image based on the application's running frame rate.

[0120] Optionally, in this embodiment of the application, the electronic device can determine the single-frame rendering time of a single frame image as the quotient of 1 second and the application running frame rate, that is, the time required to complete the single-frame rendering task.

[0121] For example, assuming the application runs at a frame rate of 60 frames per second, the time to draw a single frame is approximately 1000ms ÷ 60 ≈ 16ms.

[0122] Step 2022: The electronic device determines the minimum drawing duration between the single-frame drawing duration and the first drawing duration.

[0123] For example, the electronic device determines the smaller of the single-frame rendering duration and the first rendering duration as the aforementioned minimum rendering duration.

[0124] At step 2023, the electronic device determines the target time length based on the minimum drawing time length.

[0125] In the embodiments of the present application, the target time length is less than the minimum drawing time length.

[0126] Optionally, in the embodiments of the present application, the electronic device can determine a part of the minimum drawing time length as the target time length. The part can be 1 / 2, 1 / 3, 1 / 4, 2 / 5, etc., which is not limited in the embodiments of the present application.

[0127] Optionally, in the embodiments of the present application, the target time length can be less than or equal to half of the minimum drawing time length.

[0128] For example, taking a single-frame drawing time length of 16 ms as an example, assuming that the first drawing time length is 17 ms, which is greater than the single-frame drawing time length, the electronic device can determine the single-frame drawing time length as the minimum drawing time length, and then determine half of the minimum drawing time length, i.e., 8 ms, as the target time length. Alternatively, assuming that the first drawing time length is 14 ms, which is less than the single-frame drawing time length, the electronic device can determine the first drawing time length as the minimum drawing time length, and then determine half of the minimum drawing time length, i.e., 7 ms, as the target time length.

[0129] Optionally, in the embodiments of the present application, the electronic device can also set the target time length as a fixed time length parameter, which is less than the single-frame drawing time length and the first drawing time length.

[0130] In the embodiments of the present application, the electronic device selects the minimum drawing time length from the single-frame drawing time length and the average drawing time length of the previous N frames of images, and determines the target time length according to the minimum drawing time length. The determined target time length is relatively short, which can quickly predict the required DDR frequency for drawing images in the subsequent time period in the current frame using the image drawing condition in a short time period, can adjust the DDR frame rate of the electronic device to a suitable DDR frame rate as early as possible, improve the efficiency of image drawing, and shorten the drawing time length of the current frame.

[0131] At step 203, the electronic device determines the first time period in the time period for drawing the current frame of images according to the target time length.

[0132] Optionally, in the embodiments of the present application, the electronic device can randomly determine a time as the start time of the first time period in the first half of the time period for drawing the current frame of images, and then determine the time period corresponding to the target time length from the start time as the first time period.

[0133] Optionally, in the embodiments of the present application, the electronic device can determine the first time period with a target time length from the first half of the time period in which the current frame image is drawn, that is, the start time and the end time of the first time period are both in the first half of the time period in which the current frame image is drawn.

[0134] Optionally, in the embodiments of the present application, the step 203 can be implemented by the following step 2031.

[0135] Step 2031, the electronic device determines the time period corresponding to the target time length from the start time of the time period in which the current frame image is drawn as the first time period.

[0136] For example, assuming that the target time length is 7ms, and the time period in which the current frame image is drawn is from 10:00 to 10:00 17ms, then the first time period is from 10:00 to 10:00 7ms.

[0137] In this way, the electronic device determines a time period from the start time of drawing the current frame image as the first time period, determines the average working frequency of each CPU in the first time period, then determines the maximum working frequency from the average working frequency, and then determines the DDR frequency corresponding to the maximum working frequency, and adjusts the DDR frequency in the subsequent time period of drawing the current frame image using the DDR frequency, so that the performance of the electronic device reaches the best when drawing the current frame image, not only improving the accuracy of adjusting the DDR frequency, but also improving the drawing efficiency.

[0138] The DDR frequency adjustment method provided by the embodiments of the present application, since the first time period and the second time period are time periods for executing the same frame drawing task (i.e. drawing the same frame image), the demand of the CPU in the electronic device for the DDR frequency is basically the same in the first time period and in the second time period, therefore, the DDR frequency required by the CPU in the electronic device in the second time period is accurate according to the working frequency of the CPU in the first time period, so that the DDR frequency of the electronic device is adjusted according to the DDR frequency, which can improve the accuracy of DDR frequency adjustment. And the present scheme can also reduce the power consumption of the electronic device under the premise of keeping the frame rate unchanged.

[0139] Next, the DDR frequency adjustment method provided by the embodiments of the present application will be described in combination with Figure 5 and Figure 6 The DDR frequency adjustment method provided by the embodiments of the present application. Figure 5 is a flowchart of the DDR frequency adjustment method provided by the embodiments of the present application, and the method is taken as an example applied in a game scenario, which can include the following steps 501 to 508.

[0140] Step 501, the electronic device calls the main thread UnityMain to execute the drawing task, and the main thread submits the drawing task to the drawing thread UnityGfxDeviceW, which starts to draw the game interface after receiving the drawing task.

[0141] Exemplarily, the UnityGfxDeviceW can be replaced by a game Render thread.

[0142] Step 502, when the UnityGfxDeviceW thread completes the queuebuf, the electronic device calls the handler thread to read the cycle value recorded by the AMU at the first time on each CPU, and starts a timer.

[0143] Optionally, in the embodiments of the present application, the completion of the queuebuf by the UnityGfxDeviceW thread can be understood as that the UnityGfxDeviceW thread has completed the drawing task of the last frame, that is, has completed the drawing of the game interface of the last frame. In this case, the UnityGfxDeviceW thread will continue to execute the drawing task of the current frame sent by the UnityMain thread to draw the game interface of the current frame, and the first time can be the start time of the execution of the drawing task of the current frame by the UnityGfxDeviceW thread. That is, the electronic device calling the handler thread to read the cycle value recorded by the AMU at the first time on each CPU can be understood as that the electronic device calls the handler thread to read the cycle value recorded by the AMU at the start time of the execution of the drawing task of the current frame on each CPU.

[0144] Optionally, the CPUm t1 represents the cycle value of the mth CPU at t1, and t1 is the first time.

[0145] Exemplarily, the cycle value of the 0th CPU at t1 is represented as CPU0 t1 , and the cycle value of the 7th CPU at t1 is represented as CPU7 t1 . Taking the electronic device including seven CPUs as an example, the electronic device calling the handler thread to read the cycle value recorded by the AMU at t1 on each CPU can be represented as {CPU0 t1 , CPU1 t1 , CPU2 t1 , …, CPU7 t1}.

[0146] Step 503: The electronic device calculates a target duration based on the game's frame rate and the average rendering time of the first N frames.

[0147] Optionally, in this embodiment, the electronic device can calculate the single-frame rendering time based on the game's frame rate, and calculate the average rendering time of the first N frames based on the rendering time of each frame in the first N frames of rendering tasks. Then, it determines the minimum rendering time between the average rendering time and the single-frame rendering time, and calculates the target duration based on the minimum rendering time. For example, the electronic device can determine half of the minimum rendering time as the target duration.

[0148] It should be noted that step 503 can be executed after step 502 or before step 502, and this application embodiment does not limit this. Figure 5 The following is an example of step 503 being executed after step 502.

[0149] Step 504: In the event of a timer expiration, the electronic device triggers the workqueue to read the cycle value recorded by the AMU on each CPU at the second time step.

[0150] It should be noted that the timer timeout mentioned above refers to a timer duration that is greater than or equal to the target duration. The second moment mentioned above can be understood as the timer timeout point, that is, the moment when the duration of the current frame's drawing task reaches the target duration. For example, assuming the target duration is 8ms and the start time of the current frame's drawing task is 10:00, then the second moment mentioned above is 10:08ms.

[0151] Optionally, in this embodiment of the application, when the timer times out, the electronic device can call the interface function queuework and send a task to the work queue workqueue to read the cycle value recorded by the AMU at the second time step on each CPU. After receiving the task, the work queue reads the cycle value recorded by the AMU at the second time step on each CPU.

[0152] Optionally, CPUm can be used in the embodiments of this application. t2 This represents the cycle value of CPU m at time t2, where t2 is the second time mentioned above.

[0153] For example, taking an electronic device containing 7 CPUs as an example, the electronic device triggers the work queue to read the cycle value recorded by the AMU at the second time step on each CPU, which can be denoted as {CPU0}. t2 CPU1 t2 CPU2 t2 ..., CPU7t2}。

[0154] Step 505, the electronic device invokes the work queue, calculates the average working frequency of each CPU during the two times of reading the cycle value according to the cycle value recorded by the AMU on each CPU at the first time and the second time, and selects the maximum average working frequency.

[0155] Optionally, in the embodiment of the application, taking one CPU as an example, the electronic device can determine the average working frequency of the CPU according to the cycle value at the first time and the cycle value at the second time of the CPU and the target time length. Similarly, the electronic device can calculate the average working frequency of each CPU, and then select the maximum average working frequency from the average working frequencies of the plurality of CPUs.

[0156] Exemplarily, the average working frequency of the CPUm avg during the two times of reading the cycle value can be expressed as CPUmFreq avg . t2 t1 wherein, ΔT is the target time length, CPUm t2 represents the cycle value of the CPUm t1 at t2, and CPUm t1 represents the cycle value of the CPUm t1 at t1. In this case, taking the electronic device including 7 CPUs as an example, the average frequencies of the 7 CPUs can be expressed as {CPU0Freq avg , CPU1Freq avg , …, CPU7Freq avg}.

[0157] Optionally, in the embodiment of the application, when determining the maximum average working frequency, the electronic device can ignore the average working frequencies of the CPUs with smaller cores in the plurality of CPUs, and determine the maximum average working frequency from the other CPUs.

[0158] It should be noted that the maximum average working frequency is the first working frequency in the above embodiment.

[0159] Step 506, the electronic device invokes the work queue to find the cpu-ddr mapping table, and finds the first DDR frequency corresponding to the maximum average working frequency from the cpu-ddr mapping table.

[0160] Exemplarily, the electronic device calls the work queue, first finds the work frequency range in which the maximum average work frequency is located in the mapping table, and then determines the DDR frequency corresponding to the found work frequency range as the first DDR frequency.

[0161] It should be noted that the cpu-ddr mapping table can be a plurality of mapping relationships in the above embodiment in the form of a mapping table.

[0162] Step 507, the electronic device obtains the second DDR frequency required by the GPU side, and sets the first DDR frequency and the second DDR frequency through a voting interface.

[0163] Step 508, the electronic device adjusts the DDR frequency of the electronic device to the maximum DDR frequency of the first DDR frequency and the second DDR frequency.

[0164] The DDR adjustment method provided by the embodiment of the application can realize DDR frequency adjustment according to game frame rendering time, and adjust the DDR frequency of the electronic device in a frame according to the average work frequency of the CPU in the previous period of time of rendering a frame of image, so that the method of adjusting the DDR frequency is aligned with the frame rendering time, the accuracy of the determined DDR frequency required by the CPU is improved, and thus the accuracy of the DDR frequency adjustment is improved. In addition, by applying the above method, the DDR frequency adjustment in a frame is triggered in combination with the rendering duration of rendering a single frame of image in a game scene, the DDR frame rate of the electronic device is adjusted to a DDR frequency at which the performance of the electronic device is better, the performance of the electronic device can be improved, the power consumption of the electronic device is reduced, the fluctuation of the game running frame rate is reduced, and the game experience is optimized.

[0165] Next, in combination with Figure 6 The calling of the thread by the electronic device when implementing the DDR frequency adjustment method is described. The electronic device first calls the game Render thread to draw the game interface of the current frame, and when the queuebuf is completed, the electronic device calls the handler thread to read the AMU to obtain the first work cycle number, and starts a timer (timer). Then, the electronic device detects that the timer is timed out, that is, timer callback, triggers the work queue workqueue to read the AMU to obtain the second work cycle number through an interface function queuework, then the electronic device continues to trigger the work queue workqueue to calculate the first work frequency, and determines the first DDR frequency corresponding to the first work frequency, and finally adjusts the DDR frequency of the electronic device according to the first DDR frequency and the second DDR frequency.

[0166] It should be noted that the specific implementation process of steps 501 to 508 can refer to the related description of the above embodiments, and to avoid repetition, this embodiment will not be described here.

[0167] It should be noted that each method embodiment or each method embodiment can be implemented alone or in combination with any two or more, and the specific implementation can be determined according to actual use requirements, and the present application embodiment does not limit this.

[0168] The DDR frequency adjustment method provided by the present application embodiment can be executed by a DDR frequency adjustment device. In the present application embodiment, the DDR frequency adjustment method executed by the DDR frequency adjustment device is taken as an example to illustrate the DDR frequency adjustment device provided by the present application embodiment.

[0169] Figure 7 The structure diagram of the DDR frequency adjustment device provided by the present application embodiment, which can include an acquisition module 701, a determination module 702 and an adjustment module 703.

[0170] The acquisition module 701 is configured to acquire M working frequencies, each working frequency being an average working frequency of one of the M CPUs of the electronic device in a first time period, and M being a positive integer.

[0171] The determination module 702 is configured to determine a first DDR frequency according to the M working frequencies.

[0172] The adjustment module 703 is configured to adjust the DDR frequency of the electronic device in a second time period according to the first DDR frequency.

[0173] In the present application embodiment, the first time period and the second time period are time periods for drawing the same frame of image, and the first time period is earlier than the second time period.

[0174] Optionally, in the present application embodiment, the acquisition module 701 is specifically configured to acquire M first working cycle numbers and M second working cycle numbers, the M first working cycle numbers being working cycle numbers of the M CPUs at a first time, the M second working cycle numbers being working cycle numbers of the M CPUs at a second time, the first time being a starting time of the first time period, and the second time being an ending time of the first time period; and determine an i-th working frequency based on an i-th first working cycle number, an i-th second working cycle number and a time length of the first time period, to obtain the M working frequencies, i∈[1, M].

[0175] Optionally, in the embodiment of the present application, the obtaining module 701 is specifically configured to call a handler thread or trigger a workqueue to obtain the M first working cycle numbers and the M second working cycle numbers.

[0176] Optionally, in the embodiment of the present application, the obtaining module 701 is further configured to obtain an application running frame rate and a first drawing duration of N frames of images before obtaining the M working frequencies, the first drawing duration being an average drawing duration of the previous N frames of images of the current frame, and N being a positive integer.

[0177] The determining module 702 is further configured to determine a target duration based on the application running frame rate and the first drawing duration, and determine a first time period in a time period of drawing the current frame of image according to the target duration.

[0178] Optionally, in the embodiment of the present application, the determining module 702 is specifically configured to determine, as the first time period, a time period corresponding to the target duration from a starting time of the time period of drawing the current frame of image.

[0179] Optionally, in the embodiment of the present application, the determining module 702 is specifically configured to determine a single-frame drawing duration of a single frame of image based on the application running frame rate, determine a minimum drawing duration from the single-frame drawing duration and the first drawing duration, and determine the target duration based on the minimum drawing duration, the target duration being less than the minimum drawing duration.

[0180] Optionally, in the embodiment of the present application, the determining module 702 is specifically configured to determine, as the first working frequency, a maximum working frequency from the M working frequencies.

[0181] The DDR frequency adjustment device provided by the embodiment of the present application is accurate in adjusting the DDR frequency, because the first time period and the second time period are time periods of performing the same frame drawing task (i.e., drawing the same frame of image), so the demand of the CPU in the electronic device for the DDR frequency is basically the same in the first time period and in the second time period, and therefore the DDR frequency required by the CPU in the DDR frequency adjustment device in the second time period is accurate according to the working frequency of the CPU in the first time period, so that the DDR frequency of the DDR frequency adjustment device is adjusted according to the DDR frequency, which can improve the accuracy of the DDR frequency adjustment.

[0182] The DDR frequency adjustment device in this application embodiment can be an electronic device or a component within an electronic device, such as an integrated circuit or a chip. The electronic device can be a terminal or other devices besides a terminal. For example, the electronic device can be a mobile phone, tablet computer, laptop computer, PDA, in-vehicle electronic device, mobile internet device, augmented reality / virtual reality device, robot, wearable device, super mobile personal computer, netbook, or personal digital assistant, etc. It can also be a server, network attached storage (NAS), personal computer (PC), television (TV), ATM, or self-service machine, etc. This application embodiment does not specifically limit the specific implementation.

[0183] The DDR frequency adjustment device in this application embodiment can be a device with an operating system. This operating system can be Android, iOS, or other possible operating systems; this application embodiment does not specifically limit the specific operating system used.

[0184] The DDR frequency adjustment device provided in this application can realize the various processes implemented in the various embodiments of the above-described DDR frequency adjustment method. To avoid repetition, it will not be described again here.

[0185] Optionally, such as Figure 8 As shown, this application embodiment also provides an electronic device 900, including a processor 901 and a memory 902. The memory 902 stores a program or instructions that can run on the processor 901. When the program or instructions are executed by the processor 901, they implement the various steps of the above-described DDR frequency adjustment method embodiment and can achieve the same technical effect. To avoid repetition, they will not be described again here.

[0186] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.

[0187] Figure 9 A schematic diagram of the hardware structure of an electronic device to implement an embodiment of this application.

[0188] The electronic device 1000 includes, but is not limited to, components such as: radio frequency unit 1001, network module 1002, audio output unit 1003, input unit 1004, sensor 1005, display unit 1006, user input unit 1007, interface unit 1008, memory 1009, and processor 1010.

[0189] Those skilled in the art can understand that the electronic device 1000 can also include a power supply (such as a battery) for supplying power to each component, and the power supply can be logically connected to the processor 1010 through a power management system, so that the power management system can realize the functions of managing charging, discharging, and power consumption management. Figure 9 The electronic device structure shown in the figure does not constitute a limitation on the electronic device, and the electronic device can include more or fewer components than the figure, or combine certain components, or different component arrangements, which are not described here.

[0190] The processor 1010 is configured to obtain M working frequencies, each of the M working frequencies being an average working frequency of one of M CPUs of the electronic device in a first time period, M being a positive integer; and determine a first DDR frequency according to the M working frequencies; and adjust a DDR frequency of the electronic device in a second time period according to the first DDR frequency.

[0191] In the embodiments of the present application, the first time period and the second time period are time periods for drawing the same frame of image, and the first time period is earlier than the second time period.

[0192] Optionally, in the embodiments of the present application, the processor 1010 is specifically configured to obtain M first working cycle numbers and M second working cycle numbers, the M first working cycle numbers being working cycle numbers of the M CPUs at a first time, the M second working cycle numbers being working cycle numbers of the M CPUs at a second time, the first time being a start time of the first time period, and the second time being an end time of the first time period; and determine an i-th working frequency based on an i-th first working cycle number, an i-th second working cycle number, and a time length of the first time period, to obtain the M working frequencies, i∈[1, M].

[0193] Optionally, in the embodiments of the present application, the processor 1010 is specifically configured to call a handler thread or trigger a workqueue to obtain the M first working cycle numbers and the M second working cycle numbers.

[0194] Optionally, in the embodiments of the present application, the processor 1010 is further configured to, before obtaining the M working frequencies, obtain an application running frame rate and a first drawing time length of N frames of image, the first drawing time length being an average drawing time length of the previous N frames of image of the current frame, N being a positive integer; determine a target time length based on the application running frame rate and the first drawing time length; and determine the first time period in a time period for drawing the current frame of image according to the target time length.

[0195] Optionally, in the embodiments of the present application, the processor 1010 is specifically configured to determine, as the first time period, a time period corresponding to the target time length from a start time of the time period for drawing the current frame of image.

[0196] Optionally, in the embodiment of the application, the processor 1010 is specifically configured to determine a single-frame drawing duration of a single frame image based on an application running frame rate; determine a minimum drawing duration from the single-frame drawing duration and a first drawing duration; and determine a target duration based on the minimum drawing duration, the target duration being less than the minimum drawing duration.

[0197] Optionally, in the embodiment of the application, the processor 1010 is specifically configured to determine a maximum working frequency from the M working frequencies as the first working frequency.

[0198] The electronic device provided by the embodiment of the application is because the first time period and the second time period are time periods for performing the same frame drawing task (i.e., drawing the same frame image), so the demand of the CPU in the electronic device for the DDR frequency is basically the same in the first time period and in the second time period, therefore, the DDR frequency required by the CPU in the electronic device in the second time period determined according to the first working frequency of the first time period is accurate, and thus the accuracy of the DDR frequency adjustment can be improved according to the DDR frequency for adjusting the DDR frequency of the electronic device.

[0199] It should be understood that, in the embodiment of the application, the input unit 1004 can include a graphics processing unit (GPU) 10041 and a microphone 10042. The graphics processing unit 10041 processes image data of a still picture or a video obtained by an image capture device (such as a camera) in a video capture mode or an image capture mode. The display unit 1006 can include a display panel 10061, which can be configured in the form of a liquid crystal display, an organic light-emitting diode, etc. The user input unit 1007 includes at least one of a touch panel 10071 and other input devices 10072. The touch panel 10071 is also called a touch screen. The touch panel 10071 can include a touch detection device and a touch controller. The other input devices 10072 can include, but are not limited to, a physical keyboard, function keys (such as volume control keys, on-off keys, etc.), a trackball, a mouse, an operation lever, and the like, which will not be described here.

[0200] The memory 1009 can be used to store software programs and various data. The memory 1009 can mainly include a first storage area storing programs or instructions and a second storage area storing data, wherein the first storage area can store an operating system, application programs or instructions required by at least one function (such as a sound playing function, an image playing function, etc.), and the like. In addition, the memory 1009 can include a volatile memory or a non-volatile memory, or the memory 1009 can include both volatile and non-volatile memories. The non-volatile memory can be a Read-Only Memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically EPROM (EEPROM), or a flash memory. The volatile memory can be a Random Access Memory (RAM), a Static RAM (SRAM), a Dynamic RAM (DRAM), a Synchronous DRAM (SDRAM), a Double Data Rate SDRAM (DDR SDRAM), an Enhanced SDRAM (ESDRAM), a Synch link DRAM (SLDRAM), and a Direct Rambus RAM (DRRAM). The memory 109 in the embodiment of the present application includes but is not limited to these and any other suitable types of memory.

[0201] The processor 1010 can include one or more processing units; optionally, the processor 1010 integrates an application processor and a modem processor, wherein the application processor mainly processes operations related to an operating system, a user interface, and an application program, and the modem processor mainly processes wireless communication signals, such as a baseband processor. It can be understood that the above-mentioned modem processor can also not be integrated into the processor 1010.

[0202] The embodiment of the present application also provides a readable storage medium, the readable storage medium stores a program or instructions, the program or instructions are executed by a processor to realize various processes of the above-mentioned DDR frequency adjustment method embodiment, and the same technical effects can be achieved. To avoid repetition, details are not described here.

[0203] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes a computer readable storage medium, such as a computer readable only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0204] The embodiment of the present application further provides a chip, which comprises a processor and a communication interface, the communication interface is coupled with the processor, the processor is used for running programs or instructions to realize the processes of the above DDR frequency adjustment method embodiments and achieve the same technical effects. To avoid repetition, details are not described herein.

[0205] It should be understood that the chip mentioned in the embodiment of the present application can also be referred to as a system chip, a system chip, a chip system or a system on chip, etc.

[0206] The embodiment of the present application provides a computer program product, which is stored in a storage medium, and is executed by at least one processor to realize the processes of the above DDR frequency adjustment method embodiments and achieve the same technical effects. To avoid repetition, details are not described herein.

[0207] It should be noted that in this document, the term "comprising" or "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that the process, method, article or device including a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. Without more limitations, the element defined by the statement "comprising a" does not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the method and device in the embodiment of the present application is not limited to the order of performing the functions as shown or discussed, but can also include performing the functions in a substantially simultaneous manner or in the opposite order, for example, the described method can be performed in an order different from that described, and various steps can also be added, omitted or combined. In addition, the features described with reference to some examples can be combined in other examples.

[0208] Through the above description of the embodiments, those skilled in the art can clearly understand that the above-mentioned example methods can be realized by means of software and a necessary general hardware platform, and of course, can also be realized by hardware, but in many cases, the former is a better embodiment. Based on such understanding, the technical solutions of the present application can be embodied in the form of a computer software product in essence or in the form of a part that contributes to the prior art, which is stored in a storage medium (such as a ROM / RAM, a magnetic disc, an optical disc), and includes a plurality of instructions for causing a terminal (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods described in the various embodiments of the present application.

[0209] The embodiments of the present application are described above in combination with the drawings, but the present application is not limited to the above-mentioned specific embodiments, and the above-mentioned specific embodiments are only illustrative and not restrictive. Those skilled in the art can make many forms under the inspiration of the present application without departing from the scope of the present application and the scope protected by the claims.

Claims

1. A method for adjusting DDR frequency, characterized in that, The method includes: Obtain M operating frequencies, where each operating frequency is the average operating frequency of one of the M central processing units (CPUs) of the electronic device during the first time period, and M is a positive integer; Based on the M operating frequencies, determine the first double data rate DDR frequency; Based on the first DDR frequency, adjust the DDR frequency of the electronic device during the second time period; Wherein, the first time period and the second time period are time periods in the same frame of image, and the first time period is earlier than the second time period; The step of determining the first DDR frequency based on the M operating frequencies includes: The maximum operating frequency among the M operating frequencies is determined as the first operating frequency; Based on the first operating frequency and the first mapping relationship, determine the first DDR frequency corresponding to the first operating frequency; Before obtaining the M operating frequencies, the method further includes: Get the application's running frame rate and the first rendering duration of N frames, where the first rendering duration is the average rendering duration of the previous N frames of the current frame, and N is a positive integer; The target duration is determined based on the application's running frame rate and the first rendering duration; The first time period is determined within the time period for drawing the current frame image based on the target duration.

2. The method according to claim 1, characterized in that, The acquisition of M operating frequencies includes: Obtain M first working cycles and M second working cycles, wherein the M first working cycles are the number of working cycles that the M CPUs have run at the first time point, and the M second working cycles are the number of working cycles that the M CPUs have run at the second time point, wherein the first time point is the start time of the first time period, and the second time point is the end time of the first time period; Based on the number of the first working cycles, the number of the second working cycles, and the duration of the first time period, the i-th working frequency is determined, and the M working frequencies are obtained, i∈[1,M].

3. The method according to claim 1 or 2, characterized in that, Determining the first time period within the time period for rendering the current frame image based on the target duration includes: The time period corresponding to the target duration starting from the start time of the time period in which the current frame image is drawn is determined as the first time period.

4. The method according to claim 1 or 2, characterized in that, Determining the target duration based on the application's frame rate and the first rendering duration includes: Based on the application's running frame rate, determine the single-frame rendering duration of a single frame image; Determine the minimum rendering duration between the single-frame rendering duration and the first rendering duration; Based on the minimum drawing time, the target drawing time is determined, and the target drawing time is less than the minimum drawing time.

5. A DDR frequency adjustment device, characterized in that, The device includes an acquisition module, a determination module, and an adjustment module; The acquisition module is used to acquire M operating frequencies, each operating frequency being the average operating frequency of one of the M CPUs in the electronic device during a first time period, where M is a positive integer; The determining module is used to determine the first DDR frequency based on the M operating frequencies; The adjustment module is used to adjust the DDR frequency of the electronic device during a second time period according to the first DDR frequency; Wherein, the first time period and the second time period are time periods in the same frame of image, and the first time period is earlier than the second time period; Specifically, the determining module is used to determine the maximum operating frequency among the M operating frequencies as the first operating frequency; and to determine the first DDR frequency corresponding to the first operating frequency based on the first operating frequency and the first mapping relationship. The acquisition module is further configured to acquire the application running frame rate and the first rendering duration of N frames before acquiring the M working frequencies, wherein the first rendering duration is the average rendering duration of the previous N frames of the current frame, and N is a positive integer; The determining module is further configured to determine a target duration based on the application's running frame rate and the first drawing duration; and to determine the first time period within the time period for drawing the current frame image based on the target duration.

6. The apparatus according to claim 5, characterized in that, The acquisition module is specifically used for: Obtain M first working cycles and M second working cycles, wherein the M first working cycles are the number of working cycles that the M CPUs have run at the first time point, and the M second working cycles are the number of working cycles that the M CPUs have run at the second time point, wherein the first time point is the start time of the first time period, and the second time point is the end time of the first time period; Based on the number of the first working cycles, the number of the second working cycles, and the duration of the first time period, the i-th working frequency is determined, and the M working frequencies are obtained, i∈[1,M].

7. The apparatus according to claim 5 or 6, characterized in that, The determining module is specifically used for: The time period corresponding to the target duration starting from the start time of the time period in which the current frame image is drawn is determined as the first time period.

8. The apparatus according to claim 5 or 6, characterized in that, The determining module is specifically used for: Based on the application's running frame rate, determine the single-frame rendering duration of a single frame image; Determine the minimum rendering duration between the single-frame rendering duration and the first rendering duration; Based on the minimum drawing time, the target drawing time is determined, and the target drawing time is less than the minimum drawing time.

9. An electronic device, characterized in that, It includes a processor and a memory, the memory storing a program or instructions that can run on the processor, the program or instructions being executed by the processor to implement the steps of the DDR frequency adjustment method as described in any one of claims 1 to 4.

10. A readable storage medium, characterized in that, The readable storage medium stores a program or instructions that, when executed by a processor, implement the steps of the DDR frequency adjustment method as described in any one of claims 1 to 4.

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