Starting-up fault positioning method and device, equipment and storage medium

Abstract

The invention provides a power-on fault positioning method and device, equipment and a storage medium, and the method comprises the steps: setting a data register of a substrate management controller according to a power-on time sequence of a server, and enabling the power-on time sequence to comprise a plurality of power-on operations; receiving a power-on signal corresponding to the current power-on operation of the server, and judging whether the power-on signal meets a preset condition or not; if the preset condition is met, updating data of a data register of the substrate management controller, and receiving a startup signal corresponding to the next power-on operation of the server according to the power-on time sequence; and if the preset condition is not met, stopping a startup process, converting data of a data register of the substrate management controller into binary data, and sending the binary data to indication equipment so as to position a fault according to the indication equipment.

Description

Technical Field

[0001] The present invention relates to the technical field of servers, and in particular to a method, device, equipment and storage medium for locating a startup fault. Background Art

[0002] During the server startup process, a certain power-on sequence must be followed to ensure reliable working conditions. The control signal is pushed forward one level at a time, and the signal level of the next level is pushed up after the previous level reaches the normal level. In this process, there are various reasons that may cause the server to fail to start normally, including hardware failure and software failure.

[0003] In order to troubleshoot the problem, it is necessary to analyze the fault according to the prompt information given by the server. At present, after a fault occurs, the BMC (Baseboard Management Controller) displays the stalled node information through the display, which can only display the code that stopped during the boot process before the server enters the system or the fault log that stopped when the system failed. It is difficult to quickly locate the process information and cannot locate whether it is caused by the hardware not sending a signal or the software receiving a signal abnormally.

[0004] On the other hand, if the fault is due to abnormal power output, it is necessary to check the abnormalities of related signals and confirm the root cause of the problem. The troubleshooting process is cumbersome and time-consuming.

[0005] In addition, with the rise of edge computing demand, more and more servers are no longer deployed in computer rooms, but distributed in service terminals. Servers are often not equipped with displays when running. In this case, it is more difficult for users to analyze BMC failures.

[0006] Therefore, in view of the shortcomings of the prior art solutions, the present invention provides a method for locating a power-on fault. Summary of the invention

[0007] Based on this, it is necessary to provide a power-on fault locating method, device, equipment and storage medium to address the above technical issues.

[0008] On the one hand, a method for locating a power-on fault is provided, the method comprising: setting a data register of a baseboard management controller according to a power-on sequence of a server, wherein the power-on sequence comprises a plurality of power-on operations; receiving a power-on signal corresponding to a current power-on operation of the server, and determining whether the power-on signal satisfies a preset condition; if the preset condition is satisfied, updating data in the data register of the baseboard management controller, and receiving a power-on signal corresponding to a next power-on operation of the server according to the power-on sequence; if the preset condition is not satisfied, stopping the power-on process, converting the data in the data register of the baseboard management controller into binary data, and sending the binary data to an indication device, so as to locate the fault according to the indication device.

[0009] Optionally, receiving a power-on signal corresponding to the current power-on operation of the server and determining whether the power-on signal meets a preset condition include: monitoring and receiving a time interval between a power-on signal corresponding to the current power-on operation of the server and a power-on signal corresponding to the previous power-on operation; comparing the time interval with a preset standard time interval, and when the time interval is greater than the standard time interval, the power-on signal does not meet the preset condition; when the time interval is less than or equal to the standard time interval, determining whether the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence; if the power-on signal corresponding to the current power-on operation is different from the standard power-on signal corresponding to the current power-on operation in the power-on sequence, the power-on signal does not meet the preset condition; if the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and determining a difference between a threshold of the power-on signal and a preset standard threshold; when the threshold of the power-on signal is less than the standard threshold, the power-on signal does not meet the preset condition; when the threshold of the power-on signal is greater than or equal to the standard threshold, the power-on signal meets the preset condition.

[0010] Optionally, after sending the binary data to the indicating device, the method further includes: determining whether the node corresponding to the data of the data register of the baseboard management controller is a power signal node according to the power-on timing; when the node is a power signal node, obtaining multiple power sub-signals corresponding to the power signal node; determining status digital information corresponding to the power signal node according to the multiple power sub-signals; and sending the status digital information to the indicating device.

[0011] Optionally, determining the state digital information corresponding to the power signal node based on the multiple power sub-signals includes: acquiring the level value of each power sub-signal to obtain the level value code corresponding to the power signal node; and determining the state digital information corresponding to the power signal node based on the level value code.

[0012] Optionally, setting the data register of the baseboard management controller according to the power-on sequence of the server includes: determining a correspondence table between each data in the data register of the baseboard management controller and the power-on operation according to the power-on sequence of the server; and setting the data register of the baseboard management controller according to the correspondence table.

[0013] Optionally, the method further includes: determining a data range of a data register of a baseboard management controller according to the power-on sequence; and determining the number of the indicating devices according to the data range of the data register.

[0014] Optionally, sending the status digital information to an indicating device includes: presetting a sending time interval; and sending the binary data and the status digital information to the indicating device in sequence according to the sending time interval.

[0015] On the other hand, a power-on fault locating device is provided, the device comprising: a setting module, used to set a data register of a baseboard management controller according to a power-on sequence of a server, wherein the power-on sequence comprises a plurality of power-on operations; a judgment module, used to receive a power-on signal corresponding to a current power-on operation of the server, and judge whether the power-on signal satisfies a preset condition; a first processing module, used to update the data of the data register of the baseboard management controller if the preset condition is met, and receive a power-on signal corresponding to a next power-on operation of the server according to the power-on sequence; and a second processing module, used to stop the power-on process if the preset condition is not met, convert the data of the data register of the baseboard management controller into binary data, and send the binary data to an indication device, so as to locate the fault according to the indication device.

[0016] On the other hand, a computer device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program: setting a data register of a baseboard management controller according to a power-on sequence of a server, wherein the power-on sequence includes multiple power-on operations; receiving a power-on signal corresponding to a current power-on operation of the server, and determining whether the power-on signal satisfies a preset condition; if the preset condition is satisfied, updating data in the data register of the baseboard management controller, and receiving a power-on signal corresponding to a next power-on operation of the server according to the power-on sequence; if the preset condition is not satisfied, stopping the power-on process, converting the data in the data register of the baseboard management controller into binary data, and sending the binary data to an indication device, so as to locate the fault according to the indication device.

[0017] On the other hand, a computer-readable storage medium is provided, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented: according to the power-on sequence of the server, a data register of a baseboard management controller is set, wherein the power-on sequence includes multiple power-on operations; a power-on signal corresponding to the current power-on operation of the server is received, and it is determined whether the power-on signal meets a preset condition; if the preset condition is met, the data in the data register of the baseboard management controller is updated, and according to the power-on sequence, a power-on signal corresponding to the next power-on operation of the server is received; if the preset condition is not met, the power-on process is stopped, the data in the data register of the baseboard management controller is converted into binary data, and the binary data is sent to an indication device, so as to locate the fault according to the indication device.

[0018] The above-mentioned power-on fault locating method, device, equipment and storage medium, the method includes: setting the data register of the baseboard management controller according to the power-on sequence of the server, wherein the power-on sequence includes multiple power-on operations; receiving the power-on signal corresponding to the current power-on operation of the server, and judging whether the power-on signal meets the preset conditions; if the preset conditions are met, updating the data of the data register of the baseboard management controller, and receiving the power-on signal corresponding to the next power-on operation of the server according to the power-on sequence; if the preset conditions are not met, stopping the power-on process, converting the data of the data register of the baseboard management controller into binary data, and sending the binary data to the indicating device to locate the fault according to the indicating device; in this way, the specific fault problems at different nodes of the power-on process are indicated by the different on and off of the indicating device. At the same time, the need for a display can be avoided in a complex environment outside the computer room, and the power-on problem node can be quickly located by observing the on and off of the indicating device. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A schematic diagram of a process of locating a startup fault in an embodiment;

[0020] Figure 2 A schematic diagram of the structure of a startup fault locating method in one embodiment;

[0021] Figure 3 A schematic diagram of a fault location flow of a startup fault location method in an embodiment;

[0022] Figure 4 is a structural block diagram of a startup fault locating device in an embodiment;

[0023] Figure 5 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the drawings in the embodiments of this application. Obviously, the described embodiments are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0025] It should be understood that in the description of the present application, unless the context clearly requires otherwise, words such as "include", "comprises", and the like throughout the specification should be interpreted as inclusive rather than exclusive or exhaustive; that is, the meaning of "including but not limited to".

[0026] It should also be understood that the terms "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. In addition, in the description of this application, unless otherwise specified, "plurality" means two or more.

[0027] It should be noted that the terms "S1", "S2", etc. are only used for the purpose of describing the steps, and do not specifically refer to the order or sequence, nor are they used to limit the present application. They are only for the convenience of describing the method of the present application, and cannot be understood as indicating the order of the steps. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in this field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present application.

[0028] In one embodiment, Figure 1 As shown, a startup fault location method is provided, which is applied to BMC and includes the following steps:

[0029] S101: setting a data register of a baseboard management controller according to a power-on sequence of a server, wherein the power-on sequence includes a plurality of power-on operations.

[0030] Here, the power-on sequence is a series of steps and sequence for a device to enter a normal working state from a no-power state after the power is turned on. Different devices have different power-on sequences.

[0031] Specifically, one power-on operation corresponds to the value of one data register.

[0032] S102: Receive a power-on signal corresponding to the current power-on operation of the server, and determine whether the power-on signal meets a preset condition.

[0033] Here, the preset conditions may be multi-dimensional conditions, which may include whether voltage level, current intensity, duration, safety check, environmental conditions, signal frequency, signal type, external input and software check etc. meet the conditions.

[0034] The power-on signal may include a status signal corresponding to the status signal node, and may also include a power signal corresponding to the power signal node.

[0035] Specifically, the status signals and power signals of the server startup are connected to the BMC. After the PSU (Power Supply Unit) is powered on, the BMC starts. At this time, the data register inside the BMC jumps from 0 to 1. The server startup signal increases according to the power-on sequence and sends a signal to the BMC. The startup signal advances one level at a time. After the upper level signal reaches the normal level, it pushes the next level signal level to increase. When the BMC receives the increase of the first level startup signal, the value of the BMC data register increases by 1.

[0036] In an embodiment, it may also include that if a power-on signal corresponding to the current power-on operation is not received within a preset time, then the power-on signal does not meet the preset condition.

[0037] S103: If the preset condition is met, the data in the data register of the baseboard management controller is updated, and according to the power-on sequence, a power-on signal corresponding to the next power-on operation of the server is received.

[0038] Here, updating the data of the data register of the BMC may be adding 1 to the data of the data register of the BMC.

[0039] Specifically, when the power-on signal corresponding to the current power-on operation meets the preset condition, the power-on process continues to be executed according to the power-on sequence, and it is received and determined whether the power-on signal corresponding to the next power-on operation meets the preset condition until the power-on is completed.

[0040] S104: If the preset condition is not met, stop the boot process, convert the data of the data register of the baseboard management controller into binary data, and send the binary data to an indication device to locate the fault according to the indication device.

[0041] Here, the indicating device may be an LED light.

[0042] Among them, the nodes corresponding to the server may include a power signal node and a status signal node. The power signal node includes a VR (Voltage Regulator, power chip) chip, etc., and the status signal node includes a CPU, memory, etc.

[0043] Specifically, the data in the register is converted into binary data, and the binary data is sent to the indicating device. The indicating device indicates 0 or 1 by turning on or off, and the binary data is displayed by multiple indicating devices.

[0044] For example, assuming that the indicating device includes eight light emitting diodes, and an error occurs in the fifth power-on operation, the data 5 is converted into 00000100, and the eight light emitting diodes indicate off-off-off-off-off on-off-off.

[0045] It should be noted that the present application connects BMC, CPU (Central Processing Unit), PCH (Platform Controller Hub), memory and other devices, and uses LED lights to intuitively indicate the circuit status. The different on and off of LED lights indicate problems at different nodes during the startup process, and the status information of the power supply node can be quickly located. In addition, the need for a display can be avoided in complex environments outside the computer room, and startup failures can be quickly located by observing the on and off of LED lights.

[0046] In some specific implementations, receiving a power-on signal corresponding to the current power-on operation of the server, and determining whether the power-on signal satisfies a preset condition includes:

[0047] Monitoring and receiving a time interval between a power-on signal corresponding to a current power-on operation of the server and a power-on signal corresponding to a previous power-on operation;

[0048] Comparing the time interval with a preset standard time interval, when the time interval is greater than the standard time interval, the power-on signal does not meet the preset condition;

[0049] When the time interval is less than or equal to the standard time interval, determining whether the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence;

[0050] The power-on signal corresponding to the current power-on operation is different from the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and the power-on signal does not meet the preset condition;

[0051] The power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and the magnitude of the threshold of the power-on signal and the preset standard threshold is determined;

[0052] When the threshold of the power-on signal is less than the standard threshold, the power-on signal does not meet the preset condition;

[0053] When the threshold of the power-on signal is greater than or equal to the standard threshold, the power-on signal meets a preset condition.

[0054] Here, the standard time interval and the standard threshold value can be changed according to user needs. For example, the standard time interval can be 60 seconds or 50 seconds.

[0055] The time interval not meeting the requirement may include that the BMC does not receive a new power-on signal within a standard time interval, or may include that the time interval between two power-on signals received by the BMC is greater than the standard time interval.

[0056] Specifically, by judging the time interval for receiving the power-on signal, the content of the power-on signal and the threshold of the power-on signal, it is determined whether the power-on signal meets the conditions.

[0057] In this way, the node with the fault can be specifically located.

[0058] In some specific implementations, after sending the binary data to the indicating device, the method further includes:

[0059] According to the power-on timing sequence, determining whether a node corresponding to data of a data register of the baseboard management controller is a power signal node;

[0060] When the node is a power signal node, obtaining a plurality of power sub-signals corresponding to the power signal node;

[0061] Determining state digital information corresponding to the power signal node according to the multiple power sub-signals;

[0062] The status digital information is sent to the indicating device.

[0063] Here, the power signal node may be a VR chip.

[0064] Among them, the power sub-signal may include an EN (Enable) signal, a VIN (Voltage Input) signal, a PG (Power Good) signal, and a VOUT (Voltage Output) signal.

[0065] Specifically, after the BMC sends out an alarm message, it determines whether the current stalled node is a power signal node. If not, the process is terminated. If so, it determines whether the VIN, EN, VOUT, and PG signals of the power signal node are normal, and sends the status information of the power signal node to the indicating device, and displays the status information of the power signal node by turning the indicating device on and off.

[0066] In this way, when the fault is caused by an abnormality in the power signal node, it is possible to avoid the need to confirm the root cause of the problem by troubleshooting the abnormalities in the corresponding VIN, EN, PG and other related signals. The fault problem of the power signal node can be directly determined, thereby improving the efficiency of fault location.

[0067] In some specific implementations, determining the state digital information corresponding to the power signal node according to the multiple power sub-signals includes:

[0068] Obtaining the level value of each power sub-signal to obtain the level value code corresponding to the power signal node;

[0069] According to the level value code, state digital information corresponding to the power signal node is determined.

[0070] Here, the level value includes a high level and a low level, and the level value is encoded as a binary code corresponding to the high level and the low level.

[0071] Specifically, the power sub-signal of the power chip (i.e., the power signal node) is obtained, and based on the obtained power sub-signal, the state digital information corresponding to the power chip is determined. The power sub-signal includes an EN signal, a VIN signal, a PG signal, and a VOUT signal. According to the different high and low levels of the VIN, EN, PG, and VOUT signals, the level value encoding of the power chip is obtained according to the preset signal arrangement rules, such as the order of VIN, EN, PG, and VOUT, and the high and low levels of each signal. Depending on the state, the BMC will output the following 7 types of data, as shown in Table 1:

[0072]

[0073]

[0074] Table 1

[0075] Among them, the VIN signal, EN signal, PG signal, and VOUT signal are all high levels, and the level value is encoded as 1111; the VIN signal, EN signal, PG signal, and VOUT signal are high-high-low-low levels, respectively, and the level value is encoded as 1100; the VIN signal, EN signal, PG signal, and VOUT signal are high-low-low-low levels, respectively, and the level value is encoded as 1000; the VIN signal, EN signal, PG signal, and VOUT signal are low-high-low-low levels, respectively, and the level value is encoded as 0100; the VIN signal, EN signal, PG signal, and VOUT signal are high-high-high-low levels, respectively, and the level value is encoded as 1110; the VIN signal, EN signal, PG signal, and VOUT signal are high-high-low-high levels, respectively, and the level value is encoded as 1101; the VIN signal, EN signal, PG signal, and VOUT signal are all low levels, and the level value is encoded as 0000.

[0076] In this way, the fault point of the power signal node can be quickly located.

[0077] In some specific implementations, setting the data register of the baseboard management controller according to the power-on timing of the server includes:

[0078] Determine a correspondence table between each data in the data register of the baseboard management controller and the power-on operation according to the power-on timing of the server;

[0079] According to the correspondence table, a data register of the baseboard management controller is set.

[0080] The corresponding table includes each node and power-on operation, and also includes state digital information corresponding to the power signal node.

[0081] Specifically, a correspondence table between the data in the BMC data register and the power-on signal is pre-constructed, including nodes corresponding to the power-on signal, and the correspondence table is stored in the BMC data register.

[0082] Exemplarily, assuming the power-on sequence is 5, the data in the data register is 5, and the corresponding power-on operation is to receive the DDR_PWROK_AB signal sent by the CPU.

[0083] In some embodiments, the method further comprises:

[0084] Determining a data range of a data register of a baseboard management controller according to the power-on timing sequence;

[0085] The number of the indicating devices is determined according to the data range of the data register.

[0086] Here, the number of indicating devices may match the data range or may be greater than the data range. For example, when the power-on sequence includes 30 steps, the corresponding data register has a data range of 0-30, and accordingly, the number of indicating devices may be greater than or equal to 4.

[0087] Furthermore, the number of indicating devices needs to be greater than the number of level value codes corresponding to the power signal nodes.

[0088] In this way, it can be ensured that all failed nodes and power-on signals can be indicated.

[0089] In some specific implementations, sending the status digital information to an indicating device includes:

[0090] Preset sending time interval;

[0091] According to the sending time interval, the binary data and the status digital information are sent to the indicating device in sequence.

[0092] Here, the sending time interval can be adjusted by the user according to needs, for example, the sending time interval can be 60 seconds.

[0093] Specifically, when the faulty node is a power signal node, the status information of the faulty node is sent to the indicating device for a period of time, and then the status information of the power signal node is sent to the indicating device.

[0094] In this way, confusion between fault location and fault of power signal node can be prevented.

[0095] In some embodiments, the method further comprises:

[0096] Acquire multiple normal startup processes of the server to obtain a historical data set;

[0097] Determine, according to the historical data set, an average time interval between receiving a power-on signal corresponding to a current power-on operation in history and a power-on signal corresponding to a next power-on operation in history, wherein the average time interval is less than the standard time interval;

[0098] Monitor and receive the time interval between a power-on signal corresponding to the current power-on operation of the server and a power-on signal corresponding to the previous power-on operation, compare the time interval with the average time interval and the standard time interval, and when the time interval is less than the standard time interval and greater than the average time interval, determine that there is a potential abnormality in the current power-on operation, and record data in a data register corresponding to the power-on operation;

[0099] After the power-on process is completed, the binary data corresponding to the power-on signal with potential abnormality is sent to the indicating device, so as to indicate the power-on operation with potential abnormality according to the indicating device.

[0100] Here, the power-on signal corresponding to the current power-on operation and the power-on signal corresponding to the next power-on operation are adjacent power-on signals.

[0101] Among them, the node indicating the presence of potential abnormalities is indicated when the boot process is completed normally, and multiple power-on operations with potential abnormalities can be indicated in sequence; the corresponding node with potential abnormalities can be determined based on multiple power-on operations with potential abnormalities.

[0102] Specifically, the indicating device may have multiple brightnesses, wherein the first brightness is used to indicate a faulty node, and the second brightness is used to indicate a node with a potential abnormality. Alternatively, the indicating device may have multiple colors, wherein the first color indicates a faulty node, and the second color indicates a node with a potential abnormality.

[0103] In this way, potential abnormal nodes can be indicated so that users can handle the nodes in advance.

[0104] In one embodiment, Figure 2 It is a schematic diagram of the structure in the embodiment of the present application, such as Figure 2 As shown, the structure in the present application includes: the status signals and power signals of VR, CPLD, CPU and memory, etc. are connected to BMC.

[0105] Specifically, the memory sends DDR_PWROK_AB and DDR_PWROK_CD to the BMC, the CPU sends PWRGD_S0_PWROK_CPU and M_CD_CPU_RESET_N to the BMC; the VR sends P3V3, P5V, PVCCIN and PVCCFA_EHV to the BMC, and the VR sends PVCCIN_PG and PVCCFA_EHV_PG to the CPLD; the CPLD sends P3V3_EN, P5V_EN, PVCCIN_PG and PVCCFA_EHV_PG to the BMC, and the CPLD sends P3V3_EN and P5V_EN to the VR.

[0106] In one embodiment, Figure 3 FIG. 1 is a schematic diagram of a fault location process in an embodiment of the present application. Figure 3 As shown, the fault location process includes: S301: AC power on; S302: BMC starts, and the data register jumps from 0 to 1; S303: receiving the server current status power-on signal, if not received, execute S305: BMC converts the current data register data into binary data and passes it to the LED light; if received, execute S304: determine whether the threshold is met; if the threshold is met, execute S303, if the threshold is not met, execute S305; S306: The LED light receives the BMC instruction to control the on and off.

[0107] Specifically, the steps may include:

[0108] S1: Connect the VR chip, CPU, BMC, memory, LED lamp, etc. according to the present invention;

[0109] S2: PSU is powered on and the server enters the boot state;

[0110] S3: BMC starts, and the boot data register jumps from 0 to 1;

[0111] S4: The server power-on signal increases in the power-on sequence and sends a signal to the BMC;

[0112] S5: BMC receives the signal and determines whether the signal is normal (whether it is higher than the set threshold). If it is normal, the data in the boot data register will be incremented by 1. If it is abnormal, the boot process will be stopped and the LED light will be controlled to turn on and off to display the circuit status.

[0113] S6: When the BMC does not receive a new power-on signal after receiving the previous level signal for 60 seconds, it converts the register data at this time into secondary data transmission, and controls the LED light to display the circuit status.

[0114] S7: After the BMC sends out the alarm information, it determines whether the current stalled node is a power signal node. If so, it determines whether the power signal VIN, EN, VOUT, and PG signals are normal. After 60 seconds, it sends the power signal status information to the LED light, and controls the LED light to turn on and off to display the power node status information.

[0115] It should be understood that although Figure 1-3 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1-3 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0116] In one embodiment, Figure 4 As shown, a power-on fault locating device is provided, and the device includes: a setting module 401, used for setting a data register of a baseboard management controller according to a power-on sequence of a server, wherein the power-on sequence includes multiple power-on operations; a judgment module 402, used for receiving a power-on signal corresponding to a current power-on operation of the server, and judging whether the power-on signal meets a preset condition; a first processing module 403, used for updating the data of the data register of the baseboard management controller if the preset condition is met, and receiving a power-on signal corresponding to a next power-on operation of the server according to the power-on sequence; a second processing module 404, used for stopping the power-on process if the preset condition is not met, converting the data of the data register of the baseboard management controller into binary data, and sending the binary data to an indication device, so as to locate the fault according to the indication device.

[0117] As a preferred implementation mode, in the embodiment of the present application, the judgment module 402 is specifically used to: monitor and receive the time interval between the power-on signal corresponding to the current power-on operation of the server and the power-on signal corresponding to the previous power-on operation; compare the time interval with the preset standard time interval, when the time interval is greater than the standard time interval, the power-on signal does not meet the preset condition; when the time interval is less than or equal to the standard time interval, determine whether the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence; the power-on signal corresponding to the current power-on operation is different from the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and the power-on signal does not meet the preset condition; the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and determine the size of the threshold of the power-on signal and the preset standard threshold; when the threshold of the power-on signal is less than the standard threshold, the power-on signal does not meet the preset condition; when the threshold of the power-on signal is greater than or equal to the standard threshold, the power-on signal meets the preset condition.

[0118] As a preferred implementation manner, in an embodiment of the present application, the device also includes: a third processing module, and the third processing module is specifically used to: determine whether the node corresponding to the data of the data register of the baseboard management controller is a power signal node according to the power-on timing; when the node is a power signal node, obtain multiple power sub-signals corresponding to the power signal node; determine the status digital information corresponding to the power signal node according to the multiple power sub-signals; and send the status digital information to the indication device.

[0119] As a preferred implementation manner, in an embodiment of the present application, the third processing module is specifically used to: obtain the level value of each power sub-signal to obtain the level value code corresponding to the power signal node; and determine the state digital information corresponding to the power signal node according to the level value code.

[0120] As a preferred implementation, in the embodiment of the present application, the setting module 401 is specifically used to: determine the correspondence table between each data in the data register of the baseboard management controller and the power-on operation according to the power-on timing of the server; and set the data register of the baseboard management controller according to the correspondence table.

[0121] As a preferred implementation, in an embodiment of the present application, the device also includes: a quantity determination module, which is specifically used to: determine the data range of the data register of the baseboard management controller according to the power-on timing; determine the number of the indicating devices according to the data range of the data register.

[0122] As a preferred implementation, in the embodiment of the present application, the third processing module is further specifically used to: preset a sending time interval; and send the binary data and the status digital information to the indicating device in sequence according to the sending time interval.

[0123] For the specific definition of the power-on fault locating device, please refer to the definition of the power-on fault locating method above, which will not be repeated here. Each module in the above-mentioned power-on fault locating device can be implemented in whole or in part by software, hardware and a combination thereof. The above-mentioned modules can be embedded in or independent of the processor in the computer device in the form of hardware, or can be stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to the above modules.

[0124] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 5 As shown. The computer device includes a processor, a memory, and a network interface connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a method for locating a power-on fault is implemented.

[0125] Those skilled in the art will understand that Figure 5 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0126] In one embodiment, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the following steps when executing the computer program: S1: setting a data register of a baseboard management controller according to a power-on sequence of a server, wherein the power-on sequence includes a plurality of power-on operations; S2: receiving a power-on signal corresponding to a current power-on operation of the server, and determining whether the power-on signal satisfies a preset condition; S3: if the preset condition is satisfied, updating the data in the data register of the baseboard management controller, and receiving a power-on signal corresponding to a next power-on operation of the server according to the power-on sequence; S4: if the preset condition is not satisfied, stopping the power-on process, converting the data in the data register of the baseboard management controller into binary data, and sending the binary data to an indication device, so as to locate the fault according to the indication device.

[0127] In one embodiment, when the processor executes the computer program, the following steps are also implemented: monitoring and receiving the time interval between the power-on signal corresponding to the current power-on operation of the server and the power-on signal corresponding to the previous power-on operation; comparing the time interval with a preset standard time interval, when the time interval is greater than the standard time interval, the power-on signal does not meet the preset condition; when the time interval is less than or equal to the standard time interval, judging whether the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence; the power-on signal corresponding to the current power-on operation is different from the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and the power-on signal does not meet the preset condition; the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and judging the size of the threshold of the power-on signal and the preset standard threshold; when the threshold of the power-on signal is less than the standard threshold, the power-on signal does not meet the preset condition; when the threshold of the power-on signal is greater than or equal to the standard threshold, the power-on signal meets the preset condition.

[0128] In one embodiment, when the processor executes the computer program, the following steps are also implemented: according to the power-on timing, determining whether the node corresponding to the data of the data register of the baseboard management controller is a power signal node; when the node is a power signal node, obtaining multiple power sub-signals corresponding to the power signal node; according to the multiple power sub-signals, determining the status digital information corresponding to the power signal node; and sending the status digital information to the indication device.

[0129] In one embodiment, when the processor executes the computer program, the following steps are also implemented: acquiring the level value of each power sub-signal to obtain the level value code corresponding to the power signal node; and determining the state digital information corresponding to the power signal node according to the level value code.

[0130] In one embodiment, when the processor executes the computer program, the following steps are also implemented: according to the power-on timing of the server, a correspondence table between each data in the data register of the baseboard management controller and the power-on operation is determined; according to the correspondence table, the data register of the baseboard management controller is set.

[0131] In one embodiment, when the processor executes the computer program, the following steps are also implemented: determining the data range of the data register of the baseboard management controller according to the power-on timing sequence; and determining the number of the indicating devices according to the data range of the data register.

[0132] In one embodiment, when the processor executes the computer program, the following steps are further implemented: presetting a sending time interval; and sending the binary data and the status digital information to the indicating device in sequence according to the sending time interval.

[0133] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, and the following steps are implemented when the computer program is executed by a processor: S1: according to the power-on sequence of the server, a data register of the baseboard management controller is set, wherein the power-on sequence includes multiple power-on operations; S2: receiving a power-on signal corresponding to the current power-on operation of the server, and judging whether the power-on signal satisfies a preset condition; S3: if the preset condition is satisfied, updating the data of the data register of the baseboard management controller, and according to the power-on sequence, receiving the power-on signal corresponding to the next power-on operation of the server; S4: if the preset condition is not satisfied, stopping the power-on process, converting the data of the data register of the baseboard management controller into binary data, and sending the binary data to an indication device, so as to locate the fault according to the indication device.

[0134] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: monitoring and receiving the time interval between the power-on signal corresponding to the current power-on operation of the server and the power-on signal corresponding to the previous power-on operation; comparing the time interval with a preset standard time interval, when the time interval is greater than the standard time interval, the power-on signal does not meet the preset condition; when the time interval is less than or equal to the standard time interval, judging whether the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence; the power-on signal corresponding to the current power-on operation is different from the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and the power-on signal does not meet the preset condition; the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and judging the difference between the threshold of the power-on signal and the preset standard threshold; when the threshold of the power-on signal is less than the standard threshold, the power-on signal does not meet the preset condition; when the threshold of the power-on signal is greater than or equal to the standard threshold, the power-on signal meets the preset condition.

[0135] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: according to the power-on timing, determining whether the node corresponding to the data of the data register of the baseboard management controller is a power signal node; when the node is a power signal node, obtaining multiple power sub-signals corresponding to the power signal node; according to the multiple power sub-signals, determining the status digital information corresponding to the power signal node; and sending the status digital information to the indication device.

[0136] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: acquiring the level value of each power sub-signal to obtain the level value code corresponding to the power signal node; and determining the state digital information corresponding to the power signal node according to the level value code.

[0137] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: according to the power-on timing of the server, a correspondence table between each data in the data register of the baseboard management controller and the power-on operation is determined; according to the correspondence table, the data register of the baseboard management controller is set.

[0138] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: determining the data range of the data register of the baseboard management controller according to the power-on sequence; and determining the number of the indicating devices according to the data range of the data register.

[0139] In one embodiment, when the computer program is executed by the processor, the following steps are also implemented: presetting a sending time interval; and sending the binary data and the status digital information to the indicating device in sequence according to the sending time interval.

[0140] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0141] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0142] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A method for locating a startup fault, characterized in that: The method comprises: Setting a data register of a baseboard management controller according to a power-on sequence of the server, wherein the power-on sequence includes a plurality of power-on operations; Receiving a power-on signal corresponding to the current power-on operation of the server, and determining whether the power-on signal meets a preset condition; If the preset condition is met, the data of the data register of the baseboard management controller is updated, and according to the power-on sequence, a power-on signal corresponding to the next power-on operation of the server is received; If the preset condition is not met, the boot process is stopped, the data of the data register of the baseboard management controller is converted into binary data, and the binary data is sent to the indicating device to locate the fault according to the indicating device.

2. The startup fault location method according to claim 1, characterized in that: The receiving a power-on signal corresponding to the current power-on operation of the server, and determining whether the power-on signal meets a preset condition, includes: Monitoring and receiving a time interval between a power-on signal corresponding to a current power-on operation of the server and a power-on signal corresponding to a previous power-on operation; Comparing the time interval with a preset standard time interval, when the time interval is greater than the standard time interval, the power-on signal does not meet the preset condition; When the time interval is less than or equal to the standard time interval, determining whether the power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence; The power-on signal corresponding to the current power-on operation is different from the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and the power-on signal does not meet the preset condition; The power-on signal corresponding to the current power-on operation is the same as the standard power-on signal corresponding to the current power-on operation in the power-on sequence, and the magnitude of the threshold of the power-on signal and the preset standard threshold is determined; When the threshold of the power-on signal is less than the standard threshold, the power-on signal does not meet the preset condition; When the threshold of the power-on signal is greater than or equal to the standard threshold, the power-on signal meets a preset condition.

3. The startup fault location method according to claim 1, characterized in that: After sending the binary data to the indicating device, the method further comprises: According to the power-on timing sequence, determining whether a node corresponding to data of a data register of the baseboard management controller is a power signal node; When the node is a power signal node, obtaining a plurality of power sub-signals corresponding to the power signal node; Determining state digital information corresponding to the power signal node according to the multiple power sub-signals; The status digital information is sent to the indicating device.

4. The startup fault location method according to claim 3, characterized in that: Determining the state digital information corresponding to the power signal node according to the multiple power sub-signals includes: Obtaining the level value of each power sub-signal to obtain the level value code corresponding to the power signal node; According to the level value code, state digital information corresponding to the power signal node is determined.

5. The startup fault location method according to claim 1, characterized in that: The step of setting the data register of the baseboard management controller according to the power-on timing of the server includes: Determine a correspondence table between each data in the data register of the baseboard management controller and the power-on operation according to the power-on timing of the server; According to the correspondence table, a data register of the baseboard management controller is set.

6. The startup fault location method according to claim 1, characterized in that: The method further comprises: Determining a data range of a data register of a baseboard management controller according to the power-on timing sequence; The number of the indicating devices is determined according to the data range of the data register.

7. The startup fault location method according to claim 3, characterized in that: The step of sending the state digital information to an indicating device comprises: Preset sending time interval; According to the sending time interval, the binary data and the status digital information are sent to the indicating device in sequence.

8. A startup fault location device, characterized in that: The device comprises: A setting module, used to set a data register of a baseboard management controller according to a power-on sequence of the server, wherein the power-on sequence includes a plurality of power-on operations; A judgment module, used for receiving a power-on signal corresponding to the current power-on operation of the server, and judging whether the power-on signal meets a preset condition; A first processing module, configured to update the data of the data register of the baseboard management controller if the preset condition is met, and receive a power-on signal corresponding to the next power-on operation of the server according to the power-on sequence; The second processing module is used to stop the boot process if the preset condition is not met, convert the data of the data register of the baseboard management controller into binary data, and send the binary data to the indicating device to locate the fault according to the indicating device.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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