Performance detection method and device of network-on-chip, electronic equipment and storage medium

Abstract

The embodiment of the invention provides a performance detection method and device for a network-on-chip, electronic equipment and a storage medium, and relates to the technical field of computers, and the method comprises the following steps: configuring a performance monitoring unit in each subsystem of the network-on-chip; the performance monitoring unit is used for monitoring the input flow of each channel in the subsystem in real time; according to the configured mask information, carrying out statistics on the input flow of the subsystem; summarizing the statistical information of each performance monitoring unit to obtain statistical data corresponding to the network on chip; and analyzing the flow distribution condition of the network on chip according to the statistical data. According to the embodiment of the invention, the performance analysis efficiency of the network-on-chip can be improved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a performance detection method, device, electronic device and storage medium for a network on chip. Background Art

[0002] As processors become more complex, their on-chip interconnect structures evolve from traditional buses to on-chip networks. Network-on-Chip (NoC) is a communication network structure implemented on an integrated circuit chip that connects various functional modules, processor cores, storage units, and other important components on the chip. With the increase in chip integration and the rise of multi-core processors, NoC becomes increasingly important because it provides an efficient, low-latency communication method within the chip.

[0003] Large-scale on-chip networks have very high requirements for performance testing. During the operation of large-scale on-chip networks, many performance characteristics cannot be captured, which is not conducive to performance testing and analysis of on-chip networks. Summary of the invention

[0004] The embodiments of the present invention provide a method, device, electronic device and storage medium for detecting performance of a network on a chip, which can solve the problem of performance characteristics of a large network on a chip that cannot be captured in related technologies.

[0005] On the one hand, an embodiment of the present invention discloses a performance detection method of a network on chip, the method comprising: configuring a performance monitoring unit in each subsystem of the on-chip network; Using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time; Counting the input traffic of the subsystem according to the configured mask information; Summarizing the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; The traffic distribution of the on-chip network is analyzed according to the statistical data.

[0006] Optionally, the counting of input traffic of the subsystem according to the configured mask information includes: A set of registers is configured for each performance monitoring unit; Obtaining mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; Statistics are collected on input traffic in the subsystem that matches the mask information, and the statistical information is written into a register corresponding to the mask information.

[0007] Optionally, the statistical information of each performance monitoring unit is aggregated to obtain statistical data corresponding to the network on chip, including: Extract statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit; The extracted statistical information is summarized to obtain statistical data corresponding to the on-chip network.

[0008] Optionally, the counting of input traffic of the subsystem according to the configured mask information includes: Parsing the mask information to determine target features indicated in the mask information; Matching the message monitored by the performance monitoring unit with the target feature; If there is a field in the message that matches the target feature, the message is determined as a target message that conforms to the mask information; The number of the target messages is counted, and data collection is performed on the target messages according to the target characteristics.

[0009] Optionally, before counting the input traffic of the subsystem according to the configured mask information, the method further includes: receiving a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information; The first scheduling instruction is executed to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

[0010] Optionally, the using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time includes: Using a performance monitoring unit to monitor the message transmission signals of each channel in the subsystem in real time; The counting of input traffic of the subsystem according to the configured mask information includes: In the case where the message transmission signal indicates the transmission of a message, the messages transmitted in the channel are classified and counted according to the configured mask information, and the input flow of the channel is determined according to the counting result.

[0011] On the other hand, an embodiment of the present invention discloses a performance detection device for a network on chip, the device comprising: A configuration module, used for configuring a performance monitoring unit in each subsystem of the on-chip network; A monitoring module, used to monitor the input flow of each channel in the subsystem in real time using the performance monitoring unit; A statistics module, used for counting the input traffic of the subsystem according to the configured mask information; A summary module, used to summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; The analysis module is used to analyze the traffic distribution of the on-chip network according to the statistical data.

[0012] Optionally, the statistics module includes: A register configuration submodule, used to configure a set of register groups for each performance monitoring unit; An acquisition submodule, used for acquiring mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; The statistical submodule is used to count the input traffic in the subsystem that meets the mask information and write the statistical information into the register corresponding to the mask information.

[0013] Optionally, the aggregation module includes: The extraction submodule is used to extract the statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit; The summary submodule is used to summarize the extracted statistical information to obtain statistical data corresponding to the on-chip network.

[0014] Optionally, the statistics module includes: A parsing submodule, used to parse the mask information and determine the target features indicated in the mask information; A matching submodule, used for matching the message monitored by the performance monitoring unit with the target feature; A determination submodule, configured to determine the message as a target message that conforms to the mask information if a field matching the target feature exists in the message; The collection submodule is used to count the number of the target messages and collect data on the target messages according to the target characteristics.

[0015] Optionally, the device further comprises: A receiving module, configured to receive a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information; An execution module is used to execute the first scheduling instruction to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

[0016] Optionally, the monitoring module includes: A monitoring submodule, used to monitor the message transmission signals of each channel in the subsystem in real time using a performance monitoring unit; The statistical module comprises: The classification and counting submodule is used to classify and count the messages transmitted in the channel according to the configured mask information when the message transmission signal indicates the transmission of the message, and determine the input flow of the channel according to the counting result.

[0017] On the other hand, an embodiment of the present invention further discloses an electronic device, which includes a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, and the executable instructions enable the processor to execute the aforementioned on-chip network performance detection method.

[0018] An embodiment of the present invention further discloses a readable storage medium. When instructions in the readable storage medium are executed by a processor of an electronic device, the electronic device can execute the aforementioned performance detection method of the on-chip network.

[0019] The embodiments of the present invention include the following advantages: The embodiment of the present invention provides a performance detection method for a network on chip, which divides the network on chip into multiple subsystems, configures a performance monitoring unit in each subsystem, uses the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time, and summarizes the statistical information of each performance monitoring unit based on the statistics of the input flow of the subsystem, so as to obtain the statistical data corresponding to the network on chip. In the embodiment of the present invention, the user can customize the mask information according to his own needs. In the process of performing traffic statistics on the network on chip, only the input flow matching the mask information is counted. The collected statistical information all meets the characteristics indicated by the mask information, and there is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the network on chip, which is conducive to further improving the efficiency of performance analysis of the network on chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments of the present invention will be briefly introduced below. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative labor.

[0021] Figure 1 is a flowchart of a performance detection method embodiment of a network on chip of the present invention; Figure 2 is a schematic diagram of the architecture of a network on chip of the present invention; Figure 3 It is a structural schematic diagram of a control register group of the present invention; Figure 4 It is a structural block diagram of a performance detection device of a network on chip of the present invention; Figure 5 It is a structural block diagram of an electronic device provided by an example of the present invention. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] The terms "first", "second", etc. in the specification and claims of the present invention are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable when appropriate, so that the embodiments of the present invention can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects associated before and after are in an "or" relationship. In the embodiments of the present invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0024] Method Embodiment Reference Figure 1 , shows a flowchart of a performance detection method of a network on chip according to an embodiment of the present invention, and the method may specifically include the following steps: Step 101: configuring a performance monitoring unit in each subsystem of the on-chip network; Step 102: Using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time; Step 103: Count the input traffic of the subsystem according to the configured mask information; Step 104: Summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; Step 105: Analyze the traffic distribution of the on-chip network according to the statistical data.

[0025] The performance detection method of the network on chip provided by the embodiment of the present invention can perform statistical analysis on the input traffic of each subsystem in the network on chip and determine the traffic source distribution of the network on chip.

[0026] Specifically, in the embodiment of the present invention, a performance monitoring unit is configured in each subsystem of the on-chip network, and the performance monitoring unit is used to monitor the input flow of each channel in the subsystem in real time.

[0027] It should be noted that the subsystems in the embodiment of the present invention can be divided according to the design structure of the on-chip network to be detected. For example, the on-chip network is divided into multiple subsystems according to the topological structure of the on-chip network. Alternatively, the on-chip network can be divided into multiple subsystems according to the flow control strategy of the on-chip network. Among them, the topology refers to the arrangement and combination of (router) and channels (channel) shared by a system. The flow control strategy of the on-chip network may include but is not limited to: message-based flow control, packet-based flow control, and flow control based on a single message (Flit). As an example, in an embodiment of the present invention, the subsystems can be divided according to the processor core. In the on-chip network, the subsystem corresponding to each processor core may include access devices, processor cores, private caches, and router nodes. It should be noted that the on-chip network is intended to solve the communication problem within a multi-core processor. Each processor core has an independent router and its private cache, and is connected together through an on-chip communication network. The subsystems corresponding to each processor core perform packet switching based on the router. In the embodiment of the present invention, a performance monitoring unit PMU may be configured in each router node (Main CrossPoint, MXP) of the on-chip network to monitor the input traffic of each processor core.

[0028] A subsystem has multiple channels, each channel has multiple directions. The performance monitoring unit in the embodiment of the present invention is used to monitor the input traffic in different directions in each channel of the local subsystem in real time and perform traffic statistics according to pre-configured mask information.

[0029] Among them, the traffic granularity can be determined according to the traffic control strategy of the on-chip network. For example, if the on-chip network performs traffic control based on messages, the performance monitoring unit monitors the input messages in different directions in each channel of the local subsystem, and performs traffic statistics based on the mask information. Similarly, if the on-chip network performs traffic control based on packets, the performance monitoring unit monitors the input data packets in different directions in each channel of the local subsystem, and performs traffic statistics based on the mask information. If the on-chip network performs traffic control based on a single message, the performance monitoring unit monitors the input messages in different directions in each channel of the local subsystem, and performs traffic statistics based on the mask information.

[0030] The mask information in the embodiment of the present invention is used to indicate the characteristics of statistics. If the characteristics of the input traffic meet the characteristics indicated by the mask information, the input traffic is determined as the target traffic, and the characteristics of the target traffic are collected according to the characteristics indicated by the mask information. For the same mask information, if there are multiple target traffics that meet the characteristics, the target traffic is counted, and all target traffics that meet the characteristics are counted at the same time.

[0031] For example, the mask information may include five bit fields, one bit field is used to indicate a feature; the feature includes at least one of the following: the channel to which the message belongs, the direction and port (port) from which the message comes, quality of service assurance information (QoS), target node identifier (tgtid), source node identifier (srcid), transmission identifier (txnid), and operation code (opcode).

[0032] It is understandable that the mask information can be any combination of the above features. When the input traffic is counted based on the mask information, the input traffic needs to meet all the features indicated in the mask information to determine that the input traffic is the target traffic matching the mask information.

[0033] By summarizing the statistical information of the performance monitoring unit of each subsystem in the on-chip network, the overall statistical data of the on-chip network can be obtained. By analyzing the statistical data, the traffic distribution corresponding to the on-chip network can be determined.

[0034] Reference Figure 2 , shows a schematic diagram of the architecture of a network on chip provided by an embodiment of the present invention. Figure 2 As shown in the figure, the on-chip network is divided into multiple subsystems: subsystem 0 (MXP0), subsystem 1 (MXP1), subsystem 2 (MXP2), subsystem 3 (MXP3), etc. Each subsystem contains a local tree network and a performance monitoring unit (PMU). The performance monitoring unit is used to monitor the input traffic of each channel in the local subsystem in real time.

[0035] For example, in a network on chip based on a wireless mesh network (Mesh) topology, a PMU can be built in each subsystem (MXP) in the form of a local PMU to implement the function of a network stream collector (NSC). The PMUs are interconnected using public (Pub) channels in the network on chip, where the Pub channel is a channel for transmitting configuration information, and is distinguished from the service channel for transmitting service data. For example, registers can be read and written on the configuration channel because the configuration channel can access registers, but the service channel cannot. In theory, the PMUs of each subsystem are all connected to the same configuration channel and Pub channel, so they do not occupy the bandwidth of the service channel.

[0036] It should be noted that the PMU is used to count specific hardware events that occur in the system, such as cache misses (CacheMiss) or branch misprediction (Branch Misprediction). At the same time, multiple events can be combined to calculate some advanced indicators, such as cycles per instruction (CPI), cache hit rate, etc. For large-scale on-chip networks, tens of thousands of events can be provided by PMU. For discovering and solving specific performance problems, it is difficult to select truly useful events from a large number of events for performance analysis. Therefore, the embodiment of the present invention divides the on-chip network into multiple subsystems, and configures a PMU in each subsystem. The PMU monitors the input traffic of each channel of the local subsystem and counts the specific traffic based on the mask information. The statistical information of each subsystem is summarized and analyzed, and the traffic analysis of the on-chip network can be efficiently determined, thereby improving the efficiency of the performance analysis of the on-chip network.

[0037] Furthermore, in an embodiment of the present invention, the user can customize the mask information according to his or her own needs. In the process of performing traffic statistics on the on-chip network, only the input traffic that matches the mask information is counted. The collected statistical information all conforms to the characteristics indicated by the mask information. There is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the on-chip network, which is conducive to further improving the efficiency of performance analysis of the on-chip network.

[0038] In addition, in the embodiment of the present invention, the input traffic that meets the same mask information can be aggregated to obtain aggregate flow information that meets the same characteristics, and then the aggregate flow information is output to the NSC. This output method can significantly reduce the occupation of network bandwidth.

[0039] In an optional embodiment of the present invention, the step 102 of counting the input traffic of the subsystem according to the configured mask information includes: Step S11, configuring a set of register groups for each performance monitoring unit; Step S12, obtaining mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; Step S13: Count the input traffic in the subsystem that meets the mask information, and write the statistical information into a register corresponding to the mask information.

[0040] In the embodiment of the present invention, a group of registers may be configured for each performance monitoring unit to record the statistical information in the local subsystem. The content stored in each register in the register group may be determined by the mask information.

[0041] Exemplarily, the register group corresponding to each performance monitoring unit can be set to 32 48-bit registers, and the starting address of the first register can start from 0x210. It can be understood that a 48-bit register can count up to 2 to the power of 48 bits, which is theoretically sufficient to record statistical information in the local subsystem. The starting address of the first register can usually be selected from an unoccupied address, such as 0x210. Of course, the number of registers contained in the register group corresponding to each performance monitoring unit, the number of bits of the registers, and the starting address of the first register can also be configured according to actual needs, and the embodiment of the present invention does not specifically limit this.

[0042] When performing basic data statistics on the local subsystem, the input traffic that meets the characteristics indicated by the mask information can be filtered out for collection according to the mask information.

[0043] The mask information may be any combination of the channel to which the message belongs, the direction and port from which the message comes, quality of service information (QoS), target node identifier (tgtid), source node identifier (srcid), transmission identifier (txnid), operation code (opcode) and other features.

[0044] Optionally, the statistical information of each performance monitoring unit is aggregated in step 104 to obtain statistical data corresponding to the network on chip, including: Step S21, extracting statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit; Step S22: Summarize the extracted statistical information to obtain statistical data corresponding to the on-chip network.

[0045] In the embodiment of the present invention, statistical information of each subsystem can be extracted from the register group corresponding to each performance monitoring unit, and the extracted statistical information can be summarized to obtain the statistical data of the entire on-chip network.

[0046] In an optional embodiment of the present invention, the step 103 of counting the input traffic of the subsystem according to the configured mask information includes: Step S31, parsing the mask information to determine the target features indicated in the mask information; Step S32: matching the message monitored by the performance monitoring unit with the target feature; Step S33: if there is a field in the message that matches the target feature, the message is determined as a target message that conforms to the mask information; Step S34: Count the number of the target messages, and collect data on the target messages according to the target characteristics.

[0047] In the embodiment of the present invention, the target feature indicated in the mask information can be determined by parsing the mask information, and then the message monitored by the performance monitoring unit is matched with the target feature. If there is a field matching the target feature in the message, the message can be determined as a target message that meets the mask information. The number of all target messages that meet the mask information is counted, and data is collected for the target message according to the target feature.

[0048] Furthermore, the collected data may be written into a register corresponding to the mask information.

[0049] Optionally, for the PMU register group corresponding to the performance monitoring unit, a special control register group can be configured to determine how each register in the PMU register group is used and allocated. As an example, a control register is configured for each register in the PMU register group, and the control register is specifically used to store the mask information corresponding to the register. For example, if the PMU register group contains 32 48-bit registers, each register has a control register, and the control register can be a 64-bit register, that is, there are 32 48-bit registers and 32 64-bit control registers.

[0050] The control register group can be stored in the address space of the PMU control register array (PMU_Counter). Figure 3 , shows a schematic diagram of the structure of a control register group. Figure 3As shown, the mask information may include 8 bit fields, one of which is used to indicate a feature; the feature includes at least one of the following: counter mode (Counter mode), direction and port (Port) of the message source, channel (Channel) of the message source, quality of service guarantee information (QoS), target node identifier (TgtID), source node identifier (SrcID), reserved bit (Reserve, Rsv), operation code (Opcode). Among them, the bit field used to record the counter mode (Counter mode) occupies 2 bits, the bit field used to record the direction and port of the message source occupies 12 bits, the bit field used to record the channel to which the message belongs occupies 4 bits, the bit field (QoS_mask) used to record the quality of service information occupies 5 bits, the bit field (TgtID_mask) used to record the target node identifier occupies 12 bits, the bit field (SrcID_mask) used to record the source node identifier occupies 12 bits, the reserved bit (Rsv_mask) occupies 9 bits, and the bit field (Opcode_mask) used to record the operation code occupies 8 bits.

[0051] When Countermode is 0, it indicates that the counter is in disable mode, and when Countermode is 1, it indicates that the counter is in normal mode.

[0052] The first four bits in the Port field indicate the direction of the message source, which are east, west, south, and north. When the corresponding bit is 1, it indicates that the message in this direction is captured, and when it is 0, it indicates that the message in this direction is not captured. The last eight bits indicate the port from which the message comes, which are p0 to p7. When the corresponding bit is 1, it indicates that the message from this port is captured, and when it is 0, it indicates that the message from this port is not captured.

[0053] The 4 bits of the Channel bit field indicate the channel from which the message comes, namely the request (REQ) channel, the response (RSP) channel, the data (DAT) channel, and the snoop (SNP) channel. Among them, the REQ channel is used to transmit service requests. For example, if you want to read an address, send a read request from the REQ channel. The RSP channel is used to transmit the response or feedback of the request. For example, the target node receives the read request and feeds back a read result (excluding other information about the data, indicating whether the read is successful), which is sent through the RSP channel. The DAT channel is used to transmit data. For example, the target node receives the read request and returns the read data, which is sent through the DAT channel. The SNP channel is a channel used when a processor core wants to detect the data in the cache of other processor cores in a multi-core system. When the bit corresponding to a channel is 1, it indicates that the message of the channel is captured, and when it is 0, it indicates that the message of the channel is not captured.

[0054] The first bit in QoS_mask indicates whether to monitor the service quality assurance information. When this bit is 1, it indicates monitoring or paying attention to the service quality assurance information. When it is 0, it indicates not monitoring or not paying attention to the service quality assurance information. The last 4 bits indicate capturing the service quality assurance information when they are 1, and do not capture the service quality assurance information when they are 0.

[0055] The first bit of TgtID_mask indicates whether to pay attention to the target node identifier. When this bit is 1, it indicates that the target node identifier is paid attention to, and when it is 0, it indicates that the target node identifier is not paid attention to. The next 11 bits indicate the target node identifier of the message to be captured. When capturing a message, if the corresponding bit in a message matches the target node identifier in TgtID_mask, the message is captured. For example, if these 11 bits are 00111000010, then all messages with TgtID of 00111000010 in the statistics are matched. If these 11 bits are all zero, all messages with TgtID of all zero in the statistics are matched.

[0056] The first bit of SrcID_mask indicates whether to pay attention to the source node identifier. When this bit is 1, it indicates that the source node identifier is paid attention to, and when it is 0, it indicates that the source node identifier is not paid attention to. The next 11 bits indicate the source node identifier of the message to be captured. When capturing a message, if the corresponding bit in a message matches the source node identifier in SrcID_mask, the message is captured.

[0057] The first bit of Rsv_mask indicates whether to pay attention to the reserved bit. When this bit is 1, it indicates that the reserved bit is paid attention to, and when it is 0, it indicates that the reserved bit is not paid attention to. The next 8 bits indicate the reserved bits in the message to be captured. When capturing a message, if the corresponding bit in a message matches the reserved bit in Rsv_mask, the message is captured.

[0058] The first bit of Opcode_mask indicates whether to pay attention to the opcode. When this bit is 1, it indicates that the opcode is paid attention to, and when it is 0, it indicates that the opcode is not paid attention to. The next 7 bits indicate the opcode of the message to be captured. When capturing a message, if the corresponding bit in a message matches the opcode in Opcode_mask, the message is captured.

[0059] In the mask information, the port filters the direction of the packets to be counted. As long as the number of the direction of the packet source is the same as the configured value, the packet is counted. The same applies to other fields.

[0060] The only difference is that Port and Channel come from the corresponding physical interface number, while other fields come from certain bits of the message itself.

[0061] It is understandable that if the processor core wants to turn on the PMU, it is necessary to configure the start-up PMU first, and then directly enter the performance detection working mode.

[0062] In an optional embodiment of the present invention, before counting the input traffic of the subsystem according to the configured mask information, the method further includes: Step S41, receiving a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information; Step S42: execute the first scheduling instruction to write the mask information into a control register of the performance monitoring unit corresponding to the target address.

[0063] In the embodiment of the present invention, the configured mask information may be written into the target address through a scheduling instruction, the first scheduling instruction may be executed to find the control register corresponding to the target address, and the mask information may be written into the control register.

[0064] It is understood that if the control register is 64 bits, the configured mask information is usually also 64 bits.

[0065] When configuring the mask information, you can directly write the value that needs to be matched in the corresponding field of the message to be counted. In the subsequent performance monitoring of the on-chip network, as long as the value of the corresponding field in the corresponding message is the same as the value in the mask information, it meets the characteristics. If multiple messages meet the characteristics indicated by the mask information, the messages that meet all the requirements will be counted.

[0066] Optionally, the using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time includes: Step S51, using a performance monitoring unit to monitor the message transmission signals of each channel in the subsystem in real time; The counting of input traffic of the subsystem according to the configured mask information includes: Step S52: When the message transmission signal indicates that a message is to be transmitted, classify and count the messages transmitted in the channel according to the configured mask information, and determine the input flow of the channel according to the counting result.

[0067] In an embodiment of the present invention, the traffic distribution of the on-chip network can be analyzed at the granularity of a single message (flit), specifically: the input message transmission signal (FLITV) of each channel in each subsystem of the on-chip network is monitored in real time by a performance monitoring unit. Each channel is associated with a FLITV signal. When the FLITV signal is at a high level, it indicates that the Flit is valid, and then it is transmitted on the next rising CLK edge. The number of beats that the FLITV signal is pulled high is the number of flit transmissions. When the FLITV signal indicates the transmission of a message, the messages transmitted in the channel are classified and counted according to the mask information, and the input traffic of the channel is determined according to the counting result.

[0068] In summary, the embodiment of the present invention provides a performance detection method for a network on chip, which divides the network on chip into multiple subsystems, configures a performance monitoring unit in each subsystem, uses the performance monitoring unit to monitor the input traffic of each channel in the subsystem in real time, and summarizes the statistical information of each performance monitoring unit based on the statistics of the input traffic of the subsystem, so as to obtain the statistical data corresponding to the network on chip. In the embodiment of the present invention, the user can customize the mask information according to his own needs. In the process of performing traffic statistics on the network on chip, only the input traffic matching the mask information is counted. The collected statistical information all meets the characteristics indicated by the mask information, and there is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the network on chip, which is conducive to further improving the efficiency of performance analysis of the network on chip.

[0069] It should be noted that, for the sake of simplicity, the method embodiments are described as a series of action combinations, but those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are all preferred embodiments, and the actions involved are not necessarily required by the embodiments of the present invention.

[0070] Device Embodiment Reference Figure 4 , shows a structural block diagram of a performance detection device for a network on chip of the present invention, and the device may specifically include: Configuration module 401, configured to configure a performance monitoring unit in each subsystem of the network on chip; A monitoring module 402, configured to monitor the input flow of each channel in the subsystem in real time using the performance monitoring unit; A statistics module 403, used for counting the input traffic of the subsystem according to the configured mask information; A summarizing module 404 is used to summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; The analysis module 405 is used to analyze the traffic distribution of the on-chip network according to the statistical data.

[0071] Optionally, the statistics module includes: A register configuration submodule, used to configure a set of register groups for each performance monitoring unit; An acquisition submodule, used for acquiring mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; The statistical submodule is used to count the input traffic in the subsystem that meets the mask information and write the statistical information into the register corresponding to the mask information.

[0072] Optionally, the aggregation module includes: The extraction submodule is used to extract the statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit; The summary submodule is used to summarize the extracted statistical information to obtain statistical data corresponding to the on-chip network.

[0073] Optionally, the statistics module includes: A parsing submodule, used to parse the mask information and determine the target features indicated in the mask information; A matching submodule, used for matching the message monitored by the performance monitoring unit with the target feature; A determination submodule, configured to determine the message as a target message that conforms to the mask information if a field matching the target feature exists in the message; The collection submodule is used to count the number of the target messages and collect data on the target messages according to the target characteristics.

[0074] Optionally, the device further comprises: A receiving module, configured to receive a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information; An execution module is used to execute the first scheduling instruction to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

[0075] Optionally, the monitoring module includes: A monitoring submodule, used to monitor the message transmission signals of each channel in the subsystem in real time using a performance monitoring unit; The statistical module comprises: The classification and counting submodule is used to classify and count the messages transmitted in the channel according to the configured mask information when the message transmission signal indicates the transmission of the message, and determine the input flow of the channel according to the counting result.

[0076] In summary, the embodiment of the present invention provides a performance detection device for a network on chip, which divides the network on chip into multiple subsystems, configures a performance monitoring unit in each subsystem, uses the performance monitoring unit to monitor the input traffic of each channel in the subsystem in real time, and summarizes the statistical information of each performance monitoring unit based on the statistics of the input traffic of the subsystem, so as to obtain the statistical data corresponding to the network on chip. In the embodiment of the present invention, the user can customize the mask information according to his own needs. In the process of performing traffic statistics on the network on chip, only the input traffic matching the mask information is counted. The collected statistical information all meets the characteristics indicated by the mask information, and there is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the network on chip, which is conducive to further improving the efficiency of performance analysis of the network on chip.

[0077] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0078] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0079] Regarding the processor in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0080] Reference Figure 5 , is a structural block diagram of an electronic device for performance detection of an on-chip network provided by an embodiment of the present invention. Figure 5 As shown, the electronic device includes: a processor, a memory, a communication interface and a communication bus, and the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, and the executable instructions enable the processor to execute the performance detection method of the on-chip network of the aforementioned embodiment.

[0081] The processor may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other editable devices, transistor logic devices, hardware components or any combination thereof. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0082] The communication bus may include a path for transmitting information between the memory and the communication interface. The communication bus may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus, etc. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 The fact that only one line is used in the diagram does not mean that there is only one bus or only one type of bus.

[0083] The memory may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory), a magnetic tape, a floppy disk, an optical data storage device, etc.

[0084] The embodiment of the present invention also provides a non-transitory computer-readable storage medium, when the instructions in the storage medium are executed by a processor of an electronic device (server or terminal), the processor can execute Figure 1 The performance detection method of the on-chip network is shown.

[0085] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0086] It should be understood by those skilled in the art that the embodiments of the present invention may be provided as methods, devices or computer program products. Therefore, the embodiments of the present invention may take the form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware aspects. Moreover, the embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0087] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems) and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0088] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0089] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0090] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0091] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0092] The above is a detailed introduction to the performance detection method, device, electronic device and storage medium of a network on chip provided by the present invention. Specific examples are used in this article to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea; at the same time, for general technicians in this field, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A performance detection method for a network on chip, characterized in that: The method comprises: configuring a performance monitoring unit in each subsystem of the on-chip network; Using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time; Counting the input traffic of the subsystem according to the configured mask information; Summarizing the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; The traffic distribution of the on-chip network is analyzed according to the statistical data.

2. The method according to claim 1, characterized in that The counting of input traffic of the subsystem according to the configured mask information includes: A set of registers is configured for each performance monitoring unit; Obtaining mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; Statistics are collected on input traffic in the subsystem that matches the mask information, and the statistical information is written into a register corresponding to the mask information.

3. The method according to claim 2, characterized in that The statistical information of each performance monitoring unit is aggregated to obtain statistical data corresponding to the network on chip, including: Extract statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit; The extracted statistical information is summarized to obtain statistical data corresponding to the on-chip network.

4. The method according to claim 1, characterized in that: The counting of input traffic of the subsystem according to the configured mask information includes: Parsing the mask information to determine target features indicated in the mask information; Matching the message monitored by the performance monitoring unit with the target feature; If there is a field in the message that matches the target feature, the message is determined as a target message that conforms to the mask information; The number of the target messages is counted, and data collection is performed on the target messages according to the target characteristics.

5. The method according to claim 1, characterized in that Before counting the input traffic of the subsystem according to the configured mask information, the method further includes: receiving a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information; The first scheduling instruction is executed to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

6. The method according to claim 1, characterized in that The using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time includes: Using a performance monitoring unit to monitor the message transmission signals of each channel in the subsystem in real time; The counting of input traffic of the subsystem according to the configured mask information includes: In the case where the message transmission signal indicates the transmission of a message, the messages transmitted in the channel are classified and counted according to the configured mask information, and the input flow of the channel is determined according to the counting result.

7. A performance detection device for a network on chip, characterized in that: The device comprises: A configuration module, used for configuring a performance monitoring unit in each subsystem of the on-chip network; A monitoring module, used to monitor the input flow of each channel in the subsystem in real time using the performance monitoring unit; A statistics module, used for counting the input traffic of the subsystem according to the configured mask information; A summary module, used to summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; The analysis module is used to analyze the traffic distribution of the on-chip network according to the statistical data.

8. The device according to claim 7, characterized in that The statistical module comprises: A register configuration submodule, used to configure a set of register groups for each performance monitoring unit; An acquisition submodule, used for acquiring mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; The statistical submodule is used to count the input traffic in the subsystem that meets the mask information and write the statistical information into the register corresponding to the mask information.

9. An electronic device, characterized in that: The electronic device includes a processor, a memory, a communication interface and a communication bus, and the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, and the executable instructions enable the processor to execute the performance detection method of the on-chip network as described in any one of claims 1 to 6.

10. A readable storage medium, characterized in that: When the instructions in the readable storage medium are executed by a processor of an electronic device, the processor is enabled to execute the performance detection method of the on-chip network as described in any one of claims 1 to 6.

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