Performance detection method, device, electronic device and storage medium for network on chip

Abstract

Embodiments of the present invention provide a performance detection method, device, electronic device, and storage medium for a network on chip (NOC), relating to the field of computer technology. The method includes: configuring a performance monitoring unit in each subsystem of the NOC; using the performance monitoring unit to monitor the input traffic of each channel in the subsystem in real time; collecting statistics on the input traffic of the subsystem based on configured mask information; aggregating the statistical information of each performance monitoring unit to obtain statistical data corresponding to the NOC; and analyzing the traffic distribution of the NOC based on the statistical data. Embodiments of the present invention are conducive to improving the efficiency of NOC performance analysis.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to a performance detection method, device, electronic device and storage medium for a network on chip. Background Art

[0002] As processor complexity continues to increase, the on-chip interconnect architecture of processors has evolved from traditional buses to networks on chip (NOCs). A Network-on-Chip (NoC) is a communication network implemented on an integrated circuit (IC) chip, connecting the various functional modules, processor cores, memory units, and other important components on the chip. With the increasing integration density of chips and the rise of multi-core processors, NoCs have become increasingly important because they provide efficient, low-latency communication within the chip.

[0003] Large-scale on-chip networks have very high requirements for performance testing. During the operation of large-scale on-chip networks, many performance characteristics cannot be captured, which is not conducive to performance testing and analysis of on-chip networks. Summary of the Invention

[0004] The embodiments of the present invention provide a method, device, electronic device and storage medium for detecting performance of a network on a chip (NOC), which can solve the problem of performance characteristics of large-scale NOCs that cannot be captured in related technologies.

[0005] In one aspect, an embodiment of the present invention discloses a method for detecting performance of a network on chip, the method comprising:

[0006] Configure a performance monitoring unit in each subsystem of the on-chip network;

[0007] Using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time;

[0008] Counting the input traffic of the subsystem according to the configured mask information;

[0009] Summarizing the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network;

[0010] The traffic distribution of the on-chip network is analyzed according to the statistical data.

[0011] Optionally, the performing statistics on the input traffic of the subsystem according to the configured mask information includes:

[0012] A set of registers is configured for each performance monitoring unit;

[0013] Obtaining mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information;

[0014] Statistics are collected on input traffic in the subsystem that matches the mask information, and the statistical information is written into a register corresponding to the mask information.

[0015] Optionally, the summarizing the statistical information of each performance monitoring unit to obtain statistical data corresponding to the network on chip includes:

[0016] Extract statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit;

[0017] The extracted statistical information is aggregated to obtain statistical data corresponding to the network on chip.

[0018] Optionally, the performing statistics on the input traffic of the subsystem according to the configured mask information includes:

[0019] parsing the mask information to determine target features indicated in the mask information;

[0020] Matching the message monitored by the performance monitoring unit with the target feature;

[0021] If a field matching the target feature exists in the message, the message is determined to be a target message that meets the mask information;

[0022] The number of the target messages is counted, and data collection is performed on the target messages according to the target characteristics.

[0023] Optionally, before counting the input traffic of the subsystem according to the configured mask information, the method further includes:

[0024] receiving a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information;

[0025] Execute the first scheduling instruction to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

[0026] Optionally, the using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time includes:

[0027] Using a performance monitoring unit to monitor the message transmission signals of each channel in the subsystem in real time;

[0028] The counting of input traffic of the subsystem according to the configured mask information includes:

[0029] In the case where the message transmission signal indicates to transmit a message, the messages transmitted in the channel are classified and counted according to the configured mask information, and the input flow of the channel is determined according to the counting result.

[0030] On the other hand, an embodiment of the present invention discloses a performance detection device for a network on chip, the device comprising:

[0031] a configuration module, configured to configure a performance monitoring unit in each subsystem of the on-chip network;

[0032] A monitoring module, configured to monitor the input flow of each channel in the subsystem in real time using the performance monitoring unit;

[0033] A statistics module, configured to collect statistics on the input traffic of the subsystem according to the configured mask information;

[0034] A summary module, configured to summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network;

[0035] An analysis module is used to analyze the traffic distribution of the on-chip network based on the statistical data.

[0036] Optionally, the statistics module includes:

[0037] A register configuration submodule, configured to configure a set of registers for each performance monitoring unit;

[0038] An acquisition submodule, configured to acquire mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information;

[0039] The statistics submodule is used to collect statistics on the input traffic in the subsystem that meets the mask information and write the statistical information into the register corresponding to the mask information.

[0040] Optionally, the aggregation module includes:

[0041] The extraction submodule is used to extract the statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit;

[0042] The summarizing submodule is used to summarize the extracted statistical information to obtain statistical data corresponding to the on-chip network.

[0043] Optionally, the statistics module includes:

[0044] a parsing submodule, configured to parse the mask information and determine target features indicated in the mask information;

[0045] A matching submodule, configured to match the message monitored by the performance monitoring unit with the target feature;

[0046] a determination submodule, configured to determine the message as a target message that conforms to the mask information if a field matching the target feature exists in the message;

[0047] The collection submodule is used to count the number of the target messages and collect data on the target messages according to the target characteristics.

[0048] Optionally, the device further comprises:

[0049] A receiving module, configured to receive a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information;

[0050] An execution module is configured to execute the first scheduling instruction to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

[0051] Optionally, the monitoring module includes:

[0052] A monitoring submodule, configured to monitor the message transmission signals of each channel in the subsystem in real time using a performance monitoring unit;

[0053] The statistics module includes:

[0054] The classification counting submodule is used to classify and count the messages transmitted in the channel according to the configured mask information when the message transmission signal indicates the transmission of the message, and determine the input flow of the channel according to the counting result.

[0055] On the other hand, an embodiment of the present invention further discloses an electronic device, which includes a processor, a memory, a communication interface and a communication bus, wherein the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, and the executable instructions enable the processor to execute the aforementioned on-chip network performance detection method.

[0056] An embodiment of the present invention further discloses a readable storage medium. When instructions in the readable storage medium are executed by a processor of an electronic device, the electronic device can execute the aforementioned method for detecting performance of an on-chip network.

[0057] The embodiments of the present invention include the following advantages:

[0058] An embodiment of the present invention provides a performance detection method for an on-chip network, which divides the on-chip network into multiple subsystems, configures a performance monitoring unit in each subsystem, uses the performance monitoring unit to monitor the input traffic of each channel in the subsystem in real time, and summarizes the statistical information of each performance monitoring unit based on the input traffic of the subsystem, so as to obtain statistical data corresponding to the on-chip network. In an embodiment of the present invention, the user can customize the mask information according to his own needs. In the process of performing traffic statistics on the on-chip network, only the input traffic that matches the mask information is counted. The collected statistical information all meets the characteristics indicated by the mask information, and there is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the on-chip network, which is conducive to further improving the efficiency of performance analysis of the on-chip network. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments of the present invention. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0060] Figure 1 is a flowchart of an embodiment of a method for detecting performance of a network on chip according to the present invention;

[0061] Figure 2 is a schematic diagram of the architecture of a network on chip of the present invention;

[0062] Figure 3 It is a structural diagram of a control register group of the present invention;

[0063] Figure 4 It is a structural block diagram of a performance detection device for a network on chip according to the present invention;

[0064] Figure 5 This is a structural block diagram of an electronic device provided by an example of the present invention. DETAILED DESCRIPTION

[0065] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0066] The terms "first", "second", etc. in the specification and claims of the present invention are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present invention can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims is used to describe the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after the association are in an "or" relationship. In the embodiments of the present invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0067] Method Example

[0068] Reference Figure 1 , shows a flowchart of an embodiment of a method for detecting performance of a network on chip according to the present invention, wherein the method may specifically include the following steps:

[0069] Step 101: Configure a performance monitoring unit in each subsystem of the on-chip network;

[0070] Step 102: Using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time;

[0071] Step 103: Count the input traffic of the subsystem according to the configured mask information;

[0072] Step 104: Summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network;

[0073] Step 105: Analyze the traffic distribution of the on-chip network according to the statistical data.

[0074] The performance detection method of the network on chip provided by the embodiment of the present invention can perform statistical analysis on the input traffic of each subsystem in the network on chip and determine the traffic source distribution of the network on chip.

[0075] Specifically, in the embodiment of the present invention, a performance monitoring unit is configured in each subsystem of the network on chip, and the performance monitoring unit is used to monitor the input traffic of each channel in the subsystem in real time.

[0076] It should be noted that the subsystems in embodiments of the present invention can be divided based on the design structure of the network-on-chip (NOC) to be tested. For example, the NOC can be divided into multiple subsystems based on its topology. Alternatively, the NOC can be divided into multiple subsystems based on its traffic control strategy. Topology refers to the permutation and combination of routers and channels shared by a system. NOC traffic control strategies may include, but are not limited to, message-based traffic control, packet-based traffic control, and single-flit traffic control. As an example, in embodiments of the present invention, subsystems can be divided based on processor cores. In the NOC, the subsystem corresponding to each processor core may include access devices, processor cores, private caches, and router nodes. It should be noted that the NOC is designed to address communication issues within multi-core processors. Each processor core has an independent router and its own private cache, connected via an on-chip communication network. Subsystems corresponding to each processor core perform packet switching based on the routers. In an embodiment of the present invention, a performance monitoring unit (PMU) may be configured in each router node (Main Cross Point, MXP) of the network on chip to monitor the input traffic of each processor core.

[0077] A subsystem has multiple channels, each channel has multiple directions. The performance monitoring unit in the embodiment of the present invention is used to monitor the input traffic in different directions in each channel of the local subsystem in real time and perform traffic statistics based on preconfigured mask information.

[0078] Among them, the traffic granularity can be determined according to the traffic control strategy of the on-chip network. For example, if the on-chip network performs traffic control based on messages, the performance monitoring unit monitors the input messages in different directions in each channel of the local subsystem and performs traffic statistics based on the mask information. Similarly, if the on-chip network performs traffic control based on packets, the performance monitoring unit monitors the input data packets in different directions in each channel of the local subsystem and performs traffic statistics based on the mask information. If the on-chip network performs traffic control based on a single message, the performance monitoring unit monitors the input messages in different directions in each channel of the local subsystem and performs traffic statistics based on the mask information.

[0079] The mask information in the embodiments of the present invention is used to indicate statistical characteristics. If the characteristics of the input traffic match those indicated by the mask information, the input traffic is determined as target traffic, and characteristic collection is performed on the target traffic based on the characteristics indicated by the mask information. If multiple target traffic flows that meet the characteristics for the same mask information exist, the target traffic flows are counted, and statistics are collected for all target traffic flows that meet the characteristics.

[0080] For example, the mask information may include five bit fields, one bit field is used to indicate a feature; the feature includes at least one of the following: the channel to which the message belongs, the direction and port (port) from which the message comes, quality of service assurance information (QoS), target node identifier (tgtid), source node identifier (srcid), transmission identifier (txnid), and operation code (opcode).

[0081] It is understandable that the mask information can be any combination of the above features. When counting input traffic based on the mask information, the input traffic needs to meet all the features indicated in the mask information to determine that the input traffic is the target traffic matching the mask information.

[0082] By summarizing the statistical information of the performance monitoring unit of each subsystem in the on-chip network, the overall statistical data of the on-chip network can be obtained. By analyzing the statistical data, the traffic distribution corresponding to the on-chip network can be determined.

[0083] Reference Figure 2 , shows a schematic diagram of the architecture of a network on chip provided by an embodiment of the present invention. Figure 2 As shown in Figure 1, the on-chip network is divided into multiple subsystems: subsystem 0 (MXP0), subsystem 1 (MXP1), subsystem 2 (MXP2), subsystem 3 (MXP3), and so on. Each subsystem contains a local tree network and a performance monitoring unit (PMU). The PMU is used to monitor the input traffic of each channel in the local subsystem in real time.

[0084] For example, in a NoC based on a wireless mesh topology, a PMU can be implemented as a local PMU within each subsystem (MXP) to implement the Network Stream Collector (NSC) functionality. Each PMU interconnects via the NoC's public (Pub) channels. The Pub channel is used to transmit configuration information, distinct from the service channel used to transmit service data. For example, registers can be read and written on the configuration channel because the configuration channel has access to registers, while the service channel cannot. In theory, the PMUs of each subsystem are connected to the same configuration and Pub channels, thus not occupying bandwidth on the service channel.

[0085] It should be noted that the PMU is used to count specific hardware events occurring in the system, such as cache misses and branch mispredictions. Multiple events can also be combined to calculate advanced metrics such as cycles per instruction (CPI) and cache hit rate. For large-scale NoCs, the PMU can provide tens of thousands of events. However, it can be difficult to select truly useful events from this vast amount for performance analysis, making it difficult to identify and resolve specific performance issues. Therefore, an embodiment of the present invention divides the NoC into multiple subsystems, deploying a PMU in each subsystem. The PMU monitors the input traffic of each channel in the local subsystem and collects statistics for specific traffic based on mask information. By aggregating and analyzing the statistical information from each subsystem, the NoC traffic analysis status can be efficiently determined, improving the efficiency of NoC performance analysis.

[0086] Moreover, in an embodiment of the present invention, users can customize mask information according to their own needs. In the process of performing traffic statistics on the on-chip network, only the input traffic that matches the mask information is counted. The collected statistical information all conforms to the characteristics indicated by the mask information. There is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the on-chip network, which is conducive to further improving the efficiency of performance analysis of the on-chip network.

[0087] In addition, in the embodiment of the present invention, input traffic that meets the same mask information can be aggregated to obtain aggregate flow information that meets the same characteristics, and then the aggregate flow information is output to the NSC. This output method can significantly reduce network bandwidth usage.

[0088] In an optional embodiment of the present invention, the step 102 of counting the input traffic of the subsystem according to the configured mask information includes:

[0089] Step S11: configuring a set of registers for each performance monitoring unit;

[0090] Step S12: Obtain mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information;

[0091] Step S13: Count the input traffic in the subsystem that meets the mask information, and write the statistical information into the register corresponding to the mask information.

[0092] In an embodiment of the present invention, a register group may be configured for each performance monitoring unit to record statistical information in the local subsystem. The content stored in each register in the register group may be determined by mask information.

[0093] Exemplarily, the register group corresponding to each performance monitoring unit can be set to 32 48-bit registers, and the starting address of the first register can start from 0x210. It can be understood that a 48-bit register can count up to 2 to the power of 48 bits, which is theoretically sufficient to record statistical information in the local subsystem. The starting address of the first register can usually be selected from an unoccupied address, such as 0x210. Of course, the number of registers contained in the register group corresponding to each performance monitoring unit, the number of bits of the registers, and the starting address of the first register can also be configured according to actual needs, and the embodiment of the present invention does not specifically limit this.

[0094] When performing basic data statistics on the local subsystem, the input traffic that meets the characteristics indicated by the mask information can be filtered and collected according to the mask information.

[0095] The mask information may be any combination of features such as the channel to which the message belongs, the direction and port from which the message originates, quality of service information (QoS), target node identifier (tgtid), source node identifier (srcid), transmission identifier (txnid), and operation code (opcode).

[0096] Optionally, the statistical information of each performance monitoring unit is aggregated in step 104 to obtain statistical data corresponding to the network on chip, including:

[0097] Step S21: extracting statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit;

[0098] Step S22: Summarize the extracted statistical information to obtain statistical data corresponding to the on-chip network.

[0099] In the embodiment of the present invention, statistical information of each subsystem can be extracted from the register group corresponding to each performance monitoring unit, and the extracted statistical information can be summarized to obtain statistical data of the entire on-chip network.

[0100] In an optional embodiment of the present invention, the step 103 of counting the input traffic of the subsystem according to the configured mask information includes:

[0101] Step S31: parsing the mask information to determine the target features indicated in the mask information;

[0102] Step S32: matching the message monitored by the performance monitoring unit with the target feature;

[0103] Step S33: If there is a field in the message that matches the target feature, the message is determined to be a target message that meets the mask information;

[0104] Step S34: Count the number of the target messages, and collect data on the target messages according to the target characteristics.

[0105] In an embodiment of the present invention, the mask information can be parsed to determine the target characteristics indicated in the mask information. Then, the message monitored by the performance monitoring unit is matched with the target characteristics. If a field matching the target characteristics exists in the message, the message is determined to be a target message that meets the mask information. The number of all target messages that meet the mask information is counted, and data is collected from the target messages based on the target characteristics.

[0106] Furthermore, the collected data may be written into a register corresponding to the mask information.

[0107] Optionally, a dedicated control register group can be configured for the PMU register group corresponding to the performance monitoring unit to determine how each register in the PMU register group is used and allocated. As an example, a control register is configured for each register in the PMU register group, and the control register is specifically used to store mask information corresponding to the register. For example, if the PMU register group contains 32 48-bit registers, each register has a control register, and the control register can be a 64-bit register. That is, there are 32 64-bit control registers for every 32 48-bit registers.

[0108] The control register group can be stored in the address space of the PMU control register array (PMU_Counter). Figure 3 , shows a schematic diagram of the structure of a control register group. Figure 3As shown, the mask information may include 8 bit fields, each of which is used to indicate a feature; the feature includes at least one of the following: counter mode, direction and port of the message source, channel of the message source, quality of service information (QoS), destination node identifier (TgtID), source node identifier (SrcID), reserved bit (Rsv), and operation code (Opcode). Among them, the bit field used to record the counter mode occupies 2 bits, the bit field used to record the direction and port of the message source occupies 12 bits, the bit field used to record the channel to which the message belongs occupies 4 bits, the bit field used to record the quality of service information (QoS_mask) occupies 5 bits, the bit field used to record the destination node identifier (TgtID_mask) occupies 12 bits, the bit field used to record the source node identifier (SrcID_mask) occupies 12 bits, the reserved bit (Rsv_mask) occupies 9 bits, and the bit field used to record the operation code (Opcode_mask) occupies 8 bits.

[0109] When Countermode is 0, it indicates that the counter is in disable mode; when Countermode is 1, it indicates that the counter is in normal mode.

[0110] The first four bits in the port field indicate the direction of the packet source, which are east, west, south, and north, respectively. When the corresponding bit is 1, packets from that direction are captured; when it is 0, packets from that direction are not captured. The last eight bits indicate the port from which the packet originates, which are p0 to p7, respectively. When the corresponding bit is 1, packets from that port are captured; when it is 0, packets from that port are not captured.

[0111] The four bits of the Channel field indicate the source channel of the message: the Request (REQ) channel, the Response (RSP) channel, the Data (DAT) channel, and the Snoop (SNP) channel. The REQ channel is used to transmit service requests. For example, to read an address, a read request is sent through the REQ channel. The RSP channel is used to transmit responses or feedback to requests. For example, after receiving a read request, the target node returns a read result (excluding other information about the data, indicating whether the read was successful) via the RSP channel. The DAT channel is used to transmit data. For example, after receiving a read request, the target node returns the read data via the DAT channel. The SNP channel is used in a multi-core system when a processor core wants to access data in the cache of another processor core. When the corresponding bit for a channel is 1, packets from that channel are captured; when it is 0, packets from that channel are not captured.

[0112] The first bit in QoS_mask indicates whether to monitor the service quality assurance information. When this bit is 1, it indicates to monitor or pay attention to the service quality assurance information. When it is 0, it indicates not to monitor or pay attention to the service quality assurance information. The last 4 bits indicate to capture the service quality assurance information when they are 1, and indicate not to capture the service quality assurance information when they are 0.

[0113] The first bit of TgtID_mask indicates whether to pay attention to the target node identifier. When this bit is 1, it indicates that the target node identifier is paid attention to, and when it is 0, it indicates that the target node identifier is not paid attention to. The next 11 bits indicate the target node identifier of the message to be captured. When capturing a message, if the corresponding bit in a message matches the target node identifier in TgtID_mask, the message is captured. For example, if these 11 bits are 00111000010, then all messages with TgtID of 00111000010 are matched and counted. If these 11 bits are all zero, then all messages with TgtID of all zero are matched and counted.

[0114] The first bit of SrcID_mask indicates whether to pay attention to the source node identifier. When this bit is 1, it indicates that the source node identifier is paid attention to, and when it is 0, it indicates that the source node identifier is not paid attention to. The next 11 bits indicate the source node identifier of the message to be captured. When capturing a message, if the corresponding bit in a message matches the source node identifier in SrcID_mask, the message is captured.

[0115] The first bit of Rsv_mask indicates whether to focus on the reserved bit. When this bit is 1, it indicates that the reserved bit is focused on, and when it is 0, it indicates that the reserved bit is not focused on. The next 8 bits indicate the reserved bits in the message to be captured. When capturing a message, if the corresponding bit in a message matches the reserved bit in Rsv_mask, the message is captured.

[0116] The first bit of Opcode_mask indicates whether to focus on the opcode. If this bit is 1, it indicates that the opcode is focused on, and if it is 0, it indicates that the opcode is not focused on. The next seven bits indicate the opcode of the message to be captured. When capturing a message, if the corresponding bit in a message matches the opcode in Opcode_mask, the message is captured.

[0117] In the mask information, the port filters the direction of the packets to be counted. As long as the direction number of the packet source matches the configured value, the packet is counted. The same applies to other fields.

[0118] The only difference is that the Port and Channel fields come from the corresponding physical interface numbers, while the other fields come from certain bits in the message itself.

[0119] It is understandable that if the processor core wants to turn on the PMU, it is necessary to configure the start-up PMU first, and then directly enter the performance detection working mode.

[0120] In an optional embodiment of the present invention, before counting the input traffic of the subsystem according to the configured mask information, the method further includes:

[0121] Step S41: Receive a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information;

[0122] Step S42: Execute the first scheduling instruction to write the mask information into the control register of the performance monitoring unit corresponding to the target address.

[0123] In an embodiment of the present invention, the configured mask information may be written into the target address through a scheduling instruction, the first scheduling instruction may be executed to find the control register corresponding to the target address, and the mask information may be written into the control register.

[0124] It is understood that if the control register is 64 bits, the configured mask information is usually also 64 bits.

[0125] When configuring the mask information, you can directly enter the value that the corresponding field in the message to be counted must match. Later, during the on-chip network performance monitoring process, as long as the value of the corresponding field in the corresponding message matches the value in the mask information, it meets the characteristics. If multiple messages meet the characteristics indicated by the mask information, the messages that meet all the requirements will be counted.

[0126] Optionally, the using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time includes:

[0127] Step S51: Using a performance monitoring unit to monitor the message transmission signals of each channel in the subsystem in real time;

[0128] The counting of input traffic of the subsystem according to the configured mask information includes:

[0129] Step S52: When the message transmission signal indicates that a message is to be transmitted, classify and count the messages transmitted in the channel according to the configured mask information, and determine the input flow of the channel according to the counting result.

[0130] In an embodiment of the present invention, the traffic distribution of a network on chip (NOC) can be analyzed at the granularity of a single flit. Specifically, a performance monitoring unit monitors the input message transmission signal (FLITV) of each channel in each NOC subsystem in real time. Each channel is associated with a FLITV signal. When the FLITV signal is high, it indicates that the flit is valid and then transmitted on the next rising CLK edge. The number of beats that the FLITV signal is high is the number of flit transmissions. When the FLITV signal indicates a message transmission, the messages transmitted in the channel are classified and counted based on the mask information, and the input traffic of the channel is determined based on the count results.

[0131] In summary, an embodiment of the present invention provides a performance detection method for an on-chip network, which divides the on-chip network into multiple subsystems, configures a performance monitoring unit in each subsystem, uses the performance monitoring unit to monitor the input traffic of each channel in the subsystem in real time, and summarizes the statistical information of each performance monitoring unit based on the input traffic of the subsystem, so as to obtain statistical data corresponding to the on-chip network. In an embodiment of the present invention, the user can customize the mask information according to his own needs. In the process of performing traffic statistics on the on-chip network, only the input traffic that matches the mask information is counted. The collected statistical information all meets the characteristics indicated by the mask information, and there is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the on-chip network, which is conducive to further improving the efficiency of performance analysis of the on-chip network.

[0132] It should be noted that for the sake of simplicity, the method embodiments are described as a series of actions. However, those skilled in the art should be aware that the embodiments of the present invention are not limited by the order of the actions described, because according to the embodiments of the present invention, certain steps can be performed in other orders or simultaneously. Secondly, those skilled in the art should also be aware that the embodiments described in this specification are all preferred embodiments, and the actions involved are not necessarily required for the embodiments of the present invention.

[0133] Device embodiment

[0134] Reference Figure 4 , shows a structural block diagram of a performance detection device for a network on chip according to the present invention, the device may specifically include:

[0135] Configuration module 401, configured to configure a performance monitoring unit in each subsystem of the on-chip network;

[0136] A monitoring module 402 is configured to monitor the input flow of each channel in the subsystem in real time using the performance monitoring unit;

[0137] A statistics module 403 is used to collect statistics on the input traffic of the subsystem according to the configured mask information;

[0138] A summarizing module 404 is configured to summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network;

[0139] The analysis module 405 is configured to analyze the traffic distribution of the NoC based on the statistical data.

[0140] Optionally, the statistics module includes:

[0141] A register configuration submodule, configured to configure a set of registers for each performance monitoring unit;

[0142] An acquisition submodule, configured to acquire mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information;

[0143] The statistics submodule is used to collect statistics on the input traffic in the subsystem that meets the mask information and write the statistical information into the register corresponding to the mask information.

[0144] Optionally, the aggregation module includes:

[0145] The extraction submodule is used to extract the statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit;

[0146] The summarizing submodule is used to summarize the extracted statistical information to obtain statistical data corresponding to the on-chip network.

[0147] Optionally, the statistics module includes:

[0148] a parsing submodule, configured to parse the mask information and determine target features indicated in the mask information;

[0149] A matching submodule, configured to match the message monitored by the performance monitoring unit with the target feature;

[0150] a determination submodule, configured to determine the message as a target message that conforms to the mask information if a field matching the target feature exists in the message;

[0151] The collection submodule is used to count the number of the target messages and collect data on the target messages according to the target characteristics.

[0152] Optionally, the device further comprises:

[0153] A receiving module, configured to receive a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information;

[0154] An execution module is configured to execute the first scheduling instruction to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

[0155] Optionally, the monitoring module includes:

[0156] A monitoring submodule, configured to monitor the message transmission signals of each channel in the subsystem in real time using a performance monitoring unit;

[0157] The statistics module includes:

[0158] The classification counting submodule is used to classify and count the messages transmitted in the channel according to the configured mask information when the message transmission signal indicates the transmission of the message, and determine the input flow of the channel according to the counting result.

[0159] In summary, an embodiment of the present invention provides a performance detection device for an on-chip network, which divides the on-chip network into multiple subsystems, configures a performance monitoring unit in each subsystem, uses the performance monitoring unit to monitor the input traffic of each channel in the subsystem in real time, and summarizes the statistical information of each performance monitoring unit based on the statistics of the input traffic of the subsystem, so as to obtain the statistical data corresponding to the on-chip network. In an embodiment of the present invention, the user can customize the mask information according to his own needs. In the process of performing traffic statistics on the on-chip network, only the input traffic that matches the mask information is counted. The collected statistical information all meets the characteristics indicated by the mask information, and there is no need to filter the statistical data, which reduces the amount of data collected and analyzed, thereby reducing the impact of the traffic statistics function on the overall performance of the on-chip network, which is conducive to further improving the efficiency of performance analysis of the on-chip network.

[0160] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0161] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0162] Regarding the processor in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method and will not be elaborated here.

[0163] Reference Figure 5 , is a structural block diagram of an electronic device for performance testing of an on-chip network provided by an embodiment of the present invention. Figure 5 As shown, the electronic device includes: a processor, a memory, a communication interface and a communication bus, and the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, and the executable instructions enable the processor to execute the on-chip network performance detection method of the aforementioned embodiment.

[0164] The processor may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or other programmable devices, transistor logic devices, hardware components, or any combination thereof. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0165] The communication bus may include a path for transmitting information between the memory and the communication interface. The communication bus may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The communication bus may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 5 The fact that only one line is used does not mean that there is only one bus or one type of bus.

[0166] The memory may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory), a magnetic tape, a floppy disk, an optical data storage device, etc.

[0167] The embodiment of the present invention further provides a non-transitory computer-readable storage medium, which, when the instructions in the storage medium are executed by a processor of an electronic device (server or terminal), enables the processor to execute Figure 1 The performance detection method of the on-chip network is shown.

[0168] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0169] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, apparatuses, or computer program products. Thus, embodiments of the present invention may take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to magnetic disk storage, CD-ROMs, optical storage, etc.) containing computer-usable program code.

[0170] The embodiments of the present invention are described with reference to flowcharts and / or block diagrams of methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowcharts and / or block diagrams, as well as combinations of processes and / or blocks in the flowcharts and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing terminal device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowcharts and / or block diagrams. Figure 1 a process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0171] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a predictable manner, so that the instructions stored in the computer readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 a process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0172] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device so that a series of operating steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable terminal device to implement the process. Figure 1 a process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0173] Although the preferred embodiments of the present invention have been described, those skilled in the art may make additional changes and modifications to these embodiments once they become aware of the basic creative concepts. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present invention.

[0174] Finally, it should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that includes a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or terminal device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of additional identical elements in the process, method, article, or terminal device that includes the element.

[0175] The above is a detailed introduction to the performance detection method, device, electronic device and storage medium of a network on chip provided by the present invention. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core ideas of the present invention. At the same time, for those skilled in the art, according to the ideas of the present invention, there may be changes in the specific implementation methods and application scopes. In summary, the contents of this specification should not be understood as limiting the present invention.

Claims

1. A performance detection method for a network on chip, characterized in that: The method comprises: Configure a performance monitoring unit in each subsystem of the on-chip network; Using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time; Counting the input traffic of the subsystem according to the configured mask information; Summarizing the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; Analyzing the traffic distribution of the on-chip network according to the statistical data; The configuring of a performance monitoring unit in each subsystem of the on-chip network includes: Divide subsystems according to the processor cores in the on-chip network; packet switching is performed between subsystems corresponding to each processor core based on router nodes; A performance monitoring unit is configured in each router node of the on-chip network; the performance monitoring unit is used to monitor the input traffic in different directions in each channel of the local subsystem in real time; Among them, a subsystem contains multiple channels, each channel has multiple directions; the performance monitoring unit is used to monitor the input traffic in different directions of each channel of the local subsystem in real time and to perform traffic statistics based on pre-configured mask information; each performance monitoring unit is interconnected using the public channel of the on-chip network; each performance monitoring unit is connected to the same configuration channel and public channel; the configuration channel is used to read and write registers; and the public channel is used to transmit configuration information; A special control register group is configured for the register group corresponding to the performance monitoring unit; the register group is used to record statistical information in the local subsystem; each register corresponding to the performance monitoring unit corresponds to a control register, and the control register is used to store the mask information corresponding to the register.

2. The method according to claim 1, characterized in that The counting of input traffic of the subsystem according to the configured mask information includes: A set of registers is configured for each performance monitoring unit; Obtaining mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; Statistics are collected on input traffic in the subsystem that matches the mask information, and the statistical information is written into a register corresponding to the mask information.

3. The method according to claim 2, characterized in that The statistical information of each performance monitoring unit is aggregated to obtain statistical data corresponding to the network on chip, including: Extract statistical information corresponding to each subsystem from the register group corresponding to each performance monitoring unit; The extracted statistical information is aggregated to obtain statistical data corresponding to the network on chip.

4. The method according to claim 1, wherein The counting of input traffic of the subsystem according to the configured mask information includes: parsing the mask information to determine target features indicated in the mask information; Matching the message monitored by the performance monitoring unit with the target feature; If a field matching the target feature exists in the message, the message is determined to be a target message that meets the mask information; The number of the target messages is counted, and data collection is performed on the target messages according to the target characteristics.

5. The method according to claim 1, wherein Before counting the input traffic of the subsystem according to the configured mask information, the method further includes: receiving a first scheduling instruction; the first scheduling instruction carries mask information and a target address corresponding to the mask information; Execute the first scheduling instruction to write the mask information into a control register of a performance monitoring unit corresponding to the target address.

6. The method according to claim 1, characterized in that The using the performance monitoring unit to monitor the input flow of each channel in the subsystem in real time includes: Using a performance monitoring unit to monitor the message transmission signals of each channel in the subsystem in real time; The counting of input traffic of the subsystem according to the configured mask information includes: In the case where the message transmission signal indicates to transmit a message, the messages transmitted in the channel are classified and counted according to the configured mask information, and the input flow of the channel is determined according to the counting result.

7. A performance detection device for a network on chip, characterized in that: The device comprises: a configuration module, configured to configure a performance monitoring unit in each subsystem of the on-chip network; A monitoring module, configured to monitor the input flow of each channel in the subsystem in real time using the performance monitoring unit; A statistics module, configured to collect statistics on the input traffic of the subsystem according to the configured mask information; A summary module, configured to summarize the statistical information of each performance monitoring unit to obtain statistical data corresponding to the on-chip network; An analysis module, configured to analyze the traffic distribution of the on-chip network based on the statistical data; The configuration module is specifically used to: Divide subsystems according to the processor cores in the on-chip network; packet switching is performed between subsystems corresponding to each processor core based on router nodes; A performance monitoring unit is configured in each router node of the on-chip network; the performance monitoring unit is used to monitor the input traffic in different directions in each channel of the local subsystem in real time; Among them, a subsystem contains multiple channels, each channel has multiple directions; the performance monitoring unit is used to monitor the input traffic in different directions of each channel of the local subsystem in real time and to perform traffic statistics based on pre-configured mask information; each performance monitoring unit is interconnected using the public channel of the on-chip network; each performance monitoring unit is connected to the same configuration channel and public channel; the configuration channel is used to read and write registers; and the public channel is used to transmit configuration information; A special control register group is configured for the register group corresponding to the performance monitoring unit; the register group is used to record statistical information in the local subsystem; each register corresponding to the performance monitoring unit corresponds to a control register, and the control register is used to store the mask information corresponding to the register.

8. The device according to claim 7, characterized in that The statistics module includes: A register configuration submodule, configured to configure a set of registers for each performance monitoring unit; An acquisition submodule, configured to acquire mask information of each register corresponding to the performance monitoring unit; each register corresponds to one mask information; The statistics submodule is used to collect statistics on the input traffic in the subsystem that meets the mask information and write the statistical information into the register corresponding to the mask information.

9. An electronic device, characterized in that: The electronic device includes a processor, a memory, a communication interface and a communication bus, and the processor, the memory and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, and the executable instructions enable the processor to execute the on-chip network performance detection method according to any one of claims 1 to 6.

10. A readable storage medium, characterized in that: When the instructions in the readable storage medium are executed by a processor of an electronic device, the processor is enabled to execute the performance detection method of the on-chip network according to any one of claims 1 to 6.

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