Data transmission method and device, controller and data transmission system

Abstract

The invention relates to the field of industrial automation, and provides a data transmission method and device, a controller and a data transmission system. The method comprises the steps that a first kernel is triggered, so that the first kernel runs an Ethernet protocol stack to transfer a data acquisition request into a shared memory area, an inter-kernel request message is sent to a second kernel, and the data acquisition request comprises slave station address information of a target real-time Ethernet slave station; triggering a second kernel to enable the second kernel to run an Ethernet protocol stack, and reading the data acquisition request from the shared memory area; running a security protocol stack, reading a target file corresponding to the data acquisition request from the target real-time Ethernet slave station, transferring the target file into a shared memory area, and sending an inter-core response message to the first core; and triggering the first kernel to enable the first kernel to run an Ethernet protocol stack, reading the target file from the shared memory area, and forwarding the target file to the data requester. According to the invention, the data transmission security and reliability of the EtherCAT industrial system can be improved.

Description

Technical Field

[0001] The present application relates to the field of industrial automation, and in particular to a data transmission method, device, controller and data transmission system. Background Art

[0002] EtherCAT (Ethernet for Control Automation Technology) is an open-architecture fieldbus system based on Ethernet. EtherCAT is widely used in industrial automation and intelligent manufacturing fields due to its real-time performance, topology flexibility, and low cost.

[0003] In industrial systems, the security and reliability of data transmission is the key to ensuring the stable operation of the industrial system and the safety of operators. However, the inventors have found that the existing technology still has the problem of poor security and reliability of data transmission. Summary of the invention

[0004] In view of this, the embodiments of the present application provide a data transmission method, device, controller and data transmission system to solve the problem that the existing EtherCAT-based industrial system still has poor data transmission security and reliability.

[0005] According to a first aspect of an embodiment of the present application, a data transmission method is provided, including:

[0006] triggering the first core based on the data acquisition request sent by the data requester, so that the first core runs the Ethernet protocol stack to transfer the data acquisition request to the shared memory area, and sends an inter-core request message to the second core, wherein the inter-core request message includes the data acquisition request, and the data acquisition request includes the slave station address information of the target real-time Ethernet slave station;

[0007] The second core is triggered based on the inter-core request message, so that the second core runs the Ethernet protocol stack and reads the data acquisition request from the shared memory area; runs the security protocol stack, reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station based on the slave station address information, transfers the target file to the shared memory area, and sends an inter-core response message to the first core;

[0008] The first kernel is triggered based on the inter-core response message, so that the first kernel runs the Ethernet protocol stack, reads the target file from the shared memory area, and forwards the target file to the data requester.

[0009] According to a second aspect of the embodiments of the present application, a data transmission device is provided, including:

[0010] The first trigger module is configured to trigger the first core based on the data acquisition request sent by the data requester, so that the first core runs the Ethernet protocol stack to transfer the data acquisition request to the shared memory area, and sends an inter-core request message to the second core, wherein the inter-core request message includes the data acquisition request, and the data acquisition request includes the slave station address information of the target real-time Ethernet slave station;

[0011] The second trigger module is configured to trigger the second core based on the inter-core request message, so that the second core runs the Ethernet protocol stack and reads the data acquisition request from the shared memory area; runs the security protocol stack, reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station based on the slave station address information, transfers the target file to the shared memory area, and sends an inter-core response message to the first core;

[0012] The third trigger module is configured to trigger the first kernel based on the inter-core response message, so that the first kernel runs the Ethernet protocol stack, reads the target file from the shared memory area, and forwards the target file to the data requester.

[0013] According to a third aspect of an embodiment of the present application, a controller is provided, comprising the data transmission device according to the second aspect, and a first core and a second core controlled by the data transmission device.

[0014] According to a fourth aspect of an embodiment of the present application, a data transmission system is provided, including a data requester, a controller according to the third aspect, a real-time Ethernet slave station and a FSoE slave station; the real-time Ethernet slave station is also a FSoE master station; the data requester and the controller are connected in communication using the TCP / IP protocol; the controller and the real-time Ethernet slave station are connected in communication using a nested protocol of Ethernet and FSoE; the real-time Ethernet slave station and the FSoE slave station are connected in communication using the FSoE protocol.

[0015] According to a fifth aspect of an embodiment of the present application, an electronic device is provided, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the above method when executing the computer program.

[0016] Compared with the prior art, the beneficial effects of the embodiments of the present application include at least: in the EtherCAT industrial system, from the perspective of functional safety, as a data transfer party (such as a controller) between a data requester (such as a configuration software) and a target real-time Ethernet slave (such as a safety logic module), the data interaction content between the data requester and the target real-time Ethernet slave should not be over-analyzed. The embodiment of the present application uses the controller as the data transfer party between the data requester and the target real-time Ethernet slave, and performs inter-core data interaction between the first core and the second core inside the controller to establish a virtual, independent data transmission channel (data transparent transmission channel) between the data requester and the target real-time Ethernet slave. Through the data transmission channel, data transparent transmission between the data requester and the target real-time Ethernet slave can be realized. During this period, the controller will not do too much analysis on the data interaction content between the data requester and the target real-time Ethernet slave, thereby improving the data transmission security and reliability of the EtherCAT industrial system. In addition, the second core inside the controller first runs the Ethernet protocol stack to read the data acquisition request in the shared memory area, and then runs the security protocol stack to read the target file corresponding to the data acquisition request from the target real-time Ethernet slave station, which can ensure the security and reliability of data transmission during the second core reading the target file, thereby helping to further improve the data transmission security and reliability of the EtherCAT industrial system. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0018] Figure 1 It is a schematic diagram of the hardware composition of a data transmission system provided in an embodiment of the present application;

[0019] Figure 2 is a structural diagram of a data transmission system provided by an embodiment of the present application;

[0020] Figure 3 It is a flowchart of a data transmission method provided by an embodiment of the present application;

[0021] Figure 4 It is a schematic diagram of the structure of a shared memory area of ​​a controller provided in an embodiment of the present application;

[0022] Figure 5 is a timing diagram of a data transmission method provided by an embodiment of the present application;

[0023] Figure 6is a flowchart of ADCS instruction diagnosis provided by an embodiment of the present application;

[0024] Figure 7 It is a flowchart of ECC function diagnosis provided by an embodiment of the present application;

[0025] Figure 8 is a flow chart of a March C-diagnosis algorithm provided in one embodiment of the present application;

[0026] Fig. 9 It is a schematic diagram of the diagnostic flow of the code area RAM provided by an embodiment of the present application;

[0027] Fig.10 is a structural diagram of a data transmission device provided by an embodiment of the present application;

[0028] Fig.11 It is a structural schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0029] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0030] A data transmission method, device, controller and data transmission system according to an embodiment of the present application will be described in detail below with reference to the accompanying drawings.

[0031] Figure 1 Schematic diagram of the hardware composition of a data transmission system provided by an embodiment of the present application. Figure 1 As shown, the data transmission system of the embodiment of the present application includes configuration software (AutoThink (Config Software)), a controller (Conttroller), a power relay module (Power Supply), a conventional IO module, a coupler module (Coupler), a communication module, a safety logic module (LG), and a functional safety IO module.

[0032] It should be noted that Figure 1 The modules in the dotted frame are safety-related modules, and the modules in the solid frame are non-safety-related modules.

[0033] Configuration software has the functions of offline configuration, compilation, downloading and online monitoring operations. It is a T3 tool related to functional safety. The algorithm part in the configuration software belongs to safety-related software.

[0034] The data requester of the data transmission system of the embodiment of the present application may be the above-mentioned configuration software, or an electronic device (eg, a smart phone, a tablet computer, a laptop computer, a desktop computer, etc.) on which the above-mentioned configuration software is installed.

[0035] The controller has system logic processing capabilities and communication expansion capabilities, and serves as the master station of the entire EhterCAT bus.

[0036] The power relay module can be used for power relay of the IO module on the right side of the PLC controller module and the coupler module.

[0037] Conventional IO modules (also called standard IO modules) support DI (switch input, signals sent on-site, such as start / stop status, switch status, three-way status and other feedback signals), DO (switch output, DCS sends signals, such as switch signals, alarm signals, indication signals, etc.), AI (analog input, signals sent on-site, such as temperature, pressure, flow, liquid level and other voltage or current signals), AO (analog output, DCS sends signals and enters the site, such as driving the valve action on site, inverter PID adjustment, etc.), RTD (resistance temperature detector), TC (thermocouple) and other field signals are converted into digital signals.

[0038] Coupler module, used for EtherCAT communication expansion interface, supports access to both field DC power supply and system DC power supply.

[0039] Communication modules, including ModbusRTU (MODBUS encoder) serial port module, DeviceNet (a fieldbus standard used in automation technology) serial port module, CANopen (a high-level communication protocol based on the Controller Area Network (CAN)) communication module, other communication protocol modules and custom modules, etc.

[0040] The safety logic module is used to perform safety input module acquisition, safety logic operation, and safety output module control functions. As a FSoE (File over EtherCAT) master station (also as an EhterCAT slave station), it supports communication with multiple functional safety IO modules. The safety protocol during the communication process adopts the FSoE protocol stack. The safety logic module is the target real-time Ethernet slave station of the data transmission system of the embodiment of the present application.

[0041] Functional safety IO module supports safe input acquisition or output control of DI, DO, AI, RTD, TC and other signals. As an FSoE slave, it communicates with the safety logic module through the FSoE protocol stack.

[0042] In practical applications, according to actual business needs, the safety logic module can be selected to communicate with at least one conventional IO module to obtain field signals; or the safety logic module can be selected to communicate with at least one functional safety IO module to obtain field signals; or the safety logic module can be selected to communicate with at least one conventional IO module and at least one functional safety IO module to obtain field signals. In other words, conventional IO modules and functional safety IO modules can be used separately or in combination.

[0043] The data transmission system provided in the embodiment of the present application is upgraded or integrated on the basis of the system architecture of the existing EtherCAT industrial system, and modules supporting functional safety (including the algorithm part of the configuration software, the power relay module, the safety logic module (LG) and the functional safety IO module, etc.) are added. It can not only improve the data transmission security and reliability of the system, but also has good compatibility with the existing EtherCAT industrial system. There is no need for large-scale changes or replacements of existing equipment and systems. The system is easy to expand and maintain and has good practicality.

[0044] Figure 2 Schematic diagram of the structure of a data transmission system provided by an embodiment of the present application. Figure 2 As shown, the data transmission system includes a data requester (configuration software), a controller, a real-time Ethernet slave station (such as Figure 1 The controller includes a communication interface, a data transmission device, a first core (Core0), a second core (Core1), a shared memory area, and a real-time Ethernet master station (also referred to as a real-time Ethernet master card). In the embodiment of the present application, the data transmission device may be a virtual device built into the controller, and the virtual device is used to execute each step / process of the data transmission method provided in the embodiment of the present application.

[0045] The data exchange interface between the data requester (configuration software) and the controller is the communication interface on the controller (usually an Ethernet interface). The data requester communicates with the communication interface on the controller through the TCP / IP protocol stack.

[0046] The communication interface on the controller communicates with the first core through the Ethernet protocol stack; the first core and the second core communicate with each other through the Ethernet protocol stack; the second core communicates with the real-time Ethernet master station through the FSoE protocol stack; the real-time Ethernet master station and the real-time Ethernet slave station (also serving as the FSoE master station) communicate using the FSoE protocol stack. In the communication process between the controller and the real-time Ethernet slave station, the overall communication architecture uses the Ethernet protocol stack. On this basis, the FSoE protocol stack is superimposed (nested) in the process of the second core reading the target file from the target real-time Ethernet slave station, thereby improving the data transmission security and reliability of the second core in the process of reading the target file.

[0047] The controller of the embodiment of the present application can not only serve as a data transfer party for data interaction between the data requester (configuration software) and the safety logic module (target real-time Ethernet slave station), but also serve as a data transfer party between the safety logic module and the functional safety IO module and / or the conventional IO module. As a data transfer party, the controller does not do too much analysis on the data interaction content between the communicating parties, but transparently transmits the data interaction content between the communicating parties, which is conducive to improving the security and reliability of data transmission of the system.

[0048] The data exchange content between the configuration software (data requester) and the safety logic module mainly includes the download data of functional safety related logic and configuration data, the monitoring data of the real-time operation results of the functional safety related logic, and other tool data of the safety logic module.

[0049] After receiving the download data forwarded by the controller, the safety logic module performs IEC operations according to the configuration logic and exchanges data with IO. As the FSoE master station, the safety logic module is responsible for processing the content related to the FSoE safety protocol, scheduling synchronization with the CPU (controller), and executing online operations of the configuration software.

[0050] The functional safety IO module, as an FSoE slave, is responsible for processing content related to the FSoE safety protocol and processing IO module channel data.

[0051] The data flow of the data transmission system of the embodiment of the present application is as follows:

[0052] 1. Downstream data flow:

[0053] Configuration software → controller: The configuration software downloads the configuration software data (including the configuration software interface, data related to the configuration function safety module, network topology, safety-related algorithms, etc.) to the controller through the TCP / IP protocol;

[0054] Controller → Safety Logic Module: The controller calculates process data and configuration data and forwards them to the safety logic module for processing via the EtherCAT network. This data flow is a non-safety-related function and the process does not use a safety protocol but is protected by the EtherCAT protocol.

[0055] Safety logic module → functional safety IO module: The safety logic module sends request data, which is forwarded to the functional safety IO module for processing by the controller. The controller does not parse or process this type of data, but only forwards it. This data flow is a safety-related function, and the process uses the FSoE safety protocol.

[0056] 2. Upstream data flow:

[0057] Functional safety IO module → safety logic module: The response data of the functional safety IO module is forwarded to the safety logic module for processing by the controller. The controller does not parse or process this type of data, but only forwards it. This data flow is a safety-related function, and the process uses the FSoE safety protocol.

[0058] Safety logic module → controller: The safety logic module runs the process data and forwards it to the controller for processing via the EtherCAT network. This data flow is a non-safety-related function and the process does not use a safety protocol but is protected by the EtherCAT protocol.

[0059] Controller → Configuration software: The response data of the safety logic module is forwarded to the configuration software through the controller. The controller does not parse this type of data, but only forwards it. This process does not use a safety protocol, but uses CRC for protection.

[0060] Figure 3 It is a flowchart of a data transmission method provided in one embodiment of the present application. Figure 3 The data transmission method can be Figure 2 The data transmission device in the controller is used to execute. Figure 3 As shown, the data transmission method may specifically include the following steps:

[0061] Step S301, triggering the first kernel based on the data acquisition request sent by the data requester, so that the first kernel runs the Ethernet protocol stack to transfer the data acquisition request to the shared memory area, and sends an inter-core request message to the second kernel, wherein the inter-core request message includes the data acquisition request, and the data acquisition request includes the slave address information of the target real-time Ethernet slave station.

[0062] The controller of the embodiment of the present application adopts a dual-core architecture, including a first core (Core0) and a second core (Core1). The first core (Core0) runs an Ethernet protocol stack, and an interface for interacting with a real-time Ethernet master station is set on the second core (Core1).

[0063] The data acquisition request includes the slave address information of the target real-time Ethernet slave station that the data requester wants to access, and the real-time monitoring data of which field device(s) the data requester wants to obtain.

[0064] When the data transmission device of the controller detects that the data requester (configuration software) sends a data acquisition request to the communication interface of the controller, a first trigger instruction is sent to the first core of the controller; after receiving the first trigger instruction sent by the data transmission device, the first core runs the Ethernet protocol stack, transfers the data acquisition request sent by the data requester to the shared memory area of ​​the controller, and sends an inter-core request message to the second core of the controller, which includes the data acquisition request.

[0065] Step S302, triggering the second kernel based on the inter-core request message, so that the second kernel runs the Ethernet protocol stack and reads the data acquisition request from the shared memory area; runs the security protocol stack, based on the slave station address information, reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station, and transfers the target file to the shared memory area, and sends an inter-core response message to the first kernel.

[0066] The target file includes the real-time monitoring data of a certain field device(s) that the data requester wants to obtain in the data acquisition request initiated by the data requester.

[0067] When the data transmission device of the controller detects that the first core sends an inter-core request message to the second core, it sends a second trigger instruction to the second core; after receiving the second trigger instruction, the second core first runs the Ethernet protocol stack, reads the data acquisition request from the shared memory area, and then runs the security protocol stack, determines the target real-time Ethernet slave station based on the slave station address information, and then reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station, and transfers the target file to the shared memory area, and sends an inter-core response message to the first core.

[0068] As an example, the standard IO module and / or the functional safety IO module collects the field signals of the field equipment in real time and converts them into digital signals. Then, by running the safety protocol stack, the collected digital signals are forwarded to the safety logic module via the controller, and then the safety logic module processes these digital signals to obtain the monitoring data of the real-time operation results of the functional safety-related logic. When the safety logic module receives the data acquisition request sent by the real-time Ethernet master station of the controller, the target file corresponding to the data acquisition request (including the above-mentioned monitoring data) is prepared, and then the second core of the controller is waited for to read the target file. After reading the target file, the second core transfers the target file to the shared memory area of ​​the controller and sends an inter-core response message to the first core.

[0069] Step S303, triggering the first kernel based on the inter-core response message, so that the first kernel runs the Ethernet protocol stack, reads the target file from the shared memory area, and forwards the target file to the data requester.

[0070] When the data transmission device of the controller detects the inter-core response message sent by the second core, it sends a third trigger instruction to the first core; when the first core receives the third trigger instruction, it runs the Ethernet protocol stack, reads the target file from the shared memory area, and forwards the target file to the data requester through the communication interface of the controller (usually an Ethernet interface).

[0071] The technical solution provided by the embodiment of the present application uses the controller as the data transfer party between the data requester and the target real-time Ethernet slave station, and triggers the inter-core data interaction between the first core and the second core through the data transmission device of the controller, so as to establish a virtual and independent data transmission channel (data transparent transmission channel) between the data requester and the target real-time Ethernet slave station, through which the data transmission channel can realize the data transparent transmission between the data requester and the target real-time Ethernet slave station. During this period, the controller will not do too much analysis on the data interaction content between the data requester and the target real-time Ethernet slave station, thereby improving the data transmission security and reliability of the EtherCAT industrial system. In addition, the second core inside the controller first runs the Ethernet protocol stack to read the data acquisition request in the shared memory area, and then runs the security protocol stack to read the target file corresponding to the data acquisition request from the target real-time Ethernet slave station, which can ensure the data transmission security and reliability during the second core reading the target file, thereby further improving the data transmission security and reliability of the EtherCAT industrial system.

[0072] In some embodiments, a shared memory area is set in a data transmission channel, and the data transmission channel is used for inter-core data interaction between the first core and the second core to realize data transmission between the data requester and the target real-time Ethernet slave station; the shared memory area includes multiple data sending buffers and multiple data receiving buffers, and a real-time Ethernet slave station corresponds to at least one data sending buffer and one data receiving buffer; the data acquisition request also includes the link information of the data requester.

[0073] Run the Ethernet protocol stack to transfer the data acquisition request to the shared memory area, including:

[0074] Obtain identification information of each data sending buffer in the shared memory area;

[0075] Determine a target data transmission buffer corresponding to a target real-time Ethernet slave station based on the identification information and the link information;

[0076] Run the Ethernet protocol stack to transfer the data acquisition request to the target data sending buffer.

[0077] The identification information of the data sending buffer can be numbers, text, etc.

[0078] Link information, including an information field and a pointer field; wherein the information field stores or displays information about the data requester (such as identity information), and the pointer field stores the slave address information of the target real-time Ethernet slave station or the identification information of the target real-time Ethernet slave station (which can be a number, text, etc.).

[0079] In some embodiments, in order to minimize the impact of the data transparent transmission function between the newly added data requester and the target real-time Ethernet slave station on the operation of the original controller, the embodiment of the present application adds a data transparent transmission channel inside the controller, which is specifically used for inter-core data interaction between the first core and the second core to achieve data transparent transmission between the data requester and the target real-time Ethernet slave station.

[0080] In some embodiments, a shared memory area is set inside the above-mentioned data transmission channel, and the first core and the second core use the shared memory area to transmit the data interaction content between the data requester and the target real-time Ethernet slave station. In this way, the communication data can be simply transmitted in a shared memory manner inside the controller, which is beneficial to improving the efficiency of communication data transmission.

[0081] In some embodiments, the shared memory area in the data transmission channel is further divided into multiple data sending buffers and multiple data receiving buffers, wherein the multiple data sending buffers are used to cache the data acquisition requests initiated by the data requester for multiple security logic modules (target real-time Ethernet slave stations); and the multiple data receiving buffers are used to cache the target files read by the second kernel from multiple security logic modules (target real-time Ethernet slave stations). In this way, a simple application layer management mechanism can be applied to support the data requester to access the data of multiple security logic modules (target real-time Ethernet slave stations) at the same time in the same PLC (Programmable Logic Controller) system, thereby greatly improving the data transmission efficiency between the data requester and the target real-time Ethernet slave station.

[0082] The data transmission channel of the embodiment of the present application adopts a question-and-answer communication method, and multiple data sending buffers and multiple data receiving buffers in the shared memory area in the data transmission channel can reuse the same memory.

[0083] Typically, a data transmission buffer can be used to cache data acquisition requests initiated by a data requester for a certain safety logic module (target real-time Ethernet slave); a data receiving buffer can be used to cache the target file read by the second core from a full logic module (target real-time Ethernet slave). In this way, it is easy to manage data acquisition requests and target files, and prevent data acquisition requests and target files from being lost when they are transmitted between cores within the controller.

[0084] Of course, a data sending buffer can also be used to cache data acquisition requests initiated by a data requester for two or more safety logic modules (target real-time Ethernet slave stations); a data receiving buffer can also be used to cache target files read by the second core from two or more safety logic modules (target real-time Ethernet slave stations). In this way, each data sending buffer and data receiving buffer can be fully utilized.

[0085] Figure 4 Schematic diagram of the structure of the shared memory area of ​​the controller provided in one embodiment of the present application. Figure 4 As shown, the shared memory area of ​​the embodiment of the present application includes data sending buffer 1, data sending buffer 2 ... data sending buffer n, and data receiving buffer 1, data receiving buffer 2 ... data receiving buffer m. Assuming that the number of security logic modules in the data transmission system is k, then n and m are not less than k, n and m can be equal or unequal, and n, m, and k are all positive integers greater than 2.

[0086] In some implementations, a mapping relationship table of the names and identification information of the security logic module, the data sending buffer, and the data receiving buffer may be pre-established, as shown in Table 1.

[0087] Table 1 Mapping relationship between the name and identification information of the security logic module and the data sending buffer and data receiving buffer

[0088]

[0089] When the first core of the controller receives the first trigger instruction issued by the data transmission device, it can obtain the identification information S1, S2...Sn of the data sending buffers 1, 2...n in the shared memory area of ​​the controller by querying the above Table 1; then further find out the target data sending buffer that matches the identification information of the security logic module (i.e., the target real-time Ethernet slave station) in the link information of the data requester; and then run the Ethernet protocol stack to transfer the data acquisition request to the target data sending buffer.

[0090] As an example, assuming that the identification information of the security logic module in the link information of the data requester is LG1, by querying the above Table 1, it can be known that the identification information of the data transmission buffer matching LG1 is S1, and the data transmission buffer corresponding to S1 is data transmission buffer 1, then it can be determined that the target data transmission buffer is data transmission buffer 1. After determining the target data transmission buffer, the first core of the controller runs the Ethernet protocol stack to transfer the data acquisition request to data transmission buffer 1.

[0091] In some embodiments, an upper-layer processing interface is added to the message sending and receiving codes of the first core and the second core. The link information of the data requester is identified through the upper-layer processing interface, and the target data sending buffer and the target data receiving buffer can be determined quickly and accurately, which is beneficial to improving the efficiency of inter-core message transmission.

[0092] In some embodiments, the security protocol stack is a FoE protocol stack. Running the security protocol stack and reading a target file corresponding to a data acquisition request from a target real-time Ethernet slave station based on the slave station address information includes:

[0093] Determine the target real-time Ethernet slave station based on the slave station address information, and send a query request for querying the FoE communication identifier to the real-time Ethernet master station through the inter-core message processing thread;

[0094] If it is determined that the file reading operation can be triggered currently based on the FoE communication identifier returned by the real-time Ethernet master station for the query request, the FoE protocol stack is run to read the target file corresponding to the data acquisition request from the target real-time Ethernet slave station.

[0095] Since the amount of communication data between the configuration software and the safety logic module is large, the controller can use the FoE data packetization mechanism to forward the communication data between the configuration software and the safety logic module. Specifically, after receiving the data acquisition request sent by the configuration software, the controller triggers the first core and the second core to communicate between the cores in the form of shared memory; for the data acquisition request of the data requester, the second core runs the FoE protocol stack to write a file and transmit it to the safety logic module; for the response data of the safety logic module, the second core runs the FoE protocol stack to read a file and pass it to the shared memory of the controller; the first core runs the Ethernet protocol stack to read the target file from the shared memory and transmit it to the data requester.

[0096] In some implementations, since FoE is a slow transmission process, in order not to affect the execution efficiency of other threads, a separate inter-core message processing thread for processing inter-core messages may be created on the second core side of the controller.

[0097] See also Figure 2, after the second kernel determines the target real-time Ethernet slave station based on the slave station address information, it first queries the FoE communication identifier of the real-time Ethernet master station through the inter-core message processing thread in a non-blocking manner to confirm whether the FoE file reading operation can be triggered. Specifically, the second kernel can send a query request for querying the FoE communication identifier to the real-time Ethernet master station through the inter-core message processing thread; after receiving the query request, the real-time Ethernet master station returns the FoE communication identifier to the inter-core message processing thread; if the second kernel determines that the current file reading operation can be triggered according to the FoE communication identifier (mainly depends on when the security logic module can prepare the data to respond to the configuration software), the FoE protocol stack is run to read the target file corresponding to the data acquisition request from the target real-time Ethernet slave station (the data prepared by the security logic module to respond to the configuration software).

[0098] In some embodiments, before triggering the first kernel based on the data acquisition request sent by the data requester, the following steps are also included:

[0099] Determine the maximum single communication data volume during the communication interaction with the data requester;

[0100] According to the maximum single communication data volume, a shared memory area is set in the data transparent transmission channel, wherein the memory size of the shared memory area is not less than the size of the maximum single communication data volume.

[0101] The maximum single communication data volume refers to the maximum communication data volume that needs to be transmitted in the entire process when the controller receives a data acquisition request sent by the configuration software and reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station.

[0102] Since the data interaction between the configuration software and the safety logic module is ultimately implemented through the FoE protocol, which is implemented with the help of EtherCAT's mailbox communication and its transmission speed is not high, the inter-core data communication mechanism inside the controller does not reuse the current message center mechanism, but is implemented through the data transparent transmission channel inside the controller.

[0103] The data transmission device of the controller of the embodiment of the present application can determine the maximum single communication data volume during the communication interaction with the data requester based on the historical communication record information between the configuration software (data requester) (including the data volume of each communication), and then open a shared memory area in the DDR (double data rate synchronous dynamic random access memory) of the controller for data interaction on the dual-core side in the form of shared memory.

[0104] The shared memory area is located in the data transparent transmission channel, and the memory size of the shared memory area is not less than the size of the maximum single communication data volume, so that the data interaction between the data requester and the real-time Ethernet slave station can be guaranteed to proceed smoothly.

[0105] In some embodiments, the memory size of the data sending buffer and the data receiving buffer in the shared memory area can be determined according to the amount of data transmitted between the data requester and the real-time Ethernet slave station. In this way, the memory of the shared memory area can be better and more fully utilized, and it is beneficial to better balance the rate at which the first kernel receives and transfers the data acquisition request of the data requester and the second kernel reads and transfers the target file from the real-time Ethernet slave station, thereby improving the data transmission quality and efficiency between the data requester and the real-time Ethernet slave station.

[0106] In some embodiments, triggering the first kernel based on a data acquisition request sent by a data requester includes:

[0107] In response to the communication connection request sent by the data requester, a communication connection is established between the first kernel and the data requester, and a data transparent transmission port number is returned to the data requester;

[0108] If it is monitored that the communication interface receives a data acquisition request sent by the data requester using the data transparent transmission port number, the first core is triggered.

[0109] See also Figure 5 , when the data transmission device of the controller receives the communication connection request sent by the data requester (configuration software), it establishes the communication connection between the first kernel and the data requester, and returns a successful connection message to the configuration software, which includes the data transparent transmission port number, which is a port number specifically used to realize the data transparent transmission between the data requester and the real-time Ethernet slave station. Then, the data requester sends the communication destination address (i.e. the slave address information of the target real-time Ethernet slave station) to the first kernel, and the first kernel returns the response information of successful reception to the data requester after receiving the communication destination address. After that, the data transmission device of the controller can monitor in real time whether the communication interface of the controller (usually the Ethernet interface) receives the data acquisition request sent by the data requester using the data transparent transmission port number; if it is monitored that the communication interface receives the data acquisition request sent by the data requester using the data transparent transmission port number, the first kernel is triggered.

[0110] In some embodiments, triggering the first kernel based on a data acquisition request sent by a data requester includes:

[0111] Get power-on diagnostic results;

[0112] If it is determined according to the power-on diagnosis result that the controller has no fault, the first core is triggered based on the data acquisition request sent by the data requester.

[0113] The safety logic module performs power-on diagnosis and periodic diagnosis of the hardware according to the operating stage of the controller (standby state, stop state, running state).

[0114] The power-on diagnosis result mainly refers to the result of the safety logic module's diagnosis of the controller's hardware when it is powered on.

[0115] The contents, diagnostic methods and treatment measures of power-on diagnosis are shown in Table 2.

[0116] Table 2 Power-on diagnosis content, diagnostic methods and treatment measures

[0117]

[0118] When the safety logic module is powered on, the controller hardware is diagnosed according to the diagnostic method in Table 2 above, and the power-on diagnostic result is sent to the controller. If the power-on diagnostic result is no fault, the controller is allowed to start, and the data transmission device of the controller can trigger the first core based on the data acquisition request sent by the data requester. If the power-on diagnostic result is a fault, the controller is not allowed to start, enters the safe state, and the ERROR light is turned on.

[0119] 1. The register diagnosis includes general registers (R0-R14), floating point registers (S0-S31, D16-D31) and status registers (CPSR, FPSCR). The fault types diagnosed are as follows:

[0120] a) Fixed fault: write 0xFFFFFFFF and 0x00000000 into the register and read back for comparison and judgment to detect the "0" fixed fault and "1" fixed fault of the register.

[0121] b) Intra-word coupling fault, detects coupling fault between any two bits in the register, 1bit, 2bit, 4bit, 8bit, 16bit adjacent coupling fault, the test data can be selected as 0x55555555, 0x33333333, 0x0F0F0F0F, 0x00FF00FF, 0x0000FFFF.

[0122] c) Inter-word coupling fault, detection of coupling fault between registers, the test data can be selected as 0x55555555, 0xAAAAAAAA, 0x00000000, 0xFFFFFFFF, 0x33333333, 0xCCCCCCCC, 0x5555AAAA, etc.

[0123] 2. Instruction set diagnosis. The diagnosis of instructions adopts software self-diagnosis. The diagnostic steps are: input preset operands, execute preset operation steps, and compare the final output result with the preset operation result. If they are the same, it proves that the function of the instruction is valid. Otherwise, the instruction self-check fails and the fault flag is set.

[0124] As an example, see Figure 6 , the diagnostic process of ADCS instruction is as follows:

[0125] 1) Protect the scene and push the registers onto the stack;

[0126] 2) Initialize global signature and local signature;

[0127] 3) Clear the N, Z, C, V, Q flags of the CPSR status register;

[0128] 4) Create operands;

[0129] 5) Execute ADCS instructions;

[0130] 6) XOR the calculation result with the local signature and update the local signature;

[0131] 7) XOR the CPSR register with the local signature to update the local signature;

[0132] 8) Refer to the above steps 2) to 7 to diagnose other instructions;

[0133] 9) After completing the diagnosis of a class of instructions, update the global signature;

[0134] 10) Compare test results with expected results;

[0135] 11) If the test result is consistent with the expected result, the self-test passes; if the test result is inconsistent with the expected result, the self-test fails;

[0136] 12) Restore the scene and pop the registers from the stack.

[0137] 3. DCache diagnosis: power-on initialization enables the ECC function of the data cache, which has error correction and detection functions.

[0138] 4. ICache diagnosis: power-on initialization enables the ECC function of the instruction cache, which has error correction and detection functions.

[0139] 5. Internal RAM (data area) diagnosis includes: ① ECC detection, internal data is placed in TCM, and the ECC error correction and detection functions of TCM are enabled during power-on initialization. ② Read and write test, 0x55 and 0xAA read and write tests are performed on the RAM data area in use, the test area data is copied to the backup data area, read and write tests are performed, and the backup data is restored after the test is completed.

[0140] 6. ECC function diagnosis, self-test of ECC function, select test address, turn off RAM ECC function, modify data on test address, turn on ECC function, read data on test address, trigger ECC check, check whether fault result is consistent with expected, if not, set fault.

[0141] As an example, see Figure 7 , the process of ECC function diagnosis is as follows:

[0142] 1) Disable the ECC function;

[0143] 2) Modify the data on the test address;

[0144] 3) Enable the ECC function;

[0145] 4) Read the data at the test address and trigger ECC check;

[0146] 5) Determine whether an ECC fault is diagnosed;

[0147] 6) If no ECC fault is diagnosed, the ECC self-test function is normal; if an ECC fault is diagnosed, the ECC self-test function fails;

[0148] 7) Set MCU self-test fault.

[0149] 7. FLASH diagnosis: before the program is started and loaded into the system internal RAM, the validity of the controller program code needs to be verified, and the actual CRC value of the code is calculated to see if it is consistent with the expected value. If not, the controller cannot be started. If the controller code is verified, the controller code is loaded into the internal RAM code area and run, and then the engineering code is verified. If the engineering code is verified, the engineering code is loaded, otherwise the fault flag is set.

[0150] The safety logic code and engineering code generate their own CRC check codes respectively. The code diagnostic algorithm can select CRC32, and the polynomial is as follows:

[0151] X32+X26+X23+X22+X16+X12+X11+X10+X8+X7+X5+X4+X2+X+1.

[0152] 8. Reset circuit diagnosis: read the reset status register of the CPU after power-on and check whether the reset reason is power-on reset and there can be no other reset status. If the reset reason is not power-on reset, set the fault flag.

[0153] In some embodiments, the method further comprises:

[0154] Get periodic diagnosis results;

[0155] If it is determined based on the periodic diagnosis result that the controller has a first type of fault, interrupting the data transparent transmission between the data requester and the target real-time Ethernet slave station;

[0156] If it is determined based on the periodic diagnosis result that the controller has a second type of fault, then continue to perform data transparent transmission between the data requester and the target real-time Ethernet slave station;

[0157] If it is determined based on the periodic diagnosis result that the controller has a third type of fault, the data transparent transmission between the data requester and the target real-time Ethernet slave station is continued after the third type of fault is eliminated.

[0158] The periodic diagnosis result mainly refers to the result of the periodic diagnosis of the controller hardware by the safety logic module during normal operation.

[0159] The first type of fault generally refers to a permanent fault. A permanent fault is an irreversible fault. Once it occurs, it will remain in the faulty state and cannot be restored to normal function.

[0160] The second type of fault and the third type of fault are both transient faults. A transient fault is a recoverable fault that only exists for a period of time and can disappear with the update of the circuit, thus restoring normal function. Among them, the second type of fault has no effect on the data transparent transmission between the data requester and the target real-time Ethernet slave station, and there is no need to wait for the second type of fault to be eliminated before data transparent transmission; the third type of fault has an impact on the data transparent transmission between the data requester and the target real-time Ethernet slave station, and data transparent transmission can only be continued after the third type of fault is eliminated.

[0161] The contents, diagnostic methods and treatment measures of periodic diagnosis are shown in Table 3.

[0162] Table 3 Power-on diagnosis content, diagnosis methods and treatment measures

[0163]

[0164]

[0165] In the cycle diagnosis, the method for diagnosing the registers is the same as the method for diagnosing the registers in the above-mentioned power-on diagnosis.

[0166] In some implementations, a scheme for performing step-by-step diagnosis on different types of registers is shown in Table 4.

[0167] Table 4 Step-by-step diagnostic scheme for different types of registers

[0168]

[0169]

[0170] In the cycle diagnosis, the diagnostic method of the instruction set diagnosis is the same as the diagnostic method of the instruction set in the power-on diagnosis. In some implementations, the scheme of performing step-by-step diagnosis on the instruction set is shown in Table 5.

[0171] Table 5 Step-by-step diagnostic scheme for instruction sets

[0172]

[0173]

[0174]

[0175] DCache diagnosis, the CPU detects ECC errors in the data cache by invalidating the cache, refreshing the cache, and re-acquiring the failed instruction to correct the error, because the cache implements Write-Through cache, and dirty data is not stored in the cache. Single-bit and double-bit hard errors are handled by the cache logic to prevent repeated correction of the same error.

[0176] When a correctable ECC error is detected, the location of the error is recorded in an empty record register, which is then marked as valid. When an uncorrectable ECC error is detected, the location of the error is recorded in an empty record register or a record register containing a correctable error, and the software clears the register by writing it.

[0177] ICache diagnostics are the same as DCache diagnostics described above.

[0178] Internal RAM (data area) diagnosis, ECC error detection and correction, when a correctable error is detected during the reading process, the corrected data is written back to the RAM, where single-bit hard errors are handled by the TCM ECC logic to avoid repeated error correction. When an uncorrectable error is detected during the TCM reading and writing process, the CPU will trigger the Data Abort abnormal interrupt, set the CPU fault in the abnormal interrupt and clear the flag bit.

[0179] The hard failure diagnosis of data RAM adopts March C-diagnosis algorithm.

[0180] The controller data RAM memory uses ATCM (128KB) and BTCM (128KB). The periodic diagnosis needs to complete the RAM test step by step to reduce the time of each while cycle. The diagnostic time of each RAM step is within 100us, so according to the time of 1Kbyte / 600us, the RAM can complete the diagnosis of 170byte bytes within 100us in one step, so it takes about 1542 steps to complete the RAM diagnosis to complete the test of the 256Kbyte data area.

[0181] As an example, see Figure 8 , the process of March C-diagnosis algorithm is as follows:

[0182] 1) Determine whether it is backup data;

[0183] 2) If yes, copy the data in the test area to the backup area and jump to step 3); if no, jump directly to step 3);

[0184] 3) Set the test data group x(DB0, DB1);

[0185] 4) Execute March C-diagnostic algorithm (M1-M6)

[0186] 5) Determine whether there are errors in the reading and writing tests;

[0187] 6) If there are errors in the read and write tests, the RAM test fails;

[0188] 7) If there are no errors in the read and write tests, determine whether the test pattern is completed;

[0189] 8) If the test pattern is completed, the RAM test passes; if the test pattern is not completed, return to step 3);

[0190] 9) Determine whether to restore data;

[0191] 10) If yes, copy the data in the backup area to the test area and end the diagnosis; if no, end the diagnosis.

[0192] The test data set used in the above step 3) is shown in Table 6, and the March C-diagnosis algorithm executed in step 4) is shown in Table 7.

[0193] Table 6 Test data set

[0194] Serial number DB0 DB1 1 0x00000000 0xFFFFFFFF 2 0x0000FFFF 0xFFFF0000 3 0x00FF00FF 0xFF00FF00 4 0x0F0F0F0F 0xF0F0F0F0 5 0xCCCCCCCC 0x33333333 6 0x55555555 0xAAAAAAAA

[0195] Table 7 Description of diagnostic algorithm

[0196]

[0197]

[0198] Internal RAM (code area) diagnosis, including ECC diagnosis and CRC32 check. ECC diagnosis, the ECC function of the RAM code area supports single-bit error correction and 2-bit error reporting. 32-bit RAM data generates 7-bit ECC data. Each SYSRAMn has 3 available interrupts, which can be used as error events; they are 1-bit error interrupt, 2-bit error interrupt and error address overflow interrupt. CRC32 check, the diagnostic algorithm of the code area cycle diagnosis is consistent with the power-on diagnosis. The cycle diagnosis calculates the CRC32 value of the code and compares it with the expected value. If it is inconsistent, the fault flag is set.

[0199] The periodic diagnosis of the code and engineering code of the safety logic module needs to complete the CRC calculation of the RAM code area step by step to reduce the time of each while cycle. The diagnosis time of each step is within 100us. Therefore, based on the time of 1Kbyte / 200us, 512 bytes of diagnosis can be completed in one step within 100us. Therefore, it takes about 2048 steps to complete the diagnosis of the code area RAM to complete the test of the entire code area.

[0200] As an example, see Fig. 9 , the diagnostic process of the code area RAM is as follows:

[0201] 1) Get the starting address for calculating CRC;

[0202] 2) Determine whether the current address is the end of the code block;

[0203] 3) If it is the end of the code block, calculate the number of remaining bytes;

[0204] 4) Calculate CRC32;

[0205] 5) Determine whether CRC is consistent with the preset value;

[0206] 6) If they are consistent, the self-test is successful and the diagnosis is ended; if they are inconsistent, the self-test fails and the diagnosis is ended;

[0207] 7) If it is not the end of the code block, calculate CRC32, update the intermediate CRC value, diagnose the starting address information, and end the diagnosis.

[0208] Diagnostic method for timer or external interrupt: Set timer interrupt inside the CPU to monitor timer or external interrupt, clear the timer count each time responding to the timer or external interrupt, if the interrupt is lost or the interrupt is delayed, the timer count overflows and the fault flag is set.

[0209] The method of ECC function diagnosis is the same as the power-on diagnosis mentioned above and will not be repeated here.

[0210] System stack diagnostics, including ECC diagnostics (consistent with the internal RAM (data area) diagnostics described above), March C-algorithm (consistent with the internal RAM (data area) diagnostics described above), and stack overflow detection.

[0211] Stack diagnosis needs to consider stack overflow and underflow faults. The specific method is to write special values ​​at the top and bottom of the stack during power-on initialization, and periodically check whether the stack boundary address has been changed. If the data has been tampered with, it means that the stack has overflowed and a fault has been set.

[0212] Program execution sequence diagnosis, periodically checks the correctness of the program execution sequence, whether the calls of functional modules are executed in the expected order, and sets a fault if the execution sequence is inconsistent with the expected order.

[0213] Clock diagnosis: When diagnosing a CPU external clock, use the internal watchdog of another CPU (relative to CPU0, it is an independent watchdog) to monitor the pulses from the CPU, and configure the time window of the internal watchdog of another CPU according to the monitoring requirements.

[0214] Reset circuit diagnosis, periodically read the CPU reset status register, check the reset reason must be power-on reset, there can be no other reset status, if the reset reason is not power-on reset, set the fault flag.

[0215] In some implementations, the CPU self-check step number distribution is shown in Table 8.

[0216] Table 8 Diagnostic steps

[0217] Serial number Type of diagnosis Self-test steps 1 register 15 2 Instruction Set 22 3 Internal RAM (data area) 1542 4 Internal RAM (code area) 2048 5 ECC function diagnosis 1 6 System stack overflow diagnosis 1 7 Reset Circuit 1

[0218] In summary, the technical solution provided by the embodiments of the present application has at least the following advantages:

[0219] 1) It can realize safe and reliable data transmission between configuration software and safety logic modules, and support configuration software to access data of multiple safety logic modules at the same time.

[0220] 2) Ability to detect faults in a timely manner and take appropriate measures to improve system reliability; ability to identify potential faults that may pose risks and ensure safe operation of the system through fault tolerance mechanisms.

[0221] 3) It has security functions and security measures that can effectively prevent potential security risks. These security functions and measures include fault detection, error handling, identity authentication, access control, etc., which can ensure that the system only accepts valid and credible data and provide protection against potential dangers.

[0222] 4) The design of the data transmission system complies with relevant functional safety standards and meets the relevant requirements of functional safety. By following the above standards and requirements, the system can achieve the required level of safety and provide solutions that meet regulations and standards for related industries.

[0223] 5) It can monitor the system status in real time, detect faults in time, and take corresponding corrective measures, which helps to reduce downtime and production costs caused by system failures and improve the maintainability of the system.

[0224] 6) It can be upgraded or integrated on the basis of the existing EtherCAT without large-scale changes or replacements of existing equipment and systems. The system has good scalability and high potential and value for promotion and application, which is conducive to improving the industry's trust and satisfaction with the EtherCAT system.

[0225] All the above optional technical solutions can be arbitrarily combined to form optional embodiments of the present application, which will not be described one by one here.

[0226] The following are device embodiments of the present application, which can be used to execute the method embodiments of the present application. For details not disclosed in the device embodiments of the present application, please refer to the method embodiments of the present application.

[0227] Fig.10 Schematic diagram of a data transmission device provided by an embodiment of the present application. Fig.10 As shown, the data transmission device includes:

[0228] The first trigger module 1001 is configured to trigger the first core based on the data acquisition request sent by the data requester, so that the first core runs the Ethernet protocol stack to transfer the data acquisition request to the shared memory area, and sends an inter-core request message to the second core, wherein the inter-core request message includes the data acquisition request, and the data acquisition request includes the slave station address information of the target real-time Ethernet slave station;

[0229] The second trigger module 1002 is configured to trigger the second core based on the inter-core request message, so that the second core runs the Ethernet protocol stack and reads the data acquisition request from the shared memory area; runs the security protocol stack, reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station based on the slave station address information, and transfers the target file to the shared memory area, and sends an inter-core response message to the first core;

[0230] The third trigger module 1003 is configured to trigger the first kernel based on the inter-core response message, so that the first kernel runs the Ethernet protocol stack, reads the target file from the shared memory area, and forwards the target file to the data requester.

[0231] In some embodiments, a shared memory area is set in a data transmission channel, and the data transmission channel is used for inter-core data interaction between the first core and the second core to realize data transmission between the data requester and the target real-time Ethernet slave station; the shared memory area includes multiple data sending buffers and multiple data receiving buffers, and a real-time Ethernet slave station corresponds to at least one data sending buffer and one data receiving buffer; the data acquisition request also includes the link information of the data requester.

[0232] The first kernel includes a transfer module, and the transfer module is configured to: run the Ethernet protocol stack to transfer the data acquisition request to the shared memory area.

[0233] The transfer module includes:

[0234] An acquisition unit is configured to acquire identification information of each data sending buffer in the shared memory area;

[0235] a determination unit configured to determine a target data transmission buffer corresponding to a target real-time Ethernet slave station based on the identification information and the link information;

[0236] The transfer unit is configured to run the Ethernet protocol stack to transfer the data acquisition request to the target data sending buffer.

[0237] In some embodiments, the security protocol stack is a FoE protocol stack.

[0238] The second core includes a reading module, which is configured to: run a security protocol stack, and read a target file corresponding to a data acquisition request from a target real-time Ethernet slave station based on the slave station address information.

[0239] The reading module includes:

[0240] A query unit is configured to determine a target real-time Ethernet slave station based on the slave station address information, and send a query request for querying a FoE communication identifier to the real-time Ethernet master station through an inter-core message processing thread;

[0241] The reading unit is configured to run the FoE protocol stack to read the target file corresponding to the data acquisition request from the target real-time Ethernet slave station if it is determined that the current file reading operation can be triggered based on the FoE communication identifier returned by the real-time Ethernet master station for the query request.

[0242] In some embodiments, the data transmission device further includes:

[0243] A data volume determination module is configured to determine a maximum single communication data volume during a communication interaction with a data requester;

[0244] The shared memory setting module is configured to set a shared memory area in the data transparent transmission channel according to the maximum single communication data volume, wherein the memory size of the shared memory area is not less than the size of the maximum single communication data volume.

[0245] In some embodiments, the first trigger module 1001 includes a trigger unit, which is configured to: trigger the first kernel based on a data acquisition request sent by a data requester.

[0246] The trigger unit comprises:

[0247] A response component is configured to respond to the communication connection request sent by the data requester, establish a communication connection between the first kernel and the data requester, and return a data transparent transmission port number to the data requester;

[0248] The first trigger component is configured to trigger the first core if it monitors that the communication interface receives a data acquisition request sent by the data requester using the data transparent transmission port number.

[0249] In some other embodiments, the trigger unit further includes:

[0250] A result acquisition component is configured to acquire a power-on diagnosis result of the target real-time Ethernet slave station diagnosing the hardware when it is powered on;

[0251] The second trigger component is configured to trigger the first core based on a data acquisition request sent by a data requester if it is determined that the hardware has no fault according to the power-on diagnosis result.

[0252] In some embodiments, the data transmission device further includes:

[0253] A result acquisition module is configured to acquire a periodic diagnosis result of a target real-time Ethernet slave performing periodic diagnosis on hardware during normal operation;

[0254] A first transmission module is configured to stop transparent transmission of data between a data requester and a target real-time Ethernet slave station if it is determined that a first type of hardware fault exists based on a periodic diagnosis result;

[0255] A second transmission module is configured to continue to perform data transparent transmission between the data requester and the target real-time Ethernet slave station if it is determined based on the periodic diagnosis result that the hardware has a second type of fault;

[0256] The third transmission module is configured to wait for the third type of fault to be eliminated before continuing to perform data transparent transmission between the data requester and the target real-time Ethernet slave station if it is determined based on the periodic diagnosis result that the hardware has a third type of fault.

[0257] The present application also provides a controller, including: Fig.10 The data transmission device shown, and the first core and the second core controlled by the data transmission device.

[0258] The embodiment of the present application also provides a data transmission system, including a data requester, the above-mentioned controller, a real-time Ethernet slave station and a FSoE slave station; the real-time Ethernet slave station is also a FSoE master station;

[0259] The data requester and the controller use TCP / IP protocol for communication connection;

[0260] The controller and the real-time Ethernet slave station use the nested protocol of Ethernet and FSoE for communication connection;

[0261] The real-time Ethernet slave station and the FSoE slave station communicate with each other using the FSoE protocol.

[0262] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0263] Fig.11 Schematic diagram of an electronic device 11 provided in an embodiment of the present application. Fig.11 As shown, the electronic device 11 of this embodiment includes: a processor 1101, a memory 1102, and a computer program 1103 stored in the memory 1102 and executable on the processor 1101. When the processor 1101 executes the computer program 1103, the steps in the above-mentioned method embodiments are implemented. Alternatively, when the processor 1101 executes the computer program 1103, the functions of the modules / units in the above-mentioned device embodiments are implemented.

[0264] The electronic device 11 may be a desktop computer, a notebook, a PDA, a cloud server, or other electronic device. The electronic device 11 may include, but is not limited to, a processor 1101 and a memory 1102. Those skilled in the art will appreciate that Fig.11 The electronic device 11 is merely an example and does not limit the electronic device 11 , and may include more or less components than those shown in the figure, or different components.

[0265] Processor 1101 can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field-programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc.

[0266] The memory 1102 may be an internal storage unit of the electronic device 11, for example, a hard disk or memory of the electronic device 11. The memory 1102 may also be an external storage device of the electronic device 11, for example, a plug-in hard disk, a smart media card (SMC), a secure digital (SD) card, a flash card (FlashCard), etc. equipped on the electronic device 11. The memory 1102 may also include both an internal storage unit of the electronic device 11 and an external storage device. The memory 1102 is used to store computer programs and other programs and data required by the electronic device.

[0267] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units.

[0268] If the integrated module / unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium (e.g., a computer-readable storage medium). Based on this understanding, the present application implements all or part of the processes in the above-mentioned embodiment method, and can also be completed by instructing the relevant hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and the computer program can implement the steps of the above-mentioned various method embodiments when executed by the processor. The computer program may include computer program code, which may be in source code form, object code form, executable file or some intermediate form. Computer-readable storage media may include: any entity or device capable of carrying computer program code, recording medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electric carrier signal, telecommunication signal and software distribution medium, etc.

[0269] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A data transmission method, characterized in that: include: triggering the first kernel based on the data acquisition request sent by the data requester, so that the first kernel runs the Ethernet protocol stack to transfer the data acquisition request to the shared memory area, and sends an inter-core request message to the second kernel, wherein the inter-core request message includes the data acquisition request, and the data acquisition request includes the slave station address information of the target real-time Ethernet slave station; Trigger the second kernel based on the inter-core request message, so that the second kernel runs the Ethernet protocol stack and reads the data acquisition request from the shared memory area; runs the security protocol stack, reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station based on the slave station address information, transfers the target file to the shared memory area, and sends an inter-core response message to the first kernel; The first kernel is triggered based on the inter-core response message, so that the first kernel runs the Ethernet protocol stack, reads the target file from the shared memory area, and forwards the target file to the data requester.

2. The method according to claim 1, characterized in that: The shared memory area is set in a data transparent transmission channel, and the data transparent transmission channel is used for inter-core data interaction between the first core and the second core to realize data transparent transmission between the data requester and the target real-time Ethernet slave station; the shared memory area includes a plurality of data sending buffers and a plurality of data receiving buffers, and a real-time Ethernet slave station corresponds to at least one data sending buffer and one data receiving buffer; the data acquisition request also includes link information of the data requester; Running the Ethernet protocol stack to transfer the data acquisition request to the shared memory area includes: Obtaining identification information of each of the data sending buffers in the shared memory area; Based on the identification information and the link information, determining a target data sending buffer corresponding to the target real-time Ethernet slave station; The Ethernet protocol stack is run to transfer the data acquisition request to the target data sending buffer.

3. The method according to claim 1, characterized in that The security protocol stack is a FoE protocol stack; Running a security protocol stack, and reading a target file corresponding to the data acquisition request from the target real-time Ethernet slave station based on the slave station address information, including: Determine the target real-time Ethernet slave station based on the slave station address information, and send a query request for querying the FoE communication identifier to the real-time Ethernet master station through the inter-core message processing thread; If it is determined that the file reading operation can be triggered currently based on the FoE communication identifier returned by the real-time Ethernet master station in response to the query request, the FoE protocol stack is run to read the target file corresponding to the data acquisition request from the target real-time Ethernet slave station.

4. The method according to any one of claims 1 to 3, characterized in that: Before triggering the first kernel based on the data acquisition request sent by the data requester, the method further includes: Determine a maximum single communication data volume during the communication interaction with the data requester; According to the maximum single communication data volume, a shared memory area is set in the data transparent transmission channel, wherein the memory size of the shared memory area is not less than the size of the maximum single communication data volume.

5. The method according to claim 1, characterized in that The first kernel is triggered based on the data acquisition request sent by the data requester, including: In response to the communication connection request sent by the data requester, a communication connection is established between the first kernel and the data requester, and a data transparent transmission port number is returned to the data requester; If it is monitored that the communication interface receives a data acquisition request sent by the data requester using the data transparent transmission port number, the first core is triggered.

6. The method according to claim 1, characterized in that The first kernel is triggered based on the data acquisition request sent by the data requester, including: Get power-on diagnostic results; If the power-on diagnosis result determines that the controller has no fault, the first core is triggered based on the data acquisition request sent by the data requester.

7. The method according to claim 1, characterized in that The method further comprises: Get periodic diagnosis results; If it is determined based on the periodic diagnosis result that the controller has a first type of fault, stopping the data transparent transmission between the data requester and the target real-time Ethernet slave station; If it is determined based on the periodic diagnosis result that the controller has a second type of fault, then continue to perform data transparent transmission between the data requester and the target real-time Ethernet slave station; If it is determined based on the periodic diagnosis result that the controller has a third type of fault, the data transparent transmission between the data requester and the target real-time Ethernet slave station is continued after the third type of fault is eliminated.

8. A data transmission device, characterized in that: include: A first trigger module is configured to trigger the first core based on a data acquisition request sent by a data requester, so that the first core runs an Ethernet protocol stack to transfer the data acquisition request to a shared memory area, and sends an inter-core request message to the second core, wherein the inter-core request message includes the data acquisition request, and the data acquisition request includes the slave station address information of the target real-time Ethernet slave station; The second trigger module is configured to trigger the second kernel based on the inter-core request message, so that the second kernel runs the Ethernet protocol stack and reads the data acquisition request from the shared memory area; runs the security protocol stack, reads the target file corresponding to the data acquisition request from the target real-time Ethernet slave station based on the slave station address information, transfers the target file to the shared memory area, and sends an inter-core response message to the first kernel; The third trigger module is configured to trigger the first kernel based on the inter-core response message, so that the first kernel runs the Ethernet protocol stack, reads the target file from the shared memory area, and forwards the target file to the data requester.

9. A controller, characterized in that: It comprises the data transmission device as claimed in claim 8, and a first core and a second core controlled by the data transmission device.

10. A data transmission system, characterized in that: It comprises a data requester, a controller as claimed in claim 9, a real-time Ethernet slave station and a FSoE slave station; the real-time Ethernet slave station is also a FSoE master station; The data requester and the controller are connected in communication using the TCP / IP protocol; The controller and the real-time Ethernet slave station are connected for communication using a nested protocol of Ethernet and FSoE; The real-time Ethernet slave station and the FSoE slave station are connected for communication using the FSoE protocol.

11. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 7 are implemented.

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