Solid state disk abnormal power-off processing method, device, equipment, medium and product

Abstract

The application provides a solid state disk abnormal power-off processing method, device, equipment, medium and product, acquires the power state of a solid state disk detected by a power supply control module; after the power management module detects that the solid state disk abnormally powers off, a small capacitor provides temporary power supply and controls the solid state disk to stop read-write operation; a data flush operation is performed, and the data being transmitted on the channel between the solid state disk and a host is flushed to a master device interface or a slave device interface. According to the scheme, the small capacitor can provide temporary power supply when power is abnormal, the cost and volume of the solid state disk are saved; and when power is abnormally powered off, the temporary power supply provided by the small capacitor can flush the data being transmitted on the channel between the solid state disk and the host to the master device interface or the slave device interface, data loss or data blockage of the channel is avoided, and the reliability of the system is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, in particular to a solid state disk abnormal power-off processing method, device, equipment, medium and product. BACKGROUND

[0002] Solid state disk (Solid State Disk or Solid State Drive, abbreviated as SSD) is a hard disk made of solid-state electronic storage chip array. Solid state disk is a data storage device using flash memory (NAND Flash) as storage medium, which is widely used in personal computers, servers, mobile devices and other electronic devices.

[0003] At present, the solid state disk on the market usually uses large capacity capacitor (such as 1000uF or more) as power buffer to ensure that the system power supply can be maintained in the case of abnormal power interruption and complete data saving. However, large capacity capacitor has large volume, which is not conducive to the overall design of solid state disk, especially in the trend of light and thin design, this defect is particularly obvious.

[0004] The existing technical solution mainly relies on high capacity capacitor to prolong the power supply time to ensure the integrity and consistency of data in the case of sudden power failure. However, this design has the problems of large volume, high cost, inflexible design and reliability. In addition, in the case of extreme power failure, the system may not complete data saving in time, resulting in data loss or path blockage, affecting the normal operation of the system.

[0005] Therefore, how to save the cost of solid state disk and ensure the timely saving of data in the case of abnormal power-off of solid state disk and improve the reliability of the system has become a problem to be solved at present. SUMMARY

[0006] The present application provides a solid state disk abnormal power-off processing method, device, equipment, medium and product, which solves the defects of high cost and poor system reliability of the prior art, saves the cost of solid state disk, ensures the timely saving of data in the case of abnormal power-off of solid state disk, and improves the reliability of the system.

[0007] The present application provides a solid state disk abnormal power-off processing method, which comprises an power supply control module and a small capacitor, and the small capacitor is arranged near the power supply control module; the method comprises the following steps.

[0008] Obtaining the power supply state of the solid state disk detected by the power supply control module.

[0009] The control module controls the solid state disk to stop read-write operation through the small capacitor to provide temporary power supply after the power control module detects the abnormal power-off of the solid state disk.

[0010] The method further comprises: performing data flush operation, flushing the data being transmitted between the solid state disk and the host on the channel to the master device interface or the slave device interface.

[0011] The method further comprises: performing data flush operation, flushing the data being transmitted between the solid state disk and the host on the channel to the master device interface or the slave device interface.

[0012] The method further comprises: performing data flush operation, flushing the data being transmitted between the solid state disk and the host on the channel to the master device interface or the slave device interface.

[0013] The method further comprises: performing data flush operation, flushing the data being transmitted between the solid state disk and the host on the channel to the master device interface or the slave device interface.

[0014] The method further comprises: performing data flush operation, flushing the data being transmitted between the solid state disk and the host on the channel to the master device interface or the slave device interface.

[0015] The method further comprises: performing data flush operation, flushing the data being transmitted between the solid state disk and the host on the channel to the master device interface or the slave device interface.

[0016] The application further provides a solid state disk abnormal power-off processing device, the solid state disk comprising a power control module and a small capacitor, the small capacitor being arranged near the power control module; the device comprising the following modules.

[0017] The acquisition module is used for acquiring the power state of the solid state disk detected by the power control module.

[0018] The control module controls the solid state disk to stop read-write operation through the small capacitor to provide temporary power supply after the power control module detects the abnormal power-off of the solid state disk.

[0019] a flush module, configured to perform a data flush operation to flush data being transmitted between the solid state disk and the host on a channel to a master device interface or a slave device interface.

[0020] The application further provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the solid state disk abnormal power-off processing method according to any one of the above when executing the computer program.

[0021] The application further provides a non-transitory computer readable storage medium, which stores a computer program, and the computer program is executable on a processor to implement the solid state disk abnormal power-off processing method according to any one of the above.

[0022] The application further provides a computer program product, comprising a computer program, and the computer program is executable on a processor to implement the solid state disk abnormal power-off processing method according to any one of the above.

[0023] The application provides a solid state disk abnormal power-off processing method, device, equipment, medium and product, the power state of the solid state disk detected by the power control module is acquired; after the power control module detects that the solid state disk is abnormally powered off, temporary power supply is provided by a small capacitor and the solid state disk is controlled to stop read-write operation; a data flush operation is performed to flush data being transmitted between the solid state disk and the host on a channel to a master device interface or a slave device interface. According to the scheme of the application, the small capacitor can provide temporary power supply when power is abnormal, thereby saving the cost and volume of the solid state disk; and when power is abnormally powered off, temporary power supply provided by the small capacitor can flush data being transmitted between the solid state disk and the host on a channel to a master device interface or a slave device interface, thereby avoiding data loss or data blocking the channel and improving the reliability of the system. BRIEF DESCRIPTION OF DRAWINGS

[0024] In order to more clearly illustrate the technical solutions of the present application or the prior art, the following will briefly introduce the drawings needed in the embodiments or prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and those skilled in the art can obtain other drawings according to these drawings without creative labor.

[0025] Figure 1 is a flowchart of the solid state disk abnormal power-off processing method provided by the application.

[0026] Figure 2 is an architecture diagram of the flush framework provided by the application.

[0027] Figure 3 is a structural schematic diagram of a solid state disk abnormal power-off processing device provided by the present application.

[0028] Figure 4 is a structural schematic diagram of an electronic device provided by the present application. DETAILED DESCRIPTION

[0029] To make the objectives, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described below in detail with reference to the drawings in the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0030] The technical solutions of the present application and how the technical solutions solve the above technical problems will be described in detail below with reference to specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes can not be described again in some embodiments. The solid state disk abnormal power-off processing method of the present application will be described below with reference to the drawings.

[0031] In practical applications, the execution subject of the solid state disk abnormal power-off processing method can be a solid state disk abnormal power-off processing device, and the implementation mode of the solid state disk abnormal power-off processing device can be various, such as being realized by a computer program, for example, application software, etc.; or, for example, a chip, etc. It can also be realized as a medium storing a related computer program, for example, a U disk, a cloud disk, etc.; or, it can also be realized by an entity device integrated or installed with a related computer program, such as a server, etc.

[0032] Figure 1 is a flowchart of a solid state disk abnormal power-off processing method provided by the present application, as shown in Figure 1 the method comprises steps 101 to 103.

[0033] Step 101, obtaining the power state of the solid state disk detected by the power control module.

[0034] In the present application, the solid state disk comprises a power control module and a small capacitor, and the small capacitor is arranged near the power control module. The power control module is used to detect the power state of the solid state disk. As an example, the power control module adopts a high-precision ADC (analog-to-digital converter) to collect the sampling voltage value at the sampling point in real time. The sampling voltage value is compared with the reference voltage value, if the sampling voltage is lower than the reference voltage value, it is determined that the solid state disk is abnormally powered off; if the sampling voltage is not lower than the reference voltage value, it is determined that the power state of the solid state disk is normal. Optionally, the reference voltage value can be set according to the actual working demand and the working condition of the solid state disk.

[0035] Optionally, the interrupt signal can be triggered when it is determined that the solid state disk is abnormally powered off, so as to prompt the solid state disk abnormal power-off processing device to perform power-off abnormality processing.

[0036] In actual application, the power control module can collect the sampling voltage value at the sampling point in real time or periodically. For example, the power control module can include a sampling unit and an ADC conversion unit. The sampling unit is connected with the sampling point, and the sampling unit collects the analog voltage signal at the sampling point. The ADC conversion unit is connected with the sampling unit, and the ADC conversion unit converts the analog voltage signal into the sampling voltage value, so as to facilitate subsequent determination of the power state of the solid state disk according to the sampling voltage value.

[0037] Step 102, after the power control module detects that the solid state disk is abnormally powered off, the small capacitor provides temporary power supply and controls the solid state disk to stop read-write operation.

[0038] In actual application, the selection of the small capacitor is based on its discharge capacity and volume limitation, so as to ensure that sufficient electric energy can be provided to complete the data flush operation when the power is powered off. It can be understood that the small capacity capacitor can not only provide sufficient electric energy to complete the data flush operation, but also does not occupy too much PCB space. Generally, a small capacitor with a capacity of 100uF to 500uF is selected. The small capacitor is arranged near the power control module of the solid state disk, so as to minimize the resistance loss and ensure the minimum resistance loss and the fastest response time.

[0039] Specifically, after the power control module detects that the solid state disk is abnormally powered off, the solid state disk abnormal power-off processing device controls the small capacitor to provide temporary power supply. Optionally, after the solid state disk abnormal power-off processing device receives the interrupt signal, the small capacitor is controlled to provide temporary power supply. It can be understood that the temporary power supply provided by the small capacitor can provide sufficient electric energy to complete the data flush operation, thereby improving the reliability of the system.

[0040] In the prior art, a high-capacity capacitor is mainly relied on to prolong the power supply time, so as to ensure the integrity and consistency of data in the case of sudden power failure. However, this scheme has the following problems: the physical size of the large-capacity capacitor is large, which occupies the valuable printed circuit board (PCB) board space and limits the design flexibility. The cost of the large-capacity capacitor is high, which increases the overall product cost. The durability and reliability of the large-capacity capacitor may be reduced in the case of high temperature or long time use. Therefore, in the prior art, there are problems of large size, high cost, inflexible design and reliability.

[0041] Compared with the prior art, the following technical effects are achieved by using a small-capacitance capacitor to provide temporary power supply: on the one hand, by using a small-capacitance capacitor instead of a traditional large-capacitance capacitor, the overall size of the solid-state disk is significantly reduced. This enables the present application to better adapt to the needs of light and thin design and miniaturization. The small-capacitance capacitor is low in cost, thereby reducing the production cost of the overall product, while not affecting data protection and system stability. On the other hand, the small-capacitance capacitor is small in size and flexible in arrangement, which helps to optimize the layout of the PCB and the circuit design, and avoids the occupation of the board space by the large-capacitance capacitor. This flexibility enables the design of the solid-state disk to better adapt to different application scenarios and structural requirements. On the other hand, since the small-capacitance capacitor is better adapted to high temperature or long-time use, the present application effectively prolongs the service life of the solid-state disk and reduces system failures caused by aging or failure of the large-capacitance capacitor.

[0042] Further, after the power control module detects the abnormal power-off of the solid-state disk, the solid-state disk abnormal power-off processing apparatus controls the solid-state disk to stop read-write operation, so as to ensure the consistency of data. At the same time, this step can further reduce power consumption and gain time for subsequent flush operation. For example, after the solid-state disk abnormal power-off processing apparatus receives the interrupt signal, the solid-state disk abnormal power-off processing apparatus controls the solid-state disk to stop read-write operation in response to the interrupt signal.

[0043] In the present embodiment, the manner of controlling the solid-state disk to stop read-write operation is not specifically limited. For example, the SSD firmware contains logic for controlling read-write operation, and the solid-state disk abnormal power-off processing apparatus can trigger the SSD firmware to stop data transmission after the power control module detects the abnormal power-off of the solid-state disk. For another example, the solid-state disk abnormal power-off processing apparatus sends a specific command to the solid-state disk through an interface to inform it to stop all ongoing read-write operations. For another example, the interface protocol (such as SATA, PCIe, NVMe, etc.) supported by the solid-state disk can contain a command or signal for instructing the solid-state disk to stop read-write operation.

[0044] Step 103, performing a data flush operation to flush the data being transmitted on the path between the solid-state disk and the host to the master device interface or the slave device interface.

[0045] The flush operation generally refers to the process of writing data from volatile storage (such as RAM cache) to non-volatile storage (such as hard disk, solid-state disk or other types of persistent storage medium). The flush operation more specifically refers to ensuring that the data is physically written and persistently saved in the non-volatile storage, rather than just copied to the non-volatile storage.

[0046] It is noted that the flush operation can ensure that data is moved from volatile storage (where data is lost upon power loss) to non-volatile storage (where data is retained even upon power loss), and can guarantee data persistence. The flush operation can accurately and quickly write data to storage media even in the case of a small capacitor providing temporary power.

[0047] In practical applications, flushing data to a master interface (master) or a slave interface (slave) usually means copying data to non-volatile storage media. Non-volatile storage media can retain data even after power is disconnected. As an example, the master interface usually refers to the interface of the host or the master controller, which controls the initiation and termination of data transmission. The host sends read and write commands to the solid state disk through the master interface, including data read requests and write instructions. The solid state disk responds to the master interface commands, reads data from its storage media and transmits it to the host, or receives data from the host for storage.

[0048] As an example, the master interface usually refers to the interface of the master controller or host (Host), such as the CPU or the main memory controller of the system. Transmitting data to the master interface means that the data is sent back to the main control unit of the system, which can be further processed or temporarily stored. Therefore, flushing the data being transmitted between the solid state disk and the host to the master interface can ensure that the data is accurately and quickly saved to the non-volatile storage media of the host.

[0049] As an example, the slave interface usually refers to the interface of the slave device or storage media, such as a hard disk, a solid state disk, a memory stick or other types of storage devices. Data transmitted to the slave interface means that the data is written into the slave device, such as writing into the NAND flash storage media of the SSD. Therefore, flushing the data being transmitted between the solid state disk and the host to the slave interface can ensure that the data is accurately and quickly saved to the non-volatile storage media of the solid state disk.

[0050] In practical applications, the data being transmitted between the solid state disk and the host can originate from the host (master end), and in the case of abnormal power failure of the solid state disk, the abnormal power failure processing device of the solid state disk can flush the data that has not been processed into the designated cache area or memory of the host. The data being transmitted between the solid state disk and the host can need to be written into the solid state disk (slave end), and in the case of abnormal power failure of the solid state disk, the abnormal power failure processing device of the solid state disk can flush the data that has not been processed into the storage media of the solid state disk to ensure data persistence.

[0051] In actual application, the flush operation can be implemented by a flush module, which is located between a Peripheral Component Interconnect Express (PCIE) and a master, and mainly functions to flush all data on the path to the master or the slave when detecting abnormal power-off, so as to ensure the integrity of the data and the normality of the path. Specifically, the flush module is designed as a cache and a data transmission unit, and can transfer the data on the path to the target storage unit in a very short time.

[0052] Figure 2 is a schematic diagram of the architecture of the flush framework provided by the application, as shown in Figure 2 The flush framework includes a solid state disk chip, a flush module and a host. The solid state disk chip includes a data outlet. The solid state disk chip (SSD chip) includes a power control module and a small capacitor, and the small capacitor is arranged near the power control module. The power control module is used to detect the power state of the solid state disk, and triggers an interrupt signal when the solid state disk abnormally powers off. The small capacitor provides temporary power supply in response to the interrupt signal. The solid state disk chip contains a data outlet for transmitting data to other components. The flush module triggers a data protection mechanism in response to the interrupt signal, and performs a data flush operation to flush the data being transmitted on the path between the solid state disk and the host to the master interface or the slave interface. The host is usually a CPU or a master of a computer, and is responsible for sending read-write instructions. In the case of abnormal power-off, the host receives a notification from the flush module and may execute an upper-layer data protection strategy. Through such cooperative work, the flush framework can protect the data from being lost in the case of abnormal power-off, and ensure that the storage device can be reliably restored after power recovery. This mechanism is crucial for protecting critical data and maintaining system reliability.

[0053] In addition, in a possible implementation, the step 103 includes flushing the data being transmitted on the path between the solid state disk and the host to the master interface or the slave interface in order of the priority of the data from high to low.

[0054] Specifically, the priority of data can be set according to actual application requirements and application scenarios. The flush module has a built-in high-priority data transmission mechanism to ensure that, in the case of power failure, data being transmitted between the solid state disk and the host on the channel is flushed to the master device interface or the slave device interface in order of priority from high to low, which can ensure the security of critical data. Moreover, by writing important data first, the risk of data damage can be reduced, and the integrity of the overall data can be improved.

[0055] In practical applications, sorting data according to priority can optimize the performance of the SSD, allowing system resources (such as cache and bandwidth) to be more effectively allocated to critical tasks, which can optimize system performance. By prioritizing high-priority data, the delay and congestion on the data transmission channel can be reduced, ensuring smooth data transmission. Through priority management, the SSD can better support complex storage scenarios that require processing a large amount of data of different priorities.

[0056] It can be understood that, in the case of abnormal power failure, data being transmitted between the solid state disk and the host on the channel is flushed to the master device interface or the slave device interface in order of priority from high to low, which can avoid data loss or data congestion on the channel, improving the reliability of the system.

[0057] In the scheme of the embodiment, the small capacitor can provide temporary power supply in the case of power anomaly, saving the cost and volume of the solid state disk. Moreover, in the case of abnormal power failure, the temporary power supply provided by the small capacitor can flush data being transmitted between the solid state disk and the host on the channel to the master device interface or the slave device interface, avoiding data loss or data congestion on the channel, and improving the reliability of the system.

[0058] In addition, in a possible implementation, the above-mentioned solid state disk abnormal power failure processing method further includes: after the power supply control module detects the abnormal power failure of the solid state disk, performing hibernation processing on the physical layer of the peripheral component interconnect interface.

[0059] The peripheral component interconnect express (PCIE) is a high-speed serial computer expansion bus standard used to connect various peripherals and expansion cards within a computer. It supports point-to-point connections, with each device having a dedicated connection to the processor. This topology makes communication between devices more efficient, as it eliminates the need for devices to wait for access to the bus. The PCIE operates on three levels: the physical layer, the data link layer, and the transport layer. The physical layer is responsible for transmitting physical signals and electrical characteristics of data, the data link layer handles flow control and error detection for data transmission, and the transport layer manages the distribution and routing of data packets. PCIE devices need to be initialized and configured when connected to the host, so that the system can recognize and configure the device.

[0060] The physical layer (PHY) refers to the lowest layer of protocol in data communication, used for signal transmission and reception between physical media. In this invention, the PCIE PHY refers to the physical layer of the PCIE interface, responsible for the physical transmission of PCIE signals.

[0061] In practical applications, the PCIE PHY is usually the most power-consuming part of the system. It can be understood that after the power control module detects the abnormal power-off of the solid state disk, the PCIE PHY can be put to sleep, which can greatly reduce the power consumption of the system, so that the remaining power can be used for data flush operation, avoiding data loss due to insufficient power, and improving the overall reliability and data protection capability of the system.

[0062] In addition, in one possible implementation, the solid state disk abnormal power-off processing method further includes: returning new data on the path between the solid state disk and the host to the slave device interface during the data flush operation.

[0063] The new data usually refers to the data received during the data flush operation. For example, the new data may be new input data that the system tries to receive during the flush operation. For another example, there may be an instruction queue in the system, and new write instructions are still being added to the queue even if the flush operation is in progress. For another example, in asynchronous transfer mode, data transmission and reception are independent, so new data may still arrive during the flush operation.

[0064] In the embodiment, the data flush operation is performed, and the new data on the path between the solid state disk and the host is returned to the slave interface, so as to ensure the integrity and consistency of the data, ensure the smooth operation of the whole path, avoid data congestion, and improve the reliability of the system.

[0065] In addition, in order to further improve the reliability of the system and the integrity and consistency of the data, in a possible implementation, after the step 103, the solid state disk abnormal power-off processing method further includes: performing integrity and consistency verification on the data flushed to the master interface or the slave interface.

[0066] Specifically, the integrity and consistency verification on the data is not limited. For example, the integrity verification can be implemented by a hash function (such as SHA-256), a checksum (CRC32), a digital signature, a redundant code, or the like. For example, the consistency verification can be implemented by data backup verification, data comparison, or the like.

[0067] In actual application, if the integrity and consistency verification of the data fails, the data can be repaired to ensure the integrity and consistency of the data.

[0068] In the embodiment, after the data flush operation is performed, the integrity and consistency of the data flushed to the master interface or the slave interface are verified, so as to ensure the integrity and consistency of the data and improve the reliability of the system.

[0069] In addition, in a possible implementation, the solid state disk abnormal power-off processing method further includes: after the power control module detects that the power of the solid state disk is restored, performing data integrity verification and system recovery.

[0070] For example, the process of the data integrity verification is as follows: after the power control module detects that the power of the solid state disk is restored, a built-in self-checking program is run to check the hardware state and the system log. It is verified whether the data on the storage medium is complete, and whether there is a data block with incomplete writing caused by power-off is checked. The consistency of the data on the storage medium is checked, such as the checksum or hash value of the data. If the data error or inconsistency is found, the error correction code (ECC) or other mechanism is used for repair. The system log is analyzed to determine the operation state before power-off and the data to be recovered.

[0071] For the system recovery process, the power control module restores the data in the pre-power failure cache to the system after detecting the power recovery of the solid state disk, ensuring the continuity of the data. The data transmission on the path between the solid state disk and the host is recovered, and the solid state disk is controlled to start the read-write operation. The process and result of the system recovery are recorded for future reference. The functions of the system are tested to ensure that all services work as expected.

[0072] In this embodiment, after the power control module detects the power recovery of the solid state disk, data integrity verification and system recovery are performed, and the system can quickly recover to the normal working state after power recovery, reducing the risk of service interruption and data loss caused by power failure events, and improving the reliability of the system.

[0073] The solid state disk abnormal power failure processing method provided in this embodiment acquires the power state of the solid state disk detected by the power control module. After the power control module detects the abnormal power failure of the solid state disk, a small capacitor provides temporary power supply and controls the solid state disk to stop read-write operation. The data flush operation is performed to flush the data being transmitted on the path between the solid state disk and the host to the master device interface or the slave device interface. The scheme of this embodiment can provide temporary power supply when power is abnormal, saving the cost and volume of the solid state disk. When power fails, the temporary power supply provided by the small capacitor can flush the data being transmitted on the path between the solid state disk and the host to the master device interface or the slave device interface, avoiding data loss or data blocking the path, and improving the reliability of the system.

[0074] The solid state disk abnormal power failure processing device provided in this embodiment is described below. The solid state disk abnormal power failure processing device described below can be referred to in conjunction with the solid state disk abnormal power failure processing method described above.

[0075] Figure 3 is a structural schematic diagram of the solid state disk abnormal power failure processing device provided in this embodiment, as Figure 3 shown, the solid state disk abnormal power failure processing device includes an acquisition module 31, a control module 32, and a flush module.

[0076] The acquisition module 31 is configured to acquire the power state of the solid state disk detected by the power control module.

[0077] In the present application, the solid state disk comprises a power control module and a small capacitor, and the small capacitor is arranged near the power control module. The power control module is used to detect the power state of the solid state disk. As an example, the power control module uses a high-precision ADC (analog-to-digital converter) to collect the sampling voltage value at the sampling point in real time. The sampling voltage value is compared with the reference voltage value. If the sampling voltage is lower than the reference voltage value, it is determined that the solid state disk is abnormally powered off. If the sampling voltage is not lower than the reference voltage value, it is determined that the power state of the solid state disk is normal. Optionally, the reference voltage value can be set according to the actual working demand and the working condition of the solid state disk.

[0078] Optionally, when it is determined that the solid state disk is abnormally powered off, an interrupt signal can be triggered to prompt the solid state disk abnormal power-off processing device to perform power-off abnormality processing.

[0079] In practical application, the power control module can collect the sampling voltage value at the sampling point in real time or periodically. As an example, the power control module can comprise a sampling unit and an ADC conversion unit. The sampling unit is connected with the sampling point, and the sampling unit collects the analog voltage signal at the sampling point. The ADC conversion unit is connected with the sampling unit, and the ADC conversion unit converts the analog voltage signal into the sampling voltage value, so as to facilitate subsequent determination of the power state of the solid state disk according to the sampling voltage value.

[0080] The control module 32 is used to provide temporary power supply through the small capacitor and control the solid state disk to stop read-write operation after the power control module detects that the solid state disk is abnormally powered off.

[0081] In practical application, the selection of the small capacitor is based on its discharge capacity and volume limitation, so as to ensure that sufficient electric energy can be provided to complete the data flush operation when the power is powered off. It can be understood that the small capacity capacitor can provide sufficient electric energy to complete the data flush operation, and does not occupy too much PCB space. Generally, a small capacitor with a capacity of 100uF to 500uF is selected. The small capacitor is arranged near the power control module of the solid state disk, so as to minimize the resistance loss and ensure the minimum resistance loss and the fastest response time.

[0082] Specifically, after the power control module detects that the solid state disk is abnormally powered off, the control module 32 controls the small capacitor to provide temporary power supply. Optionally, after the control module 32 receives the interrupt signal, the control module 32 controls the small capacitor to provide temporary power supply. It can be understood that the temporary power supply provided by the small capacitor can provide sufficient electric energy to complete the data flush operation, and the reliability of the system is improved.

[0083] In the prior art, the power supply time is mainly prolonged by relying on high-capacity capacitors to ensure the integrity and consistency of data in the case of sudden power failure. However, this solution has the following problems: the physical size of the large-capacity capacitor is large, occupying valuable printed circuit board (PCB) board space, limiting the flexibility of the design. The cost of the large-capacity capacitor is high, increasing the overall product cost. The durability and reliability of the large-capacity capacitor may be degraded in high-temperature or long-time use conditions. Therefore, in the prior art, there are problems of large size, high cost, inflexible design, and reliability.

[0084] Compared with the prior art, the use of small capacitors to provide temporary power supply has the following technical effects: on the one hand, by using small-capacity capacitors instead of traditional large-capacity capacitors, the overall size of the solid state disk is significantly reduced. This enables the present application to better adapt to the needs of thin and light, small design. The small-capacity capacitor is low in cost, which reduces the overall production cost of the product, while not affecting the data protection and system stability. On the other hand, the small size and flexible arrangement of the small-capacity capacitor help to optimize the layout of the PCB and the circuit design, avoiding the occupation of the large-capacity capacitor on the board space. This flexibility enables the design of the solid state disk to better adapt to different application scenarios and structural requirements. On the other hand, since the small-capacity capacitor is better adapted to high-temperature or long-time use, the present application effectively prolongs the service life of the solid state disk and reduces system failures caused by aging or failure of the large-capacity capacitor.

[0085] Further, after the power control module detects the abnormal power failure of the solid state disk, the control module 32 controls the solid state disk to stop read-write operation to ensure the consistency of the data. At the same time, this step can further reduce power consumption and gain time for subsequent flush operation. For example, after the control module 32 receives the interrupt signal, it controls the solid state disk to stop read-write operation in response to the interrupt signal.

[0086] In this embodiment, the way to control the solid state disk to stop read-write operation is not specifically limited. For example, the SSD firmware contains logic to control read-write operation, and the control module 32 can trigger the SSD firmware to stop data transmission after the power control module detects the abnormal power failure of the solid state disk. For another example, the control module 32 sends a specific command to the solid state disk through the interface to inform it to stop all ongoing read-write operations. For another example, the interface protocol supported by the solid state disk (such as SATA, PCIe, NVMe, etc.) can contain commands or signals to instruct the solid state disk to stop read-write operation.

[0087] The flush module 33 described above is used to perform a data flush operation to flush the data being transmitted between the solid state disk and the host to the master device interface or the slave device interface.

[0088] A flush operation generally refers to the process of writing data from volatile storage (e.g., RAM cache) to non-volatile storage (e.g., hard disk, solid state drive, or other type of persistent storage medium). More specifically, a flush operation refers to ensuring that data is physically written and persisted on the non-volatile storage, and not just copied to the non-volatile storage.

[0089] It is important to note that a flush operation ensures that data is moved from volatile storage (where data is lost upon power loss) to non-volatile storage (where data is retained even upon power loss), guaranteeing persistent storage of data. A flush operation can accurately and quickly write data to storage media even in the case of small capacitance providing temporary power.

[0090] In practical applications, a flush module 33 flushing data to a master or slave interface typically means copying data to a non-volatile storage medium. A non-volatile storage medium is capable of retaining data even upon power loss. As an example, a master interface typically refers to the interface of a host or master controller, which controls the initiation and termination of data transfer. A host sends read and write commands to a solid state drive through the master interface, including data read requests and write instructions. The solid state drive responds to the master interface commands by reading data from its storage medium and transferring it to the host, or receiving data from the host for storage.

[0091] As an example, a master interface typically refers to the interface of a host controller or host (Host), such as a CPU or system's main memory controller. Transferring data to a master interface means that data is sent back to the system's master unit, possibly for further processing or temporary storage. Therefore, a flush module 33 flushing data being transferred between a solid state drive and a host on a pathway to a master interface ensures that data is accurately and quickly saved to the host's non-volatile storage medium.

[0092] As an example, a slave interface typically refers to the interface of a slave device or storage medium, such as a hard disk, solid state drive, memory stick, or other type of storage device. Transferring data to a slave interface means that data is written to a slave device, such as to a NAND Flash storage medium of a SSD. Therefore, a flush module 33 flushing data being transferred between a solid state drive and a host on a pathway to a slave interface ensures that data is accurately and quickly saved to the solid state drive's non-volatile storage medium.

[0093] In practical applications, the data being transferred between the SSD and the host may originate from the host (master side). In the event of an abnormal power loss of the SSD, the flush module 33 may flush the unprocessed data back to a designated cache area or memory on the host. Data being transferred between the SSD and the host may also need to be written to the SSD (slave side). In the event of an abnormal power loss of the SSD, the flush module 33 may flush the unprocessed data to the SSD's storage medium to ensure data persistence.

[0094] In practical applications, the flush operation can be implemented through the flush module 33. The flush module 33 is located between the Peripheral Component Interconnect Express (PCIE) and the master path. Its main function is to flush all data on the path to the master or slave port when an abnormal power failure is detected, ensuring data integrity and the normal operation of the path. Specifically, the flush module 33 is designed as a high-speed cache and data transfer unit, capable of transferring data on the path to the target storage unit in a very short time.

[0095] like Figure 2 As shown, the flush framework includes a solid-state drive (SSD) chip, a flush module, and a host. The SSD chip includes a data output. The SSD chip contains a power control module and a small capacitor located near the power control module. The power control module detects the SSD's power status and triggers an interrupt signal when the SSD experiences an abnormal power loss. The small capacitor provides temporary power in response to the interrupt signal. The SSD chip contains a data output for transferring data to other components. The flush module, in response to the interrupt signal, triggers a data protection mechanism, performing a data flush operation to flush the data being transferred between the SSD and the host to the master or slave device interface. The host, typically the computer's CPU or main controller, is responsible for sending read and write commands. In the event of an abnormal power loss, it receives notification from the flush module and may execute upper-level data protection strategies. Through this collaborative work, the flush framework protects data from loss during abnormal power outages and ensures reliable recovery of the storage device after power restoration. This mechanism is crucial for protecting critical data and maintaining system reliability.

[0096] In addition, in a possible implementation, the flush module 33 is specifically configured to flush the data being transmitted between the solid state disk and the host in the order of the priority of the data from high to low to the master device interface or the slave device interface.

[0097] Specifically, the priority of the data can be set according to actual application requirements and application scenarios. The flush module 33 is internally provided with a high-priority data transmission mechanism, which ensures that, in the case of power failure, the data being transmitted between the solid state disk and the host is flushed to the master device interface or the slave device interface in the order of the priority of the data from high to low, thereby ensuring the safety of critical data and reducing the risk of data damage and improving the integrity of the overall data by preferentially writing important data.

[0098] In actual applications, sorting the data according to the priority can optimize the performance of the SSD, allow system resources (such as cache and bandwidth) to be more effectively allocated to critical tasks, and optimize system performance. By preferentially processing high-priority data, the delay and congestion on the data transmission path can be reduced, and smooth data transmission can be ensured. Through priority management, the SSD can better support complex storage scenarios that require processing of a large amount of data of different priorities.

[0099] It can be understood that, in the case of abnormal power failure, flushing the data being transmitted between the solid state disk and the host to the master device interface or the slave device interface in the order of the priority of the data from high to low can avoid data loss or data congestion on the path, thereby improving the reliability of the system.

[0100] In the scheme of the embodiment, the small capacitor can provide temporary power supply in the case of power anomaly, thereby saving the cost and volume of the solid state disk. In the case of abnormal power failure, the temporary power supply provided by the small capacitor can flush the data being transmitted between the solid state disk and the host to the master device interface or the slave device interface, thereby avoiding data loss or data congestion on the path and improving the reliability of the system.

[0101] In addition, in a possible implementation, the solid state disk abnormal power failure processing apparatus further includes a hibernation control module.

[0102] The hibernation control module is configured to perform hibernation processing on the physical layer of the peripheral component interconnect interface after the power supply control module detects the abnormal power failure of the solid state disk.

[0103] The peripheral component interconnect express (PCIE) is a high-speed serial computer expansion bus standard used to connect various peripherals and expansion cards within a computer. It supports point-to-point connections, with each device having a dedicated connection to the processor. This topology makes communication between devices more efficient, as it eliminates the need for devices to wait for access to the bus. The PCIE operates on three levels: the physical layer, the data link layer, and the transport layer. The physical layer is responsible for transmitting physical signals and electrical characteristics of data, the data link layer handles flow control and error detection for data transmission, and the transport layer manages the distribution and routing of data packets. PCIE devices need to be initialized and configured when connected to the host, so that the system can recognize and configure the device.

[0104] The physical layer (PHY) refers to the lowest layer of protocol in data communication, used for signal transmission and reception between physical media. In this invention, the PCIE PHY refers to the physical layer of the PCIE interface, responsible for the physical transmission of PCIE signals.

[0105] In practical applications, the PCIE PHY is usually the most power-consuming part of the system. It can be understood that after the power control module detects the abnormal power-off of the solid state disk, the PCIE PHY can be put to sleep to significantly reduce the power consumption of the system, so that the remaining power can be used for data flush operation, avoiding data loss due to insufficient power, and improving the overall reliability and data protection capability of the system.

[0106] In addition, in one possible implementation, the flush module 33 is also used to return new data between the solid state disk and the host to the slave device interface during the data flush operation.

[0107] The new data usually refers to the data received during the data flush operation. For example, the new data may be new input data that the system tries to receive during the flush operation. For another example, there may be an instruction queue in the system, and new write instructions are still being added to the queue even if the flush operation is in progress. For another example, in asynchronous transfer mode, data transmission and reception are independent, so new data may still arrive during the flush operation.

[0108] In the embodiment, during the data flush operation, the flush module 33 returns the new data on the path between the solid state disk and the host to the slave interface, ensures the integrity and consistency of the data, ensures the smooth operation of the entire path, avoids data congestion, and improves the reliability of the system.

[0109] In addition, in order to further improve the reliability of the system and the integrity and consistency of the data, in a possible implementation, the solid state disk abnormal power-off processing apparatus further comprises a data verification module.

[0110] The data verification module is configured to verify the integrity and consistency of the data flushed to the master interface or the slave interface.

[0111] Specifically, the integrity and consistency of the data are not specifically limited. For example, the integrity verification can be implemented by a hash function (such as SHA-256), a checksum (CRC32), a digital signature, a redundancy code, etc. For example, the consistency verification can be implemented by data backup verification, data comparison, etc.

[0112] In actual application, if the data integrity and consistency verification fails, the data can be repaired to ensure the integrity and consistency of the data.

[0113] In the embodiment, after the data flush operation is performed, the data verification module verifies the integrity and consistency of the data flushed to the master interface or the slave interface, which can ensure the integrity and consistency of the data and improve the reliability of the system.

[0114] In addition, in a possible implementation, the solid state disk abnormal power-off processing apparatus further comprises a system recovery module.

[0115] The system recovery module is configured to perform data integrity verification and system recovery after the power control module detects that the power of the solid state disk is restored.

[0116] For example, the process of data integrity verification is as follows: after the power control module detects that the power of the solid state disk is restored, a built-in self-checking program is run to check the hardware state and system logs. It is verified whether the data on the storage medium is complete, and whether there is a data block that is not completely written due to power failure. Consistency check is performed on the data on the storage medium, such as comparing the checksum or hash value of the data. If data errors or inconsistencies are found, error correction code (ECC) or other mechanisms are used for repair. Analyze the system logs to determine the operation state before power failure and the data that needs to be recovered.

[0117] For the process of system recovery, the data in the pre-power-off cache is recovered into the system after the power control module detects the power recovery of the solid state disk, ensuring the continuity of the data. The data transmission on the path between the solid state disk and the host is recovered, and the solid state disk is controlled to start the read-write operation. The process and result of system recovery are recorded for future reference. The functions of the system are tested to ensure that all services work as expected.

[0118] In this embodiment, after the power control module detects the power recovery of the solid state disk, data integrity verification and system recovery are performed, and the system can quickly recover to a normal working state after power recovery, reducing the risk of service interruption and data loss caused by power failure events and improving the reliability of the system.

[0119] The solid state disk abnormal power failure processing device provided by the application includes an acquisition module, a control module and a flush module. The acquisition module acquires the power state of the solid state disk detected by the power control module. The control module provides temporary power supply through a small capacitor and controls the solid state disk to stop read-write operation after the power control module detects abnormal power failure of the solid state disk. The flush module performs data flush operation to flush the data being transmitted on the path between the solid state disk and the host to the master device interface or the slave device interface. The scheme of the embodiment can provide temporary power supply through a small capacitor in the event of power failure, saving the cost and volume of the solid state disk. In the event of abnormal power failure, temporary power supply provided by the small capacitor can flush the data being transmitted on the path between the solid state disk and the host to the master device interface or the slave device interface, avoiding data loss or data blocking the path and improving the reliability of the system.

[0120] Figure 4 is a structural schematic diagram of an electronic device provided by the application, as Figure 4 shown, the electronic device can include a processor 410, a communications interface 420, a memory 430 and a communications bus 440, wherein the processor 410, the communications interface 420 and the memory 430 complete mutual communication through the communications bus 440. The processor 410 can call the logic instructions in the memory 430 to execute the solid state disk abnormal power failure processing method, which includes: acquiring the power state of the solid state disk detected by the power control module; providing temporary power supply through a small capacitor and controlling the solid state disk to stop read-write operation after the power control module detects abnormal power failure of the solid state disk; performing data flush operation to flush the data being transmitted on the path between the solid state disk and the host to the master device interface or the slave device interface.

[0121] In addition, the logic instructions in the memory 430 described above can be realized in the form of a software function unit and sold or used as an independent product, and can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application essentially or the parts that contribute to the prior art or parts of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0122] In another aspect, the present application also provides a computer program product, which comprises a computer program, the computer program can be stored on a non-transitory computer readable storage medium, and the computer program can be executed by a processor to enable a computer to execute the solid state disk abnormal power-off processing method provided by the above-mentioned methods. The method comprises: obtaining the power state of the solid state disk detected by the power control module; after the power control module detects that the solid state disk abnormally powers off, providing temporary power supply through a small capacitor and controlling the solid state disk to stop read-write operation; and performing data flush operation to flush the data being transmitted on the path between the solid state disk and the host to the master device interface or the slave device interface.

[0123] In another aspect, the present application also provides a non-transitory computer readable storage medium, which stores a computer program. The computer program is executed by a processor to implement the solid state disk abnormal power-off processing method provided by the above-mentioned methods. The method comprises: obtaining the power state of the solid state disk detected by the power control module; after the power control module detects that the solid state disk abnormally powers off, providing temporary power supply through a small capacitor and controlling the solid state disk to stop read-write operation; and performing data flush operation to flush the data being transmitted on the path between the solid state disk and the host to the master device interface or the slave device interface.

[0124] The device embodiments described above are only schematic, wherein the units described as separate components can or can not be physically separate, and the components displayed as units can or can not be physical units, i.e., they can be located in one place, or can be distributed on a plurality of network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the present embodiment. Those skilled in the art can understand and implement it without creative labor.

[0125] Those skilled in the art can clearly understand the implementation of the various embodiments by means of software and necessary general hardware platforms through the above description of the embodiments, and of course, the embodiments can also be implemented by hardware. Based on such understanding, the above technical solutions, essentially or in other words, the part of the prior art that makes a contribution, can be embodied in the form of a software product, which can be stored in a computer readable storage medium, such as a ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute the methods described in the various embodiments or some parts of the embodiments.

[0126] Finally, it should be noted that: the above examples are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the various embodiments of the present application.

Claims

1. A method for handling abnormal power loss of a solid-state drive, characterized in that, The solid state disk comprises a power control module and a small capacitor, and the small capacitor is arranged near the power control module; the method comprises: obtaining the power state of the solid state disk detected by the power control module; after the power control module detects that the solid state disk is abnormally powered off, providing temporary power supply through the small capacitor and controlling the solid state disk to stop read-write operation; performing data flush operation to flush the data being transmitted on the channel between the solid state disk and the host to the master device interface or the slave device interface; the data flush operation comprises: flushing the data being transmitted on the channel between the solid state disk and the host to the master device interface or the slave device interface in the order from high to low according to the priority of the data; during the data flush operation, returning the new data on the channel between the solid state disk and the host to the slave device interface.

2. The solid state drive abnormal power down handling method of claim 1, wherein, The method further comprises: after the power control module detects that the solid state disk is abnormally powered off, performing hibernation processing on the physical layer of the peripheral component interconnect interface.

3. The method of claim 1-2, wherein, The method further comprises: after the power control module detects that the power of the solid state disk is restored, performing data integrity check and system recovery.

4. The method of claim 1-2, wherein, after the data flush operation, the method further comprises: performing integrity and consistency check on the data flushed to the master device interface or the slave device interface.

5. A solid state drive abnormal power down processing apparatus, characterized by, The solid state disk comprises a power control module and a small capacitor, and the small capacitor is arranged near the power control module; the device comprises: an obtaining module, configured to obtain the power state of the solid state disk detected by the power control module; a control module, configured to, after the power control module detects that the solid state disk is abnormally powered off, provide temporary power supply through the small capacitor and control the solid state disk to stop read-write operation; a flush module, configured to perform data flush operation to flush the data being transmitted on the channel between the solid state disk and the host to the master device interface or the slave device interface; the flush module is specifically configured to: flush the data being transmitted on the channel between the solid state disk and the host to the master device interface or the slave device interface in the order from high to low according to the priority of the data; the flush module is further configured to: during the data flush operation, return the new data on the channel between the solid state disk and the host to the slave device interface.

6. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor executes the computer program to implement the solid state disk abnormal power-off processing method in any one of claims 1 to 4.

7. A non-transitory computer-readable storage medium having stored thereon a computer program, characterized in that, The computer program is executed by the processor to implement the solid state disk abnormal power-off processing method in any one of claims 1 to 4.

8. A computer program product comprising a computer program, characterized in that, The computer program is executed by the processor to implement the solid state disk abnormal power-off processing method in any one of claims 1 to 4.

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