Construction Method and Device for Reliability Prediction Model of Bipolar Operational Amplifier

Abstract

The present application relates to a method, device, computer equipment, computer-readable storage medium and computer program product for constructing a reliability prediction model of a bipolar operational amplifier. The method includes: conducting a constant stress accelerated life test on a transistor to obtain data on the variation relationship of the normalized β value with time duration, performing parameter fitting on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient and undetermined coefficient of the transistor, and establishing a degradation trajectory model of the transistor; establishing a circuit simulation model of a differential input structure, and obtaining, through orthogonal experiments, data on the influence of the normalized β value on the input offset voltage of the bipolar operational amplifier; establishing a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier according to the influence data; and establishing a reliability prediction model of the bipolar operational amplifier by using the degradation trajectory model and the mapping relationship. The use of this method can improve the accuracy and efficiency of the reliability prediction of the bipolar operational amplifier.

Description

Technical Field

[0001] The present application relates to the technical field of bipolar operational amplifiers, and particularly to a method, device, computer device, computer-readable storage medium, and computer program product for constructing a reliability prediction model of a bipolar operational amplifier. Background Art

[0002] With the development of electronic technology, as a core component in analog circuit design, the reliability of bipolar operational amplifiers has attracted increasing attention. The reliability of bipolar operational amplifiers directly affects the stability and lifespan of the entire electronic system. The input offset voltage of a bipolar operational amplifier is one of its key performance parameters, which is mainly determined by the input offset voltage of the first stage. Usually, the input stage consists of 2 - 3 pairs of transistors. This stage also provides level shifting and differential - single - ended output conversion. Therefore, any mismatch in a differential pair or mismatch of resistors will cause deterioration of the input offset voltage. During the design and manufacturing process of integrated circuits (ICs), the degradation of structural unit transistors is one of the main reasons for the performance degradation of bipolar operational amplifiers.

[0003] Currently, the reliability prediction of bipolar operational amplifiers mainly relies on traditional reliability prediction models. These models usually make predictions based on past engineering experience, failure data, combined with the current technical level and the failure rate of components. However, these models have problems such as low accuracy, lack of support for actual operation processes, and model migration issues.

[0004] Therefore, there is an urgent need for a method, device, computer device, computer-readable storage medium, and computer program product for constructing a reliability prediction model of a bipolar operational amplifier, which can improve the accuracy and efficiency of the reliability prediction of bipolar operational amplifiers. Summary of the Invention

[0005] Based on this, in view of the above technical problems, it is necessary to provide a method, device, computer device, computer-readable storage medium, and computer program product for constructing a reliability prediction model of a bipolar operational amplifier, which can improve the accuracy and efficiency of the reliability prediction of bipolar operational amplifiers.

[0006] In a first aspect, the present application provides a method for constructing a reliability prediction model of a bipolar operational amplifier, including:

[0007] Conduct a constant stress accelerated life test on transistors to obtain data on the variation relationship of the normalized β value with time, where the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistors;

[0008] Conduct parametric fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistors;

[0009] Establish a degradation trajectory model of the transistor by using the acceleration degradation coefficient, time power coefficient and undetermined coefficient of the transistor;

[0010] Establish a circuit simulation model of a differential input structure, and conduct an orthogonal test on the transistor to obtain the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0011] According to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier, establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier;

[0012] Utilize the degradation trajectory model of the transistor and the mapping relationship to establish a reliability prediction model of the bipolar operational amplifier.

[0013] In one embodiment, the high-temperature test and over-voltage stress test are conducted on the transistor to obtain the variation relationship data of the normalized β value with time length, including:

[0014] Conduct a high-temperature test and over-voltage stress test on the transistor, and calculate the variation relationship data of the normalized β value with time length according to the variation relationship formula of the normalized β value with time length; wherein, the variation relationship formula of the normalized β value with time length is:

[0015]

[0016] wherein, A i is an undetermined coefficient, ΔH is the acceleration degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the test time length under the combined action of high temperature T and over-voltage stress V cc and n is the time power coefficient; when t = 0, β = 1.

[0017] In one embodiment, the calculation of the variation relationship data of the normalized β value with time length according to the variation relationship formula of the normalized β value with time length includes:

[0018] Obtain the number of types of transistors in the bipolar operational amplifier;

[0019] According to the variation relationship formula of the normalized β value with time length, calculate the variation relationship data of the normalized β value with time length corresponding to the number of types.

[0020] In one embodiment, the constant stress accelerated life test on the transistor includes:

[0021] Randomly select n samples from the qualified transistor component products, divide them into k groups, and conduct constant stress accelerated life tests under k stress levels. Among them, the constant stress includes high temperature stress and overvoltage stress.

[0022] In one embodiment, the method further includes:

[0023] During the orthogonal test of the transistor, design 2n control groups.

[0024] In one embodiment, the empirical formula of the mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier is:

[0025] V os (n) = a0 + a1·β0 + a2·β1 + a3·β0·β1 +... + a n-2 ·β0 (n+2) / 3 + a n-1 ·β1 (n+1) / 3 + a n ·β0 (n / 3) ·β1 (n / 3) ;

[0026] Among them, a0, a1, a2, a3, a n-2 , a n-1 and a n are all constant terms.

[0027] Second, the present application also provides a device for constructing a reliability prediction model of a bipolar operational amplifier, including:

[0028] A test module, configured to conduct a constant stress accelerated life test on the transistor to obtain the variation relationship data of the normalized β value with time, where the normalized β value is used to characterize the performance parameter degradation trajectory of the transistor;

[0029] An analysis module, configured to perform parameter fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0030] A model construction module, configured to use the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor to establish a degradation trajectory model of the transistor;

[0031] A data acquisition module, configured to establish a circuit simulation model with a differential input structure and conduct an orthogonal test on the transistor to obtain the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0032] A mapping module, configured to establish a mapping relationship between a normalized β value and an input offset voltage of a bipolar operational amplifier according to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0033] A model construction module, further configured to establish a reliability prediction model of the bipolar operational amplifier by using the degradation trajectory model of the transistor and the mapping relationship.

[0034] In a third aspect, the present application further provides a computer device, including a memory and a processor, where the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0035] Perform a constant stress accelerated life test on the transistor to obtain the variation relationship data of the normalized β value with time, where the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor;

[0036] Perform parameter fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0037] Establish a degradation trajectory model of the transistor by using the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0038] Establish a circuit simulation model with a differential input structure, and perform an orthogonal test on the transistor to obtain the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0039] Establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier according to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0040] Establish a reliability prediction model of the bipolar operational amplifier by using the degradation trajectory model of the transistor and the mapping relationship.

[0041] In a fourth aspect, the present application further provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the following steps are implemented:

[0042] Perform a constant stress accelerated life test on the transistor to obtain the variation relationship data of the normalized β value with time, where the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor;

[0043] Perform parameter fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0044] Establish a degradation trajectory model of the transistor by using the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0045] Establish a circuit simulation model of the differential input structure, and conduct orthogonal experiments on the transistors to obtain the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0046] According to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier, establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier;

[0047] Utilize the degradation trajectory model of the transistors and the mapping relationship to establish a reliability prediction model of the bipolar operational amplifier.

[0048] In a fifth aspect, the present application also provides a computer program product, including a computer program, which when executed by a processor implements the following steps:

[0049] Conduct a constant stress accelerated life test on the transistors to obtain the variation relationship data of the normalized β value with time, where the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistors;

[0050] Conduct parameter fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistors;

[0051] Utilize the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistors to establish a degradation trajectory model of the transistors;

[0052] Establish a circuit simulation model of the differential input structure, and conduct orthogonal experiments on the transistors to obtain the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0053] According to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier, establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier;

[0054] Utilize the degradation trajectory model of the transistors and the mapping relationship to establish a reliability prediction model of the bipolar operational amplifier.

[0055] The method, device, computer equipment, computer-readable storage medium, and computer program product for constructing a reliability prediction model of the bipolar operational amplifier can obtain more accurate degradation trajectory data of transistor performance parameters through the constant stress accelerated life test of transistors. These data reflect the degradation behavior of transistors under actual working conditions, making the reliability prediction model established based on these data closer to reality and improving the accuracy of prediction results. Traditional reliability prediction models may be too complex to implement and migrate for use. This technical solution simplifies the complexity of the model through parameter fitting analysis, making the model easier to implement and migrate and reducing the application threshold. By establishing a degradation trajectory model of transistors and a circuit simulation model of a differential input structure, personalized reliability prediction can be carried out for different transistors and circuit designs. This means that the prediction results are more in line with the actual needs of specific products, improving the pertinence and practicality of prediction. Through orthogonal experimental design and circuit simulation, sufficient data can be obtained with fewer test times, thus reducing the test cost and time. This is a significant advantage for products that require a large number of tests to verify reliability. By establishing a degradation trajectory model of transistors and a reliability prediction model of bipolar operational amplifiers, the reliability of the product can be predicted at the product design stage, so that measures can be taken at the design stage to improve the reliability of the product, reducing rework and costs caused by reliability problems in the later stage.

[0056] Generally speaking, it improves the accuracy of reliability prediction of bipolar operational amplifiers, simplifies the complexity of the model, reduces the test cost and time, and supports the reliability management of the entire product life cycle. BRIEF DESCRIPTION OF THE DRAWINGS

[0057] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the following will briefly introduce the drawings required for use in the description of the embodiments of the present application or related technologies. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other related drawings can also be obtained based on these drawings.

[0058] Figure 1 It is an application environment diagram of the method for constructing a reliability prediction model of a bipolar operational amplifier in an embodiment;

[0059] Figure 2 It is a schematic flowchart of the method for constructing a reliability prediction model of a bipolar operational amplifier in an embodiment;

[0060] Figure 3 It is a schematic flowchart of the method for constructing a reliability prediction model of a bipolar operational amplifier in another embodiment;

[0061] Figure 4 Schematic diagram of the circuit simulation model of the differential input structure in the most detailed embodiment;

[0062] Figure 5 Schematic diagram of the operational amplifier reliability prediction model based on the degradation of structural units in the most detailed embodiment;

[0063] Figure 6 Block diagram of the structure of the device for constructing the reliability prediction model of the bipolar operational amplifier in one embodiment;

[0064] Figure 7 Internal structure diagram of a computer device in one embodiment. Specific implementation manners

[0065] As the size of CMOS devices continues to shrink, the negative bias temperature instability (NBTI) effect becomes increasingly significant. This effect will cause the performance of the operational amplifier to degrade over time, thereby affecting its reliability. Therefore, it becomes particularly important to consider the reliability issues of integrated circuits such as operational amplifiers in the design stage. The input offset voltage of the bipolar operational amplifier is one of its key performance parameters, which is mainly determined by the input offset voltage of the first stage of the input stage. The input stage usually consists of 2-3 pairs of transistors, which are responsible for level shifting and differential-single-ended output conversion. If there are mismatches in the transistors or resistors RE1-RE2 in the differential pair, it will lead to the deterioration of the input offset voltage, thereby affecting the overall performance of the operational amplifier. To design an operational amplifier with high reliability and long life, it is crucial to establish a reliability prediction model that can predict the degradation trajectory of the operational amplifier through the degradation trajectories of key structural units, such as transistor groups.

[0066] At present, the commonly used reliability prediction method in the industry is to combine the reliability prediction model in the standard manual with the actual accelerated life test data. By classifying the feature size and process level of integrated circuits, a modified reliability prediction method is obtained. Through this method, the process correction coefficient of the integrated circuit can be calculated and applied to the reliability prediction model to correct the reliability prediction method of the integrated circuit. However, in the traditional technical solutions, there is no method to construct a reliability prediction model for operational amplifiers by starting from the key structural units that make up the operational amplifier and analyzing the influence of the degradation of the β parameter of the transistor on the key performance such as the offset voltage of the operational amplifier. The traditional reliability prediction model does not consider factors such as the circuit design and performance parameter degradation of the operational amplifier, but uses a constant failure rate as the evaluation index for reliability prediction, which has a large deviation from the actual reliability of the product. Some models do not receive support from professionals familiar with the simulation design process, resulting in the accuracy and reliability of these models being affected in practical applications. When the model is migrated from one simulation environment to another, it may need to be adjusted again, which increases the complexity of model application.

[0067] In view of the current situation that the traditional reliability prediction model is too complex, difficult to implement and migrate for use, this application proposes a reliability prediction modeling method for operational amplifiers based on the degradation of structural units. Based on the actual application conditions and reliability index requirements of operational amplifiers, a method for constructing a reliability prediction model of bipolar operational amplifiers is proposed, which can realize the reliability prediction of the degradation trajectory of operational amplifiers through the degradation trajectory of the key structural unit, the transistor group. This modeling method is simple and reliable, and can better meet the reliability prediction modeling requirements for operational amplifiers in multiple links such as product research and development, identification, and application.

[0068] In order to make the purpose, technical solution and advantages of this application clearer, the following further details this application in combination with the drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain this application and are not used to limit this application.

[0069] The method for constructing a reliability prediction model of a bipolar operational amplifier provided by the embodiment of this application can be applied to an application environment as Figure 1 shown. Among them, the terminal 102 communicates with the server 104 through the network. The data storage system can store the data that the server 104 needs to process. The data storage system can be integrated on the server 104, or placed in the cloud or other network servers.

[0070] Perform a constant stress accelerated life test on the transistor through the terminal 102 to obtain the data of the variation relationship of the normalized β value with time. Herein, the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor. The server 104 performs parameter fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor; establish a degradation trajectory model of the transistor by using the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor; establish a circuit simulation model with a differential input structure, and perform an orthogonal test on the transistor to obtain the data of the influence of the normalized β value on the input offset voltage of the bipolar operational amplifier; based on the degradation trajectory model of the transistor and the data of the influence of the normalized β value on the input offset voltage of the bipolar operational amplifier, establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier; establish a reliability prediction model of the bipolar operational amplifier by using the mapping relationship.

[0071] Among them, the terminal 102 can be but is not limited to various personal computers, laptop computers, smart phones, tablet computers, Internet of Things devices, and portable wearable devices. The Internet of Things devices can be smart speakers, smart TVs, smart air conditioners, smart in-vehicle devices, projection devices, etc. The portable wearable devices can be smart watches, smart bracelets, head-mounted devices, etc. The head-mounted device can be a virtual reality (VR) device, an augmented reality (AR) device, smart glasses, etc. The server 104 can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server providing cloud computing services.

[0072] In an exemplary embodiment, as Figure 2 shown, a method for constructing a reliability prediction model of a bipolar operational amplifier is provided. Taking the method applied to the Figure 1 server as an example for illustration, it includes the following steps S202 to step S212. Among them:

[0073] Step S202, perform a constant stress accelerated life test on the transistor to obtain the data of the variation relationship of the normalized β value with time. Herein, the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor.

[0074] Specifically, performing a constant stress accelerated life test on the transistor is to simulate the degradation process of the transistor under actual working conditions, so as to obtain the data of the variation of the transistor performance parameters with time. Herein, the "normalized β value" is a key performance parameter used to measure the amplification ability of the transistor, and its definition is the ratio of the collector current (Ic) to the base current (Ib) of the transistor, that is, β = Ic / Ib.

[0075] When conducting a constant stress accelerated life test, the transistor is placed in a stress environment (such as high temperature and / or overvoltage) higher than normal operating conditions to accelerate its degradation process. Under such accelerated conditions, changes in the transistor's performance can be observed more quickly, enabling sufficient data to be obtained in a shorter time to predict its lifespan under normal usage conditions. The use of the normalized β value is to unify the β value changes of different transistors onto a relative scale, allowing the performance degradation of different transistors to be compared and analyzed under the same standard. By normalizing the β value, it is easier to identify the trends and patterns of the transistor's performance degradation.

[0076] Step S204: Perform parametric fitting analysis on the change relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficients of the transistor.

[0077] Specifically, performing parametric fitting analysis on the data of the normalized β value of the transistor changing with time is to quantitatively describe the process of the transistor's performance degradation and extract key degradation parameters from it. These parameters are crucial for establishing an accurate reliability prediction model.

[0078] First, collect the data of the normalized β value of the transistor changing with time in a constant stress accelerated life test. These data are obtained under specific high temperature and overvoltage stress conditions. Select a suitable degradation model to describe the performance degradation of the transistor. Generally, the degradation process can be expressed by a mathematical model, such as an exponential model, a power function model, or other non-linear models. Use statistical or mathematical software to perform parametric fitting on the collected data. This usually involves the least squares method or other optimization algorithms to find the best fitting parameters.

[0079] Among them, the acceleration degradation coefficient (ΔH) represents the speed of the transistor's performance degradation under accelerated stress conditions. It is usually related to the activation energy and reflects the acceleration of the transistor's performance degradation under the given stress conditions.

[0080] The time power coefficient (n) describes the time dependence of the degradation process. It indicates how fast the degradation rate changes with time, that is, whether the degradation process is linear, sub-linear, or super-linear.

[0081] The undetermined coefficients (A i ) These coefficients are the constant terms in the model, which are determined during the fitting process to ensure that the model best fits the actual data. The undetermined coefficients may be related to the initial state of the transistor, material properties, or other factors affecting the degradation process.

[0082] Step S206: Use the acceleration degradation coefficient, time power coefficient, and undetermined coefficients of the transistor to establish a degradation trajectory model of the transistor.

[0083] Specifically, the degradation trajectory model is a mathematical model that describes the degradation process of transistor performance parameters (such as the β value) over time. This model is typically based on physical degradation mechanisms, such as hot carrier effects, electromigration, oxide layer degradation, etc., which cause the performance of the transistor to decline over time.

[0084] Substitute parameters such as the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor into the selected degradation model, such as the exponential model, power function model, or other non-linear models, to establish the degradation trajectory model of the transistor. Using this model, it is possible to predict how the performance of the transistor degrades over time under different operating conditions. This model can also help us evaluate the lifespan of the transistor, that is, the time the transistor can operate normally before its performance drops below a certain threshold. By establishing the degradation trajectory model of the transistor, we can better understand and predict the reliability of the transistor.

[0085] Step S208: Establish a circuit simulation model of the differential input structure and conduct an orthogonal experiment on the transistor to obtain data on the influence of the normalized β value on the input offset voltage of the bipolar operational amplifier.

[0086] Specifically, the differential input structure is a key part of the operational amplifier. It is responsible for receiving and comparing two input signals and generating an output signal representing the difference between the two input signals. Through circuit simulation software, a virtual differential input structure model can be established, which includes the transistors and other components that make up the input stage of the operational amplifier.

[0087] Orthogonal experimental design is a statistical method that allows researchers to systematically vary multiple factors and levels within a limited number of experiments to evaluate the influence of these factors on the results. Orthogonal experiments are used to systematically vary the normalized β value of the transistor to observe how these changes affect the input offset voltage of the operational amplifier. The normalized β value is an indicator of the transistor performance parameter, which is obtained through the accelerated degradation test of the transistor and is used to characterize the performance degradation of the transistor. In the simulation model, by changing the normalized β value of the transistor, the influence of transistor performance degradation on the input offset voltage of the operational amplifier can be simulated. By conducting orthogonal experiments in the simulation model, a series of data can be obtained, which show the changes in the input offset voltage of the operational amplifier under different normalized β value conditions.

[0088] Step S210: Based on the data on the influence of the normalized β value on the input offset voltage of the bipolar operational amplifier, establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier.

[0089] Specifically, a mapping relationship is established based on the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier to quantitatively describe the influence of transistor performance degradation on the input offset voltage of the operational amplifier.

[0090] The influence data is obtained through circuit simulation or actual testing, which shows the variation of the input offset voltage of the operational amplifier under different normalized β value conditions. The mapping relationship is a mathematical model or empirical formula that can relate the normalized β value of the transistor to its influence on the input offset voltage of the operational amplifier. This relationship can be linear or non-linear, depending on the actual data and the complexity of the transistor degradation mechanism.

[0091] Using statistical analysis methods such as regression analysis, a mathematical model that best describes the relationship between the normalized β value and the input offset voltage can be found. By fitting the experimental data, parameters that describe this relationship, such as slope, intercept, or other non-linear parameters, can be obtained. Once the mapping relationship is established, it can be used to predict how the input offset voltage of the operational amplifier will change under a specific transistor degradation state. The mapping relationship can help designers optimize the design of the operational amplifier to reduce the impact of transistor degradation on performance. In the testing and quality control process, the mapping relationship can be used to evaluate the performance of the operational amplifier under specific usage conditions and whether it meets specific reliability criteria.

[0092] Step S212: Establish a reliability prediction model for the bipolar operational amplifier using the transistor degradation trajectory model and the mapping relationship.

[0093] Specifically, by combining the transistor degradation trajectory model with the mapping relationship, the influence of transistor performance degradation on the key performance parameters of the operational amplifier can be predicted. For example, if the β value of the transistor degrades over time, then through the mapping relationship, we can predict how this degradation affects the input offset voltage of the operational amplifier. Using the above information, a reliability prediction model can be established, which can predict the performance state of the operational amplifier at different time points. This model will consider the degradation rate of the transistor, the change of performance parameters, and the impact of these changes on the overall performance of the operational amplifier. This model can be used to predict the reliability of the operational amplifier to complete the specified function under the specified conditions and within the specified time.

[0094] In summary, establishing a reliability prediction model for the bipolar operational amplifier using the transistor degradation trajectory model and the mapping relationship is to provide a tool for predicting and evaluating the long-term performance and reliability of the operational amplifier during the design phase. This method helps to improve the reliability of the product, reduce the risk of unexpected failures, and optimize the product's maintenance and replacement strategies.

[0095] In the method for constructing the reliability prediction model of the bipolar operational amplifier described above, through the constant stress accelerated life test of transistors, more accurate data on the degradation trajectory of transistor performance parameters can be obtained. These data reflect the degradation behavior of transistors under actual working conditions, thus making the reliability prediction model established based on these data closer to reality and improving the accuracy of the prediction results. Traditional reliability prediction models are too complex to be implemented and migrated for use. Through parameter fitting analysis, the complexity of the model is simplified, making the model easier to implement and migrate, and reducing the application threshold. By establishing the degradation trajectory model of transistors and the circuit simulation model of the differential input structure, personalized reliability prediction can be carried out for different transistors and circuit designs. This means that the prediction results are more in line with the actual needs of specific products, improving the pertinence and practicality of the prediction. Through orthogonal experimental design and circuit simulation, sufficient data can be obtained with fewer test times, thus reducing the test cost and time. This is a significant advantage for products that require a large number of tests to verify reliability. By establishing the degradation trajectory model of transistors and the reliability prediction model of bipolar operational amplifiers, the reliability of the product can be predicted at the product design stage, so that measures can be taken at the design stage to improve the reliability of the product, reducing rework and costs caused by reliability problems in the later stage.

[0096] In an exemplary embodiment, a high-temperature test and an overvoltage stress test are performed on the transistor to obtain data on the variation relationship of the normalized β value with time, including:

[0097] A high-temperature test and an overvoltage stress test are performed on the transistor, and according to the variation relationship formula of the normalized β value with time, data on the variation relationship of the normalized β value with time are calculated; wherein, the variation relationship formula of the normalized β value with time is:

[0098]

[0099] wherein, A i is an undetermined coefficient, ΔH is the acceleration degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the test duration under the combined action of high temperature T and overvoltage stress V cc and n is the time power coefficient; when t = 0, β = 1.

[0100] In this embodiment, the data on the variation of the normalized β value with time obtained through the high-temperature test and the overvoltage stress test, combined with a specific degradation relationship formula, can significantly improve the understanding and prediction of the reliability of transistors and electronic devices based on these transistors, thereby improving the performance and market competitiveness of the product at multiple levels.

[0101] In an exemplary embodiment, such asFigure 3 As shown, according to the relationship between the normalized β value and the time duration, the data of the relationship between the normalized β value and the time duration is calculated, including:

[0102] Step S302, obtaining the number of types of transistors in the bipolar operational amplifier;

[0103] Step S304, according to the relationship between the normalized β value and the time duration, calculating the data of the relationship between the normalized β value and the time duration corresponding to the number of types.

[0104] Specifically, in a bipolar operational amplifier, there may be multiple different types of transistors, and each type of transistor may have different characteristics and degradation paths. First, it is necessary to identify and determine all different types of transistors used in the operational amplifier and their quantities.

[0105] Exemplarily, when there are two types of transistors, two sets of change relationship data are collected.

[0106] In this embodiment, through this process, the performance degradation of different types of transistors in the bipolar operational amplifier can be systematically understood and predicted, thereby providing a scientific basis for improving the reliability and lifespan of the operational amplifier.

[0107] In an exemplary embodiment, a constant stress accelerated life test is performed on the transistors, including:

[0108] Randomly selecting n samples from the qualified transistor component products after screening, dividing them into k groups, and performing constant stress accelerated life tests under k stress levels respectively, where the constant stress includes high temperature stress and overvoltage stress.

[0109] Specifically, randomly selecting n samples from the qualified transistor component products after screening to ensure the representativeness of the samples and the statistical significance of the test results. These samples are divided into k groups, and each group will be exposed to different stress levels. The purpose of grouping is to evaluate the influence of different stress levels on the lifespan of the transistors and find the optimal operating stress conditions.

[0110] The constant stress test includes high temperature stress and overvoltage stress. The high temperature stress is carried out by placing the transistor at a temperature higher than the normal operating temperature, and the overvoltage stress is carried out by applying a voltage higher than the rated voltage of the transistor. These stress conditions can be used alone or in combination to simulate the worst-case scenarios that the transistors may encounter in actual applications.

[0111] Under each stress level, a constant stress accelerated life test is performed on the corresponding sample group. The purpose of the test is to observe and record the degradation of transistor performance parameters (such as the β value) over time. During the test, it is necessary to regularly measure and record the performance parameters of the transistors to monitor their degradation process.

[0112] Collect data on the performance degradation of transistors at different stress levels. This data will be used to analyze the degradation rate and lifespan of the transistors. By analyzing this data, the degradation model and lifespan distribution of the transistors under different stress conditions can be determined.

[0113] In this embodiment, through this test method, important information about the long-term performance of transistors can be obtained in a relatively short time, providing a scientific basis for improving the reliability and lifespan of the products.

[0114] In an exemplary embodiment, the method further includes:

[0115] During the process of conducting orthogonal tests on the transistors, 2n control groups are designed.

[0116] Specifically, designing 2n control groups means that each parameter will be tested under two different conditions. For example, n control groups are tested under normal conditions, and the other n control groups are tested under stress conditions.

[0117] These control groups can help researchers understand the changes in transistor performance under different conditions and evaluate the impact of these changes on the overall performance of the operational amplifier.

[0118] In this embodiment, by comparing the test results of different control groups, the impact of changes in different transistor parameters on performance indicators such as the input offset voltage of the operational amplifier can be evaluated. For example, it can be compared how transistors with different β values affect the input offset voltage of the operational amplifier under high-temperature and overvoltage stress conditions. By designing 2n control groups in the orthogonal test, the impact of different transistor parameters on the performance of the operational amplifier can be effectively evaluated, providing important data and insights for improving the reliability and performance of the operational amplifier.

[0119] In an exemplary embodiment, the empirical formula for the mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier is:

[0120] V os (n)=a0 + a1·β0 + a2·β1 + a3·β0·β1 +... + a n-2 ·β0 (n+2) / 3 +a n-1 ·β1 (n+1) / 3 +a n ·β0 (n / 3) ·β1 (n / 3) ;

[0121] where a0, a1, a2, a3, a n-2 , a n-1 and a n are all constant terms.

[0122] One of the most detailed embodiments of this application is as follows:

[0123] For the operational amplifier, transistors are selected as the structural units of the amplifier. Specifically, n samples can be randomly selected from a batch of qualified transistor component products and divided into k groups, and constant stress (high temperature and overvoltage stress) accelerated life tests are carried out at k stress levels respectively. The number of groups needs to balance the requirements of test indexes and test costs. Theoretically, the larger the value of k, that is, the more the number of groups, the more accurate the estimation of the acceleration coefficient in the obtained acceleration equation.

[0124] In this scheme, the number of test groups is planned to be 1 group, with 5 - 6 samples in each group; the test stresses are high temperature T and overvoltage stress V cc (V cc0 is the rated voltage); the normalized β value of the transistor is used to characterize the degradation trajectory of the device performance parameters.

[0125] Through normalization, it is considered that β = 1 at t = 0s for the transistor.

[0126] Under the action of high temperature T and overvoltage stress V cc (V cc > V cc0 ), the relationship between the normalized β value of the i-th sample and time is as follows:

[0127]

[0128] where A i is the undetermined coefficient, ΔH is the acceleration degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the test duration under the combined action of high temperature T and overvoltage stress V cc , and n is the time power coefficient; at t = 0, β = 1.

[0129] By obtaining the degradation trajectories of 5 - 6 samples in the same group, the values of A i , ΔH and n can be obtained through parameter fitting (least squares method).

[0130] If there are 2 different types of key transistor structure components in the operational amplifier, the degradation trajectories of the 2 different types of key transistor structure components will be obtained respectively, which can be denoted as β0 and β1.

[0131] Through circuit simulation, a circuit simulation model of the differential input structure as shown in Figure 4 is established to obtain the influence of the normalized β values of the 2 key transistor structure components on the offset voltage Vos.

[0132] In general, when the normalized β value of a transistor is less than 0.75, it can be considered that the transistor has reached the failure threshold. Therefore, only the case of 0.75<β<1 needs to be considered.

[0133] Assuming that the orthogonal experiment consists of 2N control groups (N≈10), then 2 arrays can be obtained.

[0134] The array for β0 (ie beta0) is:

[0135]

[0136] The array for β1 (ie beta1) is:

[0137]

[0138] The 2N groups of experiments shown in Table 1 can be obtained.

[0139] Table 1. Orthogonal test design for operational amplifier transistor degradation

[0140] Serial number beta0 beta1 1 beta0(1) beta1(1) 2 beta0(2) beta1(2) 3 beta0(3) beta1(3) …… …… …… 2N beta0(2N) beta1(2N)

[0141] exist Figure 4 In the circuit simulation model of the differential input structure shown in Table 1, V os (j), j=1, 2, 3,...2N.

[0142] Through β0(j), β1(j), V os (j), j = 1, 2, 3, ... 2N, substitute into the following empirical formula:

[0143] V os (n)=a0+a1·β0+a2·β1+a3·β0·β1+...+a n-2 β0 (n+2) / 3 +a n-1 β1 (n+1) / 3 +a n β0 (n / 3) β1 (n / 3) ;

[0144] Among them, a0, a1, a2, a3, a n-2 、a n-1 and a n All are constant terms.

[0145] Get V os And the mapping relationship between β0 and β1.

[0146] The mapping relationship between the two is:

[0147]

[0148] a reliability prediction model of the operational amplifier based on the degradation of structural units can be established (as Figure 5 shown), so as to calculate the predicted value of V at any time t. os

[0149] It should be understood that although each step in the flowcharts involved in the above-described embodiments is sequentially shown according to the indication of the arrows, these steps are not necessarily executed sequentially in the order indicated by the arrows. Unless there is a clear description in this article, the execution of these steps has no strict order limit, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-described embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be executed alternately or alternately with at least a part of other steps or steps or stages in other steps.

[0150] Based on the same inventive concept, an embodiment of the present application further provides a device for constructing a reliability prediction model of a bipolar operational amplifier for implementing the method for constructing a reliability prediction model of a bipolar operational amplifier involved above. The solution provided by this device for solving problems is similar to the solution described in the above method. Therefore, the specific limitations in one or more embodiments of the device for constructing a reliability prediction model of a bipolar operational amplifier provided below can refer to the limitations on the method for constructing a reliability prediction model of a bipolar operational amplifier in the above text, and will not be repeated here.

[0151] In an exemplary embodiment, as Figure 6 shown, a device for constructing a reliability prediction model of a bipolar operational amplifier is provided, including:

[0152] A test module 602, configured to perform a constant stress accelerated life test on a transistor to obtain data on the variation relationship of the normalized β value with time length, where the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor;

[0153] An analysis module 604, configured to perform parameter fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0154] A model construction module 606, configured to establish a degradation trajectory model of the transistor by using the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0155] ​The data acquisition module 608 is configured to establish a circuit simulation model of a differential input structure, perform an orthogonal experiment on a transistor, and obtain data on the influence of the normalized β value on the input offset voltage of a bipolar operational amplifier;

[0156] The mapping module 610 is configured to establish a mapping relationship between the normalized β value and the input offset voltage of a bipolar operational amplifier according to the data on the influence of the normalized β value on the input offset voltage of a bipolar operational amplifier;

[0157] The model construction module 606 is further configured to establish a reliability prediction model of a bipolar operational amplifier by using the degradation trajectory model of a transistor and the mapping relationship.

[0158] In an exemplary embodiment, the test module 602 is configured to:

[0159] Perform a high-temperature test and an overvoltage stress test on a transistor, and calculate and obtain data on the relationship between the normalized β value and time according to the relationship between the normalized β value and time; wherein, the relationship between the normalized β value and time is:

[0160]

[0161] wherein, A i is an undetermined coefficient, ΔH is the acceleration degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the test duration under the combined action of a high temperature T and an overvoltage stress V cc and n is the time power coefficient; when t = 0, β = 1.

[0162] In an exemplary embodiment, the test module 602 is configured to:

[0163] Obtain the number of types of transistors in a bipolar operational amplifier;

[0164] Calculate and obtain data on the relationship between the normalized β value and time corresponding to the number of types according to the relationship between the normalized β value and time.

[0165] In one of the embodiments, performing a constant stress accelerated life test on a transistor includes:

[0166] Randomly extracting n samples from the qualified transistor component products after screening, dividing them into k groups, and respectively performing constant stress accelerated life tests under k stress levels, wherein the constant stress includes high temperature stress and overvoltage stress.

[0167] In an exemplary embodiment, during the process of performing an orthogonal experiment on a transistor, 2n control groups are designed.

[0168] In an exemplary embodiment, the empirical formula for the mapping relationship between the normalized β value and the input offset voltage of a bipolar operational amplifier is as follows:

[0169] V os (n) = a0 + a1·β0 + a2·β1 + a3·β0·β1 +... + a n-2 ·β0 (n+2) / 3 + a n-1 ·β1 (n+1) / 3 + a n ·β0 (n / 3) ·β1 (n / 3) ;

[0170] Wherein, a0, a1, a2, a3, a n-2 , a n-1 and a n are all constant terms.

[0171] Each module in the above device for constructing the reliability prediction model of the bipolar operational amplifier can be implemented in whole or in part by software, hardware, and their combination. Each of the above modules can be embedded in or independent of the processor in the computer device in the form of hardware, or stored in the memory of the computer device in the form of software, so that the processor can call and execute the operations corresponding to each of the above modules.

[0172] In an exemplary embodiment, a computer device is provided. The computer device can be a server, and its internal structure diagram can be as Figure 7 shown. The computer device includes a processor, a memory, an input / output interface (Input / Output, abbreviated as I / O), and a communication interface. Among them, the processor, the memory, and the input / output interface are connected through a system bus, and the communication interface is connected to the system bus through the input / output interface. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the data of the change relationship between the normalized β value and the time duration. The input / output interface of the computer device is used to exchange information between the processor and external devices. The communication interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, it implements a method for constructing a reliability prediction model of a bipolar operational amplifier.

[0173] Those skilled in the art can understand, Figure 7The structure shown is only a block diagram of some structures related to the solution of this application, and does not constitute a limitation on the computer device to which the solution of this application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine some components, or have different component arrangements.

[0174] In an exemplary embodiment, a computer device is provided, including a memory and a processor. A computer program is stored in the memory. When the processor executes the computer program, the following steps are implemented:

[0175] Perform a constant stress accelerated life test on the transistor to obtain the variation relationship data of the normalized β value with time. Among them, the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor;

[0176] Perform parameter fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0177] Use the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor to establish a degradation trajectory model of the transistor;

[0178] Establish a circuit simulation model of a differential input structure, and perform an orthogonal test on the transistor to obtain the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0179] According to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier, establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier;

[0180] Use the degradation trajectory model of the transistor and the mapping relationship to establish a reliability prediction model of the bipolar operational amplifier.

[0181] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0182] Perform a high-temperature test and an overvoltage stress test on the transistor, and calculate the variation relationship data of the normalized β value with time according to the variation relationship formula of the normalized β value with time; among them, the variation relationship formula of the normalized β value with time is:

[0183]

[0184] Among them, A i is an undetermined coefficient, ΔH is the acceleration degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the test duration under the combined action of high temperature T and overvoltage stress V cc , n is the time power coefficient; when t = 0, β = 1.

[0185] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0186] Obtain the number of types of transistors in the bipolar operational amplifier;

[0187] According to the relationship between the normalized β value and time duration, calculate and obtain the data of the relationship between the normalized β value and time duration corresponding to the number of types.

[0188] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0189] Randomly select n samples from the qualified transistor component products, divide them into k groups, and conduct constant stress accelerated life tests under k stress levels respectively, where the constant stress includes high temperature stress and overvoltage stress.

[0190] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0191] During the process of conducting orthogonal tests on the transistors, design 2n control groups.

[0192] In one embodiment, when the processor executes the computer program, the following steps are further implemented:

[0193] V os (n)=a0 + a1·β0 + a2·β1 + a3·β0·β1 +... + a n-2 ·β0 (n+2) / 3 +a n-1 ·β1 (n+1) / 3 +a n ·β0 (n / 3) ·β1 (n / 3) ;

[0194] Wherein, a0, a1, a2, a3, a n-2 , a n-1 and a n are all constant terms.

[0195] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented:

[0196] Conduct a constant stress accelerated life test on the transistors to obtain the data of the relationship between the normalized β value and time duration, wherein the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistors;

[0197] Conduct parameter fitting analysis on the relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistors;

[0198] Establish a degradation trajectory model of the transistor by using the acceleration degradation coefficient, time power coefficient and undetermined coefficient of the transistor;

[0199] Establish a circuit simulation model of a differential input structure, and conduct an orthogonal test on the transistor to obtain the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0200] Establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier according to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0201] Establish a reliability prediction model of the bipolar operational amplifier by using the degradation trajectory model of the transistor and the mapping relationship.

[0202] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0203] Conduct a high-temperature test and an overvoltage stress test on the transistor, and calculate and obtain the change relationship data of the normalized β value with time according to the change relationship formula of the normalized β value with time; wherein, the change relationship formula of the normalized β value with time is:

[0204]

[0205] wherein, A i is an undetermined coefficient, ΔH is the acceleration degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the test duration under the combined action of high temperature T and overvoltage stress V cc , and n is the time power coefficient; when t = 0, β = 1.

[0206] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0207] Obtain the number of types of transistors in the bipolar operational amplifier;

[0208] Calculate and obtain the change relationship data of the normalized β value with time corresponding to the number of types according to the change relationship formula of the normalized β value with time.

[0209] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0210] Randomly select n samples from the qualified transistor component products, divide them into k groups, and conduct a constant stress accelerated life test under k stress levels, wherein the constant stress includes high temperature stress and overvoltage stress.

[0211] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0212] During the process of performing orthogonal experiments on the transistor, 2n control groups are designed.

[0213] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0214] V os (n)=a0 + a1·β0 + a2·β1 + a3·β0·β1 +... + a n-2 ·β0 (n+2) / 3 +a n-1 ·β1 (n+1) / 3 +a n ·β0 (n / 3) ·β1 (n / 3) ;

[0215] Wherein, a0, a1, a2, a3, a n-2 , a n-1 and a n are all constant terms.

[0216] In one embodiment, a computer program product is provided, including a computer program, which when executed by a processor, implements the following steps:

[0217] Perform a constant stress accelerated life test on the transistor to obtain data on the variation relationship of the normalized β value with time duration, wherein the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor;

[0218] Perform parametric fitting analysis on the variation relationship data to obtain the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor;

[0219] Use the acceleration degradation coefficient, time power coefficient, and undetermined coefficient of the transistor to establish a degradation trajectory model of the transistor;

[0220] Establish a circuit simulation model with a differential input structure, and perform orthogonal experiments on the transistor to obtain data on the influence of the normalized β value on the input offset voltage of the bipolar operational amplifier;

[0221] According to the data on the influence of the normalized β value on the input offset voltage of the bipolar operational amplifier, establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier;

[0222] Use the degradation trajectory model of the transistor and the mapping relationship to establish a reliability prediction model of the bipolar operational amplifier.

[0223] In one embodiment, when the computer program is executed by a processor, the following steps are further implemented:

[0224] Perform high-temperature tests and overvoltage stress tests on the transistors, and calculate the data of the variation relationship of the normalized β value with time according to the variation relationship formula of the normalized β value with time; wherein, the variation relationship formula of the normalized β value with time is:

[0225]

[0226] wherein, A i is a coefficient to be determined, ΔH is the acceleration degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the test time under the combined action of high temperature T and overvoltage stress V cc , and n is the time power coefficient; when t = 0, β = 1.

[0227] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0228] Obtain the number of types of transistors in the bipolar operational amplifier;

[0229] Calculate the data of the variation relationship of the normalized β value with time corresponding to the number of types according to the variation relationship formula of the normalized β value with time.

[0230] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0231] Randomly select n samples from the qualified transistor component products, divide them into k groups, and conduct constant stress accelerated life tests under k stress levels, wherein the constant stress includes high temperature stress and overvoltage stress.

[0232] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0233] During the orthogonal test of the transistors, design 2n control groups.

[0234] In one embodiment, when the computer program is executed by the processor, the following steps are further implemented:

[0235] V os (n)=a0 + a1·β0 + a2·β1 + a3·β0·β1 +... + a n-2 ·β0 (n+2) / 3 +a n-1 ·β1 (n+1) / 3 +a n ·β0 (n / 3) ·β1 (n / 3) ;

[0236] wherein, a0, a1, a2, a3, an-2 and a n-1 are both constant terms. n

[0237] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use, and processing of relevant data need to comply with relevant regulations.

[0238] Those of ordinary skill in the art can understand that all or part of the processes in the methods of the above embodiments can be completed by instructing relevant hardware through a computer program. The computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above methods. Among them, any reference to a memory, database, or other medium used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include Read-Only Memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, Resistive Random Access Memory (ReRAM), Magnetoresistive Random Access Memory (MRAM), Ferroelectric Random Access Memory (FRAM), Phase Change Memory (PCM), graphene memory, etc. Volatile memory can include Random Access Memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), etc. The databases involved in the embodiments provided in this application can include at least one of relational databases and non-relational databases. Non-relational databases can include distributed databases based on blockchain, etc., and are not limited thereto. The processors involved in the embodiments provided in this application can be general-purpose processors, central processors, graphics processors, digital signal processors, programmable logic devices, data processing logics based on quantum computing, Artificial Intelligence (AI) processors, etc., and are not limited thereto. ​

[0239] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope recorded in this application.

[0240] The above-described embodiments merely represent several implementation manners of this application. The description is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of this application. It should be noted that for those of ordinary skill in the art, without departing from the concept of this application, several modifications and improvements can still be made, and these all belong to the protection scope of this application. Therefore, the protection scope of this application shall be subject to the appended claims.

Claims

1. A method for constructing a reliability prediction model for a bipolar operational amplifier, characterized in that: The method comprises: Performing a constant stress accelerated life test on the transistor to obtain data on the relationship between the normalized β value and the time length, wherein the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor; Performing parameter fitting analysis on the variation relationship data to obtain an accelerated degradation coefficient, a time power coefficient and an undetermined coefficient of the transistor; Establishing a degradation trajectory model of the transistor by using the accelerated degradation coefficient, time power coefficient and undetermined coefficient of the transistor; A circuit simulation model of a differential input structure is established, and an orthogonal test is performed on transistors to obtain data on the effect of the normalized β value on the input offset voltage of a bipolar operational amplifier. According to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier, a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier is established; A reliability prediction model of a bipolar operational amplifier is established by using the degradation trajectory model of the transistor and the mapping relationship.

2. The method according to claim 1, characterized in that: The high temperature test and overvoltage stress test are performed on the transistor to obtain the relationship data of the normalized β value with time, including: The transistor is subjected to a high temperature test and an overvoltage stress test, and the normalized β value is calculated and obtained according to the relationship between the normalized β value and the time length. The relationship between the normalized β value and the time length is: Among them, A i is the unknown coefficient, ΔH is the accelerated degradation coefficient of the transistor, K B is the Boltzmann constant, V cc0 is the rated voltage, t is the high temperature T and overvoltage stress V cc The test duration under the combined effect, n is the time power coefficient; at t = 0, β = 1.

3. The method according to claim 2, characterized in that The step of calculating and obtaining the relationship data of the normalized β value changing with time length according to the relationship formula of the normalized β value changing with time length includes: Get the number of transistor types in a bipolar operational amplifier; According to the relationship between the normalized β value and the time length, the relationship data between the normalized β value and the time length of the corresponding number of species are calculated.

4. The method according to claim 1, characterized in that: The constant stress accelerated life test on the transistor comprises: N samples are randomly selected from the qualified transistor component products after screening, divided into k groups, and constant stress accelerated life tests are carried out under k stress levels respectively, wherein the constant stress includes high temperature stress and overvoltage stress.

5. The method according to claim 4, characterized in that The method further comprises: In the process of conducting orthogonal experiments on transistors, 2n control groups are designed.

6. The method according to claim 4, characterized in that The empirical formula for the mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier is: V os (n)=a0+a1·β0+a2·β1+a3·β0·β1+...+a n-2 ·β0 (n+2) / 3 +a n-1 ·b1 (n+1) / 3 +a n ·β0 (n / 3) ·b1 (n / 3) ; Among them, a0, a1, a2, a3, a n-2 、a n-1 and a n All are constant terms.

7. A device for constructing a reliability prediction model of a bipolar operational amplifier, characterized in that: The device comprises: A test module, used to perform a constant stress accelerated life test on the transistor to obtain data on the relationship between the normalized β value and the time length, wherein the normalized β value is used to characterize the degradation trajectory of the performance parameters of the transistor; An analysis module, used for performing parameter fitting analysis on the variation relationship data to obtain an accelerated degradation coefficient, a time power coefficient and an undetermined coefficient of the transistor; A model building module, used to establish a degradation trajectory model of the transistor by using the accelerated degradation coefficient, time power coefficient and undetermined coefficient of the transistor; A data acquisition module is used to establish a circuit simulation model of a differential input structure and perform an orthogonal test on transistors to obtain data on the influence of a normalized β value on an input offset voltage of a bipolar operational amplifier; A mapping module, used to establish a mapping relationship between the normalized β value and the input offset voltage of the bipolar operational amplifier according to the influence data of the normalized β value on the input offset voltage of the bipolar operational amplifier; The model building module is also used to establish a reliability prediction model of the bipolar operational amplifier by using the degradation trajectory model of the transistor and the mapping relationship.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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