Display substrate and display screen

Abstract

The embodiment of the invention provides a display substrate and a display screen, a source electrode driving chip comprises a time sequence detection module, whether the display substrate meets an abnormal power-off condition or not is judged by detecting a VCC voltage signal and an STBYB signal, if it is determined that the display substrate is powered off abnormally, the source electrode driving chip controls a clock signal to be turned on, and the display substrate is powered off abnormally. When the display substrate is powered off abnormally, the source electrode driving chip continues to write grid scanning signals into the grid lines, meanwhile, the source electrode driving chip controls the data lines and the common electrodes to be connected with low-level voltage signals, in this way, the low-level voltage signals output by the source electrode driving chip can neutralize remaining charges in the display substrate, and therefore the problem of picture abnormity caused by abnormal power-off can be solved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display substrate and a display screen. Background Art

[0002] LCD (Liquid Crystal Display) achieves its display effect by deflecting the liquid crystal through the electric field formed between the pixel electrode and the Com (common) electrode. When normally lit, each pixel unit inside the display substrate is filled with a certain amount of charge. When the external power supply device of the display substrate is suddenly disconnected (including power outages, direct unplugging, turning off the switch, etc.), the charge inside the display substrate is likely to remain, causing problems such as afterimages and screen flickering. Summary of the invention

[0003] The purpose of the embodiments of the present application is to provide a display substrate and a display screen. The specific technical solution is as follows:

[0004] In a first aspect, an embodiment of the present application provides a display substrate, the display substrate comprising gate lines, data lines, common electrodes, and a source driver chip; the source driver chip is connected to the data lines, the gate lines, and the common electrodes;

[0005] The source driver chip includes a timing detection module; the timing detection module includes a first terminal and a second terminal, the first terminal is connected to VCC, and the second terminal is connected to STBYB;

[0006] The timing detection module is used to determine whether the display substrate meets the abnormal power-off condition according to the VCC voltage signal and the STBYB signal. When the display substrate is in abnormal power-off condition, the source driver chip controls the gate line to write the gate scanning signal and controls the data line and the common electrode to access the low-level voltage signal.

[0007] In a possible implementation manner, the source driver chip is specifically used for:

[0008] When VCC and STBYB are powered off at the same time, or the power-off time of STBYB is earlier than the power-off time of VCC, and the interval between the power-off time of STBYB and the power-off time of VCC does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

[0009] In a possible implementation manner, the source driver chip further includes a first voltage stabilizing circuit module; the first voltage stabilizing circuit module includes a plurality of groups of voltage stabilizing units, and the initial voltage signal extension time corresponding to each of the voltage stabilizing units is different;

[0010] The source driver chip is also used for:

[0011] When it is determined that the display substrate is abnormally powered off, acquiring a first time, where the first time is a time that the initial voltage signal needs to be extended;

[0012] Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit;

[0013] The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

[0014] In a possible implementation manner, each of the voltage stabilizing units is connected in series with the initial voltage signal via at least one selection switch; and each of the voltage stabilizing units is connected in parallel;

[0015] The source driver chip is used to control all selection switches corresponding to the target voltage stabilizing unit to be closed and control at least one selection switch corresponding to other voltage stabilizing units to be open when it is determined that the display substrate is abnormally powered off.

[0016] In a possible implementation, the voltage stabilizing unit includes a diode and a first capacitor, and the diode and the first capacitor are connected in parallel.

[0017] In a possible implementation, the display substrate includes a voltage stabilization selection button; the voltage stabilization selection button is used to select whether to turn on the first voltage stabilization circuit module;

[0018] The source driver chip is also used for:

[0019] When it is determined that the display substrate is abnormally powered off, in response to a user's instruction to start the first voltage stabilizing circuit module, a first time is acquired, where the first time is the time that the initial voltage signal needs to be extended;

[0020] Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit;

[0021] The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

[0022] In a possible implementation, the source driver chip further includes a voltage detection module, the voltage detection module includes a third terminal, and the third terminal is connected to the VDD voltage;

[0023] The source driver chip is used for:

[0024] When the VDD voltage drops to a preset voltage threshold for a preset time, it is determined that the display substrate meets an abnormal power-off condition.

[0025] In a possible implementation, the display substrate further includes a peripheral voltage stabilization module;

[0026] The peripheral voltage stabilization module is connected to the initial voltage signal of the source driver chip.

[0027] In a possible implementation, the peripheral voltage stabilization module includes a second capacitor;

[0028] A first end of the second capacitor is connected to an initial voltage signal of the source driver chip, and a second end of the second capacitor is grounded.

[0029] In a second aspect, an embodiment of the present application provides a display screen, comprising a display substrate as described in any one of the first aspects above.

[0030] Beneficial effects of the embodiments of the present application:

[0031] A display substrate and a display screen provided by an embodiment of the present application, wherein a source driver chip includes a timing detection module that determines whether the display substrate meets abnormal power-off conditions by detecting a VCC voltage signal and a STBYB signal. If it is determined that the display substrate is abnormally powered off, the source driver chip controls the clock signal to be turned on, and the source driver chip continues to write a gate scanning signal to the gate line. At the same time, the source driver chip controls the data line and the common electrode to access a low-level voltage signal. In this way, the low-level voltage signal output by the source driver chip can neutralize the remaining charge inside the display substrate, thereby solving the problem of abnormal screen caused by abnormal power-off.

[0032] Of course, implementing any product or method of the present application does not necessarily require achieving all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application, and for ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0034] Figure 1 A first schematic diagram of a display substrate provided in an embodiment of the present application;

[0035] Figure 2 A second schematic diagram of a display substrate provided in an embodiment of the present application;

[0036] Figure 3A first schematic diagram of a first voltage stabilizing circuit module provided in an embodiment of the present application;

[0037] Figure 4 A second schematic diagram of the first voltage stabilizing circuit module provided in an embodiment of the present application;

[0038] Figure 5 A third schematic diagram of a display substrate provided in an embodiment of the present application;

[0039] Figure 6 A fourth schematic diagram of a display substrate provided in an embodiment of the present application;

[0040] Figure 7 A schematic diagram of a process of a display substrate provided in an embodiment of the present application. DETAILED DESCRIPTION

[0041] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field based on the present application belong to the scope of protection of the present application.

[0042] like Figure 1 As shown, the present application provides a display substrate, the display substrate includes a gate line 110, a data line 120, and a source driver chip 130; the source driver chip 130 is connected to the data line 120 and the gate line 110;

[0043] The source driver chip 130 includes a timing detection module 131; the timing detection module 131 includes a first terminal and a second terminal, the first terminal is connected to VCC140, and the second terminal is connected to STBYB150;

[0044] The timing detection module 131 is used to determine whether the display substrate meets the abnormal power-off condition according to the VCC140 voltage signal and the STBYB150 signal. When the display substrate is in abnormal power-off, the source driver chip 130 controls the clock signal to turn on. After the clock signal is turned on, it is used to indicate that a gate scanning signal is written to the gate line 110, and controls the data line 120 and the common electrode 160 to access a low-level voltage signal.

[0045] The display substrate of the LCD includes a plurality of gate lines 110 and a plurality of data lines 120. The gate lines 110 can be arranged along the row direction, and the data lines 120 can be arranged along the column direction. The gate lines 110 and the data lines 120 are arranged to cross each other to define a plurality of pixel areas, and each pixel area is provided with a TFT (Thin Film Transistor) and a pixel unit. The gate line 110 is connected to the gate electrode of a row of pixel TFTs, the data line 120 is connected to the source electrode of a column of pixel TFTs, the drain electrode of the pixel TFT is connected to one end of the pixel electrode of the pixel unit, and the other end of the pixel electrode of the pixel unit is connected to the common electrode.

[0046] The gate line 110 controls the on and off of the TFT, and the data line 120 controls the display voltage of the pixel unit. When driving the display substrate for display, a gate scan signal can be written to the gate line 110, and a data voltage signal can be written to each data line 120 to apply a pixel voltage to the pixel electrode of the pixel unit, so that the pixel units in the display substrate are lit up row by row.

[0047] The source driver chip 130 (Source IC) can write gate scanning signals to the gate lines 110 row by row to apply voltage to the gate to turn on the thin film transistor, and write data voltage signals to each data line 120 to apply pixel voltage to the pixel electrode of the pixel unit through the source and drain, so that the pixel units in the display panel are lit up row by row.

[0048] Source IC can generate an initial voltage signal (VGH), a clock signal, a data voltage signal and a common electrode voltage signal. The data voltage signal generated by Source IC is connected to the data line, the common electrode voltage signal generated is connected to the common electrode, and the clock signal generated can be connected to the gate line, so that the gate line writes the gate scanning signal to control the on and off of the TFT.

[0049] The VCC 140 voltage is provided to the liquid crystal display driving circuit and the source driving chip 130, and the STBYB 150 is the standby voltage of the display substrate. Through the STBYB 150, it can be known whether the display substrate is turned on or off. For example, when the display substrate is turned on, the STBYB 150 is a high level, and when it is turned off, the STBYB 150 is a low level.

[0050] The timing detection module 131 is connected to VCC140 and STBYB150, and can detect the voltage signal of VCC140 and the voltage signal of STBYB150. The timing detection module 131 determines whether the display substrate meets the abnormal power-off condition according to the voltage signal of VCC140 and the voltage signal of STBYB150.

[0051] The abnormal power-off condition can be determined based on the power-off order of the VCC140 voltage signal and the STBYB150 voltage signal. For example, when the power supply is directly cut off, that is, VCC140 and STBYB150 are powered off at the same time, it is determined that the display substrate meets the abnormal power-off condition. Or, when the display substrate is hot-plugged, that is, the power-off time of STBYB150 is earlier than the power-off time of VCC140, and the interval between the power-off time of STBYB150 and the power-off time of VCC140 does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

[0052] Exemplarily, the timing detection module 131 is connected to VCC140 and STBYB150, obtains the voltage signal of VCC140 and STBYB150, and determines whether VCC140 and STBYB150 are powered off based on the magnitude of the voltage signal. Exemplarily, when the timing detection module 131 detects that the voltage value of VCC140 and / or STBYB150 is lower than the preset voltage value, for example, the timing detection module 131 detects that the voltage value of VCC140 and / or STBYB150 is 0, it is determined that VCC140 and / or STBYB150 are powered off, and the timing detection module 131 can also record the power-off time of VCC140 and STBYB150. Based on the preset abnormal power-off condition, it is determined whether the display substrate meets the abnormal power-off condition.

[0053] At the moment of abnormal power-off, the residual charge in the display panel of the display substrate cannot be released due to long-term operation. If it is determined that the display substrate is abnormally powered off, the source driver chip 130 controls the clock signal to turn on, and the source driver chip 130 continues to write the gate scan signal to the gate line 110. At the same time, the source voltage signal and the common electrode voltage output by the source driver chip 130 are low-level voltage signals, so that the data line and the common electrode are connected to the low-level voltage signal, for example, the data line and the common electrode are controlled to be grounded. Because the source driver chip 130 controls the clock signal to turn on, the pixel TFT is turned on, so the low-level voltage signal output by the source driver chip 130 can neutralize the remaining charge in the display substrate, thereby solving the problem of abnormal picture caused by abnormal power-off.

[0054] In a possible implementation manner, the source driver chip 130 is specifically used for:

[0055] When VCC140 and STBYB150 are powered off at the same time, or the power-off time of STBYB150 is earlier than the power-off time of VCC140, and the interval between the power-off time of STBYB150 and the power-off time of VCC140 does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

[0056] When VCC140 and STBYB150 are powered off at the same time, it can indicate a direct power failure; when the power-off time of STBYB150 is earlier than the power-off time of VCC140, and the interval between the power-off time of STBYB150 and the power-off time of VCC140 does not meet the preset power-off requirement time, the display substrate is in a hot-swap board, and the preset power-off requirement time can be determined based on the actual situation and is not limited here. Based on these two situations, the abnormal power-off conditions of the display substrate are determined. In this way, even if the display substrate is hot-plugged and the power is cut off, the abnormal screen problem caused by abnormal power-off during hot plugging and direct power failure can be solved.

[0057] like Figure 2 As shown, in a possible implementation manner, the source driver chip 130 further includes a first voltage stabilizing circuit module 132; the first voltage stabilizing circuit module 132 includes a plurality of groups of voltage stabilizing units, and the initial voltage signal extension time corresponding to each of the voltage stabilizing units is different;

[0058] The source driver chip 130 is also used for:

[0059] When it is determined that the display substrate is abnormally powered off, acquiring a first time, where the first time is a time that the initial voltage signal needs to be extended;

[0060] Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit;

[0061] The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

[0062] A first voltage stabilizing circuit module 132 may be added inside the source driver chip 130. The first voltage stabilizing circuit module may be composed of multiple groups of voltage stabilizing electrical elements. Each group of voltage stabilizing electrical elements corresponds to an initial voltage signal extension time. The initial voltage signal extension time corresponding to each voltage stabilizing unit is different. Figure 3 As shown, the first voltage stabilizing circuit module may have n groups of voltage stabilizing cells (voltage stabilizing unit 1321, voltage stabilizing unit 1322, ..., voltage stabilizing unit 132n).

[0063] The first time is determined based on the performance of the display substrate. Generally speaking, the first time can be user-defined. The initial voltage signal is a VGH voltage signal, and VGH is the gate opening voltage of the TFT. Generally speaking, the first time is determined based on the overall power consumption of the display substrate. The user obtains the overall power consumption of the display substrate to determine the first time.

[0064] The initial voltage signal extension time corresponding to each group of voltage-stabilizing elements can be stored inside the source driver chip 130. For example, the initial voltage signal extension time corresponding to each group of voltage-stabilizing elements can be stored in the source driver chip 130 in the form of a table. The source driver chip 130 can select the target voltage-stabilizing unit by looking up the table.

[0065] The source driver chip 130 can obtain the first time input by the user, and then calculate the difference between the initial voltage signal extension time corresponding to each voltage stabilizing unit and the first time, and determine the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit. After the target voltage stabilizing unit is determined, the target voltage stabilizing unit is controlled to be connected to the initial voltage signal, and other voltage stabilizing units except the target voltage stabilizing unit are controlled not to be connected to the initial voltage signal, and the first voltage stabilizing circuit module is used to store more charge, thereby slowing down the power-off speed of the initial voltage signal (VGH), extending the output time of the initial voltage signal, and further extending the opening time of the TFT in the display substrate, so that the TFT is fully opened.

[0066] In a possible implementation manner, each of the voltage stabilizing units is connected in series with the initial voltage signal via at least one selection switch; and each of the voltage stabilizing units is connected in parallel;

[0067] The source driver chip 130 is used to control all selection switches corresponding to the target voltage stabilizing unit to be closed, and control at least one selection switch corresponding to other voltage stabilizing units to be open when it is determined that the display substrate is abnormally powered off.

[0068] The voltage stabilizing units are connected in parallel, and each voltage stabilizing power supply is connected in series with the initial voltage signal through at least one selection switch. If the source driver chip 130 determines that the display substrate is abnormally powered off, it controls the target voltage stabilizing unit to be connected to the initial voltage signal by controlling the selection switch corresponding to the target voltage stabilizing unit, and controls other voltage stabilizing units except the target voltage stabilizing unit to be disconnected from the initial voltage signal.

[0069] For example, Figure 4 As shown, the first voltage stabilizing circuit module 132 includes 4 voltage stabilizing units, each of which includes a diode and a first capacitor connected in parallel. For example, voltage stabilizing unit 1 includes a diode D1 and a first capacitor C1, voltage stabilizing unit 2 includes a diode D2 and a first capacitor C2, voltage stabilizing unit 3 includes a diode D3 and a first capacitor C3, and voltage stabilizing unit 4 includes a diode D4 and a first capacitor C4. If it is determined to select voltage stabilizing unit 1, S0 and S1 are controlled to be closed, S1 Bar is controlled to be disconnected, at least one of S0 Bar and S2 is controlled to be disconnected, and at least one of S0 Bar and S2 Bar is controlled to be disconnected. Which voltage stabilizing unit is connected to the initial voltage signal can be controlled by selecting the switch. GND is a ground signal.

[0070] In a possible implementation, the voltage stabilizing unit includes a diode and a first capacitor, and the diode and the first capacitor are connected in parallel.

[0071] The voltage stabilizing unit includes a voltage stabilizing diode and a voltage stabilizing capacitor. More charges are stored by the voltage stabilizing diode and the voltage stabilizing capacitor, thereby slowing down the power-off speed of the initial voltage signal (VGH), extending the output time of the initial voltage signal, and further extending the opening time of the TFT in the display substrate, so that the TFT is fully opened.

[0072] In a possible implementation, the display substrate includes a voltage stabilization selection button; the voltage stabilization selection button is used to select whether to turn on the first voltage stabilization circuit module;

[0073] The source driver chip 130 is also used for:

[0074] When it is determined that the display substrate is abnormally powered off, in response to a user's instruction to start the first voltage stabilizing circuit module, a first time is acquired, where the first time is the time that the initial voltage signal needs to be extended;

[0075] Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit;

[0076] The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

[0077] The display substrate may provide a voltage stabilization selection button, and the user may operate the voltage stabilization selection button to select whether to turn on the first voltage stabilization circuit module. For example, the user operates the voltage stabilization selection button to select to turn on the first voltage stabilization circuit module. When the source driver chip 130 determines that the display substrate is abnormally powered off, in response to the user's instruction to turn on the first voltage stabilization circuit module, the first time is obtained, the difference between the initial voltage signal extension time corresponding to each of the voltage stabilization units and the first time is calculated, and the voltage stabilization unit with the smallest difference is determined as the target voltage stabilization unit.

[0078] If the user chooses not to turn on the first voltage stabilizing circuit module, the source driver chip 130 may choose not to turn on the voltage stabilizing module corresponding to the first voltage stabilizing circuit module when determining that the display substrate is abnormally powered off, or may choose other methods to extend the output time of the initial voltage signal, or may not perform voltage stabilization.

[0079] For example, Figure 4For example, the VGH voltage regulator unit is set to 3 selection levels. The most suitable voltage regulator unit can be selected according to the overall power consumption of the display substrate. If the VGH voltage regulator function is not enabled, the DC level can select the Default value. The specific table is shown in Table 1.

[0080] Table 1

[0081] In a possible implementation, the source driver chip 130 further includes a voltage detection module, the voltage detection module includes a third terminal, and the third terminal is connected to the VDD voltage;

[0082] The source driver chip 130 is used for:

[0083] When the VDD voltage drops to a preset voltage threshold for a preset time, it is determined that the display substrate meets an abnormal power-off condition.

[0084] The VDD voltage is a positive power supply voltage provided by transistors and other devices in the GOA (Gate Driver on Array) circuit. The voltage detection module can detect the VDD voltage to determine whether the display substrate meets the abnormal power-off condition. If the VDD voltage drops to a preset voltage threshold for a preset time, for example, it is detected that the VDD voltage drops to 2.4V for a certain period of time, indicating that the display substrate meets the abnormal power-off condition. At this time, the source driver chip 130 issues an instruction to control the CLK signal to be fully turned on, and all rows in the display substrate are turned on at the same time, and then the Source voltage signal and the VCOM signal are given to the GND signal. In this way, the low-level voltage signal output by the source driver chip 130 can neutralize the remaining charge in the display substrate, thereby solving the problem of abnormal screen caused by abnormal power-off.

[0085] like Figure 5 As shown, in a possible implementation, the display substrate further includes a peripheral voltage stabilization module 170;

[0086] The peripheral voltage stabilization module 170 is connected to the initial voltage signal of the source driver chip 130 .

[0087] The peripheral voltage stabilization module is not inside the source driver chip 130. The source driver chip 130 outputs an initial voltage signal. The peripheral voltage stabilization module and the initial voltage signal output by the source driver chip 130 store more charge through the peripheral voltage stabilization module, thereby slowing down the power-off speed of the initial voltage signal (VGH), extending the output time of the initial voltage signal, and further extending the opening time of the TFT in the display substrate, so that the TFT is fully opened.

[0088] like Figure 6As shown, in a possible implementation manner, the peripheral voltage stabilization module includes a second capacitor C5;

[0089] A first end of the second capacitor is connected to an initial voltage signal of the source driver chip 130 , and a second end of the second capacitor is grounded.

[0090] The size of the second capacitor C5 can be determined based on actual conditions, for example, it can be 2.2 μF.

[0091] Based on the above embodiments, Figure 7 As shown, the present application provides a workflow diagram of a display substrate, including:

[0092] S110, source driver chip power-off timing detection;

[0093] The timing detection module 131 is used to determine whether the display substrate meets the abnormal power-off condition according to the VCC 140 voltage signal and the STBYB 150 signal.

[0094] S120, determining whether the power-off sequence is abnormal; if yes, executing step S130, if no, executing step S160.

[0095] The abnormal power-off condition can be determined based on the power-off order of the VCC140 voltage signal and the STBYB150 voltage signal. For example, when the power supply is directly cut off, that is, VCC140 and STBYB150 are powered off at the same time, it is determined that the display substrate meets the abnormal power-off condition. Or, when the display substrate is hot-plugged, that is, the power-off time of STBYB150 is earlier than the power-off time of VCC140, and the interval between the power-off time of STBYB150 and the power-off time of VCC140 does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

[0096] When VCC140 and STBYB150 are powered off at the same time, or the power-off time of STBYB150 is earlier than the power-off time of VCC140, and the interval between the power-off time of STBYB150 and the power-off time of VCC140 does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition, that is, the power-off timing is abnormal.

[0097] S130, start the abnormal power-off sequence.

[0098] The source driver chip controls the clock signal to turn on. After the clock signal is turned on, it is used to indicate that a gate scanning signal is written to the gate line, and controls the data line and the common electrode to access a low-level voltage signal.

[0099] S140, starting the internal voltage stabilization circuit of the source driver chip.

[0100] The display substrate may provide a voltage stabilization selection button, and the user may operate the voltage stabilization selection button to select whether to turn on the first voltage stabilization circuit module. For example, the user operates the voltage stabilization selection button to select to turn on the first voltage stabilization circuit module, and when the source driver chip 130 determines that the display substrate is abnormally powered off, in response to the user's instruction to turn on the first voltage stabilization circuit module, the internal voltage stabilization circuit of the source driver chip is started.

[0101] S150, selecting a target voltage stabilizing unit.

[0102] The first time is obtained, the difference between the initial voltage signal extension time corresponding to each voltage stabilizing unit and the first time is calculated, and the voltage stabilizing unit with the smallest difference is determined as the target voltage stabilizing unit.

[0103] S160, start the normal power-off sequence.

[0104] An embodiment of the present application provides a display screen, comprising any of the display substrates described above.

[0105] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0106] Each embodiment in this specification is described in a related manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referenced to each other.

[0107] The above description is only a preferred embodiment of the present application and is not intended to limit the protection scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application are included in the protection scope of the present application.

Claims

1. A display substrate, characterized in that: The display substrate comprises gate lines, data lines, common electrodes, and a source driver chip; the source driver chip is connected to the data lines, the gate lines, and the common electrodes; The source driver chip includes a timing detection module; the timing detection module includes a first terminal and a second terminal, the first terminal is connected to VCC, and the second terminal is connected to STBYB; The timing detection module is used to determine whether the display substrate meets the abnormal power-off condition according to the VCC voltage signal and the STBYB signal. When the display substrate is in abnormal power-off condition, the source driver chip controls the gate line to write the gate scanning signal and controls the data line and the common electrode to access the low-level voltage signal.

2. The display substrate according to claim 1, characterized in that: The source driver chip is specifically used for: When the VCC and the STBYB are powered off at the same time, or the power-off time of the STBYB is earlier than the power-off time of the VCC, and the interval between the power-off time of the STBYB and the power-off time of the VCC does not meet the preset power-off requirement time, it is determined that the display substrate meets the abnormal power-off condition.

3. The display substrate according to claim 1, characterized in that: The source driver chip further includes a first voltage stabilizing circuit module; the first voltage stabilizing circuit module includes a plurality of voltage stabilizing units, and the initial voltage signal extension time corresponding to each of the voltage stabilizing units is different; The source driver chip is also used for: When it is determined that the display substrate is abnormally powered off, acquiring a first time, where the first time is a time that the initial voltage signal needs to be extended; Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit; The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

4. The display substrate according to claim 3, characterized in that: Each of the voltage stabilizing units is connected in series with the initial voltage signal via at least one selection switch; each of the voltage stabilizing units is connected in parallel; The source driver chip is used to control all selection switches corresponding to the target voltage stabilizing unit to be closed and control at least one selection switch corresponding to other voltage stabilizing units to be open when it is determined that the display substrate is abnormally powered off.

5. The display substrate according to claim 3, characterized in that: The voltage stabilizing unit includes a diode and a first capacitor, and the diode and the first capacitor are connected in parallel.

6. The display substrate according to claim 3, characterized in that: The display substrate includes a voltage stabilization selection button; the voltage stabilization selection button is used to select whether to turn on the first voltage stabilization circuit module; The source driver chip is also used for: When it is determined that the display substrate is abnormally powered off, in response to a user's instruction to start the first voltage stabilizing circuit module, a first time is acquired, where the first time is the time that the initial voltage signal needs to be extended; Calculating the difference between the initial voltage signal extension time corresponding to each of the voltage stabilizing units and the first time, and determining the voltage stabilizing unit with the smallest difference as the target voltage stabilizing unit; The target voltage stabilization unit is controlled to be connected to the initial voltage signal, and other voltage stabilization units except the target voltage stabilization unit are controlled to be disconnected from the initial voltage signal.

7. The display substrate according to claim 1, characterized in that: The source driver chip further includes a voltage detection module, the voltage detection module includes a third terminal, and the third terminal is connected to the VDD voltage; The source driver chip is used for: When the VDD voltage drops to a preset voltage threshold for a preset time, it is determined that the display substrate meets an abnormal power-off condition.

8. The display substrate according to claim 7, characterized in that: The display substrate also includes a peripheral voltage stabilization module; The peripheral voltage stabilization module is connected to the initial voltage signal of the source driver chip.

9. The display substrate according to claim 8, characterized in that: The peripheral voltage stabilization module includes a second capacitor; A first end of the second capacitor is connected to an initial voltage signal of the source driver chip, and a second end of the second capacitor is grounded.

10. A display screen, characterized in that: A display substrate comprising any one of claims 1 to 9.

Images