Wafer fabrication methods and wafers

Abstract

This application proposes a wafer fabrication method and a wafer. The wafer fabrication method includes the following steps: the back side of the wafer to be processed is thinned by grinding in multiple steps. Each grinding step only grinds the middle part of the wafer and does not grind the edge part of the wafer. The radial dimension of the part removed by the grinding process in the later step is smaller than the radial dimension of the part removed by the grinding process in the previous step, and the edge size left in the later step is larger than the edge size left in the previous step, thereby forming a multi-level step at the edge of the wafer.

Description

Technical Field

[0001] This application belongs to the field of semiconductor processing technology, and specifically relates to a wafer fabrication method and a wafer. Background Technology

[0002] Integrated circuit chips are constantly evolving towards higher density, higher performance, and thinner, smaller designs. To meet the high requirements of integrated circuit packaging (IC packaging), back-side thinning of wafers has become a crucial process in the back-end of semiconductor manufacturing. With the application of large-diameter silicon wafers, the thickness of silicon wafers has also increased accordingly. Advanced packaging technologies, on the other hand, require even thinner silicon wafers. Ultra-precision grinding, as an important method for back-side thinning of silicon wafers, has been widely adopted.

[0003] Taiko thinning process is a commonly used ultra-thin wafer thinning process. It grinds only the center of the wafer, leaving the edge portion to form a ring. This ring supports the thinned portion of the wafer, thereby improving the overall rigidity of the wafer, reducing warpage, and lowering the risk of wafer breakage.

[0004] However, Taiko's thinning process requires multiple steps. (See reference...) Figure 1 The lower end face of the grinding wheel feeds the wafer from the starting point 11 of the first step to the end point 12 of the first step. In the second step, the lower end face of the grinding wheel feeds the wafer from the end point of the first step (i.e. the starting point of the second step) 12 to the end point 13 of the second step. Figure 1 The dashed lines in the diagram represent grinding wheels with insufficient centering accuracy. When the centering accuracy of the grinding wheel is insufficient, the edge left in the previous thinning process will interfere with the subsequent thinning process. A represents the interference position, leading to processing failure. Furthermore, the step positions of the edge left between different processes can easily cause stress concentration, making the thinned wafer prone to breakage. Summary of the Invention

[0005] This application aims to provide a wafer fabrication method to solve the interference problem between multiple processes in wafer fabrication.

[0006] This application proposes a wafer fabrication method, including the following steps:

[0007] The back side of the wafer to be processed is thinned by grinding in multiple steps. Each grinding step only grinds the middle part of the wafer, omitting the edges.

[0008] The radial dimension of the portion removed in the subsequent grinding process is smaller than that of the portion removed in the previous grinding process, and the edge size left in the subsequent process is larger than that left in the previous process, thus forming a multi-level step at the edge of the wafer.

[0009] In at least one possible implementation, in the multi-step grinding process, the final step reduces the thickness y. n Less than or equal to 1 times the final wafer thickness h, and greater than or equal to 0.02 times the final wafer thickness h, i.e., 0.02 ≤ y n / h≤1.

[0010] In at least one possible implementation, in the multi-step grinding process, the final step reduces the thickness y. n Less than or equal to 0.2 times the final wafer thickness h, and greater than or equal to 0.02 times the final wafer thickness h, i.e., 0.02 ≤ y n / h≤0.2.

[0011] In at least one possible implementation, in the multi-step grinding process, the final step reduces the thickness y. n It is equal to 0.05 times the final thickness h of the wafer.

[0012] In at least one possible implementation, in the multi-step grinding process, the final step reduces the thickness y. n Greater than or equal to 1 micrometer.

[0013] In at least one possible implementation, in the multi-step grinding process, the thickness reduction y1 to y2 in each step is... n Same or different.

[0014] In at least one possible implementation, in each step of the grinding process, the margin dimension is greater than the centering accuracy of the equipment.

[0015] In at least one possible implementation, in the multi-step grinding process, the machining process parameters are adjusted before each grinding step.

[0016] The processing parameters include grinding wheel mesh size, grinding wheel speed, wafer speed, grinding wheel feed rate, and margin size.

[0017] In at least one possible implementation, after each grinding step, the transition portion between the step and the wafer is chamfered before proceeding to the next grinding step.

[0018] This application also proposes a wafer including a first surface and a second surface, the first surface being used to form a chip pattern, the second surface being opposite to the first surface, the second surface being thinned to form a recess in a central region, and an edge being formed at the edge of the wafer that protrudes relative to the recess, the edge surrounding the recess, the edge being formed as a step shape that gradually thickens from the central region outward, the edge having at least two steps.

[0019] In at least one possible implementation, the wafer has a final wafer thickness h in the central region, and the thickness y of the step adjacent to the central region of the reserved edge. n Less than or equal to 1 times the final thickness h of the wafer, and greater than or equal to 0.02 times the final thickness h of the wafer, i.e., 0.02 ≤ y n / h≤1, preferably 0.02≤y n / h≤0.2, more preferably y n / h = 0.05.

[0020] By adopting the above technical solution, the radial dimension of the part removed by the subsequent grinding process is smaller than the radial dimension of the part removed by the previous grinding process, thereby forming a multi-level step at the edge of the wafer and avoiding interference problems that may occur during grinding and thinning. Attached Figure Description

[0021] Figure 1 A schematic diagram of wafer fabrication using one possible thinning process is shown.

[0022] Figure 2 A schematic diagram of the structure of an intermediate product of a wafer fabrication method according to an embodiment of this application is shown.

[0023] Figure 3 A schematic diagram showing the relationship between step thickness and maximum stress of an intermediate product of a wafer fabricated by a wafer fabrication method according to an embodiment of this application is shown.

[0024] Figure 4 A schematic diagram showing the step thickness and stress concentration location of an intermediate product of a wafer fabricated by a wafer fabrication method according to an embodiment of this application is shown.

[0025] Figure 5 A flowchart of a wafer fabrication method according to an embodiment of this application is shown.

[0026] Explanation of reference numerals in the attached figures

[0027] 1 Wafer to be processed

[0028] 11. First step starting point 12. First step ending point 13. Second step ending point Detailed Implementation

[0029] To more clearly illustrate the above-mentioned objectives, features, and advantages of this application, specific embodiments of this application are described in detail in conjunction with the accompanying drawings in this section. Besides the embodiments described in this section, this application can also be implemented in other different ways. Those skilled in the art can make corresponding improvements, modifications, and substitutions without departing from the spirit of this application; therefore, this application is not limited to the specific embodiments disclosed in this section. The scope of protection of this application should be determined by the claims.

[0030] like Figures 2 to 5 As shown, the embodiments of this application propose a wafer fabrication method, which includes the following steps.

[0031] S1. A film is applied to the front side (first surface) of the wafer 1 to be processed and mounted and fixed to the processing position of the thinning equipment, in preparation for thinning the back side of the wafer 1. The front side (first surface) of the wafer 1 is used to form chip patterns.

[0032] S2. Perform a thinning operation on the entire back side (second surface) of the wafer to be processed 1, reducing the overall thickness of the wafer to a predetermined initial thickness H, where H can be 500 to 750 micrometers, and the wafer to be processed is formed into a sheet with a thickness of H. Existing conventional thinning methods can be used to thin the wafer to be processed.

[0033] S3. Based on the actual processing conditions such as the material of the grinding wheel and the thinning equipment, select appropriate processing parameters, including grinding wheel mesh size, grinding wheel speed, wafer speed, feed rate, and margin size.

[0034] S4. The thinning equipment moves the grinding wheel downwards at a predetermined feed speed to contact the center area of ​​the back side of the wafer to be processed, causing the grinding wheel to grind the center area of ​​the back side of the wafer. The grinding wheel does not grind the edge of the wafer, thereby forming a raised step (edge ​​retention) at the edge of the wafer. The central part of the back side of the wafer removed by grinding can be circular. Of course, this application does not limit the shape of the part removed by grinding, and the part removed by grinding can also be other shapes. Material of the edge part of the back side of the wafer is retained according to the predetermined edge retention size. The edge retention size x1 can be controlled by controlling the axis position of the grinding wheel. The edge retention size represents the size of the edge in the radial direction of the wafer. The feed amount of the grinding wheel is y1, which represents the thickness of the edge (i.e., the depth of the recess formed by the grinding wheel on the wafer).

[0035] S5. Based on the actual processing conditions such as the material of the grinding wheel and the thinning equipment, change the processing parameters, including the grinding wheel mesh size, grinding wheel speed, wafer speed, grinding wheel feed speed, and margin size.

[0036] The thinning equipment moves the grinding wheel downwards at a predetermined feed rate to contact the center area of ​​the back side of the wafer to be processed, grinding the center area of ​​the wafer's back side while omitting the edges. The feed amount of the grinding wheel is y2, which is the height (thickness) of the second step. The margin dimension x2 is controlled by adjusting the axis position of the grinding wheel; the margin dimension of each subsequent step is larger than that of the previous step, i.e., margin dimension x2 is greater than margin dimension x1. The difference between two adjacent margin dimensions is greater than the centering accuracy of the thinning equipment, i.e., x2 - x1 is greater than the centering accuracy of the thinning equipment. The margin dimension at each step is greater than the centering accuracy of the thinning equipment. Here, centering accuracy refers to the deviation between the grinding wheel axis and the wafer axis, which is an error within the allowable range of the equipment.

[0037] S6. Repeat S5. A total of n thinning processes are required; optionally, n can be 2 to 6 times. Figure 2 In the structural diagram shown, n is 5. S5 is executed n-1 times. In S5 and S6, the feed amounts for each iteration are y2...y... n-1 The margin dimensions are x2...x n-1 It is understandable that the subscripts of the feed rate x and the margin dimension y indicate the number of thinning operations.

[0038] S7. Based on the actual processing conditions such as the material of the grinding wheel and the thinning equipment, change the processing parameters, including the grinding wheel mesh size, grinding wheel speed, wafer speed, grinding wheel feed speed, and margin size.

[0039] The margin size x is controlled by controlling the position of the grinding wheel's axis. n The margin size for the final thinning is larger than the margin size for the previous thinning, i.e., margin size x n Larger than the margin size x n-1 .

[0040] from Figure 3 As can be seen, in the final thinning process, the step height of the edge can be minimized. For example, the thinning thickness in the final step can be less than or equal to 1 times the final center thickness h of the wafer, and greater than or equal to 0.02 times the final center thickness h of the wafer, i.e., 0.02 ≤ y n / h≤1.

[0041] Furthermore, the final thinning step can be less than or equal to 0.2 times the final wafer thickness h, and greater than or equal to 0.02 times the final wafer thickness h, i.e., 0.02 ≤ y n / h≤0.2.

[0042] Optionally, the final thinning step can be equal to 0.05 times the final wafer thickness h.

[0043] Figure 3 The comparison shows the maximum stress on the wafer and the stress at the last step under the same external load conditions. Figure 3 The horizontal axis represents the ratio of the thickness of the final step to the final center thickness h of the wafer, and the vertical axis represents the maximum stress value, in megapascals (MPa). Figure 3 In the diagram, the solid line L1 represents the maximum stress across the entire wafer. This maximum stress may occur on the last step (level n) or the penultimate step (level n-1). The dashed line L2 represents the maximum stress on the last step (level n) of the wafer, reflecting only the stress in the thinnest region and disregarding stress at other steps. Figure 3 It can be seen that this application achieves 0.02≤y n / h≤1 can make the location of the maximum stress on the wafer avoid the last step, thus making the stress have a smaller impact on the last step of the wafer.

[0044] Figure 4 The distribution of the location of maximum stress on a wafer under the same external load conditions is shown. Figure 4 In a coordinate system, when the vertical axis is positive, it indicates that the maximum stress of the entire wafer occurs at the last step. Figure 2 The radial inner side of the position indicated by B in the middle, when the ordinate is negative, indicates that the maximum stress of the entire wafer occurs at the last step ( Figure 2 The radial outer side of the position indicated by B in the middle. Line L3, which connects multiple rectangular points, represents the wafer with a radial width of 0.06 micrometers for the last step, and line L4, which connects multiple circular points, represents the wafer with a radial width of 0.02 micrometers for the last step.

[0045] from Figure 4 It can be seen that by controlling the ratio of the final thinning thickness to the final wafer thickness within a certain range, the location of the maximum stress on the entire wafer can be kept away from the last step as much as possible. This allows the maximum stress on the entire wafer to occur on the radial outer side of the last step, thus minimizing the impact of stress on the central region of the wafer and making the thinned wafer less prone to breakage.

[0046] Thinning processes can damage wafers. The thickness of the damaged layer is determined by process parameters such as grinding wheel mesh size, grinding wheel speed, and feed rate. The maximum thickness of the damaged layer is usually less than 1 micrometer.

[0047] Furthermore, in the final thinning step, the feed rate y of the grinding wheel in the thickness direction of the wafer... n Greater than the spindle's feed accuracy, for example, the feed amount y of the grinding wheel in the thickness direction of the wafer. n A depth greater than or equal to 1 micrometer is required to remove the damaged layer.

[0048] In each step of the grinding process, the thickness y1 is reduced to y n They can be the same or different.

[0049] Furthermore, after each thinning process, the transition portion of the wafer at the step and the bottom of the step (e.g.) Figure 2 The portion indicated by B is chamfered (including rounded corners) before proceeding to the next thinning process. This chamfering at the transition points of each step reduces stress concentration.

[0050] This application also proposes a wafer including a first surface and a second surface. The first surface is used to form a chip pattern, and the second surface is opposite to the first surface. The second surface is thinned to form a recess in a central region, and a raised edge is formed at the edge of the circular portion relative to the recess, the edge surrounding the recess. The edge is formed as a stepped shape that gradually thickens outward from the central region, and the edge has at least two steps.

[0051] The wafer has a final thickness h in the central region, and the thickness y of the step adjacent to the central region in the edge is... n Less than or equal to 1 times the final wafer thickness h, and greater than or equal to 0.02 times the final wafer thickness h, i.e., 0.02 ≤ y n / h≤1, preferably 0.02≤y n / h≤0.2, more preferably y n / h = 0.05.

[0052] It should be understood that at least some aspects or features of the above-described implementation methods, embodiments, or examples can be appropriately combined.

[0053] It is understood that, in this application, when the number of parts or components is not specifically limited, the number can be one or more, where multiple refers to two or more. For cases where the number of parts or components shown in the drawings and / or described in the specification is, for example, two, three, four, etc., this specific number is generally exemplary and not restrictive, and can be understood as multiple, i.e., two or more; however, this does not mean that this application excludes the case of one.

[0054] In this application, unless otherwise expressly stated or limited, terms such as "installation," "assembly," "connection," "linking," "joining," "linking," "abutment," "communication," "connection," "conduction," "fixing," and "fastening" should be interpreted broadly, for example, they can be direct or indirect. For instance, regarding connection, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal communication of two components or the interaction between two components, unless otherwise expressly stated or limited. For instance, regarding communication / conduction, it can be direct communication / conduction or indirect communication / conduction through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0055] In this application, unless otherwise expressly stated or limited, a component being disposed / installed / located / enclosed / placed within, inside, or incorporated in another component can be either of the following two situations: a portion or a majority of the one component is located within the other component; or the one component is completely enclosed within the other component.

[0056] Although the present application has been described in detail using the above embodiments, it will be apparent to those skilled in the art that the present application is not limited to the embodiments described herein. The present application can be modified and implemented as alternative embodiments without departing from the spirit and scope of the present application as defined by the claims. Therefore, the description in this specification is for illustrative purposes only and does not have any limiting meaning for the present application.

Claims

1. A wafer fabrication method, characterized in that, Includes the following steps: The back side of the wafer to be processed is thinned by grinding in multiple steps. Each grinding step only grinds the middle part of the wafer, omitting the edges. The radial dimension of the portion removed in the subsequent grinding step is smaller than that removed in the previous grinding step, and the edge size left in the subsequent step is larger than that left in the previous step, thus forming multi-level steps at the edge of the wafer. In the multi-step grinding process, the final step reduces the thickness y. n Less than or equal to 0.05 times the final wafer thickness h, and greater than or equal to 0.02 times the final wafer thickness h, i.e., 0.02 ≤ y n / h≤0.

05.

2. The wafer fabrication method according to claim 1, characterized in that, In the multi-step grinding process, the final step reduces the thickness y. n Greater than or equal to 1 micrometer.

3. The wafer fabrication method according to claim 1, characterized in that, In the multi-step grinding process, the thickness reduction in each step is y1 to y2. n Same or different.

4. The wafer fabrication method according to claim 1, characterized in that, In each step of the grinding process, the margin dimension is greater than the centering accuracy of the equipment.

5. The wafer fabrication method according to claim 1, characterized in that, In the multi-step grinding process, the processing parameters are adjusted before each grinding operation. The processing parameters include grinding wheel mesh size, grinding wheel speed, wafer speed, grinding wheel feed rate, and margin size.

6. The wafer fabrication method according to claim 1, characterized in that, After each grinding step, the transition portion between the step and the wafer is chamfered before proceeding to the next grinding step.

7. A wafer, characterized in that, The wafer includes a first surface and a second surface. The first surface is used to form a chip pattern, and the second surface is opposite to the first surface. A recess is formed in the central region of the second surface through a thinning process. An edge is formed at the edge of the wafer, protruding relative to the recess. The edge surrounds the recess and is formed as a stepped shape that gradually thickens outward from the central region, having at least two steps. The wafer has a final wafer thickness h in the central region, and the thickness y of the step adjacent to the central region of the reserved edge. n Less than or equal to 0.05 times the final wafer thickness h, and greater than or equal to 0.02 times the final wafer thickness h, i.e., 0.02 ≤ y n / h≤0.05.

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