Display panel and display device

Abstract

The invention relates to a display panel and a display device. Comprising a substrate, and the substrate comprises a first side face and a second side face which deviate from each other in the thickness direction; the capacitor assembly comprises a first conductive polar plate and a second conductive polar plate; the first conductive polar plates are arranged on the first side face, each first conductive polar plate is used for being correspondingly and electrically connected with one first wire on the first side face, the first wires are used for transmitting first signals, and the first signals are voltage signals; the second conductive polar plates are arranged on the second side surface, each second conductive polar plate corresponds to one first conductive polar plate, and each second conductive polar plate is used for being correspondingly and electrically connected with one first wire on the second side surface; the orthographic projections of the first conductive polar plate and the second conductive polar plate in the same capacitor assembly towards the substrate are at least partially overlapped. Coupling connection of the first wires on the first side face and the second side face can be achieved, connecting wires between the first wires on the two side faces are reduced, and then the frame of the display panel is narrowed.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] With the development of display technology, the application scope of display screens is becoming wider and wider, and people's requirements for display screens are also becoming higher and higher. For example, people expect the borders of display screens to be narrower and narrower. However, the borders of display screens in the prior art are still relatively large, which cannot meet people's demand for narrow borders. Summary of the invention

[0003] Based on this, it is necessary to provide a display panel and a display device that can narrow the screen border in order to solve the above technical problems.

[0004] In a first aspect, the present application provides a display panel, comprising: a substrate, the substrate comprising a first side surface and a second side surface opposite to each other in a thickness direction; at least one capacitor component, the capacitor component comprising a first conductive electrode plate and a second conductive electrode plate; wherein the first conductive electrode plate is arranged on the first side surface, and each of the first conductive electrode plates is used to be electrically connected to a first wiring on the first side surface, and the first wiring is used to transmit a first signal, which is a voltage signal; the second conductive electrode plate is arranged on the second side surface, and each of the second conductive electrode plates corresponds to one of the first conductive electrode plates, wherein each of the second conductive electrode plates is used to be electrically connected to a first wiring on the second side surface; wherein the first conductive electrode plate and the second conductive electrode plate in the same capacitor component at least partially overlap in their orthographic projections toward the substrate.

[0005] In some embodiments, the orthographic projections of the corresponding first conductive electrode plate and the second conductive electrode plate on the substrate overlap.

[0006] In some embodiments, at least a portion of the plurality of first wirings are data wirings, and the data wirings are used to transmit data signals; the display panel includes a plurality of capacitor components, and the first conductive electrode plates and the second conductive electrode plates in at least some of the capacitor components of the plurality of capacitor components are respectively used to be electrically connected to the data wirings on the corresponding side surfaces;

[0007] Optionally, the first routing lines are all data routing lines;

[0008] Optionally, the first wiring further includes a gate drive signal line.

[0009] In some embodiments, the display panel further comprises:

[0010] at least one via hole, wherein the via hole is electrically connected to a second wiring on the first side surface and a second wiring on the second side surface respectively; the second wiring is used to transmit a second signal;

[0011] Optionally, the second signal is a current signal or a voltage signal;

[0012] Optionally, the plurality of via holes are arranged in sequence along the first direction, and are arranged in two rows along the second direction; wherein the second direction is perpendicular to both the first direction and the thickness direction of the substrate.

[0013] In some embodiments, at least a portion of the plurality of first wirings are data wirings, and the display panel further comprises a shorting bar circuit disposed on the first side, the shorting bar circuit being electrically connected to the data wirings on the first side;

[0014] The shorting bar circuit is used to access the control signal and the initialization signal, and is used to open or close the path between the initialization signal and the data line under the action of the control signal;

[0015] Optionally, a first test pad and a second test pad are further provided on the first side, and the first test pad and the second test pad are both electrically connected to the shorting bar circuit; the shorting bar circuit is used to access a control signal through the first test pad and access an initialization signal through the second test pad;

[0016] Optionally, the control signal and the initialization signal are control signals and initialization signals transmitted by a driving chip;

[0017] Optionally, the driving chip is arranged on the second side surface;

[0018] Optionally, a plurality of first binding pads are further provided on the second side surface, and each of the first binding pads is used to be electrically connected to a corresponding data trace on the second side surface;

[0019] Optionally, a third test pad and a fourth test pad are further provided on the second side surface; the third test pad is used to receive a control signal transmitted by the driving chip, and the fourth test pad is used to receive an initialization signal transmitted by the driving chip;

[0020] The display panel further includes two or more via holes; the first test pad is electrically connected to the third test pad via the via holes; the second test pad is electrically connected to the fourth test pad via the via holes;

[0021] Optionally, the first side surface is a light emitting surface, and the second side surface is a backlight surface;

[0022] Optionally, the shorting bar circuit is further used to access a test signal, and under the action of the control signal, to open or close a path between the test signal and the data wiring;

[0023] Optionally, the control signal and the test signal are control signals and test signals transmitted by an external signal generator;

[0024] Optionally, the shorting bar circuit is also used to access a test signal via the second test pad.

[0025] In some of the embodiments, the shorting bar circuit includes a control signal receiving end for receiving the control signal and an initialization signal receiving end for receiving the initialization signal;

[0026] The shorting bar circuit comprises a plurality of transistors, wherein the first end of each of the transistors is electrically connected to the initialization signal receiving end, the second end of each of the transistors is electrically connected to a corresponding data line, and the control end of each of the transistors is electrically connected to the control signal receiving end; the first end of each of the transistors is used to receive an initialization signal via the initialization signal receiving end, and the control end of each of the transistors is used to receive a control signal via the control signal receiving end, wherein the control signal is used to control the conduction state of the plurality of transistors;

[0027] Optionally, the first end of each transistor is further used to access a test signal via an initialization signal receiving end;

[0028] Optionally, the control signal receiving end is electrically connected to the first test pad;

[0029] Optionally, the initialization signal receiving end is electrically connected to the second test pad.

[0030] In some of the embodiments, a display cycle of the display panel includes a vertical effective display period and a vertical blank display period;

[0031] In the vertical effective display period, the shorting bar circuit receives a first control signal, and under the action of the first control signal, disconnects the initialization signal receiving end from the data wiring on the first side; the data wiring on the second side is used to receive a display data signal;

[0032] In the vertical blank display period, the shorting bar circuit receives a second control signal and a first initialization signal. Under the action of the second control signal, the connection between the initialization signal receiving end and the data wiring on the first side is turned on, so as to transmit the first initialization signal to the plurality of data wirings on the first side through the initialization signal receiving end; the data wirings on the second side are used to receive the second initialization signal;

[0033] Optionally, the first initialization signal is the same as the second initialization signal.

[0034] In some of the embodiments, the display panel further includes a plurality of second binding pads, and the plurality of second binding pads are arranged on the second side surface;

[0035] At least one of the second traces on the first side is electrically connected to at least one of the second binding pads through a via;

[0036] Optionally, the display panel further includes a flexible circuit board, the flexible circuit board is electrically connected to the plurality of second binding pads, and the flexible circuit board is used to provide a second signal to the plurality of second binding pads respectively, so as to transmit the second signal to the second trace;

[0037] Optionally, a plurality of third binding pads are provided on the first side surface, and at least one of the second traces on the first side surface is electrically connected to at least one of the third binding pads;

[0038] Optionally, at least one of the second traces on the first side is electrically connected to at least one of the second binding pads through the third binding pad and the via hole.

[0039] In some embodiments, there are multiple capacitor components, and the first conductive electrode plates of the multiple capacitor components are arranged in sequence along a first direction, and the second conductive electrode plates of the multiple capacitor components are arranged in sequence along the first direction, wherein the first direction is perpendicular to the thickness direction of the substrate, and the orthographic projections of the first conductive electrode plates and the second conductive electrode plates of different capacitor components toward the substrate do not overlap each other;

[0040] Optionally, the first conductive electrode plates and the second conductive electrode plates of the plurality of capacitor components are further arranged in at least two rows along a second direction; wherein the second direction is perpendicular to both the first direction and the thickness direction of the substrate;

[0041] Optionally, the first wirings electrically connected to the first conductive electrode plates are parallel and their orthographic projections toward the substrate do not overlap, and the first wirings electrically connected to the second conductive electrode plates are parallel and their orthographic projections toward the substrate do not overlap;

[0042] Optionally, a notch is provided on the opposite side surfaces of each two adjacent first conductive electrode plates along the second direction;

[0043] Optionally, a notch is formed on the opposite sides of each two adjacent second conductive electrode plates along the second direction.

[0044] In a second aspect, the present application provides a display device, comprising the aforementioned display panel.

[0045] The above-mentioned display panel and display device. The display panel includes a substrate, and the substrate includes a first side surface and a second side surface that are opposite to each other in the thickness direction. It also includes at least one capacitor component, and the capacitor component includes a first conductive electrode plate and a second conductive electrode plate. The first conductive electrode plate is arranged on the first side surface, and each first conductive electrode plate is used to be electrically connected to a first wiring on the first side surface, and the first wiring is used to transmit a first signal; the first signal is a voltage signal. The second conductive electrode plate is arranged on the second side surface, and each second conductive electrode plate corresponds to a first conductive electrode plate, and each second conductive electrode plate is used to be electrically connected to at least one first wiring on the second side surface. The first conductive electrode plate and the second conductive electrode plate in the same capacitor component are at least partially overlapped in their orthographic projections toward the substrate, respectively, so that the first conductive electrode plate and the second conductive electrode plate can form a cross-layer capacitor structure. Since the first wiring transmits a voltage signal, the voltage signals transmitted on the first wiring on the first side and the second side can be transmitted to each other through the voltage bootstrap effect of the corresponding first conductive electrode plate and the second conductive electrode plate, thereby realizing the coupling connection between the first wiring on the first side and the second side, so that the connection between the first wiring on the two sides in circuit principle is no longer limited to physical connection wiring, thereby reducing or eliminating the connection wiring between the first wiring on the two sides, thereby narrowing the border of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0047] FIG1 is a schematic diagram of a screen body bending in a related art according to an embodiment;

[0048] FIG2 is a front view of the structure of a display panel in one embodiment;

[0049] FIG3 is a top / bottom view of the structure of a display panel in one embodiment;

[0050] FIG4 is a structural side view of a display panel in one embodiment;

[0051] FIG5 is a second top / bottom view of the structure of a display panel in one embodiment;

[0052] FIG6 is a second structural front view of a display panel in one embodiment;

[0053] FIG. 7 is a second top / bottom view of the structure of a display panel in one embodiment;

[0054] FIG8 is an equivalent circuit diagram of a display panel in one embodiment;

[0055] FIG9 is a second equivalent circuit diagram of a display panel in one embodiment;

[0056] FIG10 is a third equivalent circuit diagram of a display panel in one embodiment;

[0057] FIG11 is a fourth equivalent circuit diagram of a display panel in one embodiment;

[0058] FIG12 is a schematic diagram of the structure of a display panel in one embodiment;

[0059] FIG13 is a second schematic diagram of the structure of a display panel in one embodiment;

[0060] FIG14 is a schematic diagram of the structure of a capacitor assembly in one embodiment;

[0061] FIG15 is a second schematic diagram of the structure of a capacitor assembly in one embodiment;

[0062] FIG16 is a schematic diagram of via arrangement in one embodiment;

[0063] FIG. 17 is a structural diagram of a display device in one embodiment.

[0064] Explanation of the accompanying drawings: 10-substrate, 20-capacitor component, 21-first conductive electrode plate, 22-second conductive electrode plate, 30-first routing, 31-data routing, 40-via, 50-second routing, 51-power line, 60-shorting bar circuit, 61-first test pad, 62-second test pad, 63-third test pad, 64-fourth test pad, 65-first binding pad, 66-second binding pad, T-transistor, 70-driving chip, 80-flexible circuit board, 100-display panel, 200-display device. DETAILED DESCRIPTION

[0065] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. Embodiments of the present application are provided in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0067] It can be understood that the terms "first", "second", etc. used in the present application can be used in this article to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element.

[0068] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that, in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, an element or feature described as "under other elements" or "under it" or "under it" will be oriented as being "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both upper and lower orientations. In addition, the device may also include additional orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptors used herein are interpreted accordingly.

[0069] It should be noted that when an element is considered to be "connected" to another element, it can be directly connected to the other element, or connected to the other element through an intermediate element. In addition, the "connection" in the following embodiments should be understood as "electrical connection", "communication connection", etc. if there is transmission of electrical signals or data between the connected objects.

[0070] When used herein, the singular forms "a", "an", and "said / the" may also include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "include / comprise" or "have" etc. specify the presence of stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof.

[0071] The display panel provided in the embodiment of the present application can be applied to display products. By utilizing the principle of capacitor bootstrapping, the frame of the display product can be narrowed, so that the display product better meets people's demand for narrow frame.

[0072] The display panel in the related art has the problem of wide frame and thick panel. According to the inventor's research, the problem arises because in the related art, the circuit and part of the screen body are usually bent to the back to reduce the frame of the screen. However, due to the bending radius, the frame of the screen is still large, the thickness of the screen is also thick, and the bending process has high requirements, which is easy to be damaged during the production process, resulting in a low production yield of the screen. For example, as shown in Figure 1, the flexible screen uses a flexible polyimide material as a substrate. During the production process, all array film layers and light-emitting devices are deposited on the same side of the substrate, first the array film layer, then the light-emitting device, and finally the package. In order to reduce the frame of the screen, the driver chip, flexible circuit board, etc. will be bound and welded on the screen, and the screen will be bent to the back at the position of the lower frame of the screen (the driver chip, flexible circuit board, etc. are on the back of the screen after bending), thereby reducing the frame of the screen. However, a large number of connecting wires are required between the circuit wires bent to the back and the circuit wires on the front to realize the connection between the two in circuit principle. Since a large number of connecting wires need to occupy a large area, the width of the display panel is still large.

[0073] Based on the above technical problems, the inventors have developed a technical solution for the embodiments of the present invention.

[0074] In one embodiment, as shown in FIGS. 2 , 3 and 4 , a display panel is provided, comprising: a substrate 10, at least one capacitor component 20, the capacitor component 20 comprising a first conductive electrode plate 21 and a second conductive electrode plate 22, wherein:

[0075] The substrate 10 includes a first side surface and a second side surface that are opposite to each other in the thickness direction.

[0076] 2 is a front view of the display panel in this embodiment, FIG. 3 is a top view / bottom view of the display panel in this embodiment, and FIG. 4 is a side view of the display panel in this embodiment.

[0077] The first conductive electrode plates 21 are disposed on the first side surface. Each first conductive electrode plate 21 is used to be electrically connected to a first wiring line 30 on the first side surface. The first wiring line 30 is used to transmit a first signal.

[0078] The first signal is a voltage signal. The voltage signal transmitted by the first wiring 30 may be a data signal, a gate drive signal or other voltage signal.

[0079] The second conductive electrode plates 22 are disposed on the second side surface, and each second conductive electrode plate 22 corresponds to a first conductive electrode plate 21 .

[0080] Each second conductive electrode plate 22 is used to be electrically connected to a corresponding first wiring 30 on the second side surface.

[0081] Among them, the first conductive electrode plate 21 and the second conductive electrode plate 22 in the same capacitor component 20 are at least partially overlapped in their positive projections toward the substrate 10, so there is a voltage bootstrap effect of the capacitor between the first conductive electrode plate 21 and the second conductive electrode plate 22, and the first conductive electrode plate 21 and the second conductive electrode plate 22 are equivalent to the two plates of a capacitor, and the substrate 10 between the two plates can just serve as an insulating layer between the two plates of the capacitor. Due to the characteristics of the capacitor itself, the first wiring 30 can only transmit voltage signals, and the voltage signals transmitted on the first wiring 30 on the first side and the second side can be mutually transmitted through the voltage bootstrap effect of the corresponding first conductive electrode plate 21 and the second conductive electrode plate 22, realizing the coupling connection between the first wiring 30 on the first side and the second side, so that the connection between the first wiring 30 on the two sides in circuit principle is no longer limited to the physical connection wiring.

[0082] For ease of understanding, the following explanation is given by taking the case where the first signal transmitted by the first wire 30 is a data signal as an example. It can be understood that the voltage of the data signal connected to the same first wire 30 is a fixed value within a frame. However, between adjacent frames, the voltage of the data signal connected to the first wire 30 may change. Due to the bootstrap effect of the capacitor, the two conductive plates of the capacitor component 20 can accurately transmit the voltage change, thereby realizing the transmission of the data signal.

[0083] Specifically, since the capacitor component 20 can transmit voltage changes, before the first wiring 30 is connected to the voltage signal, the voltage at both ends of the capacitor component 20 is initialized. After the first wiring at one end of the capacitor component 20 is connected to the voltage signal, the voltage signal of the first wiring 30 will be transmitted to the other end of the capacitor component 20 in the form of a voltage change, thereby realizing the transmission of the voltage signal; or after the first wiring 30 at one end of the capacitor component 20 is connected to a new voltage signal, the voltage of the first wiring 30 will change, and the voltage signal of the first wiring 30 will be transmitted to the other end of the capacitor component 20 in the form of a voltage change, thereby realizing the transmission of the voltage signal.

[0084] Optionally, the orthographic projections of the corresponding first conductive electrode plate 21 and the second conductive electrode plate 22 on the substrate 10 overlap, so that the first conductive electrode plate 21 and the second conductive electrode plate 22 have a maximum relative area, which is beneficial to increase the capacitance value and improve the transmission capacity of the first signal.

[0085] In this embodiment, the display panel includes a substrate 10, and the substrate 10 includes a first side surface and a second side surface that are separated from each other in the thickness direction. It also includes at least one capacitor component 20, and the capacitor component 20 includes a first conductive electrode plate 21 and a second conductive electrode plate 22. The first conductive electrode plate 21 is arranged on the first side surface, and each first conductive electrode plate 21 is used to be electrically connected to a first wiring 30 on the first side surface, and the first wiring 30 is used to transmit a voltage signal. The second conductive electrode plate 22 is arranged on the second side surface, and each second conductive electrode plate 22 corresponds to a first conductive electrode plate 21, and each second conductive electrode plate 22 is used to be electrically connected to at least one first wiring 30 on the second side surface. The first conductive electrode plate 21 and the second conductive electrode plate 22 in the same capacitor component 20 have their positive projections toward the substrate 10 at least partially overlapped, so that the first conductive electrode plate 21 and the second conductive electrode plate 22 can form a cross-layer capacitor structure. Since the first wiring 30 transmits a voltage signal, the voltage signal transmitted on the first wiring 30 on the first side and the second side can be mutually transmitted through the voltage bootstrap effect of the corresponding first conductive electrode plate 21 and the second conductive electrode plate 22, thereby realizing the signal coupling connection between the first wiring 30 on the first side and the second side, so that the connection between the first wiring 30 on the two sides in circuit principle is no longer limited to the physical connection wiring, thereby reducing or eliminating the physical connection wiring between the first wiring 30 on the two sides, thereby narrowing the border of the display panel.

[0086] In one embodiment, as shown in FIG. 5 , at least a portion of the plurality of first wirings 30 are data wirings 31 , and the data wirings 31 are used to transmit data signals.

[0087] Among them, the data signal can be a display data signal of the pixel circuit in the display panel. During the data writing stage, the data signal is transmitted to the gate of the driving transistor of the pixel circuit, so that the driving transistor of the pixel circuit can output a corresponding driving current to drive the light-emitting element connected to the pixel circuit to emit light.

[0088] The display panel includes a plurality of capacitor components, and the first conductive electrode plates 21 and the second conductive electrode plates 22 in at least some of the capacitor components are respectively used to be electrically connected to the data traces 31 on the corresponding side surfaces.

[0089] Among them, since at least a part of the multiple first wirings 30 are data wirings 31, the first conductive electrode plate 21 and the second conductive electrode plate 22 of the capacitor components connected to the part of the first wirings 30 in the corresponding multiple capacitor components are respectively used to electrically connect to the data wirings 31 on the corresponding side.

[0090] Optionally, all first wirings may be data wirings 31 .

[0091] Optionally, the first wiring may further include a gate drive signal line, and the gate drive signal line may be a scan signal line, a light emitting control signal line, and the like.

[0092] In this embodiment, at least a portion of the multiple first lines 30 can be data lines 31, or can be set as gate drive signal lines as needed, so as to achieve cross-layer transmission of voltage signals such as data signals and gate drive signals, thereby facilitating narrowing the border.

[0093] It should be noted that the prior art usually adopts bending technology. Please refer to Figure 1 again. After bending, there is a bending arc, which makes it difficult to reduce the thickness of the screen body, and the existence of the bending radius (the bending radius is usually 4-5mm) makes the size of the lower frame unable to be compressed. Therefore, the bending technology has the problem that display products cannot meet users' pursuit of narrow frames and thin products.

[0094] Based on this, in one embodiment, as shown in FIGS. 6-7 , the display panel further includes at least one via hole 40 , which is electrically connected to a second wiring 50 on the first side and a second wiring 50 on the second side respectively; the second wiring 50 is used to transmit the second signal.

[0095] The second signal transmitted by the second wiring 50 may be a current signal or a voltage signal.

[0096] Preferably, the second signal may be a power signal, such as a positive power signal, a negative power signal, etc. In some embodiments, the second trace 50 is a power trace, because the power trace needs to provide a continuous current, and the voltage of the power signal is relatively constant and cannot be transmitted using a capacitor component, so the power trace is connected through the via 40 to achieve stable transmission of the power signal.

[0097] It can be understood that, in actual implementation, the second wiring 50 can also be used to transmit voltage signals such as data signals and gate drive signals according to actual needs.

[0098] Thus, the first wiring 30 can transmit a voltage signal whose voltage value changes, and the voltage signal transmitted on the first wiring 30 on the first side and the second side can be mutually transmitted through the voltage bootstrap effect of the corresponding first conductive electrode plate 21 and the second conductive electrode plate 22, thereby realizing the signal coupling connection between the first wiring 30 on the first side and the second side. The second wiring 50 can transmit the second signal, thereby realizing the physical connection of the voltage signal or current signal including the power supply signal on the first side and the second side through the via 40. This facilitates the design of a double-sided circuit. Under the design form of the double-sided circuit, the first side can be used for display area setting, and the second side can be provided with a driving chip, a flexible circuit board, etc., so that the connection of the wiring on the first side and the second side can be realized without bending the screen body to the back. Compared with the bending design, the frame of the display panel can be made smaller and the display panel thinner.

[0099] It should be specifically noted that the capacitor component 20 adopts an array process, and its size is micron-level, and its thickness is nanometer-level, which can be ignored. The via 40 is micron-level in size, and its thickness is also negligible. Therefore, the area and thickness required for the capacitor component 20 and the via 40 in the double-sided circuit of this embodiment are very small, and compared with the bending design method, the frame and thickness are significantly reduced.

[0100] Although the sizes of the via 40 and the capacitor component 20 are both at the micron level, the size of the via 40 is slightly larger than the capacitor component 20. Moreover, since drilling holes in the substrate 10 will affect the yield rate of the substrate 10 and increase the difficulty of the process, the use of the via 40 should be minimized, and it is only used when the via 40 must be used to transmit signals across layers. Since signals with relatively constant voltages such as power signals cannot be transmitted using the capacitor component 20, in actual implementation, voltage signals with changing voltage values ​​can be preferentially transmitted through the capacitor component 20, and signals with relatively constant voltages are transmitted using the via 40. In this way, the number of vias 40 can be minimized, the frame can be further narrowed, and poor contact caused by the vias 40 can be avoided, which has process feasibility and reduces the risk of water vapor entry.

[0101] In this embodiment, the first wiring 30 can transmit voltage signals, and the capacitor component 20 realizes the signal coupling connection between the first side and the second side, including voltage signals such as data signals whose voltages may change. The second wiring 50 can transmit voltage signals and current signals, thereby realizing the physical connection between the first side and the second side, including signals of power supply type, whose voltages are relatively constant, through the via 40. Furthermore, the line connection on the first side and the second side can be realized without bending the screen body to the back, avoiding bending, making the frame of the display panel smaller and the display panel thinner.

[0102] In one embodiment, as shown in FIG. 8 , which is an equivalent circuit diagram of a display panel in an embodiment of the present application, the display panel further includes a shorting bar circuit 60 disposed on the first side surface, and the shorting bar circuit 60 is electrically connected to the data trace 31 on the first side surface.

[0103] The shorting bar circuit 60 is used to access the control signal and the initialization signal, and is used to open or close the path between the initialization signal and the data wiring 31 under the action of the control signal.

[0104] Optionally, the shorting bar circuit 61 is also used to access a test signal, and under the action of a control signal, to open or close the path between the test signal and the data wiring 31 .

[0105] Optionally, the control signal and the data signal may be a control signal and a data signal transmitted by an external signal generator.

[0106] Among them, the shorting bar circuit is the test circuit of the display panel. When the display panel is still in a single state and is not bound to chips and other circuit boards on the production line, the display panel is first tested to detect whether the pixels on the display panel can emit light normally. The control signal and the test signal can be input to the shorting bar circuit 60 by an external signal generator. The control signal is used to conduct the path between the test signal and the data line 31. It can be understood that when the path between the test signal and the data line 31 is conducted, the test signal can be transmitted to the data line 31. When the path between the test signal and the data line 31 is disconnected, the test signal cannot be transmitted to the data line 31. Thereby, the test signal for testing is transmitted to the data line 31 through the shorting bar circuit 60. In actual implementation, the shorting bar circuit 60 can be used to short-circuit all the data lines 31 corresponding to the same color pixels (for example, all the data lines 31 corresponding to the red pixels are short-circuited, all the data lines 31 corresponding to the green pixels are short-circuited, and all the data lines 31 corresponding to the blue pixels are short-circuited). Then, the shorting bar circuit 60 is used to transmit a test signal (data voltage) to the shorted lines. The data lines 31 of pixels of different colors can be different test signals, thereby realizing the test of the luminescence of the pixels on the display panel. At this time, since all the data lines 31 corresponding to the same color pixels are short-circuited, the display panel can only display some simple pictures.

[0107] Optionally, the shorting bar circuit 60 is disposed on the first side surface, so as to facilitate electrical connection with the data trace 31 on the first side surface. The first side surface may be a light emitting surface, i.e., a side surface on the substrate for arranging pixels, and the shorting bar circuit 60 connects each pixel, so as to facilitate an external signal generator to transmit a signal to the shorting bar circuit 60 during the test process, which helps to improve the test efficiency.

[0108] Wherein, under the action of the control signal, the shorting bar circuit 60 can open or close the path between the initialization signal and the data wiring 31 on the first side. When the initialization signal and the data wiring 31 are connected, the initialization signal is transmitted to the first conductive electrode plate 21 via the first wiring 31 to initialize the first conductive electrode plate 21, so that the first conductive electrode plate 21 is ready to receive the first signal, thereby improving the accuracy of signal reception.

[0109] In actual implementation, a first test pad 61 and a second test pad 62 are further provided on the first side surface, and the first test pad 61 and the second test pad 62 are both electrically connected to the shorting bar circuit 60; the shorting bar circuit 60 is used to access the control signal through the first test pad 61 and access the initialization signal through the second test pad 62. By providing the first test pad 61 and the second test pad 62, it is convenient for the control signal and the initialization signal to be stably connected to the shorting bar circuit 60.

[0110] In one embodiment, the shorting bar circuit 60 is also used to access a test signal via the second test pad 62 .

[0111] Optionally, the test signal can be a test signal transmitted by an external signal generator during the test phase; in this phase, the external signal generator transmits a control signal and a test signal to the short-circuit bar circuit 60; under the action of the control signal, the short-circuit bar circuit 60 turns on or off the path between the test signal and the data line 31, thereby testing the display panel through the short-circuit bar circuit 60.

[0112] Furthermore, the shorting bar circuit 60 is also used to access the control signal transmitted by the external signal generator through the first test pad 61 and the test signal transmitted by the external signal generator through the second test pad 62. By accessing the control signal and the test signal transmitted by the external signal generator through the dedicated test pad, the reliability of the shorting bar circuit 60 receiving the signal can be improved, thereby improving the reliability of the test.

[0113] In one embodiment, the control signal and initialization signal connected to the shorting bar circuit 60 may be a control signal and an initialization signal transmitted by a driving chip.

[0114] In the module state, in the display stage, the driver chip transmits control signals and initialization signals to the short-circuit bar circuit 60. Under the action of the control signal, the short-circuit bar circuit 60 can open or close the path between the initialization signal and the data wiring 31. When the path between the initialization signal and the data wiring 31 is open, the initialization signal is transmitted to the first conductive electrode plate 21 via the first wiring 31 to initialize the first conductive electrode plate 21. After the initialization is completed, under the action of the control signal, the short-circuit bar circuit 60 disconnects the path between the initialization signal and the data wiring 31. At this time, the data wiring 31 on the first side is used to receive the data signal to drive each pixel to display. Among them, the data signal connected to the data wiring 31 can be a display data signal transmitted by the driver chip, thereby realizing the control of pixel display or initialization.

[0115] In one embodiment, the driving chip can also output a test signal and a control signal, so as to implement a test on the pixels of the display panel in a module state.

[0116] Optionally, the driver chip can be arranged on the second side surface. The second side surface is the backlight surface. By arranging the driver chip on the second side surface, it is beneficial to double-sided circuit design, and further to narrow the frame.

[0117] By setting a driver chip, it can be bound and connected to the display panel to realize the modularization of the display panel. The driver chip is used to provide data signals and control signals to drive the display panel to emit light.

[0118] Optionally, a plurality of third test pads 63 and fourth test pads 64 are also provided on the second side surface, the third test pads 63 are used to receive control signals transmitted by the driving chip, and the fourth test pads 64 are used to receive initialization signals transmitted by the driving chip; the third test pads 63 are electrically connected to the first test pads 61 through the vias 40, and the fourth test pads 64 are electrically connected to the second test pads 62 through the vias 40.

[0119] As shown in FIG10 , when the required driving chip 70 is bound to the second side, the third test pad 63 and the fourth test pad 64 are used to bind the driving chip 70 to respectively transmit the control signal and the data signal output by the driving chip 70. This facilitates stable access signals to the shorting bar circuit 60 through the third test pad 63 and the fourth test pad 64 to reliably control the display panel.

[0120] Since the number of wirings required for the control signals and initialization signals that need to be connected to the short-circuit bar circuit 60 is small, holes are directly drilled on the substrate, and vias 40 are used to connect the pads on the two sides for receiving the control signals and initialization signals. This will not increase the area much and can achieve stable signal transmission between the two.

[0121] In one embodiment, as shown in FIG. 10 , the display panel further includes a plurality of first binding pads 65 , which are disposed on the second side surface, and each first binding pad 65 is used to be electrically connected to a corresponding data trace 31 on the second side surface.

[0122] In this embodiment, by designing the first binding pad 65 , it is convenient to subsequently bind the required driving chip 70 through the first binding pad 65 .

[0123] In one embodiment, the shorting bar circuit 60 includes a control signal receiving end and an initialization signal receiving end. Continuing to refer to FIG. 10 , the shorting bar circuit 60 includes a plurality of transistors T, the first end of each transistor T is electrically connected to the initialization signal receiving end, the second end of each transistor T is connected to a corresponding data line 31, and the control end of each transistor T is electrically connected to the control signal receiving end. The first end of each transistor T is used to access the initialization signal through an initialization signal receiving end, and the control end of each transistor T is used to access the control signal through the control signal receiving end.

[0124] The control signal is used to control the conduction state of the plurality of transistors T.

[0125] In this embodiment, the initialization signal receiving end may be a common end to which the first ends of the transistors T are connected, and the control signal receiving end may be a common end to which the control ends of the transistors T are connected.

[0126] When the control signal controls the transistor T to be turned on, the path between the initialization signal receiving end and the data wiring 31 is turned on, and the initialization signal can be transmitted to the corresponding data wiring 31. When the control signal controls the transistor T to be turned off, the path between the initialization signal receiving end and the data wiring 31 is disconnected, and the initialization signal cannot be transmitted to the corresponding data wiring 31, thereby realizing the initialization control of the display panel.

[0127] Furthermore, when the transistor T is turned off, the path between the initialization signal receiving end and the data wiring 31 is disconnected. At this time, the data wiring 31 can be connected to the display data signal to drive each pixel to display, thereby realizing display control of the display panel.

[0128] Optionally, the first end of each transistor T is also used to access a test signal via an initialization signal receiving end. The test signal may be transmitted by a driver chip or an external signal generator. It is understood that when the test signal is accessed, the control end of each transistor T also synchronously receives a control signal transmitted by the driver chip or an external signal generator.

[0129] When the control signal controls the transistor T to be turned on, the path between the initialization signal receiving end and the data wiring 31 is turned on, and the test signal can be transmitted to the corresponding data wiring 31. When the control signal controls the transistor T to be turned off, the path between the initialization signal receiving end and the data wiring 31 is disconnected, and the test signal cannot be transmitted to the corresponding data wiring 31, thereby realizing the test control of the display panel.

[0130] Optionally, the control signal receiving end is electrically connected to the first test pad 61. By allowing the control signal receiving end to receive the control signal via the first test pad 61, the flexibility of the control signal receiving end in receiving the control signal can be improved (it can receive both the control signal transmitted by the driver chip and the control signal transmitted by the external signal generator).

[0131] Optionally, the initialization signal receiving end is electrically connected to the second test pad 62. By allowing the initialization signal receiving end to receive a test signal or an initialization signal via the second test pad 62, the flexibility of the initialization signal receiving end in receiving a signal can be improved. Thus, the shorting bar circuit 60 can meet both test requirements and display requirements.

[0132] In one embodiment, one display cycle of the display panel includes a vertical effective display period and a vertical blank display period.

[0133] In the vertical active period, the pixel circuit of the display panel receives the display data signal, and the pixel circuit drives the corresponding pixel to display the image according to the received display data signal. In the related art, in the vertical blanking period, the pixel circuit of the display panel does not receive any signal, and the displayed image is not refreshed.

[0134] In the vertical effective display period, the shorting bar circuit 60 receives the first control signal and disconnects the initialization signal receiving end from the data wiring 31 on the first side under the action of the first control signal; the data wiring 31 on the second side is used to receive the display data signal.

[0135] Specifically, the driving chip 70 is used to provide display data signals to multiple first binding pads 65 and provide a first control signal to the third test pad 63 during the vertical effective display period to control the shorting bar circuit 60 to disconnect the path between the data trace 31 on the first side and the second test pad 62.

[0136] Among them, after the short-circuit bar circuit 60 receives the first control signal through the first test pad 61, under the action of the first control signal, it will disconnect the path between the data wiring 31 on the first side and the initialization signal receiving end, for example, control all transistors T to be disconnected. The driver chip 70 provides display data signals to multiple first binding pads 65 respectively, so that the display data signal is transmitted to the data wiring 31 on the first side through each data wiring 31 on the second side → the second conductive electrode plate 22 → the first conductive electrode plate 21 →, and drives the corresponding pixels on the first side to display the image. The display data signals provided by the driver chip 70 to different first binding pads 65 can be different, so that different pixels on the first side have different image voltages to realize the display of the image.

[0137] Exemplarily, the above signal transmission conversion relationship is expressed by the following formula:

[0138]

[0139] Wherein, ΔV is the voltage change of the data line 31 on the first side, ΔVdata is the voltage change of the display data signal output by the driving chip 70, C1 is the capacitance value of the capacitor component 20, and Cp is the parasitic capacitance of the data line 31 on the first side.

[0140] In the vertical blank display period, the shorting bar circuit 60 receives the second control signal and the first initialization signal, and under the action of the second control signal, conducts the connection between the initialization signal receiving end and the data wiring 31 on the first side, so as to transmit the first initialization signal to the plurality of data wirings 31 on the first side through the initialization signal receiving end. The data wirings 31 on the second side are used to receive the second initialization signal.

[0141] Optionally, the first initialization signal and the second initialization signal may be the same signal.

[0142] The driving chip 70 is used to provide the second initialization signal to the plurality of first binding pads 65, the second control signal to the third test pad 63, and the first initialization signal to the fourth test pad 64 during the vertical blank display period. The second control signal is used to control the shorting bar circuit 60 to conduct the path between the data wiring 31 on the first side and the initialization signal receiving end, so as to transmit the first initialization signal to the plurality of data wirings 31 on the first side.

[0143] The driver chip 70 provides the second initialization signal to the plurality of first binding pads 65 in the vertical blank display period, so that the potential on the second conductive electrode plate 22 connected to the plurality of first binding pads 65 is the potential corresponding to the second initialization signal. The driver chip 70 provides the second control signal to the third test pad 63 and the first initialization signal to the fourth test pad 64, so as to control the short-circuit bar circuit 60 to conduct the path between the data wiring 31 on the first side and the second test pad 62 (for example, to control all transistors T in the short-circuit bar circuit 60 to conduct), and transmit the first initialization signal to the plurality of data wirings 31 on the first side, so that the potential on the plurality of data wirings 31 on the first side is the potential corresponding to the first initialization signal, and further the potential on the plurality of first conductive electrode plates 21 on the first side connected to the plurality of data wirings 31 is the potential corresponding to the first initialization signal. That is to say, in the vertical blank display period, when the first initialization signal is the same as the second initialization signal, the potentials on the first conductive electrode plate 21 and the second conductive electrode plate 22 corresponding to the data wiring 31 are the same, the voltage difference between the first conductive electrode plate 21 and the second conductive electrode plate 22 of the capacitor component 20 is zero, and the initialization of the capacitor component 20 is completed.

[0144] In this embodiment, in the vertical effective display period, the short-circuit bar circuit 60 disconnects the path between the data trace 31 on the first side and the second test pad 62, and each data trace 31 on the first side receives the display data signal through the capacitor component 20, and the normal display screen. In the vertical blank display period, the short-circuit bar circuit 60 conducts the path between the data trace 31 on the first side and the second test pad 62, and transmits the same initialization signal to the first conductive electrode plate 21 and the second conductive electrode plate 22, respectively, so as to realize the initialization of the capacitor component 20. Since the capacitor component 20 will be initialized in each display cycle, it is ensured that the potential stored in the capacitor component 20 in each display cycle will not be affected by the potential of the previous display cycle, and the accuracy of the potential stored in the capacitor component 20 in each display cycle is ensured, thereby improving the accuracy of the display panel luminescence.

[0145] In one embodiment, as shown in FIG. 11 , the display panel further includes a plurality of second binding pads 66 , and the plurality of second binding pads 66 are disposed on the second side surface.

[0146] At least one second trace 50 on the first side is electrically connected to at least one second binding pad 66 through a via 40 .

[0147] A hole is drilled on the substrate 10 to connect the first side and the second side, and the second trace 50 on the first side is directly electrically connected to the second binding pad 66 on the second side through the via 40. It can be understood that the via 40 can be directly connected to the second binding pad 66 on the second side, or can be connected to the second binding pad 66 through the second trace 50 on the second side.

[0148] The second binding pad 66 is used to access the second signal, so that the second signal accessed on the second side surface can be transmitted to the second trace 50 on the first side surface.

[0149] Optionally, referring to FIG. 11 , the display panel further includes a flexible circuit board 80, which is electrically connected to the plurality of second binding pads 66. The flexible circuit board 80 is used to provide power signals to the plurality of second binding pads 66, respectively, so as to transmit the power signals to the second traces 50. The flexible circuit board 80 is bound and connected to the plurality of second binding pads 66. This close connection helps to reduce the loss of the second signal during the transmission process and improve the efficiency and stability of signal transmission.

[0150] Optionally, a plurality of third binding pads 67 are disposed on the first side surface, and at least one second trace 50 on the first side surface is electrically connected to at least one third binding pad 67 .

[0151] The second wiring 50 is connected to the third binding pad 67 in a one-to-one correspondence, and the third binding pad 67 is used to access the second signal. For example, in the test phase, the external circuit can transmit a power signal to the second wiring 50 on the first side through the third binding pad 67, so as to supply power to the screen side through the second wiring 50, such as supplying power to each pixel, for easy testing.

[0152] Optionally, at least one second trace 50 on the first side surface is electrically connected to at least one second binding pad 66 through a third binding pad 67 and a via 40 .

[0153] Among them, one second trace 50 is electrically connected to one second binding pad 66 through a corresponding third binding pad 67 and a via 40. Therefore, the power signal output by the flexible circuit board 80 received by the second pad 66 can be transmitted to the second trace 50 through the via 40 and the third binding pad 67, so as to realize the input of the power signal to the second trace 50, thereby improving the flexibility of the second trace 50 on the first side to receive the second signal.

[0154] For example, as shown in FIG12 , which is a side view of the display panel, the driver chip 70 and the flexible circuit board 80 are bound to the second side of the substrate 10, the driver chip 70 is connected to the second conductive electrode plate 22 through the first wiring 30, the first conductive electrode plate 21 and the second conductive electrode plate 22 relatively constitute the capacitor assembly 20, a metal film layer is made on the first side as the first wiring 30, and the flexible circuit board 80 supplies power to the driver chip 70 through the power line 51. That is, array film layers are made on the first side and the second side of the substrate 10, both of which contain metal wiring, and the signal wiring and the first conductive electrode plate 21 are made on the first side of the substrate 10 according to the conventional array process, and the metal film layer and the second conductive electrode plate 22 are made on the second side of the substrate 10.

[0155] Exemplarily, as shown in FIG. 13 , it can be seen that in the non-display area of ​​the display panel, a plurality of capacitor components 20 and a plurality of vias 40 are provided, the capacitor components 20 are used to connect the first trace 30 of the first side and the second side of the substrate 10, and the vias 40 are used to connect the second trace 50 of the first side and the second side of the substrate 10.

[0156] In this embodiment, by setting up a flexible circuit board 80, it can be bound and connected to the display panel to realize the modularization of the display panel. The flexible circuit board 80 is used to provide power signals to multiple second binding pads 66 respectively to transmit the power signals to the second wiring 50 to provide power signals for the display panel.

[0157] In one embodiment, as shown in FIG. 14 , there are multiple capacitor assemblies 20 , and the first conductive electrode plates 21 of the multiple capacitor assemblies 20 are arranged sequentially along the first direction, and the second conductive electrode plates 22 of the multiple capacitor assemblies 20 are arranged sequentially along the first direction.

[0158] The first direction is perpendicular to the thickness direction of the substrate 10 , and the orthographic projections of the first conductive electrode plates 21 and the second conductive electrode plates 22 of different capacitor components 20 toward the substrate 10 do not overlap, thereby avoiding mutual interference between different capacitor components 20 .

[0159] Preferably, the first conductive electrode plates 21 and the second conductive electrode plates 22 of different capacitor components 20 overlap in their orthographic projections toward the substrate 10, so that the first conductive electrode plates 21 and the second conductive electrode plates 22 of each group of capacitor components 20 have a maximum relative area, which is beneficial to improving the transmission capacity of the first signal.

[0160] The shapes, sizes, and patterns of the first conductive electrode plate 21 and the second conductive electrode plate 22 can be determined according to actual needs by circuit simulation, as long as they can meet the required current requirements.

[0161] Optionally, as shown in FIG. 15 , the first conductive electrode plates 21 and the second conductive electrode plates 22 of the plurality of capacitor assemblies 20 are further arranged in at least two rows along the second direction.

[0162] Preferably, the first wirings 30 electrically connected to the first conductive electrode plates 21 are parallel and their orthographic projections toward the substrate 10 do not overlap, and the first wirings 30 electrically connected to the second conductive electrode plates 22 are parallel and their orthographic projections toward the substrate 10 do not overlap, thereby reducing mutual interference between the first wirings 30.

[0163] The second direction is perpendicular to the first direction and the thickness direction of the substrate 10 .

[0164] The first conductive electrode plates 21 and the second conductive electrode plates 22 of the plurality of capacitor components 20 are arranged in at least two rows along the second direction, and the first conductive electrode plates 21 and the second conductive electrode plates 22 are arranged alternately, which can save space.

[0165] Optionally, a notch is provided on the opposite side surfaces of each two adjacent first conductive electrode plates 21 along the second direction, so as to increase the spacing distance between adjacent first conductive electrode plates 21 and avoid mutual interference.

[0166] Optionally, notches are provided on the opposite sides of each two adjacent second conductive electrode plates 22 along the second direction, so as to increase the spacing between adjacent second conductive electrode plates 22 and avoid mutual interference.

[0167] Optionally, as shown in FIG. 16 , a plurality of via holes 40 are also arranged in sequence along the first direction, and arranged in two rows along the second direction to save space.

[0168] In this embodiment, by designing the arrangement of the capacitor components 20 and the vias 40 , it is possible to save space, ensure that the capacitor components 20 do not interfere with each other, and improve the accuracy of signal transmission.

[0169] Based on the same inventive concept, an embodiment of the present invention further provides a display device. Figure 17 is a schematic structural diagram of a display device provided by an embodiment of the present invention. As shown in Figure 17, the display device 200 includes any display panel 100 provided in the above embodiments.

[0170] Since the display device includes the display panel provided by the embodiment of the present invention, the display device also has the beneficial effects of the display panel in the above embodiment, and the similarities can be understood by referring to the above explanation of the display panel, which will not be repeated below.

[0171] The display device provided in the embodiment of the present invention can be a mobile phone or any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, car displays, industrial control equipment, medical display screens, touch interactive terminals, etc. The embodiment of the present invention does not make any special limitations on this.

[0172] In the description of this specification, the description with reference to the terms "some embodiments", "other embodiments", "ideal embodiments", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0173] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0174] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A display panel, characterized in that: include: A substrate, the substrate comprising a first side surface and a second side surface which are opposite to each other in a thickness direction; At least one capacitor assembly, the capacitor assembly comprising a first conductive electrode plate and a second conductive electrode plate; wherein, The first conductive electrode plates are disposed on the first side surface, and each of the first conductive electrode plates is used to be electrically connected to a first wiring on the first side surface, and the first wiring is used to transmit a first signal; the first signal is a voltage signal; The second conductive electrode plates are arranged on the second side surface, and each of the second conductive electrode plates corresponds to one of the first conductive electrode plates, wherein each of the second conductive electrode plates is used to be electrically connected to a first trace on the second side surface; The orthographic projections of the first conductive electrode plate and the second conductive electrode plate in the same capacitor assembly toward the substrate at least partially overlap.

2. The display panel according to claim 1, characterized in that: The orthographic projections of the corresponding first conductive electrode plate and the second conductive electrode plate on the substrate overlap.

3. The display panel according to claim 1, characterized in that: At least a portion of the plurality of first routing lines are data routing lines, and the data routing lines are used to transmit data signals; The display panel comprises a plurality of capacitor components, wherein the first conductive electrode plate and the second conductive electrode plate in at least some of the capacitor components are respectively used to be electrically connected to the data traces on the corresponding side surfaces; Optionally, the first routing lines are all data routing lines; Optionally, the first wiring further includes a gate drive signal line.

4. The display panel according to any one of claims 1 to 3, characterized in that: The display panel further includes: at least one via hole, wherein the via hole is electrically connected to a second wiring on the first side surface and a second wiring on the second side surface respectively; the second wiring is used to transmit a second signal; Optionally, the second signal is a current signal or a voltage signal; Optionally, the plurality of via holes are arranged in sequence along the first direction, and are arranged in two rows along the second direction; wherein the second direction is perpendicular to both the first direction and the thickness direction of the substrate.

5. The display panel according to claim 4, characterized in that: At least a portion of the plurality of first wirings are data wirings, and the display panel further comprises a shorting bar circuit disposed on the first side surface, and the shorting bar circuit is electrically connected to the data wirings on the first side surface; The shorting bar circuit is used to access the control signal and the initialization signal, and is used to open or close the path between the initialization signal and the data line under the action of the control signal; Optionally, a first test pad and a second test pad are further provided on the first side, and the first test pad and the second test pad are both electrically connected to the shorting bar circuit; the shorting bar circuit is used to access a control signal through the first test pad and access an initialization signal through the second test pad; Optionally, the control signal and the initialization signal are control signals and initialization signals transmitted by a driving chip; Optionally, the driving chip is arranged on the second side surface; Optionally, a plurality of first binding pads are further provided on the second side surface, and each of the first binding pads is used to be electrically connected to a corresponding data trace on the second side surface; Optionally, a third test pad and a fourth test pad are further provided on the second side surface; the third test pad is used to receive a control signal transmitted by the driver chip, and the fourth test pad is used to receive an initialization signal transmitted by the driver chip; The display panel further includes two or more via holes; the first test pad is electrically connected to the third test pad via the via holes; the second test pad is electrically connected to the fourth test pad via the via holes; Optionally, the first side surface is a light emitting surface, and the second side surface is a backlight surface; Optionally, the shorting bar circuit is further used to access a test signal, and under the action of the control signal, to open or close a path between the test signal and the data wiring; Optionally, the control signal and the test signal are control signals and test signals transmitted by an external signal generator; Optionally, the shorting bar circuit is also used to access a test signal via the second test pad.

6. The display panel according to claim 5, characterized in that: The shorting bar circuit comprises a control signal receiving end for receiving the control signal and an initialization signal receiving end for receiving the initialization signal; The shorting bar circuit comprises a plurality of transistors, wherein the first end of each of the transistors is electrically connected to the initialization signal receiving end, the second end of each of the transistors is electrically connected to a corresponding data line, and the control end of each of the transistors is electrically connected to the control signal receiving end; the first end of each of the transistors is used to receive an initialization signal via the initialization signal receiving end, and the control end of each of the transistors is used to receive a control signal via the control signal receiving end, wherein the control signal is used to control the conduction state of the plurality of transistors; Optionally, the first end of each transistor is further used to access a test signal via an initialization signal receiving end; Optionally, the control signal receiving end is electrically connected to the first test pad; Optionally, the initialization signal receiving end is electrically connected to the second test pad.

7. The display panel according to claim 6, characterized in that: A display cycle of the display panel includes a vertical effective display period and a vertical blank display period; In the vertical effective display period, the shorting bar circuit receives a first control signal, and under the action of the first control signal, disconnects the initialization signal receiving end from the data wiring on the first side; the data wiring on the second side is used to receive a display data signal; In the vertical blank display period, the shorting bar circuit receives a second control signal and a first initialization signal. Under the action of the second control signal, the connection between the initialization signal receiving end and the data wiring on the first side is turned on, so as to transmit the first initialization signal to the plurality of data wirings on the first side through the initialization signal receiving end; the data wirings on the second side are used to receive the second initialization signal; Optionally, the first initialization signal is the same as the second initialization signal.

8. The display panel according to claim 4, characterized in that: The display panel further includes a plurality of second binding pads, and the plurality of second binding pads are arranged on the second side surface; At least one of the second traces on the first side is electrically connected to at least one of the second binding pads through a via; Optionally, the display panel further includes a flexible circuit board, the flexible circuit board is electrically connected to the plurality of second binding pads, and the flexible circuit board is used to provide a second signal to the plurality of second binding pads respectively, so as to transmit the second signal to the second trace; Optionally, a plurality of third binding pads are provided on the first side surface, and at least one of the second traces on the first side surface is electrically connected to at least one of the third binding pads; Optionally, at least one of the second traces on the first side is electrically connected to at least one of the second binding pads through the third binding pad and the via hole.

9. The display panel according to claim 1, characterized in that: There are multiple capacitor components, and the first conductive electrode plates of the multiple capacitor components are arranged in sequence along a first direction, and the second conductive electrode plates of the multiple capacitor components are arranged in sequence along the first direction, wherein the first direction is perpendicular to the thickness direction of the substrate, and the orthographic projections of the first conductive electrode plates and the second conductive electrode plates of different capacitor components facing the substrate do not overlap each other; Optionally, the first conductive electrode plates and the second conductive electrode plates of the plurality of capacitor components are further arranged in at least two rows along a second direction; wherein the second direction is perpendicular to both the first direction and the thickness direction of the substrate; Optionally, the first wirings electrically connected to the first conductive electrode plates are parallel and their orthographic projections toward the substrate do not overlap, and the first wirings electrically connected to the second conductive electrode plates are parallel and their orthographic projections toward the substrate do not overlap; Optionally, a notch is provided on the opposite side surfaces of each two adjacent first conductive electrode plates along the second direction; Optionally, a notch is formed on the opposite sides of each two adjacent second conductive electrode plates along the second direction.

10. A display device, characterized in that: Comprising the display panel as described in any one of claims 1-9.

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