Memory access method and device, storage medium and electronic device

Abstract

The invention discloses a memory access method and device, a storage medium and an electronic device, a storage system comprises a controller and a memory, space allocation information of the memory is maintained in the controller, and the method comprises the following steps: writing data into the memory in a process of executing a target write request; a current to-be-executed target read request of the storage system is detected, and the target read request is used for requesting to read target data from a memory; converting a target storage position of the target data in a memory according to the space distribution information; matching the target storage position with a reference storage position corresponding to the target write request to obtain a matching result; and under the condition that the matching result is used for indicating that the target storage position and the reference storage position do not belong to the same storage position, the target data is read from the memory in response to the target read request, and by adopting the technical scheme, the problems of poor predictability of time delay of access to the memory and the like in related technologies are solved.

Description

Technical Field

[0001] The present application relates to the field of storage, and in particular to a method and device for accessing a memory, a storage medium, and an electronic device. Background Art

[0002] Deterministic latency means that in a communication system, the time required for a data packet to be transmitted from one node to another can be accurately predicted and guaranteed. The realization of deterministic latency characteristics is crucial for systems that require high reliability and real-time performance. However, currently, only read or write operations can be performed on the memory at the same time. The read and write operations are interrelated and affect each other, so deterministic latency cannot be achieved.

[0003] With respect to the problems in the related art such as poor predictability of latency in accessing memory, no effective solution has been proposed. Summary of the invention

[0004] Embodiments of the present application provide a method and device for accessing a memory, a storage medium, and an electronic device, so as to at least solve the problem of poor predictability of latency in accessing the memory in the related art.

[0005] According to an embodiment of the present application, a method for accessing a memory is provided. The storage system includes a controller and a memory. The controller maintains space allocation information of the memory. The space allocation information is used to indicate the data storage status of the storage location included in the memory. The method is applied to the controller. The method includes:

[0006] In the process of executing a target write request to write data into the memory, detecting a target read request currently to be executed by the storage system, wherein the target read request is used to request to read target data from the memory;

[0007] Converting a target storage location of the target data in the memory according to the space allocation information;

[0008] Matching the target storage location with a reference storage location corresponding to the target write request to obtain a matching result;

[0009] In case the matching result is used to indicate that the target storage location and the reference storage location do not belong to the same storage location, the target data is read from the memory in response to the target read request.

[0010] Optionally, matching the target storage location with a reference storage location corresponding to the target write request includes:

[0011] Detecting a target sub-region corresponding to the target storage position and a reference sub-region corresponding to the reference storage position, wherein the storage region in the memory is divided into a plurality of sub-regions, and the data stored in the plurality of sub-regions are different;

[0012] In the case where it is detected that the target sub-region and the reference sub-region are the same sub-region in the memory, the matching result is determined to indicate that the target storage location and the reference storage location do not belong to the same storage location.

[0013] Optionally, a plurality of read channels are configured in the controller, and the read channels are used to read data from the memory in response to a received read request.

[0014] The detecting the target read request currently to be executed by the storage system includes:

[0015] sorting the read requests in each of the read channels according to the channel status of the multiple read channels to obtain a read queue, wherein the channel status is used to indicate the status of the read requests received in the read channel;

[0016] According to the priority relationship in the sorting, target read requests with a priority higher than or equal to the target priority are screened out from the read queue.

[0017] Optionally, the sorting the read requests in each of the read channels according to the channel status of the multiple read channels includes:

[0018] generating channel priorities of the plurality of read channels according to channel states of the plurality of read channels;

[0019] The read requests in each of the read channels are sorted according to the channel priorities of the multiple read channels and the receiving time of the read requests received in each of the read channels to obtain the read queue.

[0020] Optionally, generating channel priorities of the multiple read channels according to the channel states of the multiple read channels includes:

[0021] Detecting first information of reference data in each of the read channels, wherein the reference data is data to be sent to a reference device after being read from the memory by the read channel in response to a received read request, the reference device being a device that initiates the read request to the read channel, and the first information is used to indicate the data amount of the reference data corresponding to the first information;

[0022] In a case where it is detected that the first information is used to indicate that the data amount of the reference data corresponding to the first information is less than a data amount threshold, determining the channel priority of the read channel corresponding to the first information as a first priority with the highest priority level among the channel priorities;

[0023] In the case where it is detected that the first information is used to indicate that the data amount of the reference data corresponding to the first information is greater than or equal to the data amount threshold, the channel priority is generated according to the second information of the reference request in each of the read channels, wherein the reference request is a read request received by the read channel but not yet responded to, and the second information is used to indicate the number of the reference requests corresponding to the second information.

[0024] Optionally, generating the channel priority according to the second information of the reference request in each of the read channels includes:

[0025] In a case where the second information is used to indicate that the number of reference requests corresponding to the second information is greater than or equal to a number threshold, determining the channel priority of the read channel corresponding to the second information as a second priority, wherein the priority level of the second priority is lower than that of the first priority;

[0026] In the case where the second information is used to indicate that the number of reference requests corresponding to the second information is less than the number threshold, the third priorities of each read channel are determined according to the order of the time when each read channel last responded to the read request before the current moment, wherein the third priority corresponding to the read channel that last responded to the read request earlier before the current moment has a higher priority level, and the priority level of the third priority is lower than the second priority level.

[0027] Optionally, converting a target storage location of the target data in the memory according to the space allocation information includes:

[0028] querying a data storage location corresponding to the target data from a space allocation table, wherein the space allocation table records a correspondence between data stored in the memory and a storage location in the memory, and the space allocation information includes the space allocation table;

[0029] The data storage location is determined as the target storage location.

[0030] According to another embodiment of the embodiment of the present application, a memory access device is further provided. The storage system includes a controller and a memory. The controller maintains space allocation information of the memory. The space allocation information is used to indicate the data storage status of the storage location included in the memory. The device is applied to the controller. The device includes:

[0031] a detection module, configured to detect a target read request currently to be executed by the storage system during a process of executing a target write request to write data into the storage, wherein the target read request is used to request to read target data from the storage;

[0032] A conversion module, used for converting a target storage location of the target data in the memory according to the space allocation information;

[0033] A matching module, used for matching the target storage location with a reference storage location corresponding to the target write request to obtain a matching result;

[0034] A reading module is used to read the target data from the memory in response to the target read request when the matching result indicates that the target storage location and the reference storage location do not belong to the same storage location.

[0035] According to another aspect of the embodiments of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the above-mentioned memory access method when running.

[0036] According to another aspect of an embodiment of the present application, an electronic device is provided, including a storage device, a processor, and a computer program stored on the storage device and executable on the processor, wherein the processor executes the memory access method through the computer program.

[0037] In an embodiment of the present application, space allocation information of the control system's memory is maintained in the controller of the storage system. When executing a target write request to write data to the memory, the controller detects a target read request currently to be executed by the storage system for requesting to read the target data from the memory, converts the target storage position of the target data in the memory according to the data storage situation of the storage location included in the memory indicated by the space allocation information, matches the target storage position with the reference storage position corresponding to the target write request, and reads the target data from the memory in response to the target read request when the matching result indicates that the target storage position and the reference storage position do not belong to the same storage position, that is, in the process of writing data to the memory, by judging the target storage position of the target data requested to be read by the current read request to be executed, when the target storage position and the reference storage position where the data write operation is being performed are not a storage position, there is no mutual influence relationship between the read request to be executed and the write request being executed, so the target read request can be executed while the data write operation is being performed, thereby reducing the possibility of a situation where the execution of the read request due to the execution of the data write operation needs to wait, and further reducing the uncertain read and write time consumption caused by waiting. By adopting the above technical solution, the problem of poor predictability of the latency of accessing the memory in the related art is solved, and the technical effect of improving the predictability of the latency of accessing the memory is achieved. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0039] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0040] Figure 1 is a hardware environment diagram of a memory access method according to an embodiment of the present application;

[0041] Figure 2 is a flowchart of a method for accessing a memory according to an embodiment of the present application;

[0042] Figure 3 is a memory access control structure framework diagram according to an embodiment of the present application;

[0043] Figure 4 is a schematic diagram of a method for executing read and write operations according to an embodiment of the present application Figure 1 ;

[0044] Figure 5 is a schematic diagram of a method for executing read and write operations according to an embodiment of the present application Figure 2 ;

[0045] Figure 6 A memory access method according to an embodiment of the present application is shown in FIG. Figure 1 ;

[0046] Figure 7 A memory access method according to an embodiment of the present application is shown in FIG. Figure 2 ;

[0047] Figure 8 A memory access method according to an embodiment of the present application is shown in FIG. Figure 3 ;

[0048] Fig. 9 It is a structural block diagram of a memory access device according to an embodiment of the present application. DETAILED DESCRIPTION

[0049] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.

[0050] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0051] The method embodiments provided in the embodiments of the present application can be executed in a computer terminal, a device terminal or a similar computing device. Taking running on a computer terminal as an example, Figure 1 Schematic diagram of a hardware environment of a memory access method according to an embodiment of the present application. Figure 1 As shown, the computer terminal may include one or more ( Figure 1Only one is shown in the figure) processor 102 (processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a storage device 104 for storing data. In an exemplary embodiment, the computer terminal may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above-mentioned computer terminal. Figure 1 More or fewer components as shown, or with Figure 1 Equivalent functions or comparisons shown Figure 1 A different configuration with more features is shown.

[0052] The storage device 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the method for sending message push in the embodiment of the present invention. The processor 102 executes various functional applications and data processing by running the computer program stored in the storage device 104, that is, to implement the above method. The storage device 104 may include a high-speed random access memory device, and may also include a non-volatile storage device, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state storage devices. In some instances, the storage device 104 may further include a storage device remotely arranged relative to the processor 102, and these remote storage devices may be connected to the computer terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0053] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of a computer terminal. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0054] In this embodiment, a memory access method is provided, which is applied to the above-mentioned computer terminal. Figure 2 1 is a flow chart of a method for accessing a memory according to an embodiment of the present application, the flow comprising the following steps:

[0055] Step S202, in the process of executing a target write request to write data into the memory, detecting a target read request currently to be executed by the storage system, wherein the target read request is used to request to read target data from the memory;

[0056] Step S204, converting the target storage location of the target data in the memory according to the space allocation information;

[0057] Step S206, matching the target storage location with the reference storage location corresponding to the target write request to obtain a matching result;

[0058] Step S208 : when the matching result indicates that the target storage location and the reference storage location do not belong to the same storage location, read the target data from the memory in response to the target read request.

[0059] Through the above steps, the space allocation information of the control system's memory is maintained in the controller of the storage system. When executing a target write request to write data into the memory, the controller detects the target read request currently to be executed by the storage system for requesting to read the target data from the memory, converts the target storage position of the target data in the memory according to the data storage situation of the storage position included in the memory indicated by the space allocation information, matches the target storage position with the reference storage position corresponding to the target write request, and reads the target data from the memory in response to the target read request when the matching result indicates that the target storage position and the reference storage position do not belong to the same storage position, that is, in the process of writing data into the memory, by judging the target storage position of the target data requested to be read by the current read request to be executed, when the target storage position and the reference storage position where the data write operation is being performed are not a storage position, there is no mutual influence relationship between the read request to be executed and the write request being executed, so the target read request can be executed while executing the data write operation, thereby reducing the possibility of waiting for the execution of the read request due to the execution of the data write operation, and further reducing the uncertain reading and writing time consumption caused by waiting. By adopting the above technical solution, the problem of poor predictability of the latency of accessing the memory in the related art is solved, and the technical effect of improving the predictability of the latency of accessing the memory is achieved.

[0060] Optionally, in an embodiment of the present application, the memory may be, but is not limited to, a storage device for storing data, such as DDR.

[0061] Optionally, in an embodiment of the present application, the controller may be, but is not limited to, a device for controlling a storage mechanism of a memory, such as an FPGA provided with a storage control mechanism.

[0062] Optionally, in an embodiment of the present application, the space allocation information maintained in the controller is used to indicate the data storage status of the storage locations included in the memory, including but not limited to a mapping table between the data stored in the memory and the storage locations in the memory.

[0063] Optionally, in the embodiments of the present application, Figure 3 is a memory access control structure framework diagram according to an embodiment of the present application, such as Figure 3 As shown in the figure, the storage system includes a controller and a memory. The controller can be an FPGA chip, and the memory can be DDR3 or DDR4. Using the FPGA chip as the main control chip of DDR, the programmable capability of FPGA can be used to achieve special customization of the DDR access scheme, which can maximize the dual advantages of FPGA and DDR, use the storage space more efficiently and flexibly, and accelerate the empowerment of various application scenarios.

[0064] In the technical solution provided in the above step S202, the target read request to be executed currently may be a read request obtained in the process of executing the target write request, or may be a read request whose acquisition time is consistent with the acquisition time of the target write request. In the case where a write request and a read request are obtained at the same time, the write request is directly executed first, and in the process of executing the write request, it is determined whether the read request obtained at the same time as the write request can be executed at the same time in the process of executing the write request.

[0065] Optionally, in this embodiment, detecting the target read request currently to be executed by the storage system includes but is not limited to detecting the target read request currently to be executed according to acquisition time of each read request when there are multiple read requests to be executed in the storage system.

[0066] In the technical solution provided in the above step S204, a data characteristic value calculation algorithm may be set in the controller, but is not limited to, and the space allocation information includes but is not limited to recording the correspondence between the characteristic value of the data and the storage location of the memory. Converting the target storage location of the target data in the memory according to the space allocation information includes but is not limited to calculating the target data characteristic value of the target data, and searching the target storage location corresponding to the target data characteristic value from the space allocation information according to the target data characteristic value.

[0067] In the technical solution provided in the above step S206, matching the target storage location with the reference storage location includes but is not limited to detecting whether the target storage location and the reference storage location overlap in the memory. If overlap occurs, a matching result is obtained indicating that the target storage location and the reference storage location belong to the same storage location. If no overlap occurs, a matching result is obtained indicating that the target storage location and the reference storage location do not belong to the same storage location.

[0068] In the technical solution provided in the above step S208, when the target storage location and the reference storage location do not belong to the same storage location, it indicates that the target write request being executed does not affect the execution of the target read request, so the target data can be read from the memory in response to the target read request at the current moment.

[0069] In an exemplary embodiment, a target storage location is matched with a reference storage location corresponding to a target write request, including: detecting a target sub-region corresponding to the target storage location and a reference sub-region corresponding to the reference storage location, wherein the storage area in the memory is divided into multiple sub-regions, and the data stored in the multiple sub-regions are different; in the case where it is detected that the target sub-region and the reference sub-region are the same sub-region in the memory, determining a matching result to indicate that the target storage location and the reference storage location do not belong to the same storage location.

[0070] Optionally, in an embodiment of the present application, including but not limited to dividing the storage area in the memory into multiple sub-areas, different data that are easy to perform read and write operations simultaneously are stored in different sub-areas, so that when there is a need to perform read operations and write operations on different data simultaneously, the read operation can be performed while performing the write operation, thereby improving the execution efficiency of the read and write operations.

[0071] Optionally, in the embodiments of the present application, Figure 4 is a schematic diagram of a method for executing read and write operations according to an embodiment of the present application Figure 1 , Figure 5 is a schematic diagram of a method for executing read and write operations according to an embodiment of the present application Figure 2 .like Figure 4 and Figure 5 As shown, the storage area in the memory (ie, DDR3 / DDR4) is divided into area A and area B. When writing data to area A, other data can be read from area B, and when writing data to area B, other data can be read from area A.

[0072] In an exemplary embodiment, a plurality of read channels are configured in a controller, and the read channels are used to read data from a memory in response to a received read request, and detect a target read request currently to be executed by the storage system, including: sorting the read requests in each read channel according to the channel status of the plurality of read channels to obtain a read queue, wherein the channel status is used to indicate the status of the read request received in the read channel; and filtering out a target read request having a priority higher than or equal to the target priority from the read queue according to a priority relationship in the sorting.

[0073] Optionally, in an embodiment of the present application, multiple read requests may be received through multiple read channels, but are not limited to, and data read by the multiple read requests may be returned to the device initiating the read request through the multiple read channels.

[0074] Optionally, in an embodiment of the present application, the target read requests with a priority higher than or equal to the target priority are screened out from the read queue according to the priority relationship in the sorting, including but not limited to predicting the number of read requests that can be executed within the time range of executing the target write request according to the target time required for the target write request to be executed, and setting the target priority according to the number of requests. For example, when the number of requests is predicted to be 3, the target priority is determined as the priority of the read request with the third priority when the read queue is sorted from large to small by priority. Then, three target read requests can be obtained when screening the target read requests, and as many executable read requests as possible are executed during the execution of the write request, thereby improving the access efficiency of the memory.

[0075] In an exemplary embodiment, read requests in each read channel are sorted according to the channel status of the multiple read channels, including: generating channel priorities of the multiple read channels according to the channel status of the multiple read channels; sorting the read requests in each read channel according to the channel priorities of the multiple read channels and the receiving time of the read requests received in each read channel to obtain a read queue.

[0076] Optionally, in an embodiment of the present application, read requests in each read channel are sorted according to the channel priorities of multiple read channels and the receiving time of the read requests received in each read channel, including: calculating the sorting score of the read requests in each read channel according to the channel priority and the first weight as well as the receiving time and the second weight, wherein the first weight is used to indicate the degree of influence of the channel priority on the processing order of the read requests, and the second weight is used to indicate the degree of influence of the receiving time on the processing order of the read requests; sorting the read requests according to the size of the sorting score to obtain a read queue.

[0077] In an exemplary embodiment, channel priorities of multiple read channels are generated according to channel states of multiple read channels, including: detecting first information of reference data in each read channel, wherein the reference data is data to be sent to a reference device after the read channel reads out from a memory in response to a received read request, the reference device is a device that initiates a read request to the read channel, and the first information is used to indicate the data volume of the reference data corresponding to the first information; when it is detected that the first information is used to indicate that the data volume of the reference data corresponding to the first information is less than a data volume threshold, determining the channel priority of the read channel corresponding to the first information as the first priority with the highest priority level among the channel priorities; when it is detected that the first information is used to indicate that the data volume of the reference data corresponding to the first information is greater than or equal to the data volume threshold, generating channel priorities according to second information of reference requests in each read channel, wherein the reference request is a read request received by the read channel but not yet responded to, and the second information is used to indicate the number of reference requests corresponding to the second information.

[0078] Optionally, in an embodiment of the present application, the first information is used to indicate the amount of reference data to be sent to the reference device that initiated the read request to the read channel after the read channel reads out from the memory in response to the received read request. By comparing the amount of reference data with the data amount threshold, when the amount of reference data is less than the data amount threshold, it means that the data to be sent to the reference device in the read channel corresponding to the reference data is almost finished, and the need for the read channel to read data from the memory in response to the read request is more urgent, so the read channel needs to be assigned the highest priority level.

[0079] In an exemplary embodiment, channel priority is generated based on second information of reference requests in each read channel, including: when the second information is used to indicate that the number of reference requests corresponding to the second information is greater than or equal to a quantity threshold, determining the channel priority of the read channel corresponding to the second information as a second priority, wherein the priority level of the second priority is lower than the first priority; when the second information is used to indicate that the number of reference requests corresponding to the second information is less than the quantity threshold, determining each third priority of each read channel according to the order of the time when each read channel last responded to the read request before the current moment, wherein the third priority corresponding to the read channel that last responded to the read request earlier before the current moment has a higher priority level, and the priority level of the third priority is lower than the second priority.

[0080] Optionally, in an embodiment of the present application, channel priorities of multiple read channels are generated according to the channel states of multiple read channels, and the process also includes: searching among the read channels for an alternative read channel having the smallest data volume of reference data indicated by the first information of each read channel; comparing the data volume of the reference data of the alternative read channel with a data volume threshold; when the data volume of the reference data of the alternative read channel is less than the data volume threshold, determining the priority of the alternative read channel as the first priority with the highest priority level among the channel priorities; when the data volume of the reference data of the alternative read channel is greater than or equal to the data volume threshold, determining each third priority level of each read channel according to the order of the time when each read channel last responded to the read request before the current moment, wherein the third priority level corresponding to the read channel that last responded to the read request earlier among the read channels before the current moment has a higher priority level, and the priority level of the third priority level is lower than the first priority level.

[0081] In an exemplary embodiment, a target storage location of target data in a memory is converted based on space allocation information, including: querying a data storage location corresponding to the target data from a space allocation table, wherein the space allocation table records the correspondence between the data stored in the memory and the storage location in the memory, and the space allocation information includes the space allocation table; and determining the data storage location as the target storage location.

[0082] In order to better understand the above process, the above process is described below in conjunction with an optional embodiment, but it is not intended to limit the technical solution of the embodiment of the present application.

[0083] In this embodiment, a method for accessing a memory is provided. Figure 6 A memory access method according to an embodiment of the present application is shown in FIG. Figure 1 ,like Figure 6 As shown in the figure, DDR3 / DDR4 refers to the DDR chip (i.e., memory), which is mounted on the FPGA / PL (PL, Programmable Logic, the programmable logic system in the SOC chip) as a peripheral; the FPGA (i.e., controller) on-chip logic includes the Memory Interface Generater (hereinafter referred to as MIG) and the ddr_control module, where MIG is the IP core provided by the FPGA and the ddr_control module is the core of the entire control solution. The ddr_control module includes the following modules: (1) write channel module:

[0084] That is, the write channel module, which includes the write_data_convert module and the write_fifo module. Its main function is to match the rate of the data to be written into the DDR in each channel and write it into the fifo for temporary storage, prepare to write the data into the DDR, and generate the corresponding write operation command; the function of the write_data_convert module is to perform rate matching, and the write_fifo module is to realize the cross-clock domain operation of writing data and the data temporary storage function.

[0085] (2) read_channel0~read_channelN modules:

[0086] That is, the read channel module, which includes the read_fifo module and the read_data_convert module. Its main function is to write the data read from the DDR of each channel into the fifo for temporary storage, perform rate matching after reading the data in the fifo, and generate corresponding read operation commands; the function of the read_fifo module is to perform cross-clock domain operations on read data and data temporary storage, and the function of the read_data_convert module is to realize the rate matching operation of read data.

[0087] (3) sort4num_min module:

[0088] That is, the module for sorting the unoperated data in the fifo sorts the unoperated data in the fifo in each read_fifo module, and outputs the number of remaining operations and the corresponding channel number in the fifo of the smallest channel with the smallest data.

[0089] (4) instr_queue module:

[0090] The command queue module includes the arbiter module and the event_cache module. Its main function is to arbitrate and cache the read operation commands of each channel, and then process them one by one in the order after arbitration. The arbiter module mainly implements the arbitration function, and the event_cache module mainly implements the cache function of the arbitration command to prevent the unprocessed commands from being ignored.

[0091] (5)rd_wr_fsm module:

[0092] That is, the read-write state machine control module performs state control in priority order according to the read-write commands generated by each module, processes them one by one, and realizes dynamic adjustment of write operations and read operations as well as read operations of each channel.

[0093] Among them, the priority sorting algorithm is:

[0094] 1. Write operation > read operation;

[0095] 2. When the minimum unoperated number output by sort4num_min is less than the threshold, only the read request in the channel corresponding to the minimum unoperated number is read;

[0096] 3. When the minimum unoperated number output by sort4num_min is not less than the threshold, read in sequence according to the natural priority of each channel. When there are four read channels in the controller, namely, read channel 1, read channel 2, read channel 3 and read channel 4, the natural priority is: read channel 1> read channel 2> read channel 3> read channel 4> read channel 1> read channel 2> read channel 3> read channel 4>...

[0097] Optionally, in the embodiments of the present application, Figure 7 A memory access method according to an embodiment of the present application is shown in FIG. Figure 2 , Figure 8 A memory access method according to an embodiment of the present application is shown in FIG. Figure 3 ,like Figure 7 and Figure 8 As shown in the figure, the key to achieving deterministic delay lies in ------ read-write separation, that is, the read and write logics are independent of each other. Taking a single-channel frame of data as an example, the read-write delay is: the delay from the frame header being written to the frame header being read out. In order to ensure the real-time and integrity of the data, the read operation often occurs after the write operation, that is, the read operation and the write operation are related, which leads to the delay between reading and writing being limited, or partially adjustable. Read-write separation refers to decoupling the read operation and the write operation through solution design. After the two are independent of each other, read / write operations can be performed at any time, that is, the read-write delay is arbitrarily adjustable. By parameterizing the read-write delay, the design goal of deterministic delay can be achieved. In the present application, the method for decoupling read and write operations is ping-pong reading and writing. Two address spaces (i.e., sub-areas), SpaceA (area A) and SpaceB (area B), are opened up for each channel in the DDR chip. These two address spaces are used to store data of different frames of the same channel. Since data of different frames will not affect the effect of the entire system, data in any address space can be read during a read operation. Then, when data is written to SpaceA, data is read from SpaceB. Similarly, when data is written to SpaceB, data is read from SpaceA. In this way, the read and write operations are independent of each other and do not interfere with each other, thereby achieving the purpose of deterministic delay.

[0098] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software and a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a disk, or an optical disk), and includes a number of instructions for a terminal device (which can be a mobile phone, a computer, a server, or a network device, etc.) to execute the methods of each embodiment of the present application.

[0099] Fig. 9 is a structural block diagram of a memory access device according to an embodiment of the present application, the storage system includes a controller and a memory, the controller maintains space allocation information of the memory, the space allocation information is used to indicate the data storage status of the storage location included in the memory, and the device is applied to the controller; Fig. 9 As shown, the device comprises:

[0100] A detection module 902 is used to detect a target read request currently to be executed by the storage system during the process of executing a target write request to write data into the storage, wherein the target read request is used to request to read target data from the storage;

[0101] A conversion module 904, configured to convert a target storage location of the target data in the memory according to the space allocation information;

[0102] A matching module 906, configured to match the target storage location with a reference storage location corresponding to the target write request to obtain a matching result;

[0103] The reading module 908 is configured to read the target data from the memory in response to a target read request when the matching result indicates that the target storage location and the reference storage location do not belong to the same storage location.

[0104] Through the above-mentioned embodiments, the space allocation information of the memory of the control system is maintained in the controller of the storage system. When executing a target write request to write data into the memory, the controller will detect the target read request currently to be executed by the storage system for requesting to read the target data from the memory, convert the target storage position of the target data in the memory according to the data storage situation of the storage position included in the memory indicated by the space allocation information, match the target storage position with the reference storage position corresponding to the target write request, and when the matching result is used to indicate that the target storage position and the reference storage position do not belong to the same storage position, respond to the target read request to read the target data from the memory, that is, in the process of writing data into the memory, by judging the target storage position of the target data requested to be read by the current read request to be executed, when the target storage position and the reference storage position where the data write operation is being performed are not a storage position, there is no mutual influence relationship between the read request to be executed and the write request being executed, so the target read request can be executed while executing the data write operation, reducing the possibility of the situation where the execution of the read request due to the execution of the data write operation needs to wait, and further reducing the uncertain reading and writing time consumption caused by waiting. By adopting the above technical solution, the problem of poor predictability of the latency of accessing the memory in the related art is solved, and the technical effect of improving the predictability of the latency of accessing the memory is achieved.

[0105] In an exemplary embodiment, the matching module includes:

[0106] a detection unit, configured to detect a target sub-region corresponding to a target storage position and a reference sub-region corresponding to a reference storage position, wherein the storage region in the memory is divided into a plurality of sub-regions, and data stored in the plurality of sub-regions are different;

[0107] The first determining unit is used to determine, when it is detected that the target sub-region and the reference sub-region are the same sub-region in the memory, that the matching result indicates that the target storage location and the reference storage location do not belong to the same storage location.

[0108] In an exemplary embodiment, a plurality of read channels are configured in the controller, and the read channels are used to read data from the memory in response to a received read request. The detection module includes:

[0109] A sorting unit, used to sort the read requests in each read channel according to the channel status of the multiple read channels to obtain a read queue, wherein the channel status is used to indicate the status of the read request received in the read channel;

[0110] The screening unit is used to screen out target read requests with a priority higher than or equal to the target priority from the read queue according to the priority relationship in the sorting.

[0111] In an exemplary embodiment, the sorting unit is further configured to:

[0112] Generate channel priorities of the multiple read channels according to the channel states of the multiple read channels;

[0113] The read requests in each read channel are sorted according to the channel priorities of the multiple read channels and the receiving time of the read requests received in each read channel to obtain a read queue.

[0114] In an exemplary embodiment, the sorting unit is further configured to:

[0115] Detecting first information of reference data in each read channel, wherein the reference data is data to be sent to a reference device after being read from a memory by the read channel in response to a received read request, and the reference device is a device that initiates a read request to the read channel, and the first information is used to indicate the data amount of the reference data corresponding to the first information;

[0116] In a case where it is detected that the first information is used to indicate that the data amount of the reference data corresponding to the first information is less than the data amount threshold, determining the channel priority of the read channel corresponding to the first information as a first priority with the highest priority level among the channel priorities;

[0117] When it is detected that the first information is used to indicate that the data amount of the reference data corresponding to the first information is greater than or equal to a data amount threshold, the channel priority is generated according to the second information of the reference request in each read channel, wherein the reference request is a read request received by the read channel but not yet responded to, and the second information is used to indicate the number of reference requests corresponding to the second information.

[0118] In an exemplary embodiment, the sorting unit is further configured to:

[0119] In a case where the second information is used to indicate that the number of reference requests corresponding to the second information is greater than or equal to a number threshold, determining the channel priority of the read channel corresponding to the second information as a second priority, wherein the priority level of the second priority is lower than the first priority;

[0120] In the case where the second information is used to indicate that the number of reference requests corresponding to the second information is less than a quantity threshold, the third priorities of each read channel are determined in the order of the time when each read channel last responded to the read request before the current moment, wherein the third priority corresponding to the read channel that last responded to the read request earlier before the current moment has a higher priority level, and the priority level of the third priority is lower than the second priority.

[0121] In an exemplary embodiment, the conversion module includes:

[0122] a query unit, configured to query a data storage location corresponding to the target data from a space allocation table, wherein the space allocation table records a correspondence between data stored in the memory and a storage location in the memory, and the space allocation information includes the space allocation table;

[0123] The second determining unit is configured to determine the data storage location as the target storage location.

[0124] An embodiment of the present application further provides a storage medium, which includes a stored program, wherein when the program is run, any of the above-mentioned memory access methods is executed.

[0125] Optionally, in this embodiment, the storage medium may be configured to store program codes for executing the following steps:

[0126] S1, in the process of executing a target write request to write data into a memory, detecting a target read request currently to be executed by the storage system, wherein the target read request is used to request to read target data from the memory;

[0127] S2, converting the target storage location of the target data in the memory according to the space allocation information;

[0128] S3, matching the target storage location with the reference storage location corresponding to the target write request to obtain a matching result;

[0129] S4, when the matching result is used to indicate that the target storage location and the reference storage location do not belong to the same storage location, read the target data from the memory in response to the target read request.

[0130] An embodiment of the present application further provides an electronic device, including a storage device and a processor, wherein the storage device stores a computer program, and the processor is configured to run the computer program to execute the steps in any of the above-mentioned memory access method embodiments.

[0131] Optionally, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0132] Optionally, in this embodiment, the processor may be configured to perform the following steps through a computer program:

[0133] S1, in the process of executing a target write request to write data into a memory, detecting a target read request currently to be executed by the storage system, wherein the target read request is used to request to read target data from the memory;

[0134] S2, converting the target storage location of the target data in the memory according to the space allocation information;

[0135] S3, matching the target storage location with the reference storage location corresponding to the target write request to obtain a matching result;

[0136] S4, when the matching result is used to indicate that the target storage location and the reference storage location do not belong to the same storage location, read the target data from the memory in response to the target read request.

[0137] Optionally, in this embodiment, the above-mentioned storage medium may include but is not limited to: a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and other media that can store program codes.

[0138] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be described in detail here.

[0139] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, and optionally, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0140] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A method for accessing a memory, characterized in that: A storage system includes a controller and a memory, wherein the controller maintains space allocation information of the memory, wherein the space allocation information is used to indicate data storage conditions of storage locations included in the memory, and the method is applied to the controller, and the method includes: In the process of executing a target write request to write data into the memory, detecting a target read request currently to be executed by the storage system, wherein the target read request is used to request to read target data from the memory; Converting a target storage location of the target data in the memory according to the space allocation information; Matching the target storage location with a reference storage location corresponding to the target write request to obtain a matching result; In case the matching result is used to indicate that the target storage location and the reference storage location do not belong to the same storage location, the target data is read from the memory in response to the target read request.

2. The method according to claim 1, characterized in that The matching the target storage location with a reference storage location corresponding to the target write request includes: Detecting a target sub-region corresponding to the target storage position and a reference sub-region corresponding to the reference storage position, wherein the storage region in the memory is divided into a plurality of sub-regions, and the data stored in the plurality of sub-regions are different; In the case where it is detected that the target sub-region and the reference sub-region are the same sub-region in the memory, the matching result is determined to indicate that the target storage location and the reference storage location do not belong to the same storage location.

3. The method according to claim 1, characterized in that The controller is configured with a plurality of read channels, and the read channels are used to read data from the memory in response to a received read request. The detecting the target read request currently to be executed by the storage system includes: sorting the read requests in each of the read channels according to the channel status of the multiple read channels to obtain a read queue, wherein the channel status is used to indicate the status of the read requests received in the read channel; According to the priority relationship in the sorting, target read requests with a priority higher than or equal to the target priority are screened out from the read queue.

4. The method according to claim 3, characterized in that The step of sorting the read requests in each of the read channels according to the channel status of the multiple read channels comprises: generating channel priorities of the plurality of read channels according to channel states of the plurality of read channels; The read requests in each of the read channels are sorted according to the channel priorities of the multiple read channels and the receiving time of the read requests received in each of the read channels to obtain the read queue.

5. The method according to claim 4, characterized in that Generating the channel priorities of the multiple read channels according to the channel states of the multiple read channels includes: Detecting first information of reference data in each of the read channels, wherein the reference data is data to be sent to a reference device after being read from the memory by the read channel in response to a received read request, the reference device being a device that initiates the read request to the read channel, and the first information is used to indicate the data amount of the reference data corresponding to the first information; In a case where it is detected that the first information is used to indicate that the data amount of the reference data corresponding to the first information is less than a data amount threshold, determining the channel priority of the read channel corresponding to the first information as a first priority with the highest priority level among the channel priorities; In the case where it is detected that the first information is used to indicate that the data amount of the reference data corresponding to the first information is greater than or equal to the data amount threshold, the channel priority is generated according to the second information of the reference request in each of the read channels, wherein the reference request is a read request received by the read channel but not yet responded to, and the second information is used to indicate the number of the reference requests corresponding to the second information.

6. The method according to claim 5, characterized in that Generating the channel priority according to the second information of the reference request in each of the read channels includes: In a case where the second information is used to indicate that the number of reference requests corresponding to the second information is greater than or equal to a number threshold, determining the channel priority of the read channel corresponding to the second information as a second priority, wherein the priority level of the second priority is lower than that of the first priority; In the case where the second information is used to indicate that the number of reference requests corresponding to the second information is less than the number threshold, the third priorities of each read channel are determined according to the order of the time when each read channel last responded to the read request before the current moment, wherein the third priority corresponding to the read channel that last responded to the read request earlier before the current moment has a higher priority level, and the priority level of the third priority is lower than the second priority level.

7. The method according to claim 1, characterized in that The converting the target storage location of the target data in the memory according to the space allocation information includes: querying a data storage location corresponding to the target data from a space allocation table, wherein the space allocation table records a correspondence between data stored in the memory and a storage location in the memory, and the space allocation information includes the space allocation table; The data storage location is determined as the target storage location.

8. A memory access device, characterized in that: The storage system includes a controller and a memory, wherein the controller maintains space allocation information of the memory, wherein the space allocation information is used to indicate data storage conditions of storage locations included in the memory, and the device is applied to the controller, and includes: a detection module, configured to detect a target read request currently to be executed by the storage system during a process of executing a target write request to write data into the storage, wherein the target read request is used to request to read target data from the storage; A conversion module, used for converting a target storage location of the target data in the memory according to the space allocation information; A matching module, used for matching the target storage location with a reference storage location corresponding to the target write request to obtain a matching result; A reading module is used to read the target data from the memory in response to the target read request when the matching result indicates that the target storage location and the reference storage location do not belong to the same storage location.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium includes a stored program, wherein the program executes the method according to any one of claims 1 to 7 when executed.

10. An electronic device comprising a storage device and a processor, characterized in that: The storage device stores a computer program, and the processor is configured to execute the method according to any one of claims 1 to 7 through the computer program.

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