A photonic crystal edge emitting laser and its preparation method

Abstract

The invention relates to the field of semiconductor technology, and discloses a photonic crystal edge-emitting laser and a preparation method thereof, the preparation method comprising: providing a laser matrix, the laser matrix comprising from bottom to top: a substrate, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a P-type cap layer; the laser matrix comprises a rectangular third target area and second target areas at both ends of the third target area in the length direction in the vertical direction, and a first target area located at the side of the third target area and the second target area; an ion implantation area is formed in the first target area; a photonic crystal is formed in the first target area and the second target area; the first target area forms a mode filtering area, the second target area forms a current limiting area, and the third target area forms a current injection area. Compared with the related art, the invention can enhance the heat dissipation characteristics of the laser in the lateral direction, improve the electrical performance and reliability of the laser, and simplify the process flow at the same time.

Description

Technical Field

[0001] The invention relates to the field of semiconductor technology, and in particular to a photonic crystal edge emitting laser and a preparation method thereof. Background Art

[0002] As an important light source, edge-emitting lasers (EELs) have been applied in areas ranging from traditional optical communications, optical storage, and laser processing to emerging application scenarios such as lidar, face / gesture recognition, and medical treatment. These emerging fields are growing rapidly and are expected to become the main driving force for market growth in the future. With the development of photonic integrated circuits and high-speed optical communication networks, EEL technology is progressing towards smaller size, higher efficiency, and a wider wavelength range. By optimizing the material structure and manufacturing process, the performance and reliability of EEL have been significantly improved, meeting the needs of high-speed data transmission and high-power laser processing.

[0003] Traditional EEL forms a current injection channel by etching ridges and provides a lateral refractive index difference to limit the light mode, and improves performance by expanding the light-emitting area or integrating a non-pump window on the light-emitting surface. However, in order to consider the overall performance of the chip, the etching depth of the ridge cannot be too deep. If the etching is too deep, the threshold and divergence angle of the EEL will deteriorate. However, if the etching depth is insufficient, the traditional EEL will not be able to limit the mode in the lateral direction, resulting in too much transverse mode resonant lasing. In high-power EEL, the lateral slow axis divergence angle deteriorates at high currents, and the Kink phenomenon (warping effect) will also appear on the LIV curve, all of which are caused by mode competition. Because the one-step etching method of micro-nanostructures used in traditional photonic crystal etching has very precise process requirements, it is difficult for one-step etching methods or technologies such as electron beam exposure to reach the μm level of etching depth. In addition, the traditional EEL forms a lateral refractive index step difference due to the etching of the ridge, which will affect the temperature diffusion laterally when the chip is working at a large current. The local temperature increase combined with the refractive index difference will further deteriorate the performance of the chip. Summary of the invention

[0004] In view of this, the present invention provides a photonic crystal edge emitting laser and a preparation method thereof, so as to solve the problems in the related art that the edge emitting laser has high requirements on the precision of the ridge structure etching depth, the precision of one etching is low, and there is a lateral refractive index step difference, which makes the threshold and divergence angle of the edge emitting laser poor, the lateral mode restriction is insufficient, and there are too many transverse mode resonant lasings, which leads to poor performance and low reliability of the laser.

[0005] In a first aspect, the present invention provides a method for preparing a photonic crystal edge emitting laser, the method comprising:

[0006] Providing a laser matrix, the laser matrix comprising, from bottom to top, a substrate, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a P-type cap layer;

[0007] The laser substrate includes a rectangular third target area and second target areas at both ends of the third target area in the length direction, and a first target area located at the side of the third target area and the second target area in the vertical direction;

[0008] An ion implantation process is performed on one side of the P-type cap layer in the first target region to form an ion implantation region in the first target region; the depth of the ion implantation region is greater than the thickness of the P-type cap layer;

[0009] forming a photonic crystal in the first target region and the second target region;

[0010] The first target region forms a mode filtering region, the second target region forms a current limiting region, and the third target region forms a current injection region.

[0011] The preparation method of the photonic crystal edge-emitting laser provided by the present invention comprises the following steps: firstly, a current channel can be formed by forming an ion implantation area in a first target area, the ion implantation area is electrically insulating but does not form a refractive index difference; secondly, a photonic crystal is formed in the first target area and a mode filtering area is formed, the photonic crystal in the mode filtering area can filter high-order modes, and only laser resonance within a certain wavelength range is allowed, and at the same time, the heat dissipation characteristics of the device in the lateral direction can be enhanced, thereby improving the electrical performance of the device when working under a large current; thirdly, a photonic crystal is formed in a second target area and a current limiting area is formed, so that current injection near the light-emitting surface can be controlled, thereby controlling the light emission of the area, reducing the local temperature of the area, thereby improving the performance and reliability of the chip; in addition, the photonic crystal in the second target area and the photonic crystal in the first target area are prepared simultaneously in the same process step, and no additional photolithography step is introduced, so that the process flow can be simplified and the process efficiency can be improved. Therefore, the preparation method of the photonic crystal edge-emitting laser provided by the present invention can enhance the heat dissipation characteristics of the device in the lateral direction, thereby improving the electrical performance of the device when working under a large current, and can also control the current injection near the light-emitting surface, thereby controlling the light emission of the area and reducing the local temperature of the area, thereby improving the performance and reliability of the chip, while simplifying the process flow and improving the process efficiency.

[0012] In an optional embodiment, the ion implantation region includes a P-type cap layer in the first target region and a corresponding portion of a P-type cladding layer.

[0013] In an optional embodiment, the step of forming a photonic crystal in the first target area and the second target area includes:

[0014] Forming a first groove in the first target area and forming a second groove in the second target area; the first groove and the second groove penetrate the P-type cap layer and expose the surface of the P-type cladding layer;

[0015] A plurality of third openings are formed in the P-type cladding layer exposed by the first groove; the width of the third openings is smaller than the width of the first groove; and the third openings penetrate into a portion of the P-type cladding layer;

[0016] Etching the first groove, the second groove and the third opening downward by a second distance, so that the first groove and the second groove penetrate into a part of the P-type cladding layer, and the third opening penetrates into a part of the P-type waveguide layer; the depth of the first groove and the second groove is less than the depth of the ion implantation area;

[0017] An insulating layer is formed on one side of the P-type cap layer, and the insulating layer fills the first groove and the second groove to form a first insulating groove and a second insulating groove; the insulating layer also penetrates into the third opening, covers the side wall of the third opening, and forms an air column in the third opening; the first insulating groove and the air column are the first photonic crystal; the second insulating groove forms the second photonic crystal.

[0018] The preparation method of the photonic crystal edge-emitting laser provided by the present invention comprises the following steps: firstly forming a first groove in a first target area, forming a second groove in a second target area, forming a plurality of third openings in a P-type cladding layer exposed in the first groove, and then etching the first groove, the second groove and the third opening downward by a second distance, so that the first groove and the second groove penetrate into a part of the P-type cladding layer, and the third opening penetrates into a part of the P-type waveguide layer, and finally filling the first groove and the second groove with an insulating layer to form a first insulating groove and a second insulating groove, and forming an air column in the third opening, wherein the first insulating groove and the air column are a first photonic crystal, and the second insulating groove forms a second photonic crystal. By performing two-step etching and partial filling on the first groove, the second groove and the third opening to form a photonic crystal with a depth of μm level, the etching depth of the photonic crystal can be more accurately controlled, the accuracy of the photonic crystal can be improved, and the heat dissipation characteristics of the device in the lateral direction can be enhanced, the electrical performance of the device when working under a large current can be improved, and the performance and reliability of the edge-emitting laser can be improved.

[0019] In an optional embodiment, the ion implantation process is performed on one side of the P-type cap layer of the first target region, before the step of forming the ion implantation region in the first target region, further comprising:

[0020] forming a hard mask layer on a surface of the P-type cap layer facing away from the P-type cladding layer;

[0021] Forming a first patterned photoresist layer on a surface of the hard mask layer facing away from the P-type cap layer; the first patterned photoresist layer covers the hard mask layers corresponding to the second target area and the third target area, exposing the hard mask layer corresponding to the first target area;

[0022] The step of performing an ion implantation process on one side of the P-type cap layer in the first target region to form an ion implantation region in the first target region includes:

[0023] An ion implantation process is performed on one side of the hard mask layer corresponding to the P-type cap layer in the first target region, and the P-type cap layer in the first target region and a corresponding portion of the P-type cladding layer form an ion implantation region.

[0024] In an optional embodiment, the step of forming a first groove in the first target area and forming a second groove in the second target area includes:

[0025] A second patterned photoresist layer is formed on a surface of the hard mask layer facing away from the P-type cap layer; the second patterned photoresist layer exposes the hard mask layer corresponding to the first groove and the second groove;

[0026] Etching the hard mask layer corresponding to the first groove and the second groove to form a first hard mask groove and a second hard mask groove, wherein the first hard mask groove and the second hard mask groove respectively expose the surface of the P-type cap layer corresponding to the first groove and the second groove;

[0027] The P-type cap layer corresponding to the first groove and the second groove is etched to form a first groove in the first target area and a second groove in the second target area; the first groove and the second groove penetrate the P-type cap layer and expose the surface of the P-type cladding layer; the first groove and the second groove are connected to the first hard mask groove and the second hard mask groove respectively.

[0028] In an optional embodiment, an insulating layer is formed on one side of the P-type cap layer, the insulating layer fills the first groove and the second groove, and the steps of forming the first insulating groove and the second insulating groove include:

[0029] An insulating layer is formed on the surface of the hard mask layer facing away from the P-type cap layer, and the insulating layer fills the first groove and the second groove to form the first insulating groove and the second insulating groove; the insulating layer also fills the first hard mask groove and the second hard mask groove.

[0030] In an optional embodiment, after forming an insulating layer on one side of the P-type cap layer, the insulating layer fills the first groove and the second groove, and the step of forming the first insulating groove and the second insulating groove further includes:

[0031] Etching the insulating layer and the hard mask layer corresponding to the current injection area to form an electrode window, wherein the electrode window exposes the P-type cap layer of the current injection area;

[0032] forming a metal seed layer on the surface of the insulating layer facing away from the hard mask layer; the metal seed layer also covers the surface of the P-type cap layer in the current injection region;

[0033] forming a first electrode layer on a surface of the metal seed layer facing away from the insulating layer;

[0034] Thinning the side of the substrate facing away from the N-type cladding layer;

[0035] A second electrode layer is formed on the surface of the thinned substrate on the side facing away from the N-type cladding layer.

[0036] In an optional embodiment, in the step of forming the first groove in the first target area and forming the second groove in the second target area, the first groove is formed by partially overlapping and connecting a plurality of first openings, the first openings penetrate the P-type cap layer and expose the surface of the P-type cladding layer;

[0037] The second groove is formed by partially overlapping and connecting a plurality of second openings, and the second openings penetrate the P-type cap layer and expose the surface of the P-type cladding layer.

[0038] In an optional embodiment, the step of forming a plurality of third openings in the P-type cladding layer exposed in the first groove includes:

[0039] A plurality of third openings are formed in the P-type cladding layer exposed by the plurality of first openings; a third opening is formed corresponding to each first opening position; and a width of the third opening is smaller than a width of the first opening.

[0040] In an optional embodiment, in the step of forming a third opening in the P-type cladding layer exposed by the first groove, the third opening penetrates into the P-type cladding layer by a first distance; the depth of the third opening is the first distance; the depth of the first groove and the second groove is the thickness of the P-type cap layer;

[0041] In the step of etching the first groove, the second groove and the third opening downward by a second distance, the depth of the third opening is the first distance; the depth of the first groove and the second groove is the sum of the thickness of the P-type cap layer and the second distance.

[0042] In a second aspect, the present invention provides a photonic crystal edge emitting laser, the photonic crystal edge emitting laser comprising:

[0043] The laser matrix includes, from bottom to top, a substrate, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a P-type cap layer;

[0044] The laser substrate includes a rectangular third target area and second target areas at both ends of the third target area in the length direction, and a first target area located at the side of the third target area and the second target area in the vertical direction;

[0045] The first target area includes an ion implantation area; the first target area is a mode filtering area; the second target area is a current limiting area, and the third target area is a current injection area;

[0046] Photonic crystals are distributed in the mode filtering region and the current limiting region.

[0047] The photonic crystal edge-emitting laser provided by the present invention, on the one hand, the first target area is a mode filtering area, and photonic crystals are distributed in the mode filtering area. The photonic crystals in the mode filtering area can filter high-order modes, and only allow laser resonance within a certain wavelength range. At the same time, the heat dissipation characteristics of the device in the lateral direction can be enhanced, thereby improving the electrical performance of the device when working under a large current; on the other hand, the second target area is a current limiting area, and photonic crystals are distributed in the current limiting area. The photonic crystals in the current limiting area can control the current injection near the light-emitting surface, thereby controlling the luminescence of the area, so that the local temperature of the area is reduced, thereby improving the performance and reliability of the chip. Therefore, the photonic crystal edge-emitting laser provided by the present invention can enhance the heat dissipation characteristics of the device in the lateral direction, thereby improving the electrical performance of the device when working under a large current, and can also control the current injection near the light-emitting surface, thereby controlling the luminescence of the area, so that the local temperature of the area is reduced, thereby improving the performance and reliability of the chip.

[0048] In an optional embodiment, the ion implantation region includes a P-type cap layer in the first target region and a corresponding portion of a P-type cladding layer;

[0049] The mode filter region includes a first photonic crystal; the first photonic crystal includes a first insulating groove and an air column; the first insulating groove is located in the P-type cap layer and a part of the P-type cladding layer of the first target region; the depth of the first insulating groove is less than the depth of the ion implantation region; the air column is located below the first insulating groove and in the remaining part of the P-type cladding layer and a part of the P-type waveguide layer; the width of the air column is less than the width of the first insulating groove; the first insulating groove includes a plurality of first insulating holes that are partially overlapped and connected;

[0050] The current limiting region includes a second photonic crystal; the second photonic crystal is a second insulating groove; the second insulating groove is located in the P-type cap layer and part of the P-type cladding layer of the second target region; the depth of the second insulating groove is less than the depth of the ion implantation region; the second insulating groove includes a plurality of second insulating holes partially overlapped and connected;

[0051] The insulating layer is located on the surface of the P-type cap layer facing away from the P-type cladding layer.

[0052] In an optional embodiment, the thickness of the P-type cap layer is 0.2 μm;

[0053] The thickness of the P-type cladding layer is greater than 0.6 μm and less than 0.8 μm;

[0054] The depth of the ion implantation region is 0.5 μm; the ion implantation region includes a P-type cap layer and a portion of a P-type cladding layer; the thickness of the portion of the P-type cladding layer is 0.3 μm;

[0055] The current injection region is 4690 μm long and 90 μm wide;

[0056] The distance between the current injection region and the nearest edge of the first groove is 5 μm, and the distance between the current injection region and the nearest edge of the second groove is 5 μm;

[0057] The depth of the first insulating groove and the depth of the second insulating groove are 0.4 μm; the depth of the air column is 0.6 μm;

[0058] The diameter of the first insulating hole is 3.2 μm; the distance between adjacent first insulating holes is less than or equal to 3.2 μm;

[0059] The diameter of the second insulating hole is 3.2 μm; the distance between adjacent second insulating holes is less than or equal to 3.2 μm;

[0060] The diameter of the air column is 1.6 μm. BRIEF DESCRIPTION OF THE DRAWINGS

[0061] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the related technologies, the drawings required for use in the specific embodiments or the related technical descriptions will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0062] Figure 1 The figure is a flow chart of a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0063] Figure 2 It is a schematic structural diagram of a laser substrate in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0064] Figure 3 It is a schematic top view of a laser substrate in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0065] Figure 4 In a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention, Figure 3 Schematic diagram of the top view of the photonic crystal formed on the basis.

[0066] Figure 5 It is a schematic diagram of a specific process of a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0067] Fig. 6A The present invention is a schematic structural diagram of an ion implantation region formed in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0068] Figure 6BA method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention Fig. 6A Schematic diagram of the structure from top view.

[0069] Fig. 7A The diagram is a structural diagram of forming a second patterned photoresist layer in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0070] Figure 7B A method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention Fig. 7A Schematic diagram of the structure from top view.

[0071] Figure 8 The diagram is a structural diagram of forming a first hard mask groove and a second hard mask groove in a method for preparing a photonic crystal edge emitting laser according to an embodiment of the present invention.

[0072] Fig. 9A The diagram is a structural diagram of forming a first groove and a second groove in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0073] Fig. 9B It is a top cross-sectional schematic diagram of a first groove and a second groove diagram in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0074] Fig.10 The diagram is a structural schematic diagram of forming a third patterned photoresist layer in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0075] Fig.11 It is a structural schematic diagram of forming a third opening in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0076] Fig.12 It is a schematic structural diagram of a third opening in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0077] Fig.13 In a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention, Fig.12 Schematic diagram of the structure of etching a second distance downward on the basis.

[0078] Fig.14 In a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention, Fig.13 Schematic diagram of the structure of forming an insulating layer on the basis.

[0079] Fig.15It is a structural schematic diagram of forming an electrode window in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0080] Fig.16 It is a structural schematic diagram of forming a metal seed layer in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0081] Fig.17 It is a structural schematic diagram of forming a first electrode layer in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0082] Fig.18 It is a structural schematic diagram of forming a second electrode layer in a method for preparing a photonic crystal edge-emitting laser according to an embodiment of the present invention.

[0083] Reference numerals:

[0084] 11. substrate; 12. N-type cladding layer; 13. N-type waveguide layer; 14. active layer; 15. P-type waveguide layer; 16. P-type cladding layer; 17. P-type cap layer; 20. hard mask layer; 21. first hard mask groove; 22. second hard mask groove; 31. first groove; 32. second groove; 33. third opening; 40. insulating layer; 41. first insulating groove; 42. second insulating groove; 43. air column; 51. first photonic crystal; 52. second photonic crystal; 60. metal seed layer; 70. electrode window; 71. first electrode layer; 72. second electrode layer; 81. first patterned photoresist layer; 82. second patterned photoresist layer; 83. third patterned photoresist layer; A1. first target area; A2. second target area; A3. third target area; B. mode filtering area; C. current limiting area; D. current injection area. DETAILED DESCRIPTION

[0085] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0086] In the following description, the description of known structures and technologies is omitted to avoid unnecessary confusion of the concept of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These figures are not drawn to scale, and some details are magnified for the purpose of clear expression, and some details may be omitted. The shapes of various regions and layers shown in the figures and the relative sizes and positional relationships between them are only exemplary, and may be deviated due to manufacturing tolerances or technical limitations in practice, and those skilled in the art may additionally design regions / layers with different shapes, sizes, and relative positions according to actual needs. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be a middle layer / element between them. In addition, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "under" the other layer / element.

[0087] As an important light source, the application areas of EEL have expanded from traditional optical communications, optical storage and laser processing to emerging application scenarios such as lidar, face / gesture recognition, and medical treatment. These emerging fields are growing rapidly and are expected to become the main driving force for market growth in the future. With the development of photonic integrated circuits and high-speed optical communication networks, EEL technology is progressing towards smaller size, higher efficiency and wider wavelength range. By optimizing the material structure and manufacturing process, the performance and reliability of EEL have been significantly improved, meeting the needs of high-speed data transmission and high-power laser processing.

[0088] The traditional manufacturing process of edge-emitting lasers mainly includes: ① Surface GaAs layer etching (Mark etch), mainly etching the highly doped GaAs layer on the surface, which is used to adjust the current injection area and current injection efficiency; at the same time, forming alignment marks and information identification. ② Ridge (Ridge RDG) etching: first form a ridge pattern through a photolithography, and then dry or wet etch a certain depth, mainly used to provide a lateral refractive index step and control current injection. ③ On the basis of the surface GaAs layer etching (Mark etch) and the ridge (Ridge RDG) pattern, a layer of SIN insulation layer is deposited as a whole, the purpose is to serve as a current insulation layer and epitaxial structure protection. ④ A current injection window (P metal windowopen) pattern is formed above the Ridge through a photolithography, and then the window is opened by dry etching to leak the highly doped GaAs on the surface, providing conditions for the subsequent formation of ohmic contact. ⑤ Grow seed gold to provide a conductive path for the subsequent electroplating gold deposition, and also form an ohmic contact with the highly doped GaAs below; a plating pattern is formed through a photolithography, and the required target thickness metal is deposited. ⑥Finally, the N-side is thinned and polished, and then the N-side metal is grown.

[0089] like Figure 1 As shown, this embodiment provides a method for preparing a photonic crystal edge emitting laser, and the preparation method includes but is not limited to steps S101 to S103.

[0090] Step S101, providing a laser substrate, the laser substrate including from bottom to top: a substrate 11, an N-type cladding layer 12, an N-type waveguide layer 13, an active layer 14, a P-type waveguide layer 15, a P-type cladding layer 16, and a P-type cap layer 17, such as Figure 2 As shown; the laser substrate includes a rectangular third target area A3 and a second target area A2 at both ends of the third target area A3 in the vertical direction, and a first target area A1 located at the side of the third target area A3 and the second target area, as shown Figure 3 shown.

[0091] Step S102 , performing an ion implantation process on one side of the P-type cap layer 17 of the first target area A1 to form an ion implantation region in the first target area A1 ; the depth of the ion implantation region is greater than the thickness of the P-type cap layer 17 .

[0092] Step S103, forming a photonic crystal in the first target area A1 and the second target area A2; the first target area A1 forms a mode filtering area B, the second target area A2 forms a current limiting area C, and the third target area A3 forms a current injection area D, such as Figure 4 shown.

[0093] It should be noted that: the above-mentioned "the laser substrate includes a rectangular third target area A3 in the vertical direction and second target areas A2 at both ends of the third target area A3 in the length direction, and a first target area A1 located on the sides of the third target area A3 and the second target area" specifically means: the laser substrate is divided into three areas, the first target area A1 includes all the film layer structures from the substrate 11 in the vertical direction within the divided area; the second target area A2 and the third target area A3 also include all the film layer structures from the substrate 11 in the vertical direction within their respective divided areas. Correspondingly, the first target area A1 formed to form the mode filtering area B, the second target area A2 formed to form the current limiting area C, and the third target area A3 formed to form the current injection area D also refer to: in the vertical direction within the corresponding area, including all the film layer structures from the substrate 11 and other structures formed by processing in and on the film layer.

[0094] In the preparation method of the photonic crystal edge-emitting laser provided in the present embodiment, firstly, a current channel can be formed by forming an ion implantation area in the first target area, and the ion implantation area is electrically insulating but does not form a refractive index difference; secondly, by forming a photonic crystal in the first target area and forming a mode filtering area, the photonic crystal in the mode filtering area can filter high-order modes, allowing only laser resonance in a certain wavelength range, and at the same time can enhance the heat dissipation characteristics of the device in the lateral direction, thereby improving the electrical performance of the device when working under a large current; thirdly, by forming a photonic crystal in the second target area and forming a current limiting area, the current injection near the light-emitting surface can be controlled, thereby controlling the luminescence of the area, reducing the local temperature of the area, and thus improving the performance and reliability of the chip; in addition, the photonic crystal in the second target area and the photonic crystal in the first target area are prepared simultaneously in the same process step, and no additional photolithography steps are introduced, which can simplify the process flow and improve the process efficiency. Therefore, the preparation method of the photonic crystal edge-emitting laser provided in this embodiment can enhance the heat dissipation characteristics of the device in the lateral direction, thereby improving the electrical performance of the device when working under large currents. It can also control the current injection near the light-emitting surface, thereby controlling the light emission in this area and reducing the local temperature in this area, thereby improving the performance and reliability of the chip, while simplifying the process flow and improving process efficiency.

[0095] In some optional embodiments, the ion implantation region includes the P-type cap layer 17 of the first target area A1 and a corresponding portion of the P-type cladding layer 16 .

[0096] In some optional embodiments, the step of forming a photonic crystal in the first target area A1 and the second target area A2 includes:

[0097] A first groove 31 is formed in the first target area A1, and a second groove 32 is formed in the second target area A2; the first groove 31 and the second groove 32 penetrate the P-type cap layer 17 and expose the surface of the P-type cladding layer 16;

[0098] A plurality of third openings 33 are formed in the P-type cladding layer 16 exposed in the first groove 31 ; the width of the third openings 33 is smaller than the width of the first groove 31 ; the third openings 33 penetrate into a portion of the P-type cladding layer 16 ;

[0099] The first groove 31, the second groove 32 and the third opening 33 are etched downward by a second distance, so that the first groove 31 and the second groove 32 penetrate into a part of the P-type cladding layer 16, and the third opening 33 penetrates into a part of the P-type waveguide layer 15; the depth of the first groove 31 and the second groove 32 is less than the depth of the ion implantation area;

[0100] An insulating layer 40 is formed on one side of the P-type cap layer 17, and the insulating layer 40 fills the first groove 31 and the second groove 32 to form a first insulating groove 41 and a second insulating groove 42; the insulating layer 40 also penetrates into the third opening 33, covers the side wall of the third opening 33, and forms an air column 43 in the third opening 33; the first insulating groove 41 and the air column 43 are the first photonic crystal 51; the second insulating groove 42 forms the second photonic crystal 52.

[0101] The preparation method of the photonic crystal edge-emitting laser provided in this embodiment is as follows: first, a first groove is formed in a first target area, a second groove is formed in a second target area, a plurality of third openings are formed in the P-type cladding layer exposed in the first groove, and then the first groove, the second groove and the third opening are etched downward by a second distance, so that the first groove and the second groove penetrate into a part of the P-type cladding layer, and the third opening penetrates into a part of the P-type waveguide layer, and finally the first groove and the second groove are filled with an insulating layer to form a first insulating groove and a second insulating groove, and an air column is formed in the third opening, the first insulating groove and the air column are the first photonic crystal, and the second insulating groove forms the second photonic crystal. By performing two-step etching and partial filling of the first groove, the second groove and the third opening to form a photonic crystal with a depth of μm level, the etching depth of the photonic crystal can be more accurately controlled, the accuracy of the photonic crystal can be improved, and the heat dissipation characteristics of the device in the lateral direction can be enhanced, the electrical performance of the device when working under a large current can be improved, and the performance and reliability of the edge-emitting laser can be improved.

[0102] In some optional embodiments, an ion implantation process is performed on one side of the P-type cap layer 17 of the first target area A1, and before the step of forming an ion implantation region in the first target area A1, the step further includes:

[0103] A hard mask layer 20 is formed on a surface of the P-type cap layer 17 facing away from the P-type cladding layer 16;

[0104] A first patterned photoresist layer 81 is formed on a surface of the hard mask layer 20 facing away from the P-type cap layer 17; the first patterned photoresist layer 81 covers the hard mask layer 20 corresponding to the second target area A2 and the third target area A3, and exposes the hard mask layer 20 corresponding to the first target area A1;

[0105] The step of performing an ion implantation process on one side of the P-type cap layer 17 of the first target area A1 to form an ion implantation region in the first target area A1 includes:

[0106] An ion implantation process is performed on one side of the hard mask layer 20 corresponding to the P-type cap layer 17 of the first target area A1 , and the P-type cap layer 17 of the first target area A1 and a corresponding portion of the P-type cladding layer 16 form an ion implantation region.

[0107] In some optional embodiments, the step of forming the first groove 31 in the first target area A1 and forming the second groove 32 in the second target area A2 includes:

[0108] A second patterned photoresist layer 82 is formed on a surface of the hard mask layer 20 facing away from the P-type cap layer 17; the second patterned photoresist layer 82 exposes the hard mask layer 20 corresponding to the first groove 31 and the second groove 32;

[0109] Etching the hard mask layer 20 corresponding to the first groove 31 and the second groove 32 to form a first hard mask groove and a second hard mask groove, wherein the first hard mask groove and the second hard mask groove respectively expose the surface of the P-type cap layer 17 corresponding to the first groove 31 and the second groove 32;

[0110] The P-type cap layer 17 corresponding to the first groove 31 and the second groove 32 is etched to form the first groove 31 in the first target area A1 and the second groove 32 in the second target area A2; the first groove 31 and the second groove 32 penetrate the P-type cap layer 17 and expose the surface of the P-type cladding layer 16; the first groove 31 and the second groove 32 are connected to the first hard mask groove and the second hard mask groove, respectively.

[0111] In some optional embodiments, an insulating layer 40 is formed on one side of the P-type cap layer 17, and the insulating layer 40 fills the first groove 31 and the second groove 32. The steps of forming the first insulating groove 41 and the second insulating groove 42 include:

[0112] An insulating layer 40 is formed on the surface of the hard mask layer 20 facing away from the P-type cap layer 17 . The insulating layer 40 also fills the first hard mask groove and the second hard mask groove.

[0113] In some optional embodiments, an insulating layer 40 is formed on one side of the P-type cap layer 17, and the insulating layer 40 fills the first groove 31 and the second groove 32. After the step of forming the first insulating groove 41 and the second insulating groove 42, the method further includes:

[0114] The insulating layer 40 and the hard mask layer 20 corresponding to the current injection region D are etched to form an electrode window 70, wherein the electrode window 70 exposes the P-type cap layer 17 of the current injection region D;

[0115] A metal seed layer 60 is formed on the surface of the insulating layer 40 facing away from the hard mask layer 20 ; the metal seed layer 60 also covers the surface of the P-type cap layer 17 of the current injection region D;

[0116] A first electrode layer 71 is formed on a surface of the metal seed layer 60 that faces away from the insulating layer 40 ;

[0117] Thinning the side of the substrate 11 facing away from the N-type cladding layer 12;

[0118] A second electrode layer 72 is formed on the thinned surface of the substrate 11 facing away from the N-type cladding layer 12 .

[0119] In some optional embodiments, in the step of forming the first groove 31 in the first target area A1 and forming the second groove 32 in the second target area A2, the first groove 31 is formed by a plurality of first openings partially overlapping and connected, and the first openings penetrate the P-type cap layer 17 and expose the surface of the P-type cladding layer 16;

[0120] The second groove 32 is formed by a plurality of second openings partially overlapping and connected, and the second openings penetrate the P-type cap layer 17 and expose the surface of the P-type cladding layer 16 .

[0121] In some optional embodiments, the step of forming a plurality of third openings 33 in the P-type cladding layer 16 exposed in the first groove 31 includes:

[0122] A plurality of third openings 33 are formed in the P-type cladding layer 16 exposed by the plurality of first openings; a third opening 33 is formed corresponding to each first opening position; and the width of the third opening 33 is smaller than the width of the first opening.

[0123] In some optional embodiments, in the step of forming the third opening 33 in the P-type cladding layer 16 exposed by the first groove 31, the third opening 33 penetrates into the P-type cladding layer 16 by a first distance; the depth of the third opening 33 is the first distance; the depth of the first groove 31 and the second groove 32 is the thickness of the P-type cap layer 17;

[0124] In the step of etching the first groove 31 , the second groove 32 and the third opening 33 downward by the second distance, the depth of the third opening 33 is the first distance; the depth of the first groove 31 and the second groove 32 is the sum of the thickness of the P-type cap layer 17 and the second distance.

[0125] In some optional embodiments, the first distance is 0.6 μm;

[0126] The second distance is 0.2 μm;

[0127] The thickness of the P-type cap layer 17 is 0.2 μm;

[0128] The thickness of the P-type cladding layer 16 is greater than 0.6 μm and less than 0.8 μm;

[0129] The depth of the ion implantation region is 0.5 μm; the ion implantation region includes a P-type cap layer 17 and a portion of a P-type cladding layer 16; the thickness of the portion of the P-type cladding layer 16 is 0.3 μm;

[0130] The current injection region D is 4690 μm long and 90 μm wide;

[0131] The distance between the current injection region D and the nearest edge of the first groove 31 is 5 μm, and the distance between the current injection region D and the nearest edge of the second groove 32 is 5 μm;

[0132] The diameter of the first opening is 3.2 μm; the distance between adjacent first openings is less than or equal to 3.2 μm;

[0133] The diameter of the second opening is 3.2 μm; the distance between adjacent second openings is less than or equal to 3.2 μm;

[0134] The diameter of the third opening is 1.6 μm;

[0135] The depth of the first insulating groove 41 and the depth of the second insulating groove 42 are 0.4 μm; the depth of the air column 43 is 0.6 μm; and the diameter of the air column 43 is 1.6 μm.

[0136] like Figure 5 As shown, the present invention also provides a specific flow chart of a method for preparing a photonic crystal edge-emitting laser, which is used to prepare a 940nm 12W high-power edge-emitting laser chip, including but not limited to steps S201 to S212.

[0137] Step S201, providing a laser matrix, the laser matrix includes from bottom to top: a substrate 11, an N-type cladding layer 12, an N-type waveguide layer 13, an active layer 14, a P-type waveguide layer 15, a P-type cladding layer 16, and a P-type cap layer 17; the laser matrix includes a rectangular third target area A3 and second target areas A2 at both ends of the third target area A3 in the vertical direction, and a first target area A1 located on the side of the third target area A3 and the second target area.

[0138] In a specific implementation, the component of the substrate 11 is GaAs, the component of the N-type cladding layer 12 is 30% AIGaAs, the component of the N-type waveguide layer 13 is 20-30% AIGaAs, the component of the active layer 14 is InGaAs, the component of the P-type waveguide layer 15 is 20-30% AIGaAs, the component of the P-type cladding layer 16 is 40-60% AIGaAs, and the component of the P-type cap layer 17 is GaAs. The thickness of the P-type cap layer 17 is 0.2 μm; the thickness of the P-type cladding layer 16 is greater than 0.6 μm and less than 0.8 μm. The top view of the laser substrate is a rectangle with a length of 5000μm and a width of 400μm; the third target area A3 is a rectangle with a length of 4690μm and a width of 90μm; the second target area A2 is located at both ends of the length direction of the third target area A3, where the second target area A2 at one end is a rectangle and the second target area A2 at the other end is a trapezoid, with an upper base of 100μm and a lower base of 110μm. The third target area A3 subsequently forms a current injection area D with a length of 4690μm and a width of 90μm.

[0139] Step S202, forming a hard mask layer 20 on the surface of the P-type cap layer 17 facing away from the P-type cladding layer 16, such as Fig. 6A shown.

[0140] In a specific implementation, the material of the hard mask layer 20 is silicon dioxide, the thickness of the hard mask layer 20 is 200 nm, and the hard mask layer 20 mainly provides a hard mask function for subsequent steps.

[0141] Step S203, forming a first patterned photoresist layer 81 on the surface of the hard mask layer 20 facing away from the P-type cap layer 17; the first patterned photoresist layer 81 covers the hard mask layer 20 corresponding to the second target area A2 and the third target area A3, and exposes the hard mask layer 20 corresponding to the first target area A1, such as Fig. 6A and Figure 6B shown.

[0142] In step S204, an ion implantation process is performed on one side of the hard mask layer 20 corresponding to the P-type cap layer 17 of the first target area A1, and the P-type cap layer 17 of the first target area A1 and its corresponding part of the P-type cladding layer 16 form an ion implantation region; the depth of the ion implantation region is greater than the thickness of the P-type cap layer 17; the ion implantation region includes the P-type cap layer 17 of the first target area A1 and its corresponding part of the P-type cladding layer 16.

[0143] In specific implementation, through one-time photolithography and IMP implantation, the implantation depth is 0.5 μm from the surface of the P-type cap layer 17 to the total depth of the P-type cladding layer 16. The depth of the ion implantation area is 0.5 μm; the ion implantation area includes the P-type cap layer 17 and part of the P-type cladding layer 16 of the first target area A1; the thickness of the P-type cap layer 17 is 0.2 μm, and the thickness of part of the P-type cladding layer 16 is 0.3 μm. The current injection channel is formed by ion implantation, which plays the role of electrical insulation, but does not form a refractive index difference in the lateral direction, in order to allow the current to be more efficiently injected into the active area.

[0144] Step S205, forming a second patterned photoresist layer 82 on the surface of the hard mask layer 20 facing away from the P-type cap layer 17; the second patterned photoresist layer 82 exposes the hard mask layer 20 corresponding to the first groove 31 and the second groove 32, such as Fig. 7A and Figure 7B shown.

[0145] When it comes to specific implementation, Figure 7B: is a top view of the second patterned photoresist layer 82. Since the first groove 31 is formed by a plurality of first openings partially overlapping and connected, and the second groove 32 is formed by a plurality of second openings partially overlapping and connected, the pattern of the second patterned photoresist layer 82 is a plurality of partially overlapping and connected holes corresponding to the first groove 31 and the second groove 32. In actual implementation, the groove of the second patterned photoresist layer 82 is slightly larger than the size of the first groove and the second groove.

[0146] Step S206, etching the hard mask layer 20 corresponding to the first groove 31 and the second groove 32 to form a first hard mask groove 21 and a second hard mask groove 22, wherein the first hard mask groove 21 and the second hard mask groove 22 respectively expose the surface of the P-type cap layer 17 corresponding to the first groove 31 and the second groove 32, as shown in FIG. Figure 8 shown.

[0147] Step S207, etching the P-type cap layer 17 corresponding to the first groove 31 and the second groove 32, forming the first groove 31 in the first target area A1, and forming the second groove 32 in the second target area A2; the first groove 31 and the second groove 32 penetrate the P-type cap layer 17 and expose the surface of the P-type cladding layer 16; the first groove 31 and the second groove 32 are connected to the first hard mask groove 21 and the second hard mask groove 22, respectively, as shown in FIG. Fig. 9A and Fig. 9B shown.

[0148] The first groove 31 is formed by partially overlapping and connecting a plurality of first openings, the first openings penetrate the P-type cap layer 17, and expose the surface of the P-type cladding layer 16; the second groove 32 is formed by partially overlapping and connecting a plurality of second openings, the second openings penetrate the P-type cap layer 17, and expose the surface of the P-type cladding layer 16. At this time, the depth of the first opening and the second opening, that is, the depth of the first groove 31 and the second groove 32 is the thickness of the P-type cap layer 17.

[0149] When it comes to specific implementation, Fig. 9B : is a top cross-sectional view of the first groove 31 and the second groove 32. The distance between the third target area A3 and the nearest edge of the first opening is 5 μm, and the distance between the third target area A3 and the nearest edge of the second opening is 5 μm; the minimum distance between the first openings on both sides of the third target area A3 is 100 μm. The diameters of the first opening and the second opening are 3.2 μm.

[0150] In the first target area A1 on one side of the third target area A3, the first openings are distributed in 18 rows and 1550 columns, and the distance between the outer edge of the laser substrate and the nearest first opening is 90 μm.

[0151] In the rectangular second target area A2 at one end of the third target area A3 in the length direction, the distance between the outer edge of the laser substrate and the nearest second opening is 20 μm, and the distance between the outer edge of the laser substrate and the farthest second opening is 100 μm.

[0152] In the trapezoidal second target area A2 at the other end of the third target area A3 in the length direction, the distance between the outer edge of the laser substrate and the nearest second opening is 20 μm, and the distance between the outer edge of the laser substrate and the farthest second opening is 200 μm. The minimum distance between the first openings on both sides of the two hypotenuses of the trapezoid is 100 μm, and the maximum distance is 110 μm.

[0153] Step S208, forming a plurality of third openings 33 in the P-type cladding layer 16 exposed by the plurality of first openings; forming a third opening 33 corresponding to each first opening position; the width of the third opening 33 is smaller than the width of the first opening, and the third opening 33 penetrates into the P-type cladding layer 16 by a first distance; Fig.12 shown.

[0154] In the specific implementation, firstly, a third patterned photoresist layer 83 is formed on the surface of the hard mask layer 20 facing away from the P-type cap layer 17; the second patterned photoresist layer 82 fills the inner wall of the second groove 32 and the first groove 31, exposing the surface of the P-type cladding layer 16 corresponding to the plurality of third openings 33, as shown in FIG. Fig.10 Then the third opening 33 corresponding to the P-type cladding layer 16 is etched to form a third opening 33 below each first opening, the third opening 33 penetrates the first distance of the P-type cladding layer 16, the depth of the third opening 33 is the first distance, such as Fig.11 Specifically, the first distance is 0.6 μm, the diameter of the third opening 33 is 1.6 μm, and the depth of the third opening 33 is 0.6 μm.

[0155] The reason for differential lithography here is that the current limiting area (second groove) only needs to be etched to the P-type cap layer. If it is etched deeper, it will cause increased loss at the end, which will reduce the performance of the chip and have a negative effect. However, the etching depth of the mode filtering area (first groove) is insufficient. The mode filtering of the photonic crystal requires the periodic structure to be made in the P-type waveguide layer, so differential lithography is performed here.

[0156] Step S209, the first groove 31, the second groove 32 and the third opening 33 are etched downward by a second distance, so that the first groove 31 and the second groove 32 penetrate into a part of the P-type cladding layer 16, and the third opening 33 penetrates into a part of the P-type waveguide layer 15; the depth of the first groove 31 and the second groove 32 is less than the depth of the ion implantation area, such as Fig.13 shown.

[0157] The advantages of using this etching method here are: if the hole with a diameter of 1.6μm is directly etched to a depth of 1μm, it will be a great challenge to the process; it will be difficult to control the depth and sidewall morphology uniformly, resulting in poor results and affecting the final performance; therefore, the difficulty of the process is reduced by combining the method of distributed etching of grooves and holes.

[0158] In specific implementation, after etching downward by the second distance, the depth of the third opening 33 is the first distance; the depth of the first groove 31 and the second groove 32 is the sum of the thickness of the P-type cap layer 17 and the second distance. Specifically, the second distance is 0.2 μm, the depth of the third opening 33 is 0.6 μm, and the depth of the first groove 31 and the second groove 32 is 0.4 μm.

[0159] Step S210, forming an insulating layer 40 on the surface of the hard mask layer 20 facing away from the P-type cap layer 17, the insulating layer 40 fills the first groove 31 and the second groove 32 to form a first insulating groove 41 and a second insulating groove 42; the insulating layer 40 also fills the first hard mask groove and the second hard mask groove; the insulating layer 40 also penetrates into the third opening 33, covers the sidewall of the third opening 33, and forms an air column 43 in the third opening 33, such as Fig.14 As shown, the first insulating slot 41 and the air column 43 form a first photonic crystal 51; the second insulating slot 42 forms a second photonic crystal 52. The first target area A1 forms a mode filtering area B, the second target area A2 forms a current limiting area C, and the third target area A3 forms a current injection area D.

[0160] In a specific implementation, the material of the insulating layer 40 is SiN, and the thickness of the insulating layer 40 is 300nm. The depth of the first insulating groove 41 and the depth of the second insulating groove 42 are 0.4μm; the depth of the air column 43 is 0.6μm; the diameter of the first insulating hole is 3.2μm; the distance between adjacent first insulating holes is less than or equal to 3.2μm; the diameter of the air column 43 is 1.6μm. The first insulating groove 41 includes a plurality of partially overlapping first insulating holes; the second insulating groove 42 includes a plurality of partially overlapping second insulating holes; the diameter of the first insulating hole is 3.2μm; the distance between adjacent first insulating holes is less than or equal to 3.2μm; the diameter of the second insulating hole is 3.2μm; the distance between adjacent second insulating holes is less than or equal to 3.2μm.

[0161] Here, the growth mode of SiN needs to grow quickly because the coverage of SiN needs to be reduced, so that the third opening 33 with a diameter of 1.6μm at the bottom will not be filled with SiN, while the first groove above is filled because of its larger size; through this difference, on the one hand, an air column 43 is formed as an effective part of the photonic crystal, and on the other hand, a layer of SiN is deposited on the first groove and the chip surface as a protective layer, which also acts as an insulating layer.

[0162] Since the second photonic crystal 52 is distributed in the current limiting region C, the highly doped surface P-type cap layer is periodically etched away and filled with an insulating layer. In this way, the current at the two ends of the chip will be limited to a certain extent, which can effectively reduce the effective light emission at the ends, reduce the local temperature, and effectively improve the electrical performance and reliability of the chip.

[0163] Step S211, etching the insulating layer 40 and the hard mask layer 20 corresponding to the current injection region D to form an electrode window 70, wherein the electrode window 70 exposes the P-type cap layer 17 of the current injection region D. Fig.15 As shown; a metal seed layer 60 is formed on the surface of the insulating layer 40 facing away from the hard mask layer 20; the metal seed layer 60 also covers the surface of the P-type cap layer 17 of the current injection region D, as shown Fig.16 A first electrode layer 71 is formed on the surface of the metal seed layer 60 facing away from the insulating layer 40, as shown in FIG. Fig.17 shown.

[0164] In the specific implementation, it is necessary to etch SiN with a thickness of 300nm and SiO2 with a thickness of 150nm, because SiO2 is used as a hard mask and is lost by about 50nm in the previous process. The current injection area is a rectangle with a length of 4690μm and a width of 90μm, and the minimum distance from the first insulating groove and the second insulating groove is 5μm. The material of the metal seed layer 60 and the first electrode layer is gold. The thickness of gold is 2.5μm~3μm.

[0165] Step S212, thinning the side of the substrate 11 facing away from the N-type cladding layer 12; forming a second electrode layer 72 on the surface of the thinned substrate 11 facing away from the N-type cladding layer 12, such as Fig.18 shown.

[0166] This embodiment also provides a photonic crystal edge emitting laser, such as Fig.18 As shown, the photonic crystal edge emitting laser comprises:

[0167] The laser matrix includes, from bottom to top, a substrate 11, an N-type cladding layer 12, an N-type waveguide layer 13, an active layer 14, a P-type waveguide layer 15, a P-type cladding layer 16, and a P-type cap layer 17;

[0168] The laser substrate includes a rectangular third target area A3 and second target areas A2 at both ends of the third target area A3 in the vertical direction, and a first target area A1 located at the side of the third target area A3 and the second target area;

[0169] The first target area A1 includes an ion implantation area; the first target area A1 is a mode filtering area B; the second target area A2 is a current limiting area C, and the third target area A3 is a current implantation area D;

[0170] Photonic crystals are distributed in the mode filtering region B and the current limiting region C.

[0171] The photonic crystal edge-emitting laser provided in this embodiment, on the one hand, the first target area is a mode filtering area, in which photonic crystals are distributed, and the photonic crystals in the mode filtering area can filter high-order modes, allowing only laser resonance within a certain wavelength range, and at the same time can enhance the heat dissipation characteristics of the device in the lateral direction, thereby improving the electrical performance of the device when working under a large current; on the other hand, the second target area is a current limiting area, in which photonic crystals are distributed, and the photonic crystals in the current limiting area can control the current injection near the light-emitting surface, thereby controlling the luminescence of the area, reducing the local temperature of the area, thereby improving the performance and reliability of the chip. Therefore, the photonic crystal edge-emitting laser provided in this embodiment can enhance the heat dissipation characteristics of the device in the lateral direction, thereby improving the electrical performance of the device when working under a large current, and can also control the current injection near the light-emitting surface, thereby controlling the luminescence of the area, reducing the local temperature of the area, thereby improving the performance and reliability of the chip.

[0172] In an optional embodiment, the ion implantation region includes the P-type cap layer 17 of the first target region A1 and a corresponding portion of the P-type cladding layer 16;

[0173] The mode filter area B includes a first photonic crystal 51; the first photonic crystal 51 includes a first insulating groove 41 and an air column 43; the first insulating groove 41 is located in the P-type cap layer 17 and a part of the P-type cladding layer 16 of the first target area A1; the depth of the first insulating groove 41 is less than the depth of the ion implantation area; the air column 43 is located below the first insulating groove 41 and in the remaining part of the P-type cladding layer 16 and a part of the P-type waveguide layer 15; the width of the air column 43 is less than the width of the first insulating groove 41; the first insulating groove 41 includes a plurality of first insulating holes that are partially overlapped and connected;

[0174] The current limiting region C includes a second photonic crystal 52; the second photonic crystal 52 is a second insulating groove 42; the second insulating groove 42 is located in the P-type cap layer 17 and a part of the P-type cladding layer 16 of the second target area A2; the depth of the second insulating groove 42 is less than the depth of the ion implantation region; the second insulating groove 42 includes a plurality of partially overlapping second insulating holes;

[0175] The insulating layer 40 is located on a surface of the P-type cap layer 17 facing away from the P-type cladding layer 16 .

[0176] In an optional embodiment, the thickness of the P-type cap layer 17 is 0.2 μm;

[0177] The thickness of the P-type cladding layer 16 is greater than 0.6 μm and less than 0.8 μm;

[0178] The depth of the ion implantation region is 0.5 μm; the ion implantation region includes a P-type cap layer 17 and a portion of a P-type cladding layer 16; the thickness of the portion of the P-type cladding layer 16 is 0.3 μm;

[0179] The current injection region D is 4690 μm long and 90 μm wide;

[0180] The distance between the current injection region D and the nearest edge of the first insulating groove 41 is 5 μm, and the distance between the current injection region D and the nearest edge of the second insulating groove 42 is 5 μm;

[0181] The depth of the first insulating groove 41 and the depth of the second insulating groove 42 are 0.4 μm; the depth of the air column 43 is 0.6 μm;

[0182] The diameter of the first insulating hole is 3.2 μm; the distance between adjacent first insulating holes is less than or equal to 3.2 μm;

[0183] The diameter of the second insulating hole is 3.2 μm; the distance between adjacent second insulating holes is less than or equal to 3.2 μm;

[0184] The diameter of the air column 43 is 1.6 μm.

[0185] In the description of this specification, the description with reference to the terms "this embodiment", "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples, unless otherwise clearly and specifically defined. In addition, the terms "first" and "second" are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, the features defined as "first" and "second" can explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0186] In the above description, the technical details of the patterning and etching of each layer are not described in detail. However, those skilled in the art should understand that various technical means can be used to form layers, regions, etc. of desired shapes. In addition, in order to form the same structure, those skilled in the art can also design methods that are not completely the same as the methods described above. In addition, although the various embodiments are described above separately, this does not mean that the measures in the various embodiments cannot be used in combination to advantage.

[0187] The above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described above, and that various obvious changes, readjustments, combinations and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention is described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may also include more other equivalent embodiments without departing from the concept of the present invention. The scope of protection of the present invention is determined by the scope of the attached claims.

Claims

1. A method for preparing a photonic crystal edge-emitting laser, characterized in that: include: Providing a laser matrix, the laser matrix comprising, from bottom to top, a substrate, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a P-type cap layer; The laser substrate includes a rectangular third target area in the vertical direction, second target areas at both ends of the third target area in the length direction, and a first target area located at the sides of the third target area and the second target area; Performing an ion implantation process on one side of the P-type cap layer in the first target region to form an ion implantation region in the first target region; the depth of the ion implantation region is greater than the thickness of the P-type cap layer; forming a photonic crystal in the first target region and the second target region; The first target area forms a mode filtering area, the second target area forms a current limiting area, and the third target area forms a current injection area; Wherein, the step of forming photonic crystals in the first target area and the second target area comprises: Forming a first groove in the first target area and forming a second groove in the second target area; the first groove and the second groove penetrate the P-type cap layer and expose the surface of the P-type cladding layer; A plurality of third openings are formed in the P-type cladding layer exposed by the first groove; the width of the third openings is smaller than the width of the first groove; and the third openings penetrate into a portion of the P-type cladding layer; Etching the first groove, the second groove and the third opening downward by a second distance, so that the first groove and the second groove penetrate into a part of the P-type cladding layer, and the third opening penetrates into a part of the P-type waveguide layer; the depths of the first groove and the second groove are less than the depth of the ion implantation region; An insulating layer is formed on one side of the P-type cap layer, and the insulating layer fills the first groove and the second groove to form a first insulating groove and a second insulating groove; the insulating layer also penetrates into the third opening, covers the side wall of the third opening, and forms an air column in the third opening; the first insulating groove and the air column are a first photonic crystal; the second insulating groove forms a second photonic crystal.

2. The method for preparing a photonic crystal edge emitting laser according to claim 1, characterized in that: The ion implantation region includes the P-type cap layer of the first target region and a corresponding portion of the P-type cladding layer.

3. The method for preparing a photonic crystal edge emitting laser according to claim 2, characterized in that: Before the step of performing an ion implantation process on one side of the P-type cap layer in the first target region and forming an ion implantation region in the first target region, the step further includes: forming a hard mask layer on a surface of the P-type cap layer facing away from the P-type cladding layer; A first patterned photoresist layer is formed on a surface of the hard mask layer facing away from the P-type cap layer; the first patterned photoresist layer covers the hard mask layer corresponding to the second target area and the third target area, and exposes the hard mask layer corresponding to the first target area; The step of performing an ion implantation process on one side of the P-type cap layer in the first target region to form an ion implantation region in the first target region comprises: An ion implantation process is performed on a side of the hard mask layer corresponding to the P-type cap layer of the first target region, and the P-type cap layer of the first target region and a corresponding portion of the P-type cladding layer form an ion implantation region.

4. The method for preparing a photonic crystal edge emitting laser according to claim 3, characterized in that: The step of forming a first groove in the first target area and forming a second groove in the second target area comprises: A second patterned photoresist layer is formed on a surface of the hard mask layer facing away from the P-type cap layer; the second patterned photoresist layer exposes the first groove and the hard mask layer corresponding to the second groove; Etching the hard mask layer corresponding to the first groove and the second groove to form a first hard mask groove and a second hard mask groove, wherein the first hard mask groove and the second hard mask groove respectively expose the surface of the P-type cap layer corresponding to the first groove and the second groove; The P-type cap layer corresponding to the first groove and the second groove is etched to form a first groove in the first target area and a second groove in the second target area; the first groove and the second groove penetrate the P-type cap layer and expose the surface of the P-type cladding layer; the first groove and the second groove are respectively connected to the first hard mask groove and the second hard mask groove.

5. The method for preparing a photonic crystal edge emitting laser according to claim 4, characterized in that: The step of forming an insulating layer on one side of the P-type cap layer, wherein the insulating layer fills the first groove and the second groove, and forming the first insulating groove and the second insulating groove comprises: An insulating layer is formed on a surface of the hard mask layer facing away from the P-type cap layer, and the insulating layer also fills the first hard mask groove and the second hard mask groove.

6. The method for preparing a photonic crystal edge emitting laser according to claim 5, characterized in that: After the step of forming an insulating layer on one side of the P-type cap layer, wherein the insulating layer fills the first groove and the second groove to form the first insulating groove and the second insulating groove, the method further includes: Etching the insulating layer and the hard mask layer corresponding to the current injection region to form an electrode window, wherein the electrode window exposes the P-type cap layer in the current injection region; forming a metal seed layer on a surface of the insulating layer facing away from the hard mask layer; the metal seed layer also covers a surface of the P-type cap layer in the current injection region; forming a first electrode layer on a surface of the metal seed layer facing away from the insulating layer; Thinning a side of the substrate facing away from the N-type cladding layer; A second electrode layer is formed on the thinned surface of the substrate facing away from the N-type cladding layer.

7. The method for preparing a photonic crystal edge emitting laser according to claim 2, characterized in that: In the step of forming a first groove in the first target area and forming a second groove in the second target area, the first groove is formed by a plurality of first openings partially overlapping and connected, and the first openings penetrate the P-type cap layer and expose the surface of the P-type cladding layer; The second groove is formed by partially overlapping and connecting a plurality of second openings, and the second openings penetrate the P-type cap layer and expose the surface of the P-type cladding layer.

8. The method for preparing a photonic crystal edge emitting laser according to claim 7, characterized in that: The step of forming a plurality of third openings in the P-type cladding layer exposed in the first groove comprises: A plurality of third openings are formed in the P-type cladding layer exposed by the plurality of first openings; a third opening is formed corresponding to each first opening position; and a width of the third opening is smaller than a width of the first opening.

9. The method for preparing a photonic crystal edge emitting laser according to claim 2, characterized in that: In the step of forming a plurality of third openings in the P-type cladding layer exposed by the first groove, the third openings penetrate into the P-type cladding layer by a first distance; the depth of the third openings is the first distance; the depth of the first groove and the second groove is the thickness of the P-type cap layer; In the step of etching the first groove, the second groove and the third opening downward by a second distance, the depth of the third opening is the first distance; the depth of the first groove and the second groove is the sum of the thickness of the P-type cap layer and the second distance.

10. A photonic crystal edge emitting laser, characterized in that: include: A laser matrix, which comprises, from bottom to top, a substrate, an N-type cladding layer, an N-type waveguide layer, an active layer, a P-type waveguide layer, a P-type cladding layer, and a P-type cap layer; The laser substrate includes a rectangular third target area in the vertical direction, second target areas at both ends of the third target area in the length direction, and a first target area located at the sides of the third target area and the second target area; The first target area includes an ion implantation area; the first target area is a mode filtering area; the second target area is a current limiting area, and the third target area is a current injection area; Photonic crystals are distributed in the mode filtering region and in the current limiting region; Wherein, the mode filter area includes a first photonic crystal; the first photonic crystal includes a first insulating groove and an air column; the first insulating groove is located in the P-type cap layer and part of the P-type cladding layer of the first target area; the depth of the first insulating groove is less than the depth of the ion implantation area; the air column is located below the first insulating groove and in the remaining part of the P-type cladding layer and part of the P-type waveguide layer; the width of the air column is less than the width of the first insulating groove; the first insulating groove includes a plurality of first insulating holes that are partially overlapped and connected; The current limiting region includes a second photonic crystal; the second photonic crystal is a second insulating groove; the second insulating groove is located in the P-type cap layer and part of the P-type cladding layer in the second target region; the depth of the second insulating groove is less than the depth of the ion implantation region; the second insulating groove includes a plurality of second insulating holes partially overlapped and connected; The photonic crystal edge emitting laser further comprises: The insulating layer is located on a surface of the P-type cap layer facing away from the P-type cladding layer.

11. The photonic crystal edge emitting laser according to claim 10, characterized in that: The ion implantation region includes the P-type cap layer of the first target region and a corresponding portion of the P-type cladding layer.

12. The photonic crystal edge emitting laser according to claim 11, characterized in that: The thickness of the P-type cap layer is 0.2 μm; The thickness of the P-type cladding layer is greater than 0.6 μm and less than 0.8 μm; The depth of the ion implantation region is 0.5 μm; the ion implantation region includes the P-type cap layer and part of the P-type cladding layer; the thickness of part of the P-type cladding layer is 0.3 μm; The current injection region is 4690 μm long and 90 μm wide; The distance between the current injection region and the nearest edge of the first groove is 5 μm, and the distance between the current injection region and the nearest edge of the second groove is 5 μm; The depth of the first insulating groove and the depth of the second insulating groove are 0.4 μm; the depth of the air column is 0.6 μm; The diameter of the first insulating hole is 3.2 μm; the distance between adjacent first insulating holes is less than or equal to 3.2 μm; The diameter of the second insulating hole is 3.2 μm; the distance between adjacent second insulating holes is less than or equal to 3.2 μm; The diameter of the air column is 1.6 μm.

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