A sawtooth generator for voltage mode DC-DC

Abstract

The present application relates to the technical field of integrated circuits, and discloses a sawtooth wave generator for voltage mode DC-DC, comprising a current mirror, an input end of the current mirror being connected with a reference current generation module, an output end being connected with one end of an energy storage capacitor C4 through a controllable switch, the other end of the energy storage capacitor being grounded, a controllable end of the controllable switch being connected with a pulse generator, the reference current generation module generating a reference current source by using a switched capacitor technology, the reference current source being 1:M copied through the current mirror, the output current being used for charging the energy storage capacitor C4, under the control of the pulse generator, the controllable switch repeatedly switching at a set frequency, so that the energy storage capacitor C4 can be repeatedly charged to a set voltage and then rapidly discharged to zero, thereby generating a sawtooth wave.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, specifically a sawtooth wave generator for voltage-mode DC-DC converters. Background Technology

[0002] DC / DC switching power supplies are DC-to-DC converters that use modern electronic technology to control the on and off time ratio of switching transistors to maintain the output voltage. Their core technology consists of a pulse width modulation (PWM) module and MOSFETs. They are characterized by small size, high conversion efficiency, and lightweight design, and are widely used in almost all electronic devices, including electronics, communications, electrical engineering, energy, aerospace, and home appliances. They are an indispensable power supply method for the rapid development of today's electronics industry.

[0003] The core of the PWM module in a DC / DC switching power supply is the sawtooth wave oscillator. Its performance affects the characteristics of the switching power supply. Therefore, the requirements for the sawtooth wave oscillator are relatively high. It needs to generate a stable output signal under changes or drifts in power supply voltage, temperature, etc.

[0004] Existing sawtooth wave generator technology has the following problems:

[0005] (1) In the sawtooth wave generator shown in Figure 6(a), the reference current and comparator delay vary greatly with the PVT, which will cause a large deviation in the output frequency of the sawtooth wave oscillator. Fine calibration of the capacitor / current is required to obtain the sawtooth wave at the desired target frequency.

[0006] (2) In the sawtooth wave generator shown in Figure 6(b), although the frequency of the sawtooth wave can be precisely controlled without calibration, the amplitude of the generated sawtooth wave is severely affected by the PVT. Under normal process conditions, the deviation of capacitors and resistors is 20%-30%, which will cause the maximum and minimum amplitude of the sawtooth wave to differ by more than double. If the amplitude is too large / distorted, the comparator in the next stage will not work properly, especially when the duty cycle of the DC-DC output is large. If the amplitude is too small, the signal will be more susceptible to interference, the duty cycle accuracy of the output signal will be reduced, and the power supply output will be prone to large errors. Summary of the Invention

[0007] This invention provides a sawtooth wave generator for voltage-mode DC-DC converters that can adapt to changes in process angle (P-process), power supply voltage (V-Voltage), and temperature (T-Temperature), eliminating the need for additional post-calibration. This fundamentally reduces the design complexity of the chip and the complexity of post-shipment testing and calibration, providing a highly reliable frequency source for DC-DC converters.

[0008] This invention can be achieved through the following technical solutions:

[0009] A sawtooth wave generator for voltage-mode DC-DC converters includes a current mirror. The input terminal of the current mirror is connected to a reference current generation module, and its output terminal is connected to one end of an energy storage capacitor C4 via a controllable switch. The other end of the energy storage capacitor is grounded. The controllable terminal of the controllable switch is connected to a pulse generator. The reference current generation module generates a reference current source using switched capacitor technology.

[0010] The reference current source is replicated 1:M by a current mirror, and its output current is used to charge the energy storage capacitor C4. Under the control of the pulse generator, the controllable switch switches repeatedly at a set frequency to control the energy storage capacitor C4 to be repeatedly charged to the set voltage and then quickly discharged to zero, thereby generating a sawtooth wave.

[0011] Furthermore, the capacitance ratio of the energy storage capacitors C3 and C4 used in the reference current generation module is the same as the current replication ratio of the current mirror.

[0012] Furthermore, the reference current generation module uses an inverter as the control medium and, under the control of the clock unit, repeatedly charges and discharges the energy storage capacitor C3 to generate a dynamic reference current source.

[0013] Furthermore, the reference current generation module includes an inverter, the input of which is connected to the clock unit, the output of which is connected to the energy storage capacitor C3, and the power supply of which is connected to the input of the current mirror.

[0014] Furthermore, the controllable switch is configured as a field-effect transistor MN1. The gate of the field-effect transistor MN1 is connected to the output terminal of the pulse generator, its source is grounded, its drain is connected to one end of the energy storage capacitor C4, and is also connected to the output terminal of the current mirror. The other end of the energy storage capacitor C4 is grounded, and the input terminal of the pulse generator is connected to the clock unit.

[0015] Furthermore, the current mirror includes a field-effect transistor MP1, the gate of which is connected to the gate of a field-effect transistor MP2, the source of which is connected to the power supply VDD along with the source of the field-effect transistor MP2, the drain of which is connected to the power supply terminal of an inverter and also connected to the connection line between the gate of the field-effect transistor MP1 and the gate of the field-effect transistor MP2, and the drain of the field-effect transistor MP2 is connected to the drain of the field-effect transistor MN1.

[0016] Furthermore, a voltage regulator capacitor C1 is connected between the gate and source of the field-effect transistor MP1, and its RC filter circuit is connected to the gate of the field-effect transistor MP2.

[0017] Furthermore, the field-effect transistors MP1 and MP2 are P-channel field-effect transistors, while the field-effect transistor MN1 is an N-channel field-effect transistor.

[0018] The beneficial technical effects of this invention are as follows:

[0019] A reference current source is obtained using switched capacitor technology. This current is then used to charge the capacitor, allowing for precise control of the sawtooth wave's frequency and amplitude. The frequency is determined by the pulse generator's frequency, according to formula U. C4,MAX =U C3,MAX =VDD-V GS,MP1 The swing amplitude is determined by the power supply voltage VDD and the voltage V of the field-effect transistor MP1. GS The output range of the sawtooth generator, the preamplifier in a DC-DC power supply, is VDD-V, which is independent of the capacitor and resistor. Therefore, it can be precisely controlled. gs,mp1 The common-mode input range of the subsequent comparator is also VDD-V. gs,mp1 When PVT changes, V gs,mp1 The input and output ranges of the preceding and following stages will always match, regardless of the changes. Therefore, it can adapt to changes in PVT without additional calibration, which fundamentally reduces the design complexity of the chip and the testing and calibration steps after shipment, providing a highly reliable frequency source for DC-DC converters. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the circuit structure of the sawtooth generator of the present invention;

[0021] Figure 2 For the present invention Figure 1 A schematic diagram of voltage change curves for each node;

[0022] Figure 3(a) is a schematic diagram of the sawtooth waveform generated by the sawtooth wave generator of the present invention under the same temperature (40℃) and voltage (2.4V) at different process angles;

[0023] Figure 3(b) is a schematic diagram of the sawtooth waveform generated by the sawtooth wave generator of the present invention at different temperatures under the same process angle (tt) and voltage (2.4V);

[0024] Figure 3(c) is a schematic diagram of the sawtooth waveform generated by the sawtooth wave generator of the present invention under the same process angle (tt) and temperature (40℃) and different voltages;

[0025] Figure 4(a) shows the waveforms generated by the sawtooth wave generator of the present invention at the same temperature (40°C) and voltage (2.4V) under different process angles, as well as the common-mode input range of the comparator;

[0026] Figure 4(b) shows the waveforms generated by the sawtooth wave generator of the present invention at the same process angle (tt) and voltage (2.4V) at different temperatures, as well as the common-mode input range of the comparator;

[0027] Figure 4(c) shows the waveforms generated by the sawtooth wave generator of the present invention at the same process angle (tt), temperature (40°C), and different voltages, as well as the common-mode input range of the comparator;

[0028] Figure 5 Simulation circuit of the common-mode input range of the corresponding subsequent comparator for the sawtooth wave generator of the present invention used in a DC-DC power supply;

[0029] Figures 6(a) and 6(b) are schematic diagrams of the inductance magnetic field lines distribution in the prior art DC-DC circuit. Detailed Implementation

[0030] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings and preferred embodiments.

[0031] like Figure 1 and 2 As shown, this invention provides a sawtooth wave generator for voltage-mode DC-DC converters, comprising a current mirror. The input terminal of the current mirror is connected to a reference current generation module, and the output terminal is connected to one end of an energy storage capacitor C4 via a controllable switch. The other end of the energy storage capacitor is grounded. The controllable terminal of the controllable switch is connected to a pulse generator. The reference current generation module generates a dynamic reference current source using switched capacitor technology. The reference current source is replicated 1:M times by the current mirror, and its output current is used to charge the energy storage capacitor C4. Under the control of the pulse generator, the controllable switch repeatedly switches on and off at a set frequency to control the energy storage capacitor C4 to be repeatedly charged to a set voltage and then rapidly discharged to zero, thereby generating a sawtooth wave.

[0032] In this way, based on the traditional sawtooth wave generator, a reference current source that adapts to PVT changes is obtained through switched capacitor technology. After being replicated by a current mirror, this current is used to repeatedly charge and discharge the energy storage capacitor C4 to generate a sawtooth wave. This systematically realizes a sawtooth wave generator with the optimal swing amplitude, thereby reducing the complexity of the chip's early design and saving the cost of later testing and calibration.

[0033] Specifically as follows:

[0034] The current mirror includes a field-effect transistor (FET) MP1, whose gate is connected to the gate of FET MP2. Its source and the source of FET MP2 are connected to the power supply VDD. Its drain is connected to the power supply terminal of an inverter and also to the connection line between the gates of FET MP1 and FET MP2. The drain of FET MP2 is connected to the drain of FET MN1. FETs MP1 and MP2 are P-channel FETs, while FET MN1 is an N-channel FET.

[0035] To stabilize the V of the field-effect transistor MP1 GS For voltage regulation, we have a voltage regulator capacitor C1 connected between the gate and source of the field-effect transistor MP1. The RC filter circuit is connected to the gate of the field-effect transistor MP2. The resistor R1 of the RC filter circuit is connected between the gate of the field-effect transistor MP1 and the gate of the field-effect transistor MP2, and the capacitor C2 is connected between the gate and source of the field-effect transistor MP2.

[0036] The reference current generation module includes an inverter. The input of the inverter is connected to the clock unit, the output is connected to the energy storage capacitor C3, and the power supply is connected to the input of the current mirror. That is, the inverter is used as a control medium to repeatedly charge and discharge the energy storage capacitor C3 under the control of the clock unit, thereby constructing a switched capacitor and generating a dynamic reference current source.

[0037] The controllable switch can be configured as a field-effect transistor (FET) MN1. The gate of FET MN1 is connected to the output of the pulse generator, its source is grounded, and its drain is connected to one end of the energy storage capacitor C4 and the output of the current mirror. The other end of the energy storage capacitor C4 is grounded, and the input of the pulse generator is connected to the clock unit. When FET MN1 is turned on, the energy storage capacitor C4 forms a circuit with the ground through FET MN1, allowing for rapid discharge of the energy storage capacitor C4, corresponding to the falling edge of the sawtooth wave. During the off period of FET MN1, the output current replicated by the current mirror continuously charges the energy storage capacitor C4, causing the voltage across the energy storage capacitor C4 to increase linearly until FET MN1 is turned on, corresponding to the rising edge of the sawtooth wave. The charging time can be determined by the operating frequency of the pulse generator. Under the control of the pulse generator, FET MN1 will turn on / off according to the set frequency, and the above process will repeat, thus outputting a sawtooth wave.

[0038] In summary, such as Figure 1 As shown, this invention is based on ① using an inverter to repeatedly charge and discharge the energy storage capacitor C3 to construct a switched capacitor and generate an "adaptive PVT" current source, and ② using a voltage regulator capacitor C1 to stabilize the V of the field-effect transistor MP1. GSThe voltage passes through a low-pass filter network composed of R1 and C2. ③ The field-effect transistor MP2 replicates the current of the field-effect transistor MP1 by a ratio of 1:M and uses this current to charge the energy storage capacitor C4. ④ The field-effect transistor MN1 is controlled by the voltage of the pulse generator and releases the charge accumulated on the energy storage capacitor C4 to ground every cycle. The energy storage capacitors C3 and C4 are matched in a ratio of 1:N.

[0039] The basic principle of the sawtooth wave generator of this invention is as follows:

[0040] (A) The current source generation mechanism of "adaptive PVT" is: charging the energy storage capacitor C3 through an inverter. Figure 1 The maximum value of the voltage at node ① is U C3,MAX =VDD-V GS,MP1 A switched-capacitor reference current generation module based on an inverter generates a dynamic reference current I. INV The calculation formula is as follows:

[0041] I INV =C3*U C3,MAX *F CLK

[0042] Among them, F CLK The operating frequency of the input clock unit CLK.

[0043] (B) The field-effect transistor MP2 replicates the current of field-effect transistor MP1 at a ratio of 1:M. The current of field-effect transistor MP2, which is the output current of the current mirror, is...

[0044] I MP2 =M*I MP1 =M*I INV =M*C3*U C3,MAX *F CLK

[0045] (C) Field-effect transistor IMP2 charges energy storage capacitor C4, and the maximum voltage of energy storage capacitor C4 is...

[0046]

[0047] Assuming M = N, then U C4,MAX =U C3,MAX =VDD-V GS,MP1 This results in variations in the sawtooth wave amplitude generated by the sawtooth wave generator of the present invention and in the common-mode input range (VDD-V) of the subsequent comparator. gs,mp1 It is consistent with PVT and can adapt to changes without additional calibration, which fundamentally reduces the design complexity of the chip and the testing and calibration steps after shipment, providing a highly reliable frequency source for DC-DC.

[0048] (D) Figure 1 The waveforms of nodes ① to ⑥ are as follows: Figure 2 As shown, in the simulation, VDD = 2.4V, and ④ is a square wave signal from 0 to VDD with a frequency of DC-DC operating frequency (1.8MHz in the simulation). In actual design, the clock input to the inverter can be K times the operating frequency. A higher frequency clock is beneficial to reduce the area overhead of the subsequent RC filter.

[0049] ① The high level of node ① follows the change of node ②. After RC filtering, node ③ is obtained, and its voltage is almost stable, which is VDD-VGS≈1.7V (simulation value); ⑤ Node generates a high-level pulse on the falling edge of each clock cycle; ⑥ Node has a sawtooth waveform, and its voltage returns to 0 after each high-level pulse, and it starts charging again. The maximum value of the sawtooth waveform voltage is also VDD-VGS≈1.7V (simulation value), which automatically adapts to the voltage input range of the comparator circuit in the next stage.

[0050] When the PVT changes, the sawtooth wave waveform generated by the sawtooth wave generator of the present invention is as follows: Figures 3(a)-3(c) As shown. When the process angle changes, V GS,ss >V GS,tt >V GS,ff Then the maximum value U of the sawtooth wave C4,MAX_ss C4,MAX_tt C4,MAX_ff When the temperature changes, V GS,-40℃ >V GS,40℃ >V GS,125℃ Then the maximum value U of the sawtooth wave C4,MAX_-40℃ C4,MAX_40℃ C4,MAX_-125℃ When the power supply voltage VDD changes, a change in VDD-U can be observed. C4,MAX_2V ≈VDD-U C4,MAX_2.4V ≈VDD-U C4,MAX_2.8V In summary, this change in the maximum value of the sawtooth wave perfectly matches the PVT change in the input range of the subsequent comparator, as detailed in [link to documentation]. Figures 4(a)-4(c) .

[0051] Figures 4(a)-4(c) The right side shows the simulation of the common-mode input range of the subsequent comparator under the corresponding conditions. The subsequent comparator is configured as a unity-gain buffer, as shown below. Figure 5 ​​​​As shown, when the input Vin changes, if the output Vout follows the change in input, it means that the input Vin is within the common-mode input range Vcm of the subsequent comparator, which is the straight line segment of the curve in Figure 4. When the input Vin gradually increases, the output Vout can no longer follow the change in input Vin, and its output voltage curve bends. The inflection point of the curve is the maximum input range of the comparator. It can be observed that when PVT changes, the maximum value of the sawtooth wave is always exactly equal to the maximum input range of the subsequent comparator. Therefore, this circuit can adapt to changes in PVT and can always generate a sawtooth wave signal that is optimal for the circuit.

[0052] This invention utilizes the high matching between capacitors to establish a strong correlation between the charging current and the charging capacitor, thereby solving the technical problems of mismatch caused by capacitor and resistor decoupling in traditional sawtooth wave generators and reducing the cost of subsequent testing and calibration.

[0053] While specific embodiments of the present invention have been described above, those skilled in the art should understand that these are merely illustrative examples. Various changes or modifications can be made to these embodiments without departing from the principles and essence of the present invention. Therefore, the scope of protection of the present invention is defined by the appended claims.

Claims

1. A sawtooth wave generator for voltage-mode DC-DC converters, characterized in that: The system includes a current mirror, whose input is connected to a reference current generation module, and whose output is connected to one end of an energy storage capacitor C4 via a controllable switch. The other end of the energy storage capacitor C4 is grounded. The controllable terminal of the controllable switch is connected to a pulse generator. The reference current generation module uses switched capacitor technology to generate a reference current source. The reference current source is replicated by a current mirror at a ratio of 1:M. Its output current is used to charge the energy storage capacitor C4. Under the control of the pulse generator, the controllable switch switches repeatedly at a set frequency to control the energy storage capacitor C4 to be repeatedly charged to the set voltage and then quickly discharged to zero, thereby generating a sawtooth wave. The reference current generation module uses an inverter as the control medium and, under the control of the clock unit, repeatedly charges and discharges the energy storage capacitor C3 to generate a dynamic reference current source. The reference current generation module includes an inverter, the input of which is connected to a clock unit, the output of which is connected to an energy storage capacitor C3, and the power supply of which is connected to the input of a current mirror. The controllable switch is configured as a field-effect transistor MN1. The gate of the field-effect transistor MN1 is connected to the output terminal of the pulse generator, its source is grounded, its drain is connected to one end of the energy storage capacitor C4, and is also connected to the output terminal of the current mirror. The other end of the energy storage capacitor C4 is grounded, and the input terminal of the pulse generator is connected to the clock unit.

2. The sawtooth wave generator for voltage-mode DC-DC according to claim 1, characterized in that: The capacitance ratio of the energy storage capacitors C3 and C4 used in the reference current generation module is the same as the current replication ratio of the current mirror.

3. The sawtooth wave generator for voltage-mode DC-DC according to claim 1, characterized in that: The current mirror includes a field-effect transistor MP1, whose gate is connected to the gate of a field-effect transistor MP2, whose source is connected to the power supply VDD along with the source of the field-effect transistor MP2, whose drain is connected to the power supply terminal of an inverter and also connected to the connection line between the gates of the field-effect transistors MP1 and MP2, and whose drain is connected to the drain of the field-effect transistor MN1.

4. The sawtooth wave generator for voltage-mode DC-DC according to claim 3, characterized in that: A voltage regulator capacitor C1 is connected between the gate and source of the field-effect transistor MP1, and its RC filter circuit is connected to the gate of the field-effect transistor MP2.

5. The sawtooth wave generator for voltage-mode DC-DC according to claim 3, characterized in that: The field-effect transistors MP1 and MP2 are P-channel field-effect transistors, while the field-effect transistor MN1 is an N-channel field-effect transistor.

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