Clock synchronization method and apparatus, computer device, and storage medium

Abstract

The application relates to a clock synchronization method, comprising the following steps: acquiring position information and power information of each clock source; determining the coverage of each clock source according to the position information and power information of each clock source; determining the situation of receiving clock source signals according to the coverage and the position information of a local terminal; receiving a main timestamp signal sent by a main clock source and a secondary timestamp signal sent by a secondary clock source to determine a standard clock source; receiving a timestamp broadcast by the standard clock source to perform time synchronization on the clock of the local terminal according to the timestamp. By selecting a suitable clock source as a standard clock, the accuracy of time synchronization by using the IEEE1588 protocol is improved.

Description

Technical Field

[0001] This invention relates to the field of communication technology, specifically to clock synchronization methods, apparatus, computer equipment, and storage media. Background Technology

[0002] Clock synchronization involves aligning clocks distributed across different locations. A single clock can be selected as the system's standard clock (also known as the master clock), and other clocks in the system (also known as local slave clocks) are compared with the standard clock to achieve synchronization. In existing technologies, local clock synchronization requires an external reliable clock source, which serves as the input reference clock signal for the local clock to achieve synchronization with the master clock. Currently, the IEEE 1588 protocol is primarily used for clock synchronization. IEEE 1588 utilizes both software and hardware-software integration, resulting in more precise timing synchronization.

[0003] However, when using the IEEE 1588 protocol for clock synchronization, multiple clock sources are often needed to provide timestamp signals in order to achieve full coverage of the terminals requiring clock synchronization. However, when the distance between the terminal's receiver and different clock sources varies, the received timestamp signals will correspond to different times. This makes it impossible for the terminal to accurately determine which clock source to use as the clock synchronization reference, thus reducing the accuracy of clock synchronization. Summary of the Invention

[0004] The purpose of this invention is to provide a clock synchronization method to solve the problems in the background art.

[0005] A first aspect of the present invention provides a clock synchronization method, comprising:

[0006] Obtain the location and power information of each clock source, and determine the coverage area of ​​each clock source based on the location and power information of each clock source;

[0007] Based on the coverage area and the location information of the local terminal, determine the scenario in which the clock source signal is received;

[0008] If the number of received clock source signals is greater than one, the clock source with the strongest signal will be used as the master clock source and the clock source with the second strongest signal will be used as the slave clock source.

[0009] The system receives the main timestamp signal sent by the main clock source and the secondary timestamp signal sent by the secondary clock source, and determines whether the difference between the main timestamp signal and the secondary timestamp signal is within a preset error. If it is within the preset error, the main timestamp signal is used as the standard clock source for clock synchronization. Otherwise, the standard clock source is determined according to the order in which the test messages are received.

[0010] Receive the timestamp broadcast by the standard clock source, and synchronize the local terminal's clock according to the timestamp.

[0011] In one possible implementation, determining the coverage area of ​​each clock source based on its location and power information includes:

[0012] Based on the location and power information of each clock source, a Thiessen polygon is constructed for each clock source.

[0013] The coverage range of each clock source is determined based on the minimum power that the time board of the Thiessen polygon and clock synchronization terminal can receive.

[0014] In one possible implementation, after determining the situation where a clock source signal is received based on the coverage area, the method further includes:

[0015] If the number of received clock source signals is one, then the clock source is a standard clock source.

[0016] In one possible implementation, receiving the timestamp broadcast by the standard clock source and synchronizing the local terminal's clock based on the timestamp includes:

[0017] Initialize the standard clock source and the receiver of the local terminal;

[0018] Configure the parameters of the standard clock source and the receiver of the local terminal;

[0019] Receive the timestamp broadcast by the standard clock source and measure the transmission delay duration;

[0020] After correcting the transmission delay, the local terminal's clock is synchronized.

[0021] In one possible implementation, after receiving the timestamp broadcast by the standard clock source and synchronizing the local terminal's clock according to the timestamp, the method further includes:

[0022] Monitor the time interval between the arrival of the timestamp, obtain the number of times the time interval is greater than a preset time interval, and if the number of times is greater than a preset threshold, switch the secondary clock source to the standard clock source.

[0023] In one possible implementation, the step of correcting the transmission delay and then synchronizing the local terminal's clock includes:

[0024] Start the operating system and read the IEEE1588 network card driver and the compensation value file corresponding to the operating system. The compensation value file records the clock synchronization compensation values ​​corresponding to different system loads.

[0025] Obtain the actual system load and determine the actual clock synchronization compensation value corresponding to the actual system load based on the compensation value file, and perform clock synchronization using the actual clock synchronization compensation value.

[0026] A second aspect of the present invention provides a clock synchronization device, comprising:

[0027] The acquisition module is used to acquire the location information and power information of each clock source, and determine the coverage area of ​​each clock source based on the location information and power information of each clock source.

[0028] The analysis module is used to determine the situation of receiving clock source signals based on the coverage area and the location information of the local terminal; if the number of received clock source signals is greater than one, the clock source with the strongest signal is taken as the main clock source and the clock source with the second strongest signal is taken as the secondary clock source.

[0029] The processing module is used to receive the main timestamp signal sent by the main clock source and the secondary timestamp signal sent by the secondary clock source, and determine whether the difference between the main timestamp signal and the secondary timestamp signal is within a preset error. If it is within the preset error, the main timestamp signal is used as the standard clock source for clock synchronization. Otherwise, the standard clock source is determined according to the order in which the test messages are received.

[0030] Receive the timestamp broadcast by the standard clock source, and synchronize the local terminal's clock according to the timestamp.

[0031] A third aspect of the present invention provides a computer device including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the clock synchronization method as described in the first aspect of the present invention.

[0032] A fourth aspect of the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the clock synchronization method as described in the first aspect of the present invention.

[0033] Compared with the prior art, the beneficial effects of the present invention are:

[0034] 1. By selecting a suitable clock source as the standard clock, the accuracy of time synchronization using the IEEE 1588 protocol is improved;

[0035] 2. When there are multiple clock sources, if one clock source fails or there is a transmission delay, a backup clock source can be used for time synchronization without affecting the normal operation of the local terminal. Attached Figure Description

[0036] Figure 1 This is a flowchart illustrating the clock synchronization method of the present invention;

[0037] Figure 2 This is a schematic diagram of the clock synchronization device of the present invention;

[0038] Figure 3 This is a schematic diagram of a computer device according to an embodiment of the present invention. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0040] It should be noted that the serial numbers assigned to the components in the embodiments of the present invention, such as "first" and "second", are only used to distinguish the described objects and have no sequential or technical meaning.

[0041] The following is combined Figure 1 A clock synchronization method of the present invention will be described.

[0042] A clock synchronization method, comprising:

[0043] S1. Obtain the location information and power information of each clock source, and determine the coverage area of ​​each clock source based on the location information and power information of each clock source;

[0044] In this invention, the preferred clock source is a 1588v2 clock. The 1588v2 clock is a high-precision clock that adopts the IEEE 1588V2 protocol. It uses a time distribution mechanism and a time scheduling concept. The client can use an ordinary oscillator and keep synchronized with the main clock of the host computer through software scheduling. The process is simple and reliable, and saves a lot of clock cables.

[0045] Since the main application scenario of this invention is time synchronization of terminals in various areas of large cities, the clock source signal will attenuate and experience signal delay due to transmission distance. To ensure that multiple terminals to be synchronized can receive the signal sent by the clock source, multiple clock sources need to be configured. High-power clock sources have a large coverage area, while low-power clock sources have a small coverage area.

[0046] S2. Determine the situation where a clock source signal is received based on the coverage area and the location information of the local terminal;

[0047] Specifically, a threshold value for the strength of the received clock source signal can be set on the local terminal. When the strength of the received clock source signal exceeds this threshold, the clock source is selected as a candidate clock source. The clock source can be a single board or multiple boards, with PTM boards being the preferred choice for signal transmission.

[0048] Furthermore, after selecting alternative clock sources, a heartbeat test can be used to test the stability of the alternative clock sources. Specifically, the local terminal sends a time synchronization acquisition command to the clock source every n milliseconds, receives time data sent by each clock source, and if it still does not receive time data from the clock source after a preset interval threshold, the clock source is removed from the alternative clock sources.

[0049] S3. If the number of received clock source signals is greater than one, the clock source with the strongest signal will be used as the master clock source and the clock source with the second strongest signal will be used as the slave clock source.

[0050] This invention is mainly aimed at the situation where there are multiple alternative clock sources, and if the number of received clock source signals is one, then the clock source is the standard clock source.

[0051] S4. Receive the main timestamp signal sent by the main clock source and the secondary timestamp signal sent by the secondary clock source, and determine whether the difference between the main timestamp signal and the secondary timestamp signal is within a preset error. If it is within the preset error, the main timestamp signal is used as the standard clock source for clock synchronization. Otherwise, the standard clock source is determined according to the order in which the test messages are received.

[0052] S5. Receive the timestamp broadcast by the standard clock source, and synchronize the local terminal's clock according to the timestamp.

[0053] The following steps can be used to perform time synchronization:

[0054] Initialize the standard clock source and the receiver of the local terminal;

[0055] Configure the parameters of the standard clock source and the receiver of the local terminal;

[0056] Receive the timestamp broadcast by the standard clock source and measure the transmission delay duration;

[0057] After correcting the transmission delay, the local terminal's clock is synchronized.

[0058] When correcting transmission delays, correction algorithms can be used, such as statistical averaging, MAC layer timestamp methods, and shortest path synchronization methods. The following methods can also be used for correction:

[0059] Start the operating system and read the IEEE1588 network card driver and the compensation value file corresponding to the operating system. The compensation value file records the clock synchronization compensation values ​​corresponding to different system loads.

[0060] Obtain the actual system load and determine the actual clock synchronization compensation value corresponding to the actual system load based on the compensation value file, and perform clock synchronization using the actual clock synchronization compensation value.

[0061] The compensation value file stores multiple compensation value mapping tables corresponding to system loads, from which compensation values ​​corresponding to the actual load of the local terminal can be extracted.

[0062] In one embodiment, determining the coverage area of ​​each clock source based on its location and power information includes:

[0063] Based on the location and power information of each clock source, a Thiessen polygon is constructed for each clock source.

[0064] The coverage range of each clock source is determined based on the minimum power that the time board of the Thiessen polygon and clock synchronization terminal can receive.

[0065] A Thiessen polygon is a partition of a spatial plane characterized by the fact that any position within a polygon is closest to a sample point of that polygon and furthest from sample points within adjacent polygons, and each polygon contains exactly one sample point. In this invention, the position of the clock source is used as the sample point position of the Thiessen polygon. Using the Thiessen polygon, the coverage area of ​​each clock source can be effectively defined.

[0066] In one embodiment, after receiving the timestamp broadcast by the standard clock source and synchronizing the local terminal's clock based on the timestamp, the method further includes:

[0067] Monitor the time interval between the arrival of the timestamp, obtain the number of times the time interval is greater than a preset time interval, and if the number of times is greater than a preset threshold, switch the secondary clock source to the standard clock source.

[0068] When timestamps become too old, it affects the accuracy of clock synchronization, and local time compensation cannot effectively correct for time delays. When switching standard clock sources, the aforementioned secondary clock source should be prioritized for time synchronization, while monitoring should continue. Monitoring also allows for timely switching in case of standard clock source failure, without affecting the time synchronization of the local terminal.

[0069] like Figure 2 As shown, the present invention also provides a clock synchronization device, comprising:

[0070] The acquisition module 10 is used to acquire the location information and power information of each clock source, and determine the coverage area of ​​each clock source based on the location information and power information of each clock source.

[0071] The analysis module 20 is used to determine the situation of receiving clock source signals based on the coverage area and the location information of the local terminal; if the number of received clock source signals is greater than one, the clock source with the strongest signal is taken as the main clock source and the clock source with the second strongest signal is taken as the secondary clock source.

[0072] The processing module 30 is used to receive the main timestamp signal sent by the main clock source and the secondary timestamp signal sent by the secondary clock source, and determine whether the difference between the main timestamp signal and the secondary timestamp signal is within a preset error. If it is within the preset error, the main timestamp signal is used as the standard clock source for clock synchronization. Otherwise, the standard clock source is determined according to the order in which the test messages are received.

[0073] Receive the timestamp broadcast by the standard clock source, and synchronize the local terminal's clock according to the timestamp.

[0074] In one embodiment, such as Figure 3 As shown, a computer device 40 is provided, including a memory 42, a processor 41, and a computer program 43 stored in the memory 42 and executable on the processor 41. When the processor 41 executes the computer program 43, it implements the steps in the data processing method of the above embodiments. To avoid repetition, these steps will not be described again here. Alternatively, when the processor 41 executes the computer program 43, it implements the functions of each module in the clock synchronization device embodiments described above. To avoid repetition, these steps will not be described again here.

[0075] In one embodiment, a readable storage medium is provided, which stores a computer program 43. When the computer program 43 is executed by the processor 41, it implements the steps in the data processing method of the above embodiments. To avoid repetition, these steps will not be repeated here. Alternatively, when the processor 41 executes the computer program 43, it implements the functions of each module in the above data processing device embodiments. To avoid repetition, these functions will not be repeated here.

[0076] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided by this invention can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAM bus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.

[0077] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is used as an example. In practical applications, the above functions can be assigned to different functional modules, sub-modules, and units as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above.

[0078] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method of clock synchronization, characterized by, The method comprises the following steps: acquiring position information and power information of each clock source, and determining coverage of each clock source according to the position information and power information of each clock source; determining a situation of receiving clock source signals according to the coverage and position information of a local terminal; if the number of received clock source signals is greater than one, taking a clock source with the strongest signal as a main clock source and a clock source with the second strongest signal as a secondary clock source; receiving a main timestamp signal sent by the main clock source and a secondary timestamp signal sent by the secondary clock source, and judging whether a difference between the main timestamp signal and the secondary timestamp signal is within a preset error, if yes, taking the main timestamp signal as a standard clock source for clock synchronization, otherwise, determining a standard clock source according to an order of receiving test messages; receiving a timestamp broadcast by the standard clock source, and performing time synchronization on a clock of the local terminal according to the timestamp.

2. The clock synchronization method of claim 1, wherein, The step of determining the coverage of each clock source according to the position information and power information of each clock source comprises the following steps: establishing a Thiessen polygon about each clock source according to the position information and power information of each clock source; determining the coverage of each clock source according to the Thiessen polygon and a minimum power receivable by a time board card of a clock synchronization terminal.

3. The clock synchronization method of claim 1, wherein, After the step of determining the situation of receiving clock source signals according to the coverage, the method further comprises the following step: if the number of received clock source signals is one, the clock source is a standard clock source.

4. The clock synchronization method of claim 1, wherein, The step of receiving a timestamp broadcast by the standard clock source, and performing time synchronization on a clock of the local terminal according to the timestamp comprises the following steps: initializing the standard clock source and a receiver of the local terminal; performing parameter configuration on the standard clock source and the receiver of the local terminal; receiving the timestamp broadcast by the standard clock source, and measuring a transmission delay duration; performing correction on the transmission delay to complete time synchronization on the clock of the local terminal.

5. The clock synchronization method of claim 1, wherein, After the step of receiving a timestamp broadcast by the standard clock source, and performing time synchronization on a clock of the local terminal according to the timestamp, the method further comprises the following step: monitoring a time interval of the timestamp, acquiring a number of times that the time interval is greater than a preset time interval, and if the number of times is greater than a preset number threshold, switching the secondary clock source to a standard clock source.

6. The clock synchronization method of claim 4, wherein, The step of performing correction on the transmission delay to complete time synchronization on the clock of the local terminal comprises the following steps: starting an operating system, reading an IEEE1588 network card driver and a compensation value file corresponding to the operating system, and the compensation value file records clock synchronization compensation values corresponding to different system loads; acquiring an actual system load, and determining an actual clock synchronization compensation value corresponding to the actual system load according to the compensation value file, and performing clock synchronization by using the actual clock synchronization compensation value. 7.A clock synchronization device, comprising: an acquisition module, configured to acquire position information and power information of each clock source, and determine coverage of each clock source according to the position information and power information of each clock source; an analysis module, configured to determine a situation of receiving clock source signals according to the coverage and position information of a local terminal; If the number of received clock source signals is more than one, the clock source with the strongest signal is taken as the main clock source, and the clock source with the second strongest signal is taken as the secondary clock source; The processing module is configured to receive a main timestamp signal sent by the main clock source and a secondary timestamp signal sent by the secondary clock source, and determine whether a difference between the main timestamp signal and the secondary timestamp signal is within a preset error range; if the difference is within the preset error range, the main timestamp signal is taken as a standard clock source for clock synchronization; otherwise, according to an order in which test packets are received, a standard clock source is determined; The local terminal receives a timestamp broadcast by the standard clock source, and performs time synchronization on a clock of the local terminal according to the timestamp.

8. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, The processor implements the clock synchronization method according to any one of claims 1-6 when executing the computer program.

9. A computer-readable storage medium storing a computer program, the computer program comprising instructions that, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 8. The computer program implements the clock synchronization method according to any one of claims 1-6 when executed by the processor.

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