Fast ion conductor active electrode memristor functional layer materials and their preparation and application
Through the design of the fast-ion conductor active electrode memristor functional layer material, the problems of insufficient memristor consistency and synaptic linearity are solved, stable resistance state changes and continuous conductance modulation are achieved, and the stability of the memory chip and the conductance characteristics of neuromorphic calculation are improved.
Patent Information
- Application Number
- CN202411509235.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-28
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2044-10-28
AI Technical Summary
Existing memristors have problems with consistency and insufficient synaptic linearity, resulting in limited memory capacity and difficulty in designing brain-like neural network circuits.
The fast ion conductor active electrode memristor functional layer material, including stacked fast ion conductor layer and amorphous oxide layer, uses the high ion conductor layer and the high resistivity characteristics of the amorphous oxide layer to form and disconnect the conductive wire by controlling the migration of active metal ions, and achieve stable resistance change and continuous conductance modulation.
It improves the stability and consistency of the memristor, realizes continuous adjustability of the conductance, enhances synaptic linearity, and is suitable for basic synaptic units in neuromorphic computing systems.
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Figure CN119451557B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of microelectronic devices, and in particular to a fast ion conductor active electrode memristor functional layer material and its preparation and application. Background Art
[0002] Memristors are considered the fourth passive basic circuit element, alongside resistors, capacitors, and inductors. The resistance of a memristor changes with the amount of charge flowing through it and maintains its resistance when the current is removed, thus enabling non-volatile information storage. Research has shown that the non-volatile information storage capabilities of memristors can be used for high-density information storage or non-volatile state-based logic operations. Furthermore, some memristors have continuously adjustable conductance, making them suitable for use as synaptic devices in brain-inspired neuromorphic computing. Memristors achieve the fusion of storage and computation in a single device, making them a fundamental component in building non-von Neumann computing architectures.
[0003] Memristors, based on the conductive filament theory, currently offer advantages such as simple structure, low power consumption, and fast read / write speeds, making them one of the most promising storage technologies. However, memristor research is relatively new, and many challenges remain. For one thing, the migration of ions within the dielectric material of a memristor forms conductive filaments. The connectivity and disconnection of these filaments cause fluctuations in the device's conductance. Most current memristors suffer from discrete operating voltages and the distribution of high and low resistance states. This leads to device-to-device and cycle-to-cycle consistency issues, limiting the storage capacity of memristor memory chips and posing significant challenges to large-scale integration and circuit design. Furthermore, in the field of modern brain-inspired neuromorphic computing, the formation of conductive filaments within the dielectric layer of a memristor, a synaptic element, causes a sudden increase in device conductance. This does not meet the requirement for continuous variation of memristor conductance with an applied electric field, as required in brain-inspired simulations. Consequently, the synaptic characteristics generally exhibit poor linearity, severely restricting research on peripheral circuits for artificial neural network chips. This increases design costs and circuit area.
[0004] Therefore, it is necessary to provide a technical solution to improve the consistency of memristors and the linearity of synapses. Summary of the Invention
[0005] In view of this, the present application provides a fast ion conductor active electrode memristor functional layer material and its preparation and application, which are used to solve the problem of how to improve the consistency of memristors and synaptic linearity.
[0006] In order to achieve the above technical objectives, this application adopts the following technical solutions:
[0007] In the first aspect, the present application provides a fast ion conductor active electrode memristor functional layer material, comprising a stacked fast ion conductor layer and an amorphous oxide layer; the ionic conductivity of the fast ion conductor layer is greater than the ionic conductivity of the amorphous oxide layer, the resistivity of the amorphous oxide layer is greater than the resistivity of the fast ion conductor layer, and the amorphous oxide layer contains an ion migration channel.
[0008] Preferably, the chemical composition of the fast ion conductor layer includes a fast ion conductor material containing silver and / or copper ions, and the chemical composition of the amorphous oxide layer includes an amorphous metal oxide.
[0009] Preferably, the fast ion conductor material containing silver and / or copper ions is a sulfide containing silver and / or copper ions, and the metal elements in the amorphous metal oxide include one or more of Hf, Al, Ti, Ta, Cu, W, Ni, Zn, Zr, Fe, Mn and Nb.
[0010] In a second aspect, the present application provides a memristor unit comprising a fast ion conductor active electrode memristor functional layer material, comprising an inert electrode, an amorphous oxide layer, a fast ion conductor layer, and an active electrode stacked in sequence.
[0011] Preferably, the number of fast ion conductor layers is ≥1, and the number of amorphous oxide layers is ≥1.
[0012] Preferably, the thickness of the fast ion conductor layer is 5-200 nm, and the thickness of the amorphous oxide layer is 10-500 nm.
[0013] In a third aspect, the present application provides a method for preparing a memristor unit, comprising the following steps:
[0014] Providing a substrate, and depositing an inert electrode on the surface of the substrate using a physical vapor deposition process;
[0015] Using magnetron sputtering technology, an amorphous oxide layer is pulse-deposited on the surface of the inert electrode;
[0016] Depositing a fast ion conductor layer on the surface of the amorphous oxide layer by using a magnetron sputtering process;
[0017] An active electrode pattern is prepared on the surface of the fast ion conductor layer by a photolithography process, and then the active electrode is deposited by a magnetron sputtering process.
[0018] In a fourth aspect, the present application provides a modulation method for a memristor unit, comprising the following steps:
[0019] S1. Applying a first external stimulus to the memristor unit causes metal cations in the fast ion conductor layer to migrate in the amorphous oxide layer to form conductive filaments;
[0020] S2 withdraws the first external excitation, so that the metal cations in step S1 are affected by the migration barrier and cannot migrate back to the fast ion conductor layer;
[0021] S3. Apply a second external stimulus to migrate the metal cations in step S2 back to the fast ion conductor layer and disconnect the conductive filaments in the amorphous oxide layer.
[0022] Preferably, the positive and negative poles of the first external excitation and the second external excitation are opposite.
[0023] In a fifth aspect, the present application provides an application of a memristor unit in an artificial neural network chip.
[0024] The beneficial effects of this application are as follows:
[0025] The memristor unit of the present application includes a fast ion conductor layer and an amorphous oxide layer. The present application utilizes the high ionic conductivity of the fast ion conductor to greatly reduce the resistance switching voltage of the active metal electrode memristor. The resistance state can be stably and slowly changed, achieving a modulation effect on the on-off of the metal conductive filament, thereby improving the stability and consistency of the memristor.
[0026] The resistance state of the memristor of the present application can be stably and slowly changed, and its conductance will not suddenly increase. The conductance of the memristor unit can continuously change with the external electric field, realizing the synaptic characteristic of continuously adjustable conductance and improving the synaptic linearity. It can be used as a basic synaptic unit in a neuromorphic computing system, which is beneficial to the preparation of high-storage capacity memory chips and the research and development of hardware for storage fusion computing and neuromorphic computing. BRIEF DESCRIPTION OF THE DRAWINGS
[0027] Figure 1 This is a schematic structural diagram of the memristor unit of this application;
[0028] Figure 2 Graphs showing the DC characteristics of memristor units obtained in the embodiment and comparative example;
[0029] Figure 3 100 DC cycle performance diagrams of the memristor units obtained in the embodiment and the comparative example;
[0030] Figure 4 The DC characteristic diagrams of the memristor units obtained in the embodiment and the comparative example under different current limiting voltages and different reset voltages;
[0031] Figure 5 Schematic diagram of the fast ion conduction-oxide stack memristor synaptic characteristics of the memristor unit obtained in Example 1. DETAILED DESCRIPTION
[0032] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0033] Memristor is a widely used microelectronic device. As the requirements for the consistency and synaptic linearity of memristor storage devices become increasingly higher, the on-off behavior of most conductive filament memristors currently used is random, and there are problems such as discrete operating voltage and high and low resistance state distribution.
[0034] Based on this, this application was created.
[0035] The present application provides a fast ion conductor active electrode memristor functional layer material, comprising a stacked fast ion conductor layer and an amorphous oxide layer; the ionic conductivity of the fast ion conductor layer is greater than the ionic conductivity of the amorphous oxide layer, the resistivity of the amorphous oxide layer is much greater than the resistivity of the fast ion conductor layer, and the amorphous oxide layer contains ion migration channels.
[0036] In this application, the fast ion conductor layer has excellent ionic conductivity and can effectively promote the directional migration of active metal cations to the amorphous oxide layer to form stable conductive filaments under low electric field strength, thereby significantly reducing the operating resistance switching voltage of the memristor; the amorphous oxide layer has high resistivity and contains ion migration channels, ensuring that the active metal cations can efficiently migrate between different layers while maintaining the overall electrical insulation properties of the material. Therefore, the high ionic conductivity of the fast ion conductor can greatly reduce the resistance switching voltage of the active metal electrode memristor, and the resistance state can be stably and slowly changed, achieving a modulation effect on the on-off of the metal conductive filament, and improving the stability and consistency of the memristor; in addition, the design of the stacked fast ion conductor layer and the amorphous oxide layer also improves the synaptic characteristics of continuously adjustable conductivity, further enhancing the synaptic linearity of the memristor, making it highly potential as a basic synaptic unit in neuromorphic computing systems.
[0037] In some embodiments, the chemical composition of the fast ion conductor layer includes a fast ion conductor material containing silver and / or copper ions, and the chemical composition of the amorphous oxide layer includes an amorphous metal oxide.
[0038] In some embodiments, the fast ion conductor material containing silver and / or copper ions is a sulfide containing silver and / or copper ions, including but not limited to Ag2Te x S 1-x, (0.3≤x≤0.7); the metal elements in the amorphous metal oxide include one or more of Hf, Al, Ti, Ta, Cu, W, Ni, Zn, Zr, Fe, Mn, and Nb. Notably, under an applied electric field, migration channels for silver or copper ions exist within the oxide layer. The metal oxide layer of this application is an amorphous thin film, which greatly reduces the difficulty of thin film growth and solves the problems of uncontrolled conductive filament formation sites caused by uneven grain boundary distribution in polycrystalline materials, as well as large performance variations between individual devices.
[0039] like Figure 1 As shown, the present application provides a memristor unit comprising a fast ion conductor active electrode memristor functional layer material, comprising an inert electrode, an amorphous oxide layer, a fast ion conductor layer, and an active electrode stacked in sequence. The fast ion conductor layer is located between the active metal electrode and the amorphous oxide layer.
[0040] The memristor functional layer of the present application is placed between the inert electrode and the active electrode, and is in direct contact with both to form a sandwich structure. In some embodiments, the active electrode is mainly a silver electrode or a copper electrode, and its thickness is 20 to 200 nm, preferably 100 nm. In some embodiments, the inert electrode is preferably a material compatible with the CMOS process of integrated circuit chip technology, such as TiN, TaN, or a precious metal such as Pt, Au, Pd, Ir, but is not limited thereto. The electrode is prepared by a PVD process on the substrate surface, and its thickness is 20 to 200 nm, preferably 100 nm.
[0041] In the memristor cell structure, the fast ion conductor layer possesses high ionic conductivity. Under low electric fields, active metal cations can undergo directed migration to form conductive filaments, significantly reducing the resistance switching voltage of the active metal electrode memristor. However, when the stimulus is removed, the different migration barriers between the fast ion conductor layer and the oxide layer prevent the active metal ions from migrating back, resulting in a non-volatile resistive state in the functional layer. Furthermore, the addition of the oxide layer allows for a stable and gradual change in the resistance state, achieving a modulating effect on the on-off switching of the metal conductive filament and improving the stability and consistency of the memristor. When an opposite external stimulus is applied, the active metal ions overcome the migration barrier and retreat back to the fast ion conductor layer, breaking the electrical contact and, in other words, disconnecting the active metal conductive filament.
[0042] In some embodiments, the number of fast ion conductor layers is ≥1, and the number of amorphous oxide layers is ≥1.
[0043] In some embodiments, the thickness of the fast ion conductor layer is 5-200 nm, and the thickness of the amorphous oxide layer is 10-500 nm. The thickness of the metal oxide layer should not be too low or too high. If the thickness is too low, the formed metal conductive filaments may suddenly and completely break, resulting in a conductivity jump. If the thickness is too high, it may affect the switching of the active metal conductive filaments and cause an increase in the resistive switching voltage.
[0044] The present application provides a method for preparing a memristor unit, comprising the following steps:
[0045] Providing a substrate, and depositing an inert electrode on the surface of the substrate using a physical vapor deposition process;
[0046] Using magnetron sputtering technology, an amorphous oxide layer is pulse-deposited on the surface of the inert electrode;
[0047] Depositing a fast ion conductor layer on the surface of the amorphous oxide layer by using a magnetron sputtering process;
[0048] An active electrode pattern is prepared on the surface of the fast ion conductor layer by a photolithography process, and then the active electrode is deposited by a magnetron sputtering process.
[0049] Specifically, the substrate is preferably a single-crystal SiO2 substrate, and the physical vapor deposition method is preferably magnetron sputtering. An inert electrode layer is grown on a single-sided polished SiO2-grown single-crystal Si substrate by magnetron sputtering. The DC sputtering power is 30-200 W, preferably 70 W; the sputtering pressure is 0.2-2 Pa, preferably 0.6 Pa; the inert gas is Ar; the sputtering time is 600 s, and the sputtering thickness is preferably controlled to be 100 nm. The memristor oxide layer is formed by pulsed magnetron sputtering on the prepared inert electrode. The sputtering power and pressure depend on the oxide layer material. Ar is the inert gas, and the sputtering thickness is preferably controlled to be 10-500 nm. The active metal layer is formed on the fast ion conductor layer using physical vapor deposition, where the fast ion conductor layer is primarily composed of fast ion conductor materials such as silver and copper ions. Then, an active electrode pattern is prepared on the functional layer by a photolithography process, and an active electrode is grown by magnetron sputtering: first, an active electrode pattern is prepared on the functional layer by a photolithography process, wherein the photolithography steps include coating, pre-baking, pre-exposure, post-baking, post-exposure, and development; then, the active electrode material is sputtered onto the prepared functional layer by magnetron sputtering, and the sputtering pressure is 0.2 to 2 Pa, preferably 0.5 Pa; the inert gas is Ar gas, the sputtering time is 500 s, and the sputtering thickness is preferably controlled to be 100 nm; finally, the prepared active electrode film is soaked in acetone, assisted by ultrasonic cleaning, and then cleaned with anhydrous ethanol and deionized water in sequence, and finally blown dry with a nitrogen gun to obtain the final memristor sample.
[0050] This application ensures the uniformity of device performance of the material on a large scale by growing an amorphous oxide film by magnetron sputtering at room temperature, and utilizes the high ionic conductivity of the fast ion conductor and the high resistance characteristics of the oxide to effectively reduce the resistance switching voltage of the active metal electrode memristor, making the resistance switching voltage and resistance distribution more concentrated, and ensuring the stable and slow change of the resistance state, thereby achieving precise modulation of the on and off of the metal conductive filament and improving the stability and consistency of the memristor. In addition, the conductance of the memristor of the present invention can change continuously with the change of the external electric field, showing the characteristic of continuously adjustable conductance, which provides important support for the realization of synaptic linearity in brain-like neuromorphic computing. This continuously adjustable conductance characteristic has a significant promoting effect on the hardware implementation of storage fusion computing and neuromorphic computing.
[0051] The present application provides a modulation method for a memristor unit, comprising the following steps:
[0052] S1. Applying a first external stimulus to the memristor unit causes metal cations in the fast ion conductor layer to migrate in the amorphous oxide layer to form conductive filaments;
[0053] S2 withdraws the first external excitation, so that the metal cations in step S1 are affected by the migration barrier and cannot migrate back to the fast ion conductor layer;
[0054] S3. Apply a second external stimulus to migrate the metal cations in step S2 back to the fast ion conductor layer and disconnect the conductive filaments in the amorphous oxide layer.
[0055] The positive and negative poles of the first external excitation and the second external excitation are opposite.
[0056] The present application realizes the switching between high and low resistance states of the memristor unit by turning on and off the conductive filaments of the amorphous oxide layer.
[0057] Specifically, in the aforementioned memristor cell, applying a specific external stimulus (SET) causes a logic 1, while applying the opposite external stimulus (RESET) causes a logic 0. By applying a specific logic circuit to the memristor cell, the switching of the metal filaments can be controlled to achieve logical sequence and data storage. The mechanism is that due to the different band gaps of the two materials and the different migration barriers of the active metal ions, applying a specific external stimulus (SET) in this heterostructure causes the active metal ions to migrate, forming active metal filaments in the oxide layer. Simultaneously, when the external stimulus is removed, the active metal ions are prevented from migrating back to their original positions due to the migration barrier, rendering the device nonvolatile. When applying the opposite external stimulus (RESET), the active metal ions overcome the migration barrier and retreat back to the fast ion conductor layer, disconnecting the metal filaments in the oxide layer. Thus, switching the memristor between high and low resistance states can be achieved by switching the metal filaments in the oxide layer.
[0058] During the modulation process, the present application utilizes external excitation to induce the migration of active metal ions, thereby forming active metal conductive filaments to achieve changes in the overall resistance of the memory device. The fast ion conductor layer and the oxide layer in the functional layer have different active metal ion migration barriers. Active metal ions with low barriers are more likely to migrate, while active metal ions with high barriers require more energy to migrate. Under external excitation conditions, the active metal ions in the fast ion conductor layer are more likely to migrate, while the active metal ions in the oxide layer are more difficult to migrate. Active metal conductive filaments are gradually formed in the oxide layer, and the resistance state can be stably and slowly changed. Therefore, when external excitation is applied, the cycle consistency of the memristor of the present invention will be better. Because the migration barriers of the fast ion conductor layer and the oxide layer are different in height and the content of active metal ions is different, under the condition of external pulse excitation, the active metal conductive filament is gradually disconnected, and there will be no sudden complete breakage that causes a conductance jump. Therefore, the memristor of the present invention has better synaptic weight slow change characteristics.
[0059] In a fifth aspect, the present application provides an application of a memristor unit in an artificial neural network chip.
[0060] The present invention is further described below through specific examples.
[0061] Example 1
[0062] A memristor unit (Ag / Ag2Te x S 1-x / HfO2 / W), from bottom to top, mainly includes substrate, inert electrode, oxide layer, fast ion conductor layer and active electrode. The specific steps are as follows:
[0063] Substrate cleaning: First use acetone to clean in an ultrasonic environment for 10 minutes, then use alcohol to clean in an ultrasonic environment for 10 minutes, rinse with deionized water, and finally blow dry with a nitrogen gun;
[0064] Magnetron sputtering W electrode: Using a W target, a 50 nm W bottom electrode was grown by sputtering for 300 s at a DC sputtering power of 70 W and an Ar gas concentration of 0.5 Pa.
[0065] Preparation of oxide layer and fast ion conductor layer: HfO2 and Ag2Te are prepared on the inert electrode by photolithography process respectively x S 1-x Layer pattern, wherein the photolithography steps include coating, pre-baking, pre-exposure, post-baking, post-exposure, and development; HfO2 and Ag2Te are used respectively x S 1-x The target was sputtered at 60 W and 15 W in an Ar atmosphere of 0.6 Pa to grow a 75 nm HfO2 layer and a 60 nm Ag2Te x S 1-xlayer (x = 0.3); the prepared thin film samples were soaked in acetone, assisted by ultrasonic cleaning, and then washed with anhydrous ethanol and deionized water in turn, and finally dried with a nitrogen gun to obtain amorphous HfO2 and Ag2Te x S 1-x Functional layer.
[0066] Preparation of active electrode: Ag is selected as the active electrode, the active electrode pattern is prepared on the functional layer by photolithography, and the Ag electrode is grown by magnetron sputtering.
[0067] Photolithography: The active electrode pattern is prepared on the functional layer through the photolithography process, wherein the photolithography steps include coating, pre-baking, pre-exposure, post-baking, post-exposure, and development;
[0068] Sputtering: A 100 nm Ag electrode was grown using a metallic Ag target at a sputtering power of 20 W in an Ar atmosphere of 0.5 Pa for 500 s.
[0069] Stripping: The prepared thin film sample is soaked in acetone, assisted by ultrasonic cleaning, then cleaned with anhydrous ethanol and deionized water in sequence, and finally blown dry with a nitrogen gun to obtain the final superlattice memristor sample.
[0070] Comparative Example 1
[0071] A HfO2 memristor, from bottom to top, mainly includes a substrate, an inert electrode, a functional layer, and an active electrode. The specific steps are as follows:
[0072] Preparation of electrodes: W is selected as an inert electrode, and a layer of W electrode is grown on a single-sided polished single-crystal silicon substrate with SiO2 grown thereon by magnetron sputtering.
[0073] Substrate cleaning: First use acetone to clean in an ultrasonic environment for 10 minutes, then use alcohol to clean in an ultrasonic environment for 10 minutes, rinse with deionized water, and finally blow dry with a nitrogen gun;
[0074] Magnetron sputtering W electrode: Using a W target, a 50 nm W bottom electrode was grown by sputtering for 300 s at a DC sputtering power of 70 W and an Ar gas concentration of 0.5 Pa.
[0075] Preparation of oxide layer: HfO2 layer pattern was prepared on the inert electrode by photolithography process, where the photolithography steps included coating, pre-bake, pre-exposure, post-bake, post-exposure, and development. Using HfO2 target, a 75nm HfO2 layer was sputtered in an Ar atmosphere of 0.6 Pa at a sputtering power of 60 W. The prepared thin film sample was soaked in acetone, assisted by ultrasonic cleaning, and then washed with anhydrous ethanol and deionized water in sequence. Finally, it was blown dry with a nitrogen gun to obtain an amorphous HfO2 functional layer.
[0076] Preparation of active electrode: Ag is selected as the active electrode, the active electrode pattern is prepared on the functional layer by photolithography, and the Ag electrode is grown by magnetron sputtering.
[0077] Photolithography: The active electrode pattern is prepared on the functional layer through the photolithography process, wherein the photolithography steps include coating, pre-baking, pre-exposure, post-baking, post-exposure, and development;
[0078] Sputtering: A 100 nm Ag electrode was grown using a metallic Ag target at a sputtering power of 20 W in an Ar atmosphere of 0.5 Pa for 500 s.
[0079] Stripping: The prepared thin film sample is soaked in acetone, assisted by ultrasonic cleaning, then cleaned with anhydrous ethanol and deionized water in sequence, and finally blown dry with a nitrogen gun to obtain the final superlattice memristor sample.
[0080] Comparative Example 2
[0081] A Ag2Te x S 1-x The memristor, from bottom to top, mainly includes a substrate, an inert electrode, a functional layer, and an active electrode. The specific steps are as follows:
[0082] Preparation of electrodes: W is selected as an inert electrode, and a layer of W electrode is grown on a single-sided polished single-crystal silicon substrate with SiO2 grown thereon by magnetron sputtering.
[0083] Substrate cleaning: First use acetone to clean in an ultrasonic environment for 10 minutes, then use alcohol to clean in an ultrasonic environment for 10 minutes, rinse with deionized water, and finally blow dry with a nitrogen gun;
[0084] Magnetron sputtering W electrode: Using a W target, a 50 nm W bottom electrode was grown by sputtering for 300 s at a DC sputtering power of 70 W and an Ar gas fraction of 0.5 Pa.
[0085] Preparation of fast ion conductor layer: Ag2Te is prepared on the inert electrode by photolithography x S 1-x Layer pattern, wherein the photolithography steps include coating, pre-baking, pre-exposure, post-baking, post-exposure, and development; using Ag2Te x S 1-x Target, 60nm Ag2Te was sputtered in 0.6 Pa Ar atmosphere at a sputtering power of 15W. x S 1-x The prepared thin film sample was soaked in acetone, assisted by ultrasonic cleaning, and then washed with anhydrous ethanol and deionized water in sequence, and finally dried with a nitrogen gun to obtain amorphous Ag2Te x S 1-xFunctional layer.
[0086] Preparation of active electrode: Ag is selected as the active electrode, the active electrode pattern is prepared on the functional layer by photolithography, and the Ag electrode is grown by magnetron sputtering.
[0087] Photolithography: The active electrode pattern is prepared on the functional layer through the photolithography process, wherein the photolithography steps include coating, pre-baking, pre-exposure, post-baking, post-exposure, and development;
[0088] Sputtering: A 100 nm Ag electrode was grown using a metallic Ag target at a sputtering power of 20 W in an Ar atmosphere of 0.5 Pa for 500 s.
[0089] Stripping: The prepared thin film sample is soaked in acetone, assisted by ultrasonic cleaning, then cleaned with anhydrous ethanol and deionized water in sequence, and finally blown dry with a nitrogen gun to obtain the final superlattice memristor sample.
[0090] Testing and Evaluation
[0091] For the Ag / Ag2Te of Example 1 x S 1-x The electrical performance test of the / HfO2 / W memristor is carried out as follows:
[0092] Step a: Initialize the initial cell by grounding its active electrode and applying a negative sweep voltage of 0 V to -2 V to the inert electrode. The current limit is set to 10 mA. The purpose is to first form a conductive path to facilitate the subsequent resistive switching process.
[0093] Step b: Apply multiple bidirectional DC I / V voltage sweeps to the cell initialized in step a. The voltage sweep range is -1 V to 2 V, and the current limit is set to 10 mA. The DC characteristics are as follows: Figure 2 As shown in (a), the cycle performance is as follows Figure 3 As shown;
[0094] Step c: Adjust the limiting current to 10 mA, 1 mA, 100 μA, 1 μA in sequence, and measure the multi-value resistance state under different current limiting conditions, such as Figure 4 As shown in (a); the voltage scanning range is adjusted to measure the multi-value resistance state under different scanning voltages, as shown in Figure 4 As shown in (b);
[0095] The memristor of the first embodiment is subjected to a fixed pulse test. This test is a synaptic performance test of the memristor pulse neural network. The synaptic characteristics are as follows: Figure 5 shown.
[0096] The electrical performance test of the HfO2 memristor of Comparative Example 1 is carried out in the following steps:
[0097] Step a: Initialize the initial cell by grounding its active electrode and applying a negative scanning voltage of 0 V to -2 V to the second electrode. The current limit is set to 10 mA. The purpose is to form a conductive path first to facilitate the subsequent resistive switching process.
[0098] Step b: Apply multiple bidirectional DC I / V voltage sweeps to the cell initialized in step a. The voltage sweep range is -1 V to 2 V, and the current limit is set to 10 mA. The DC cycle characteristics are as follows: Figure 2 As shown in (b), compared with the embodiment, the device resistance switching voltage is significantly larger and the cycle performance is poor.
[0099] Comparative Example 2 Ag2Te x S 1-x The electrical performance test of the memristor is carried out in the following steps:
[0100] Step a: Initialize the initial cell by grounding its active electrode and applying a negative scanning voltage of 0 V to -2 V to the second electrode. The current limit is set to 10 mA. The purpose is to form a conductive path first to facilitate the subsequent resistive switching process.
[0101] Step b: Apply multiple bidirectional DC I / V voltage sweeps to the cell initialized in step a. The voltage sweep range is -1 V to 2 V, and the current limit is set to 10 mA. The DC cycle characteristics are as follows: Figure 2 As shown in (c), compared with the embodiment, the device resistance change is volatile, and the high resistance is low, and the distinction between high and low resistance states is not obvious;
[0102] The above test shows that the stacked structure of the oxide layer and the fast ion conductor layer in the present application can show good electrical performance. Figure 3 By comparing the DC characteristics of the embodiment and the comparative example, it can be shown that: Ag2Te x S 1-x Compared with HfO2 memristor, the Set and Reset process voltage of Ag2Te2 memristor is smaller. By comparing the cycle performance of Example 1 with Comparative Examples 1 and 2, it can be shown that the double-layer stacked memristor has better consistency. Its consistency of 100 DC cycles is significantly better than the cycle performance of HfO2 memristor which fails in the second cycle. x S 1-x / HfO2 memristor can achieve slow resistance change and has the modulation effect of conducting filament on and off. Figure 4By adjusting the device's limiting current and voltage range, the device's high and low resistance states can be precisely controlled, with multiple intermediate resistance states and clear resistance states. x S 1-x / HfO2 superlattice memristor has better continuous adjustability of conductance than HfO2 memristor and has greater potential for application in neuromorphic computing. Figure 5 According to the fixed pulse diagram of the embodiment, it can be seen that the superlattice memristor gradually changes from a high-resistance state to a low-resistance state under the same negative voltage pulse excitation; and changes from a low-resistance state to a high-resistance state under the same positive voltage pulse excitation. Under negative pulses, the conductance of the memristor gradually increases with the number of pulses (increasing over time), and the change in conductance shows a continuously adjustable and nearly linear upward trend. This proves that the resistance of the memristor is linearly and continuously adjustable, meeting the characteristic requirements of synaptic devices for neural network computing.
[0103] The present invention effectively reduces the resistance-switching voltage of the active metal electrode memristor and ensures a stable and slow change of the resistance state, thereby achieving precise modulation of the on-off state of the metal conductive filament and improving the stability and consistency of the memristor. In addition, the conductance of the memristor of the present invention can change continuously with the change of the external electric field, showing the characteristic of continuously adjustable conductance, which provides important support for the realization of synaptic linearity in brain-like neuromorphic computing. This continuously adjustable conductance characteristic has a significant promoting effect on the hardware implementation of storage fusion computing and neuromorphic computing. The stacked memristor device unit of the present invention and its preparation method provide a new solution for high-performance memristor devices by optimizing material selection and structural design, and are expected to be widely used in the fields of memory technology, neuromorphic computing, and artificial intelligence hardware.
[0104] The above are only preferred specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or replacements that can be easily thought of by any technician familiar with this technical field within the technical scope disclosed by the present invention should be covered by the scope of protection of the present invention.
Claims
1. A fast ion conductor active electrode memristor functional layer material, characterized in that: The invention comprises a stacked fast ion conductor layer and an amorphous oxide layer; the ionic conductivity of the fast ion conductor layer is greater than the ionic conductivity of the amorphous oxide layer, the resistivity of the amorphous oxide layer is greater than the resistivity of the fast ion conductor layer, and the amorphous oxide layer contains an ion migration channel; The fast ion conductor layer is Ag2Te x S 1-x , (0.3≤x≤0.7), the amorphous oxide layer is HfO2, and the two constitute Ag2Te x S 1-x / HfO2 double-layer stacking structure.
2. A memristor unit comprising the fast ion conductor active electrode memristor functional layer material according to claim 1, characterized in that: The invention comprises an inert electrode, an amorphous oxide layer, a fast ion conductor layer and an active electrode which are stacked in sequence.
3. The memristor unit according to claim 2, wherein: The number of the fast ion conductor layer is ≥1, and the number of the amorphous oxide layer is ≥1.
4. The memristor unit according to claim 2, wherein: The thickness of the fast ion conductor layer is 5-200 nm, and the thickness of the amorphous oxide layer is 10-500 nm.
5. A method for preparing a memristor unit according to any one of claims 2 to 4, characterized in that: The following steps are involved: Providing a substrate, and depositing an inert electrode on the surface of the substrate using a physical vapor deposition process; Depositing an amorphous oxide layer on the surface of the inert electrode by using a magnetron sputtering process; Depositing a fast ion conductor layer on the surface of the amorphous oxide layer by using a magnetron sputtering process; An active electrode pattern is prepared on the surface of the fast ion conductor layer by a photolithography process, and then the active electrode is deposited by a magnetron sputtering process.
6. A modulation method for a memristor unit according to any one of claims 2 to 4, characterized in that: The following steps are involved: S1. applying a first external stimulus to the memristor unit to cause the metal cations in the fast ion conductor layer to migrate in the amorphous oxide layer to form a conductive filament; S2. withdrawing the first external excitation, so that the metal cations in step S1 are affected by the migration barrier and cannot migrate back to the fast ion conductor layer; S3. Applying a second external stimulus to migrate the metal cations in step S2 back to the fast ion conductor layer and disconnect the conductive filaments in the amorphous oxide layer.
7. The modulation method of the memristor unit according to claim 6, characterized in that: The first external excitation voltage and the second external excitation voltage have opposite positive and negative polarities.
8. Use of the memristor unit according to any one of claims 2 to 4 in an artificial neural network chip.
Citation Information
Patent Citations
Memristor and application thereof
CN106654009A
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