Electronic device

Abstract

The electronic device includes: a display panel including a display area including pixels and a non-display area adjacent to the display area; and an input sensor on the display panel. The input sensor includes: a first sensor layer for sensing an external input using an electromagnetic induction method, and including a first set of electrodes; a second sensor layer for sensing an external input using a capacitive method and including a second set of electrodes insulated from the first set of electrodes; a pad portion including a pad overlapping the non-display area; a first signal line connected to the first group of electrodes and the pad; and a second signal line connected to the second group of electrodes and the pad. At least some of the first signal line and the second signal line overlap the display area.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0105815 filed in the Korean Intellectual Property Office on August 11, 2023, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Aspects of embodiments of the present disclosure are directed to an electronic device including an input sensor for sensing various kinds of external inputs. Background Art

[0004] Various display devices are being developed for multimedia devices such as mobile phones, tablet computers, car navigation units, and game consoles. As an input device for the display device, there is a keyboard or a mouse. Alternatively, the display device includes an input sensor as the input device.

[0005] The input sensor may sense user input using a capacitive method, or sense input from a stylus pen using an electromagnetic induction method. Summary of the invention

[0006] One or more embodiments of the present disclosure may be directed to an electronic device with improved input sensor efficiency and reduced dead zone.

[0007] However, the present disclosure is not limited to the above aspects and features. Additional aspects and features will be set forth in part in the following description and in part may be obvious from the description, or may be learned by practicing one or more of the presented embodiments of the present disclosure.

[0008] According to one or more embodiments of the present disclosure, an electronic device includes: a display panel including a display area including pixels and a non-display area adjacent to the display area; and an input sensor on the display panel. The input sensor includes: a first sensor layer configured to sense external input using an electromagnetic induction method and including a first group of electrodes; a second sensor layer configured to sense external input using a capacitive method and including a second group of electrodes insulated from the first group of electrodes; a pad portion including a pad overlapping the non-display area; a first signal line connected to the first group of electrodes and the pad; and a second signal line connected to the second group of electrodes and the pad. At least some of the first signal line and the second signal line overlap the display area.

[0009] In an embodiment, the first group of electrodes may include: first-first electrodes arranged along a first direction, each of the first-first electrodes including a first-first sensing pattern arranged along a second direction intersecting the first direction and a first bridge pattern configured to connect the first-first sensing patterns adjacent to each other; and first-second electrodes insulated from the first-first electrodes and arranged along the second direction, each of the first-second electrodes extending in the first direction. The first signal line may include a first-first signal line configured to at least partially overlap a display area and a first-second signal line configured to overlap a non-display area. The first-first signal line may be connected to the first-second electrode.

[0010] In an embodiment, the second group of electrodes may include: second-first electrodes arranged along the first direction, each of the second-first electrodes including a second-first sensing pattern arranged along the second direction and a second bridge pattern configured to connect the second-first sensing patterns adjacent to each other; second-second electrodes insulated from the second-first electrodes and arranged along the second direction, each of the second-second electrodes extending in the first direction; and second-third electrodes arranged along the second direction and positioned inside the second-second electrodes in a plan view, each of the second-third electrodes extending in the first direction. The second signal line may include a second-first signal line configured to at least partially overlap the display area and a second-second signal line configured to overlap the non-display area. Some of the second-first signal lines may be connected to the second-second electrodes, and other of the second-first signal lines may be connected to the second-third electrodes.

[0011] In an embodiment, the input sensor may further include: a first insulating layer on the display panel; a second insulating layer on the first insulating layer; a third insulating layer on the second insulating layer; and a fourth insulating layer on the third insulating layer. The first-first signal line and the second-first signal line may be on the first insulating layer and may be covered by the second insulating layer.

[0012] In an embodiment, the first bridge pattern and the second bridge pattern may be on the first insulating layer and may be covered by the second insulating layer.

[0013] In an embodiment, the first-first sensing pattern and the first-second electrode may be on the second insulating layer and may be covered by the third insulating layer. The first-first sensing pattern may be connected to the first bridge pattern through a contact hole defined in the second insulating layer.

[0014] In an embodiment, the second-first sensing pattern, the second-second electrode and the second-third electrode may be on the third insulating layer and may be covered by the fourth insulating layer. The second-first sensing pattern may be connected to the second bridge pattern through a contact hole defined in the second insulating layer and the third insulating layer.

[0015] In an embodiment, each of the second-first sensing pattern, the second-second electrode, and the second-third electrode may include conductive lines configured to cross each other, and the conductive lines may have openings defined in the conductive lines to overlap with the emission region, and light generated by the pixel is provided through the emission region.

[0016] In an embodiment, each of the first-first electrodes may include one side adjacent to the pad portion and an opposite side facing away from the one side. One of the first-second signal lines may be connected to the opposite side of each of the first-first electrodes.

[0017] In an embodiment, the electronic device may further include: a connection portion configured to connect the one sides of the first-first electrodes adjacent to each other in the first direction among the first-first electrodes to each other.

[0018] In an embodiment, the first-first signal line and the second-first signal line located between the second-first electrodes adjacent to each other in the first direction can be defined as one line group among a plurality of line groups, and the number of first-first signal lines and second-first signal lines included in each of the plurality of line groups can be greater than or equal to 5.

[0019] In an embodiment, each of the multiple line groups may include: a first left line and a first right line, which are connected to one of the first-second electrodes and are separated from each other in a first direction; a second left line and a second right line, which are connected to a second-second electrode among the second-second electrodes and configured to surround the one of the first-second electrodes, the second left line and the second right line are located between the first left line and the first right line; and a central line, which is connected to a second-third electrode among the second-third electrodes and surrounded by the one of the first-second electrodes, the central line is located between the second left line and the second right line.

[0020] In an embodiment, central lines included in the plurality of line groups may have different lengths from each other in the second direction.

[0021] In an embodiment, the second-first sensing pattern, the second-second electrode and the second-third electrode may be on the second insulating layer and may be covered by the third insulating layer. The second-first sensing pattern may be connected to the second bridge pattern through a contact hole defined in the second insulating layer.

[0022] In an embodiment, the first-first sensing pattern and the first-second electrode may be on the third insulating layer and may be covered by the fourth insulating layer. The first-first sensing pattern may be connected to the first bridge pattern through a contact hole defined in the second insulating layer and the third insulating layer.

[0023] In an embodiment, each of the first-second electrodes may have an open loop shape in a plan view, and may define a groove configured to extend in the first direction and overlap a corresponding second-third electrode among the second-third electrodes.

[0024] In an embodiment, each of the second-second electrodes may have an open loop shape in a plan view, and may define a groove configured to extend in the first direction and overlap a corresponding first-second electrode among the first-second electrodes.

[0025] In an embodiment, each of the second-first electrodes may have an open loop shape in a plan view, and may define a groove configured to extend in the second direction and overlap with a corresponding first-first electrode among the first-first electrodes.

[0026] In an embodiment, each of the first and second electrodes may include a first layer, a second layer, and a third layer sequentially stacked one after another, the first layer and the third layer having a thickness smaller than that of the second layer. The first layer and the third layer may include titanium, and the second layer may include aluminum.

[0027] In an embodiment, the first sensor layer may be configured to sense an external input provided from a stylus including a resonant circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other aspects and features of the present disclosure will be more clearly understood from the following detailed description of illustrative, non-limiting embodiments with reference to the accompanying drawings.

[0029] Figure 1A is a perspective view of an electronic device according to an embodiment of the present disclosure.

[0030] Figure 1B and Figure 1C It is a graphic Figure 1A A perspective view of the electronic device in a folded state is shown in FIG.

[0031] Figure 2 yes Figure 1A An exploded perspective view of the electronic device shown in FIG.

[0032] Figure 3 is with Figure 2 2 is a cross-sectional view of the display device corresponding to line II' shown in FIG.

[0033] Figure 4 is a cross-sectional view of a display module according to an embodiment of the present disclosure.

[0034] Figure 5 is a plan view of a display panel according to an embodiment of the present disclosure.

[0035] Figure 6 is an enlarged cross-sectional view of a display module according to an embodiment of the present disclosure.

[0036] Fig. 7A is a plan view of an input sensor according to an embodiment of the present disclosure.

[0037] Figure 7B is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure.

[0038] Fig. 8A is with Figure 7B FIG. 1 is a cross-sectional view of the input sensor corresponding to line II-II′ shown in FIG.

[0039] Figure 8B is with Figure 7B FIG. 4 is a cross-sectional view of the input sensor corresponding to line III-III′ shown in FIG.

[0040] Fig. 9 is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure.

[0041] Fig. 10A is with Fig. 9 FIG. 4 is a cross-sectional view of the input sensor corresponding to line IV-IV′ shown in FIG.

[0042] Fig. 10B is with Fig. 9 FIG. 4 is a cross-sectional view of the input sensor corresponding to the line V-V′ shown in FIG.

[0043] Fig.11 is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure.

[0044] Fig. 12A is with Fig.11 FIG. 5 is a cross-sectional view of the input sensor corresponding to the line VI-VI′ shown in FIG.

[0045] Fig. 12B is with Fig.11 The cross-sectional view of the input sensor corresponding to the line VII-VII' shown in FIG.

[0046] Fig.13 is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure.

[0047] Fig.14is a plan view illustrating an operation period of an input sensor for sensing an external input using a capacitance method according to an embodiment of the present disclosure.

[0048] FIG. 15A to FIG. 15C is a plan view illustrating a charging period of an operation period of an input sensor that senses an external input using an electromagnetic induction method according to an embodiment of the present disclosure.

[0049] Fig.16 is a plan view illustrating a sensing period of an operation period of an input sensor for sensing an external input using an electromagnetic induction method according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0050] Hereinafter, the embodiments will be described in more detail with reference to the accompanying drawings, in which the same reference numerals always refer to the same elements. However, the present disclosure can be implemented in various different forms and should not be construed as being limited to the embodiments shown herein. On the contrary, these embodiments are provided as examples so that the present disclosure will be thorough and complete, and the aspects and features of the present disclosure will be fully conveyed to those skilled in the art. Accordingly, unnecessary processes, elements and techniques for a person of ordinary skill in the art to fully understand the aspects and features of the present disclosure may not be described. Unless otherwise stated, the same reference numerals represent the same elements throughout the drawings and written descriptions, and therefore, their redundant descriptions may not be repeated.

[0051] When a specific embodiment can be implemented differently, the specific process order may be different from the described order. For example, two processes described successively may be performed simultaneously or substantially simultaneously or in the reverse order of the described order.

[0052] In the accompanying drawings, for the sake of clarity, the relative size, thickness and ratio of elements, layers and regions may be exaggerated and / or simplified. For ease of explanation, spatial relative terms such as "below", "below", "below", "below", "above" and "on" may be used herein to describe the relationship between an element or feature and another (some) element or feature as shown in the drawings. It will be understood that, in addition to the orientations depicted in the drawings, spatial relative terms are intended to include different orientations of the device in use or operation. For example, if the device is flipped in the drawings, the elements described as "below", "below" or "below" other elements or features will be oriented to "above" other elements or features. Therefore, the example terms "below" and "below" can include two orientations, above and below. The device can be oriented in other ways (for example, rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly.

[0053] In the drawings, the first direction DR1, the second direction DR2, and the third direction DR3 are not limited to directions corresponding to the three axes of the rectangular coordinate system, and can be interpreted more broadly. For example, the first direction DR1, the second direction DR2, and the third direction DR3 may be perpendicular or substantially perpendicular to each other, or may represent different directions that are not perpendicular to each other.

[0054] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, the first element, component, region, layer or part described below may be referred to as a second element, component, region, layer or part without departing from the spirit and scope of the present disclosure.

[0055] It will be understood that when an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, it may be directly on, directly connected to, or directly coupled to the other element or layer, or there may be one or more intervening elements or layers. Similarly, when a layer, region, or element is referred to as being "electrically connected to" another layer, region, or element, it may be directly electrically connected to the other layer, region, or element, or it may be indirectly electrically connected to the other layer, region, or element with one or more intervening layers, regions, or elements therebetween. Furthermore, it will be understood that when an element or layer is referred to as being "between" two elements or layers, it may be the only element or layer between the two elements or layers, or there may also be one or more intervening elements or layers.

[0056] The terms used herein are used to describe the purpose of a particular embodiment, rather than to limit the present disclosure. As used herein, unless the context clearly indicates otherwise, the singular form "one" is intended to also include the plural form. It will be further understood that when used in this specification, the terms "include", "comprise" and "have" indicate the existence of the stated features, wholes, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, wholes, steps, operations, elements, parts and / or their groups. As used herein, the term "and / or" includes any and all combinations of one or more of the items listed in the relevant list. For example, the statement "A and / or B" means A, B or A and B. Statements such as "at least one of", when located after the element list, modify the entire element list without modifying the individual elements in the list. For example, the statements "at least one of a, b and c" and "at least one of the groups selected from a, b and c" represent only a, only b, only c, both a and b, both a and c, both b and c, all of a, b and c or their variants.

[0057] As used herein, the terms "substantially," "approximately," and similar terms are used as terms of approximation rather than terms of degree, and are intended to account for the inherent deviations in measurements or calculations that one of ordinary skill in the art would recognize. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure." As used herein, the terms "use" and "used" may be considered synonymous with the terms "utilizing" and "utilized," respectively.

[0058] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that, unless expressly defined as such herein, terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense.

[0059] Figures 1A to 1C is a perspective view of an electronic device according to one or more embodiments of the present disclosure. Figure 1A The expanded state is shown, and Figure 1B and Figure 1C The diagram shows the folded state.

[0060] refer to Figures 1A to 1C , the electronic device ED according to an embodiment of the present disclosure may include a display surface DS defined by a first direction DR1 and a second direction DR2 crossing the first direction DR1. The electronic device ED may provide an image IM to a user through the display surface DS.

[0061] The display surface DS may include a display area DA and a non-display area NDA surrounding the display area DA (e.g., adjacent to the display area DA). The display area DA may display an image IM, and the non-display area NDA may not display the image IM. The non-display area NDA may surround the display area DA (e.g., around the periphery of the display area DA). However, the present disclosure is not limited thereto, and the shape of the display area DA and the shape of the non-display area NDA may be variously modified as needed or desired.

[0062] Hereinafter, a direction perpendicular or substantially perpendicular to a plane defined by the first direction DR1 and the second direction DR2 may be referred to as a third direction DR3. The third direction DR3 may be the basis for the distinction between the front and rear surfaces of various components. The expressions "when viewed from above a plane" and "in a plan view" as used herein may mean a view of a component in the third direction DR3. Hereinafter, the first to third directions DR1, DR2, and DR3 are directions indicated by the first direction axis to the third direction axis shown in the figures, respectively, and are assigned the same reference numerals as the reference numerals of the first direction axis to the third direction axis.

[0063] The electronic device ED may include a folding area FA and a plurality of non-folding areas NFA1 and NFA2. The non-folding areas NFA1 and NFA2 may include a first non-folding area NFA1 and a second non-folding area NFA2. The folding area FA may be disposed between the first non-folding area NFA1 and the second non-folding area NFA2 in the second direction DR2. In the present embodiment, a foldable electronic device ED is illustrated as an example. However, the present disclosure is not limited thereto. The electronic device ED may be a straight-type electronic device, a rollable electronic device, or a slidable electronic device.

[0064] The electronic device ED can sense the input of the stylus pen STP and the input through the user's body FG. A finger is illustrated as an example of the user's body FG. The electronic device ED can sense the input of the stylus pen STP during the first mode period and sense the input of the user's body FG during the second mode period by time division driving.

[0065] like Figure 1B As shown in , the folding area FA can be folded around a folding axis FX that is parallel or substantially parallel to the first direction DR1. The folding area FA has a desired curvature (e.g., a specific or predetermined curvature) and a curvature radius R1. The electronic device ED can be folded in an inward folding manner so that the first non-folding area NFA1 and the second non-folding area NFA2 face each other and the display surface DS is not exposed to the outside.

[0066] In an embodiment of the present disclosure, the electronic device ED can be folded in an outward folding manner so that the display surface DS is exposed to the outside. In an embodiment of the present disclosure, the electronic device ED can be configured so that the inward folding operation and the outward folding operation are repeatedly performed in the unfolded state. However, the present disclosure is not limited thereto. In an embodiment of the present disclosure, the electronic device ED can be configured to select one of the unfolding operation, the inward folding operation, and the outward folding operation.

[0067] like Figure 1BAs shown in , the distance between the first non-folding area NFA1 and the second non-folding area NFA2 may be equal to or substantially equal to twice the radius of curvature R1. However, the present disclosure is not limited thereto, and as Figure 1C As shown in FIG. 1 , the distance between the first non-folding area NFA1 and the second non-folding area NFA2 may be less than twice the curvature radius R1 . Figure 1B and Figure 1C The state in which the display surface DS is folded inside and the housing HM forming the appearance of the electronic device ED is illustrated (for example, refer to Figure 2 ) may contact each other in distal end regions of the first non-folding area NFA1 and the second non-folding area NFA2.

[0068] Figure 2 According to the embodiment of the present disclosure Figure 1A An exploded perspective view of the electronic device shown in FIG.

[0069] refer to Figure 2 The electronic device ED may include a display device DD, an electronic module EM, a power module PSM, and a housing HM. The electronic device ED may further include a mechanical structure for controlling the folding operation of the display device DD. Figure 2 In the drawings, an adhesive layer for attaching (eg, coupling) components to each other is not shown.

[0070] The display device DD generates an image and senses external input. The display device DD includes a window WM and a display module DM. The window WM provides a front surface of the electronic device ED and will be described in more detail below. The display device DD may further include additional components between the window WM and the display module DM, and / or may further include additional components under the display module DM.

[0071] The display module DM may include at least a display panel 100. The display module DM may further include a plurality of components disposed on the display panel 100. The display module DM will be described in more detail below.

[0072] The display panel 100 is not particularly limited, and may be, for example, an emissive display panel (eg, an organic light emitting display panel or an inorganic light emitting display panel).

[0073] The display panel 100 includes a display area DA (eg, referring to Figure 1A ) and non-display area NDA (for example, reference Figure 1A) corresponds to a display area 100-DA and a non-display area 100-NDA. The pixel PX is arranged in the display area 100-DA. The pixel PX may not be arranged in the non-display area 100-NDA, and a signal line for supplying a voltage to the pixel PX may be arranged in the non-display area 100-NDA. The expression "one area / portion corresponds to another area / portion" as used herein means that the areas / portions overlap each other and are not limited to having the same area as each other.

[0074] like Figure 2 As shown in , the driver IC (integrated circuit) DIC may be disposed in the non-display area 100-NDA of the display panel 100. The flexible circuit board FCB may be connected to (e.g., attached to or coupled to) the non-display area 100-NDA of the display panel 100. The flexible circuit board FCB may be connected to the main circuit board. The main circuit board may be one of the electronic components constituting the electronic module EM. In addition, the electronic module EM may further include a control module or controller (e.g., an application processor), a wireless communication module, and an image input module.

[0075] According to an embodiment, among the electronic module EM, a camera module (e.g., a camera) may be disposed under the display panel 100 to overlap with the display area 100-DA. A portion of the display area 100-DA overlapping with the camera module may be a region having a higher transmittance than a region adjacent thereto. The region having a relatively high transmittance may be defined as a region where a hole is formed through the display panel 100 or a region where at least some of the components included in the pixel PX are not deposited or patterned.

[0076] The driver IC DIC may include a driving element (eg, a data driving circuit) for driving the pixels PX of the display panel 100. Figure 2 A structure in which the driver IC DIC is mounted on the display panel 100 is illustrated, but the present disclosure is not limited thereto. For example, the driver IC DIC may be mounted on a flexible circuit board FCB.

[0077] The electronic module EM may be respectively disposed in the first housing HM1 and the second housing HM2. The power supply module PSM may be respectively disposed in the first housing HM1 and the second housing HM2. In some embodiments, the electronic module EM disposed in the first housing HM1 and the electronic module EM disposed in the second housing HM2 may be electrically connected to each other via a flexible circuit board. The housing HM may be connected to a display device DD (e.g., coupled to the display device DD), and more specifically, connected to the window WM and may accommodate other modules. Although the housing HM is illustrated as including a first housing HM1 and a second housing HM2 that are separated or spaced apart from each other, the present disclosure is not limited thereto. The electronic device ED may further include a hinge structure for connecting the first housing HM1 and the second housing HM2 to each other.

[0078] Figure 3 is with Figure 2 2 is a cross-sectional view of the display device corresponding to line II' shown in FIG.

[0079] refer to Figure 3 , the display device DD may include a window WM, a display module DM, a panel protection layer PPL, a cushion layer CSL, a ferrite layer FRL, a conductive layer CTL, and first to fifth adhesive layers AL1 to AL5. Each of the first to fifth adhesive layers AL1 to AL5 connects (e.g., attaches or couples) two components stacked adjacent to each other among the components. The first to fifth adhesive layers AL1 to AL5 may include a pressure sensitive adhesive (PSA) or an optically clear adhesive (OCA). However, the type of adhesive layer is not limited thereto.

[0080] The window WM provides the outer surface of the display device DD. The window WM may include a base layer BS, a window protection layer WP, a hard coating layer HC, and a printed layer PIT (e.g., a black matrix layer). The base layer BS may have optically transparent properties. The base layer BS may include glass or a synthetic resin film. The window protection layer WP is attached to the base layer BS by an adhesive layer AL. The window protection layer WP may include a flexible plastic material such as polyimide or polyethylene terephthalate. The hard coating layer HC may be disposed on the upper surface of the window protection layer WP.

[0081] The printing layer PIT may be disposed on the lower surface of the window protection layer WP. The printing layer PIT may be a black matrix layer. The color of the printing layer PIT may be black. However, the color of the printing layer PIT is not limited thereto. The printing layer PIT may be adjacent to the periphery of the window protection layer WP. The printing layer PIT may overlap with the non-display area NDA. However, the stacking structure of the window WM is not necessarily limited to the above structure.

[0082] The panel protection layer PPL may be disposed under the display module DM. The panel protection layer PPL may protect the bottom of the display module DM. The panel protection layer PPL may include a flexible plastic material. For example, the panel protection layer PPL may include polyethylene terephthalate (PET). In an embodiment of the present disclosure, the panel protection layer PPL may be omitted.

[0083] The cushion layer CSL is disposed under the panel protection layer PPL. The cushion layer CSL absorbs external impact. The cushion layer CSL may include foam plastic. In an embodiment of the present disclosure, the cushion layer CSL may be omitted.

[0084] The ferrite layer FRL may be disposed under the cushion layer CSL. The ferrite layer FRL may include a suitable material having high transmittance. The ferrite layer FRL may include a ferromagnetic material. The ferrite layer FRL may include a magnetic metal powder layer. The magnetic metal powder layer may include a base resin and a magnetic metal powder mixed in the base resin. In an embodiment of the present disclosure, the ferrite layer FRL may be omitted.

[0085] The conductive layer CTL may be disposed under the ferrite layer FRL. The conductive layer CTL blocks the Figure 2 The electromagnetic waves generated by the electronic module EM illustrated in the figure do not interfere with the display module DM (for example, noise shielding effect). The conductive layer CTL may include a diamagnetic material. In addition, the conductive layer CTL may radiate the electromagnetic waves from the display module DM (such as the driver IC DIC (for example, reference Figure 2 )) generated by heat (for example, thermal radiation effects).

[0086] The conductive layer CTL may include a metal layer such as copper, aluminum, gold or titanium. The conductive layer CTL may include a metal oxide layer such as ITO or IZO. The conductive layer CTL may include carbon nanotubes, graphite or carbon nanotubes coated with a conductive polymer. In an embodiment of the present disclosure, the conductive layer CTL may be omitted.

[0087] Figure 4 is a cross-sectional view of a display module according to an embodiment of the present disclosure. Figure 4 , the display module DM may include a display panel 100 , an input sensor 200 , and an anti-reflector 300 .

[0088] The display panel 100 may include a substrate layer 110, a driving element layer 120, a light emitting element layer 130, and an encapsulation layer 140. The substrate layer 110 may provide a substrate surface on which the driving element layer 120 is disposed. The substrate layer 110 may be a rigid substrate or a flexible substrate that can be bent, folded, or curled. The substrate layer 110 may be a glass substrate, a metal substrate, or a polymer substrate. However, the present disclosure is not limited thereto, and the substrate layer 110 may include an inorganic layer, an organic layer, or an organic-inorganic composite layer.

[0089] The base layer 110 may have a multi-layer structure. For example, the base layer 110 may include a first synthetic resin layer, an inorganic layer having a multi-layer structure or a single-layer structure, and a second synthetic resin layer disposed on the inorganic layer having a multi-layer structure or a single-layer structure. Each of the first synthetic resin layer and the second synthetic resin layer may include a polyimide-based resin, but is not particularly limited thereto.

[0090] The driving element layer 120 may be disposed on the base layer 110. The driving element layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal line. The driving element layer 120 includes the above reference Figure 2 The light emitting element layer 130 may be disposed on the driving element layer 120. The light emitting element layer 130 may include the above-mentioned Figure 2 The light emitting element included in each pixel PX is described.

[0091] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 from moisture, oxygen and / or foreign matter such as dust particles. The encapsulation layer 140 may include at least one inorganic layer. The encapsulation layer 140 may include a stacked structure of inorganic layer / organic layer / inorganic layer.

[0092] The input sensor 200 may be disposed on the display panel 100. The input sensor 200 may sense Figure 1A The input of the stylus STP illustrated in FIG. 1 and the input through the user's body FG. The input sensor 200 may be formed on the display panel 100 through a continuous process. In this case, the input sensor 200 may be directly disposed on the display panel 100. As used herein, the expression "component A is directly disposed on component B" means that an adhesive layer is not disposed between component A and component B.

[0093] The anti-reflector 300 may be disposed on the input sensor 200. The anti-reflector 300 may reduce reflectivity of external light. The anti-reflector 300 may be directly disposed on the input sensor 200 through a continuous process.

[0094] The anti-reflector 300 may include a color filter. The color filter has a color corresponding to the color of the source light. For example, a red color filter is disposed on a light emitting element that generates red light. The anti-reflector 300 may further include a light shielding pattern disposed between the color filters.

[0095] Figure 5 is a plan view of a display panel according to an embodiment of the present disclosure.

[0096] refer to Figure 5, the display panel 100 may include a pixel PX, a scan driving circuit SDV, an emission driving circuit EDV, a plurality of signal lines, and a first pad portion PD1 including a plurality of pads. The driver IC DIC installed in the non-display area 100-NDA may include a data driving circuit. In an embodiment of the present disclosure, the data driving circuit may be integrated into the display panel 100 like the scan driving circuit SDV and the emission driving circuit EDV.

[0097] The plurality of signal lines may include a plurality of scan lines GL1 to GLm, a plurality of data lines DL1 to DLn, a plurality of emission lines EL1 to ELm, first and second control lines SL-C1 and SL-C2, and first and second power lines PL1 and PL2. Here, "m" and "n" are natural numbers of 2 or more.

[0098] The scan lines GL1 to GLm may extend in a first direction DR1 and may be connected to the pixels PX and the scan driving circuit SDV. The data lines DL1 to DLn may extend in a second direction DR2 and may be connected to the pixels PX and the driver IC DIC. The emission lines EL1 to ELm may extend in the first direction DR1 and may be connected to the pixels PX and the emission driving circuit EDV.

[0099] The first power line PL1 receives a first power voltage, and the second power line PL2 receives a second power voltage having a level lower than that of the first power voltage. A second electrode (eg, cathode) of the light emitting element may be connected to the second power line PL2.

[0100] The first control line SL-C1 may be connected to the scan driving circuit SDV and may extend toward the lower end of the display panel 100. The second control line SL-C2 may be connected to the emission driving circuit EDV and may extend toward the lower end of the display panel 100. The first pad portion PD1 may be disposed in the non-display area 100-NDA adjacent to the lower end of the display panel 100 and may be closer to the lower end of the display panel 100 than the driver IC DIC. The first pad portion PD1 may be connected to some of the signal lines and the driver IC DIC.

[0101] The scan driving circuit SDV may generate a plurality of scan signals, and the scan signals may be applied to the pixels PX through the scan lines GL1 to GLm. The driver IC DIC may generate a plurality of data voltages, and the data voltages may be applied to the pixels PX through the data lines DL1 to DLn. The emission driving circuit EDV may generate a plurality of emission signals, and the emission signals may be applied to the pixels PX through the emission lines EL1 to ELm.

[0102] The pixel PX may receive a data voltage in response to the scan signal, and may display an image by emitting light having brightness corresponding to the data voltage in response to the emission signal.

[0103] Figure 6 is an enlarged cross-sectional view of a display module according to an embodiment of the present disclosure.

[0104] exist Figure 6 , a cross section corresponding to one emission area LA and one non-emission area NLA is illustrated. The emission area LA may be defined by an opening PDL-OP defined in the pixel defining layer PDL. Figure 6 , a light emitting element LD, a transistor TFT, and a storage capacitor Cst included in one pixel PX are illustrated. The transistor TFT may be one of a plurality of transistors included in a driving circuit of the pixel PX. In this embodiment, the transistor TFT is described in more detail in the context of a silicon transistor. However, the transistor TFT may be a metal oxide transistor.

[0105] The buffer layer 10br may be disposed on the base layer 110. The buffer layer 10br may prevent or substantially prevent metal atoms or impurities from diffusing from the base layer 110 to the semiconductor pattern on the upper side of the buffer layer 10br. The semiconductor pattern includes an active area AC1 of the transistor TFT.

[0106] The back metal layer BMLa may be disposed under the transistor TFT. The back metal layer BMLa may block external light from reaching the transistor TFT. The back metal layer BMLa may be disposed between the base layer 110 and the buffer layer 10br. In an embodiment of the present disclosure, an inorganic barrier layer may be additionally disposed between the back metal layer BMLa and the buffer layer 10br. The back metal layer BMLa may be connected to an electrode or a wire and may receive a constant voltage or signal from the electrode or the wire.

[0107] The semiconductor pattern may be disposed on the buffer layer 10br. The semiconductor pattern may include a silicon semiconductor. For example, the silicon semiconductor may include amorphous silicon or polycrystalline silicon. For example, the semiconductor pattern may include low temperature polycrystalline silicon.

[0108] The semiconductor pattern may include a first region having high conductivity and a second region having low conductivity. The first region may be doped with an N-type dopant or a P-type dopant. The P-type transistor may include a doped region doped with a P-type dopant, and the N-type transistor may include a doped region doped with an N-type dopant. The second region may be an undoped region, or may be a region that is lightly doped than the first region.

[0109] The conductivity of the first region may be higher than that of the second region, and the first region may serve as or substantially serve as an electrode or a signal line. The second region may correspond to or substantially correspond to the active region (e.g., channel) AC1 of the transistor TFT. In other words, a portion of the semiconductor pattern may be the active region AC1 of the transistor TFT, another portion may be the source or drain of the transistor TFT, and another portion may be a connection electrode or a connection signal line.

[0110] The source region (e.g., source) SA1, the active region (e.g., channel) AC1, and the drain region (e.g., drain) DA1 of the transistor TFT may be formed of a semiconductor pattern. The source region SA1 and the drain region DA1 may extend from the active region AC1 in opposite directions to each other in cross section (e.g., in a cross-sectional view).

[0111] The first insulating layer 10 may be disposed on the buffer layer 10br. The first insulating layer 10 may be disposed on the plurality of pixels PX (eg, Figure 2 ) overlap together and may cover the semiconductor pattern. The first insulating layer 10 may include an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0112] In the present embodiment, the first insulating layer 10 may be a single silicon oxide layer. However, not only the first insulating layer 10 but also the insulating layer described in more detail below of the driving element layer 120 may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the aforementioned materials, but the present disclosure is not limited thereto.

[0113] The gate GT1 of the transistor TFT is disposed on the first insulating layer 10. The gate GT1 may be a part of the metal pattern. The gate GT1 overlaps the active area AC1. The gate GT1 may be used as a mask in a process of doping the semiconductor pattern. The gate GT1 may include titanium (Ti), silver (Ag), an alloy containing silver, molybdenum (Mo), an alloy containing molybdenum, aluminum (Al), an alloy containing aluminum, aluminum nitride (AlN), or a plurality of other materials. x N y ), tungsten (W), tungsten nitride (W x N y ), copper (Cu), indium tin oxide (ITO), or indium zinc oxide (IZO), but the present disclosure is not particularly limited thereto.

[0114] The second insulating layer 20 may be disposed on the first insulating layer 10 and may cover the gate GT1. The third insulating layer 30 may be disposed on the second insulating layer 20. The second electrode CE20 of the storage capacitor Cst may be disposed between the second insulating layer 20 and the third insulating layer 30. In addition, the first electrode CE10 of the storage capacitor Cst may be disposed between the first insulating layer 10 and the second insulating layer 20.

[0115] The first connection electrode CNE1 may be disposed on the third insulating layer 30. The first connection electrode CNE1 may be connected to the drain area DA1 of the transistor TFT through a contact hole penetrating the first to third insulating layers 10, 20, and 30.

[0116] The fourth insulating layer 40 may be disposed on the third insulating layer 30 and may cover the first connection electrode CNE1. The second connection electrode CNE2 may be disposed on the fourth insulating layer 40. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole penetrating the fourth insulating layer 40. The fifth insulating layer 50 may be disposed on the fourth insulating layer 40 and may cover the second connection electrode CNE2. The stack structure of the first to fifth insulating layers 10, 20, 30, 40, and 50 is not limited thereto, and an additional conductive layer and / or an additional insulating layer may be further disposed in addition to the first to fifth insulating layers 10, 20, 30, 40, and 50.

[0117] The fourth insulating layer 40 and the fifth insulating layer 50 may be organic layers. For example, the organic layer may include a general polymer such as benzocyclobutene (BCB), polyimide, hexamethyldisiloxane (HMDSO), polymethylmethacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenol group, an acrylate polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer or a suitable mixture thereof.

[0118] The light emitting element LD may include a first electrode (e.g., a pixel electrode) AE, an emission layer EL, and a second electrode (e.g., a common electrode) CE. The first electrode AE ​​may be disposed on the fifth insulating layer 50. The first electrode AE ​​may be a (semi) transmissive electrode or a reflective electrode. The first electrode AE ​​may include a reflective layer formed of Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, or a suitable compound thereof, and a transparent or semi-transparent electrode layer formed on the reflective layer. The transparent or semi-transparent electrode layer may include a layer selected from indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), zinc oxide (ZnO), indium oxide (In 2 O 3) and aluminum-doped zinc oxide (AZO). For example, the first electrode AE ​​may include a stacked structure of ITO / Ag / ITO.

[0119] The pixel defining layer PDL may be disposed on the fifth insulating layer 50. According to an embodiment, the pixel defining layer PDL may have a characteristic of absorbing light. For example, the color of the pixel defining layer PDL may be black. The pixel defining layer PDL may include a black colorant. The black colorant may include a black dye or a black pigment. The black colorant may include carbon black, a metal such as chromium, or an oxide thereof. The pixel defining layer PDL may correspond to a light shielding pattern having a light shielding characteristic.

[0120] The pixel defining layer PDL may cover a portion of the first electrode AE ​​(eg, anode). For example, an opening PDL-OP exposing a portion of the first electrode AE ​​may be defined in the pixel defining layer PDL. As described above, the opening PDL-OP of the pixel defining layer PDL may define the emission area LA.

[0121] The pixel defining layer PDL may increase the distance between the periphery of the first electrode AE ​​and the second electrode CE (eg, cathode) Accordingly, the pixel defining layer PDL may be used to prevent or substantially prevent an arc from occurring at the periphery of the first electrode AE.

[0122] In some embodiments, the hole control layer may be disposed between the first electrode AE ​​and the emission layer EL. The hole control layer may include a hole transport layer and may further include a hole injection layer. The electron control layer may be disposed between the emission layer EL and the second electrode CE. The electron control layer may include an electron transport layer and may further include an electron injection layer.

[0123] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may include an inorganic layer 141, an organic layer 142, and an inorganic layer 143 sequentially stacked one by one. However, the layers constituting the encapsulation layer 140 are not limited thereto.

[0124] The inorganic layers 141 and 143 can protect the light emitting element layer 130 from moisture and oxygen, and the organic layer 142 can protect the light emitting element layer 130 from foreign matter such as dust particles. The inorganic layers 141 and 143 may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The organic layer 142 may include, but is not limited to, an acrylic organic layer.

[0125] The input sensor 200 may be disposed on the display panel 100. The input sensor 200 may include a first insulating layer 200-IL1, a first conductive pattern layer 200-CL1, a second insulating layer 200-IL2, a second conductive pattern layer 200-CL2, a third insulating layer 200-IL3, a third conductive pattern layer 200-CL3, and a fourth insulating layer 200-IL4 sequentially stacked one by one. The first insulating layer 200-IL1 may be directly disposed on the encapsulation layer 140.

[0126] In an embodiment of the present disclosure, one of the first to fourth insulating layers 200-IL1, 200-IL2, 200-IL3, and 200-IL4 may be omitted. When the first insulating layer 200-IL1 is omitted, the first conductive pattern layer 200-CL1 may be disposed on the uppermost insulating layer of the encapsulation layer 140. The fourth insulating layer 200-IL4 may be replaced with an adhesive layer or an insulating layer of the anti-reflector 300 disposed on the input sensor 200.

[0127] The first conductive pattern layer 200 - CL1 may include a first conductive pattern, the second conductive pattern layer 200 - CL2 may include a second conductive pattern, and the third conductive pattern layer 200 - CL3 may include a third conductive pattern.

[0128] The first conductive pattern layer 200-CL1 may be disposed on the first insulating layer 200-IL1 and may be covered by the second insulating layer 200-IL2. The second conductive pattern layer 200-CL2 may be disposed on the second insulating layer 200-IL2 and may be covered by the third insulating layer 200-IL3. The third conductive pattern layer 200-CL3 may be disposed on the third insulating layer 200-IL3 and may be covered by the fourth insulating layer 200-IL4.

[0129] Each of the first to third conductive pattern layers 200-CL1, 200-CL2, and 200-CL3 may have a single-layer structure, or may have a multi-layer structure sequentially stacked in the third direction DR3. The conductive pattern layer having a multi-layer structure may include at least two of a transparent conductive layer and a metal layer. The conductive pattern layer having a multi-layer structure may include a metal layer containing metals different from each other. The transparent conductive layer may include indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), PEDOT, metal nanowires, or graphene. The metal layer may include molybdenum, silver, titanium, copper, aluminum, and / or a suitable alloy thereof.

[0130] Each of the first to third conductive pattern layers 200-CL1, 200-CL2, and 200-CL3 according to the embodiment may include first to third layers sequentially stacked one by one. The thickness of the first layer and the third layer may be less than the thickness of the second layer. According to the embodiment, each of the first layer and the third layer may include titanium (Ti), and the second layer may include aluminum (Al).

[0131] In the present embodiment, each of the first to fourth insulating layers 200-IL1, 200-IL2, 200-IL3, and 200-IL4 may include an inorganic layer or an organic layer. In the present embodiment, the first to third insulating layers 200-IL1, 200-IL2, and 200-IL3 may include an inorganic layer, respectively. The inorganic layer may include silicon oxide, silicon nitride, or silicon oxynitride.

[0132] In an embodiment of the present disclosure, at least one of the first to fourth insulating layers 200-IL1, 200-IL2, 200-IL3, and 200-IL4 may be an organic layer. For example, the fourth insulating layer 200-IL4 may include an organic layer. The organic layer may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0133] According to an embodiment, when a camera module (eg, a camera) is used as described above with reference to Figure 2 When the input sensor 200 is disposed under the display panel 100 to overlap the display area 100-DA, the input sensor 200 may further include an interlayer insulating layer. The interlayer insulating layer may be disposed between the first insulating layer 200-IL1 and the second insulating layer 200-IL2. The interlayer insulating layer may be an organic layer. The interlayer insulating layer may compensate for the presence of a plurality of layers on the display panel 100 (e.g., reference Figure 5 ) is a step produced in a process of forming a hole in an area adjacent to the camera module.

[0134] The anti-reflector 300 may be disposed on the input sensor 200. The anti-reflector 300 may include a light shielding pattern 310, a color filter 320, and a planarization layer 330. In an embodiment of the present disclosure, the light shielding pattern 310 may be omitted.

[0135] As long as the material constituting the light shielding pattern 310 is a material capable of absorbing light, it is not particularly limited. In an embodiment, the light shielding pattern 310, which is a layer having a black color, may include a black colorant. The black colorant may include a black dye or a black pigment. The black colorant may include carbon black, a metal such as chromium, or an oxide thereof.

[0136] When viewed from above the plane (e.g., in a plan view), the shading pattern 310 may overlap the third conductive pattern layer 200-CL3. The shading pattern 310 may prevent or substantially prevent external light from being reflected by the first conductive pattern layer to the third conductive pattern layer 200-CL1, 200-CL2, and 200-CL3. The shading pattern 310 may have an opening 310-OP defined therein. The opening 310-OP of the shading pattern 310 may overlap the first electrode AE ​​and may have an area larger than the area of ​​the opening PDL-OP of the pixel defining layer PDL. The opening 310-OP of the shading pattern 310 may be defined as a pixel area PXA. The pixel area PXA may be defined as a region through which light generated from the light emitting element LD and passing through the opening PDL-OP of the pixel defining layer PDL is emitted to the outside. As the area of ​​the pixel area PXA increases, the brightness of the image may be improved.

[0137] The color filter 320 may overlap at least the pixel area PXA. The color filter 320 may further overlap the non-pixel area NPXA. A portion of the color filter 320 may be disposed on the light shielding pattern 310. The color filter 320 may transmit light generated from the light emitting element LD and may block some wavelength bands of external light. Accordingly, the color filter 320 may reduce reflection of external light by the first electrode AE ​​or the second electrode CE.

[0138] The planarization layer 330 may cover the light shielding pattern 310 and the color filter 320. The planarization layer 330 may include an organic material. The planarization layer 330 may provide a flat or substantially flat upper surface.

[0139] Fig. 7A is a plan view of an input sensor according to an embodiment of the present disclosure. Figure 7B is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure. Fig. 8A is with Figure 7B FIG. 1 is a cross-sectional view of the input sensor corresponding to line II-II′ shown in FIG. Figure 8B is with Figure 7B FIG. 4 is a cross-sectional view of the input sensor corresponding to line III-III′ shown in FIG.

[0140] refer to Fig. 7A According to an embodiment of the present disclosure, the input sensor 200 may sense the first input using an electromagnetic induction method, and may sense the second input using a capacitive method. The first input may be the above reference Figure 1A The second input may be the input described above by the stylus STP. Figure 1A The input described is through the user's body (eg, the user's finger) FG. In other words, the first input may be an input that provides a magnetic field signal, and the second input may be an input that can cause a capacitance change.

[0141] The input sensor 200 may sense the first input and the second input by time division driving. A period in which the input sensor 200 operates in the first mode to sense the first input may be defined as a first operation period, and a period in which the input sensor 200 operates in the second mode to sense the second input may be defined as a second operation period.

[0142] The input sensor 200 may be switched between the first mode and the second mode by a user's selection. As another example, by activating an application (e.g., a specific application), one of the first mode and the second mode may be activated, or the input sensor 200 may be switched between the first mode and the second mode. When the input sensor 200 operates alternately in the first mode and the second mode, when a first input is sensed, the input sensor 200 may remain in the first mode, or when the input sensor 200 operates alternately in the first mode and the second mode, when a second input is sensed, the input sensor 200 may remain in the second mode.

[0143] The input sensor 200 may include a first sensor layer that senses a first input using an electromagnetic induction method and a second sensor layer that senses a second input using a capacitive method. The second sensor layer may be disposed on the first sensor layer, or the first sensor layer may be disposed on the second sensor layer. The present disclosure is not limited to any particular embodiment.

[0144] In the input sensor 200 , the first sensor layer may include a first set of electrodes PSE, and the second sensor layer may include a second set of electrodes SE.

[0145] The first group of electrodes PSE may include electrodes 1-1 (eg, first-first electrodes) PSE1 and electrodes 1-2 (eg, first-second electrodes) PSE2. The electrodes 1-1 PSE1 may be arranged along a first direction DR1, and each of the electrodes 1-1 PSE1 may extend in a second direction DR2.

[0146] The electrode 1-2PSE2 may be insulated from the electrode 1-1PSE1 and may cross the electrode 1-1PSE1. The electrodes 1-2PSE2 may be arranged along the second direction DR2, and each of the electrodes 1-2PSE2 may extend in the first direction DR1.

[0147] Among the electrodes 1-2PSE2, the electrode 1-2PSE2 disposed in the upper region may have an open loop shape opened on the left side, and the electrode 1-2PSE2 disposed in the lower region may have an open loop shape opened on the right side. The electrode 2-3 (e.g., the second-third electrode) SE-H may overlap the groove PH defined in the electrode 1-2PSE2. According to the present embodiment, two electrodes 1-1PSE1 adjacent to each other in the first direction DR1 may be connected to each other through a connection portion P-CE.

[0148] The stylus STP (for example, reference Figure 1A ) is charged by a resonance circuit, and senses a magnetic field signal output from the stylus STP through the electrode 1-1PSE1 and the electrode 1-2PSE2. The driving circuit of the input sensor 200 provides a driving signal to at least one of the electrode 1-1PSE1 and the electrode 1-2PSE2, and the sensing circuit of the input sensor 200 senses an electromagnetic induction current formed in the electrode 1-1PSE1 and the electrode 1-2PSE2.

[0149] The second group of electrodes SE may include an electrode 2-1 (e.g., a second-first electrode) SE1 and an electrode 2-2 (e.g., a second-second electrode) SE2. The electrode 2-1SE1 may be arranged along the first direction DR1, and each of the electrodes 2-1SE1 may extend in the second direction DR2. The electrode 2-2SE2 may be insulated from the electrode 2-1SE1 and may cross the electrode 2-1SE1. The electrode 2-2SE2 may be arranged along the second direction DR2, and each of the electrodes 2-2SE2 may extend in the first direction DR1. The electrode 2-1SE1 and the electrode 2-2SE2 are capacitively coupled to each other. A first groove S-H1 may be defined in the electrode 2-1SE1 that overlaps the electrode 1-1PSE1 when viewed from above the plane (e.g., in a plan view), and a second groove S-H2 may be defined in the electrode 2-2SE2 that overlaps the electrode 1-2PSE2 when viewed from above the plane (e.g., in a plan view).

[0150] Each of the electrodes 2-1SE1 may include an extension portion 1-1 (e.g., first-first extension portion) SE1-1 and an extension portion 1-2 (e.g., first-second extension portion) SE1-2 having an angle bracket shape in directions different from each other and spaced apart from each other in the first direction DR1. The extension portion 1-1SE1-1 may be arranged along the second direction DR2, and the extension portion 1-2SE1-2 may be arranged along the second direction DR2.

[0151] The extension portion 1-1SE1-1 and the extension portion 1-2SE1-2 facing each other in the first direction DR1 may have shapes that are symmetrical or substantially symmetrical to each other (e.g., horizontally symmetrical to each other) about the second direction DR2. The extension portion 1-1SE1-1 may have a less than sign ("<") shape, and the extension portion 1-2SE1-2 may have a greater than sign (">") shape.

[0152] Each of the electrodes 2-2SE2 may include an extension portion 2-1 (e.g., second-first extension portion) SE2-1 and an extension portion 2-2 (e.g., second-second extension portion) SE2-2 having an angle bracket shape inclined in directions different from each other and spaced apart from each other in the second direction DR2. The extension portion 2-1SE2-1 may be arranged along the first direction DR1, and the extension portion 2-2SE2-2 may be arranged along the first direction DR1.

[0153] The extension portion 2-1SE2-1 and the extension portion 2-2SE2-2 facing each other in the second direction DR2 may have shapes that are symmetrical or substantially symmetrical to each other about the first direction DR1 (e.g., vertically symmetrical to each other). The extension portion 2-1SE2-1 may have an inverted V ("∧") shape, and the extension portion 2-2SE2-2 may have a V ("∨") shape.

[0154] Each of the electrodes 2-2SE2 may further include a second middle portion SE2-3. The second middle portion SE2-3 may extend in the second direction DR2. The second middle portion SE2-3 is disposed between one end of the extension portion 2-1SE2-1 and one end of the extension portion 2-2SE2-2.

[0155] The second middle portion SE2-3 of the electrode 2-2SE2 disposed in the upper region may be disposed on the right side and may not be disposed on the left side. The second middle portion SE2-3 of the electrode 2-2SE2 disposed in the lower region may be disposed on the left side. Accordingly, one electrode 2-2SE2 may have a ring shape open on one side or the opposite side.

[0156] Each of the electrodes 2-1SE1 may further include a first middle portion SE1-3. The first middle portion SE1-3 may be disposed adjacent to the pad portions PD2 and PD3. The first middle portion SE1-3 may connect the extension portion 1-1SE1-1 and the extension portion 1-2SE1-2 of the electrode 2-1SE1 to each other. The first middle portion SE1-3 may not be disposed in the upper region. Accordingly, one electrode 2-1SE1 may have an open loop shape that is open on the opposite side. According to an embodiment, the signal line 2-1 (e.g., the second-second signal line) SL1 may be connected to the first middle portion SE1-3.

[0157] According to an embodiment, the first middle portion SE1-3 may be insulated from the electrode 1-1PSE1 and may cross the electrode 1-1PSE1. In a region where the first middle portion SE1-3 and the electrode 1-1PSE1 cross each other, a bridge may be provided in a region where different conductive patterns cross each other. The bridge may constitute a portion of the first conductive pattern. The remaining portion of the first conductive pattern and the second conductive pattern may be provided at a layer different from that of the bridge (e.g., in the middle or on top).

[0158] According to an embodiment of the present disclosure, the second sensor layer of the input sensor 200 may further include an electrode 2-3 (e.g., a second-third electrode) SE-H. The electrodes 2-3SE-H may be respectively disposed in the grooves PH defined in the electrodes 1-2PSE2. The electrodes 2-3SE-H may remove noise generated when the input sensor 200 senses the second input using a capacitive method. For example, the noise generated when the input sensor 200 senses the second input using a capacitive method may be removed by calculating the difference between a change in capacitance formed between the electrode 2-1SE1 and the adjacent electrode 2-2SE2 and a change in capacitance formed between the electrode 2-1SE1 and the adjacent electrode 2-3SE-H. According to one or more embodiments of the present disclosure, because the second sensor layer of the input sensor 200 includes a sensor capable of sensing the user's body FG (e.g., reference 1 to FIG. 1 ) through the user's body FG at the input sensor 200 Figure 1A ) is used to remove noise from the external input of the electrode 2-3SE-H, so the sensing sensitivity of the input sensor 200 can be improved.

[0159] The driving circuit of the input sensor 200 provides a driving signal to one of the electrode 2-1SE1 and the electrode 2-2SE2, and the sensing circuit of the input sensor 200 measures the difference between the capacitance of the mutual capacitor formed between the electrode 2-1SE1 and the electrode 2-2SE2 and the capacitance of the mutual capacitor formed between the electrode 2-1SE1 and the electrode 2-3SE-H through the other of the electrode 2-1SE1 and the electrode 2-2SE2.

[0160] After performing the above operation during the first period of the second operation period, the above operation may be reversely performed during the second period of the second operation period. The first period and the second period may be repeated as a set.

[0161] The input sensor 200 may include a second pad portion PD2 and a third pad portion PD3, each of which includes a plurality of pads. The second pad portion PD2 and the third pad portion PD3 may be spaced apart from each other in the first direction DR1, and the first pad portion PD1 (eg, see Figure 5 ) between the second pad portion PD2 and the third pad portion PD3.

[0162] Signal lines included in input sensor 200 may be connected to pads included in pad portions PD2 and PD3. Second and third pad portions PD2 and PD3 may be adjacent to a lower end of input sensor 200 when viewed from above a plane (eg, in a plan view).

[0163] The input sensor 200 may include a first signal line connected to the first group of electrodes PSE and a second signal line connected to the second group of electrodes SE.

[0164] The first signal line may include a signal line 1-1 (e.g., a first-second signal line) PSL1 connected to the electrode 1-1 PSE1 and a signal line 1-2 (e.g., a first-first signal line) PSL2 connected to the end of the electrode 1-2 PSE2. The second signal line may include a signal line 2-1 (e.g., a second-second signal line) SL1 connected to the electrode 2-1 SE1 and a signal line 2-2 (e.g., a second-first signal line) SL2 connected to the electrode 2-2 SE2.

[0165] According to one or more embodiments of the present disclosure, at least some of the first signal lines and the second signal lines may overlap the display area DA and may be connected to corresponding electrodes. The remaining first signal lines and the second signal lines may be disposed in the non-display area NDA and may be connected to corresponding electrodes.

[0166] The signal line 1-1PSL1 may be disposed in the non-display area NDA and may include a line 1-1 (eg, first-first line) PSL11 connected to a first end of the electrode 1-1PSE1 and a line 1-2 (eg, first-second line) PSL12 connected to a second end of the electrode 1-1PSE1.

[0167] One line 1-1PSL11 is connected to two electrodes 1-1PSE1 adjacent to each other in the first direction DR1. For example, one line 1-1PSL11 may be connected to a corresponding connection portion P-CE.

[0168] In the upper region, the second ends of the electrodes 1-1PSE1 may be connected together by the line 1-2PSL12. One end of the line 1-2PSL12 may be connected to the pad of the second pad portion PD2, and the other end of the line 1-2PSL12 may be connected to the pad of the third pad portion PD3. For example, the line 1-2PSL12 may include a first portion PSL12-1, a second portion PSL12-2, and a third portion PSL12-3. The first portion PSL12-1 may extend in the first direction DR1 and may be connected to the second end of the electrode 1-1PSE1 disposed in the upper region. The second portion PSL12-2 may be bent from the first portion PSL12-1 and may be connected to the second pad portion PD2. The third portion PSL12-3 may be bent from the first portion PSL12-1 and may be connected to the third pad portion PD3.

[0169] The signal line 2-1SL1 may be disposed in the non-display area NDA. The signal line 2-1SL1 may be connected to the first middle portion SE1-3 of the corresponding electrode 2-1SE1. The signal line 2-1SL1 connected to the electrode 2-1SE1 disposed on the left side relative to the center of the display area DA in the first direction DR1 may be connected to the pad of the second pad portion PD2. The signal line 2-1SL1 connected to the electrode 2-1SE1 disposed on the right side relative to the center of the display area DA in the first direction DR1 may be connected to the pad of the third pad portion PD3.

[0170] According to one or more embodiments of the present disclosure, at least some of the first signal line and the second signal line may overlap with the display area DA. For example, at least some of the signal lines 1-2PSL2 connected to the electrode 1-2PSE2, at least some of the signal lines 2-2SL2 connected to the electrode 2-2SE2, and at least some of the signal lines 2-3SL-H connected to the electrode 2-3SE-H may be disposed in the display area DA, and the other signal lines may be disposed in the non-display area NDA.

[0171] Among the first signal lines and the second signal lines, the signal lines at least partially overlapping the display area DA may be grouped and defined as a "line group". The input sensor 200 may include eight line groups G-L1 to G-L8. The number of line groups G-L1 to G-L8 may be variously modified to correspond to the number of row electrodes extending in the first direction DR1. According to an embodiment, the input sensor 200 may include eight row electrodes. One row electrode may include an electrode 2-2 (e.g., a second-second electrode) SE2, an electrode 1-2 (e.g., a first-second electrode) PSE2 disposed inside the electrode 2-2SE2, and an electrode 2-3 (e.g., a second-third electrode) SE-H disposed inside the electrode 1-2PSE2.

[0172] The first line group G-L1 may be connected to a first row electrode adjacent to the pad portions PD2 and PD3. The second line group G-L2 may be connected to a second row electrode spaced apart from the first row electrode in the second direction DR2. The eighth line group G-L8 may be connected to the eighth row electrode in a similar manner. Accordingly, the length of the signal line in the second direction DR2 may increase from the first line group G-L1 toward the eighth line group G-L8. Hereinafter, the signal lines included in the first line group G-L1 will be described in more detail, and redundant descriptions of the second line group G-L2 to the eighth line group G-L8 may not be repeated.

[0173] refer to Figure 7B , the first line group G-L1 may include a signal line 1-2PSL2 (e.g., a first-first signal line) connected to the electrode 1-2PSE2 included in the first row electrode, a signal line 2-2SL2 (e.g., some second-first signal lines) connected to the electrode 2-2SE2 included in the first row electrode, and a signal line 2-3SL-H (e.g., other second-first signal lines) connected to the electrode 2-3SE-H included in the first row electrode. The number of the signal lines 1-2PSL2, the signal lines 2-2SL2, and the signal lines 2-3SL-H included in each of the plurality of line groups G-L1 to G-L8 may be greater than or equal to 5.

[0174] The signal line 1 - 2 PSL2 may include a first left line PSL2 - 1 and a first right line PSL2 - 2. The first left line PSL2 - 1 and the first right line PSL2 - 2 may be spaced apart from each other in the first direction DR1 in the display area DA.

[0175] One end of the first left line PSL2-1 and one end of the first right line PSL2-2 can be connected to the electrode 1-2PSE2, and the other end of the first left line PSL2-1 and the other end of the first right line PSL2-2 can be connected to the pad of the second pad portion PD2 to send / receive the same signal to each other, or can be connected to one line in the non-display area NDA and can be connected to one pad.

[0176] The signal line 2 - 2SL2 may include a second left line SL2 - 1 and a second right line SL2 - 2. The second left line SL2 - 1 and the second right line SL2 - 2 may be spaced apart from each other in the first direction DR1 in the display area DA.

[0177] One end of the second left line SL2-1 and one end of the second right line SL2-2 can be connected to the extension portion 2-2SE2-2, and the other end of the second left line SL2-1 and the other end of the second right line SL2-2 can be connected to the pad of the second pad portion PD2 to send / receive the same signal to each other, or can be connected to one line in the non-display area NDA and can be connected to one pad.

[0178] The signal line 2-3SL-H (eg, a center line) may be disposed between the second left line SL2-1 and the second right line SL2-2. The signal line 2-3SL-H may be connected to the electrode 2-3SE-H.

[0179] exist Fig. 8A and Figure 8B , the connection relationship and layer structure of the lines included in the first line group G-L1 and the electrodes included in the first row electrodes are illustrated in more detail.

[0180] refer to Fig. 8A and Figure 8B , the first set of electrodes PSE (eg, reference Fig. 7A ) may be disposed on the second insulating layer 200-IL2. The remaining portion of the electrode 1-1PSE1 may be disposed on the first insulating layer 200-IL1 as a bridge pattern described in more detail below.

[0181] The second set of electrodes SE (eg, reference Fig. 7A ) and a portion of the electrode 2-1SE1 and the electrode 2-2SE2 included in the third insulating layer 200-IL3 may be disposed on the third insulating layer 200-IL3. The remaining portion of the electrode 2-1SE1 may be disposed on the first insulating layer 200-IL1 as a bridge pattern described in more detail below.

[0182] The signal line 1 - 2 PSL2 , the signal line 2 - 2 SL2 , and the signal line 2 - 3 SL-H (eg, a central line) included in the first line group G-L1 may be disposed on the first insulating layer 200 - IL1 .

[0183] refer to Fig. 8A The electrode 1-2 PSE2 may be disposed in a first contact hole T-CH1 defined in the second insulating layer 200-IL2 and may be connected to the first left line PSL2-1 and the first right line PSL2-2.

[0184] refer to Figure 8B The electrode 2-2SE2 may be disposed in a second contact hole T-CH2 defined in the second insulating layer 200-IL2 and the third insulating layer 200-IL3 and may be connected to the second left line SL2-1 and the second right line SL2-2.

[0185] In the input sensor 200 according to one or more embodiments of the present disclosure, the lines included in the first line group G-L1 and the electrodes included in the first row electrode overlapping the display area DA may be disposed at different layers from each other (e.g., in the middle or on top). Accordingly, even if the number of electrodes disposed in the display area DA of the input sensor 200 may increase, the dead zone for disposing the lines included in the first line group G-L1 in the non-display area NDA may be reduced. Therefore, the input sensor 200 having a reduced non-display area NDA may be provided.

[0186] Fig. 9 is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure. Fig. 10A is with Fig. 9 FIG. 4 is a cross-sectional view of the input sensor corresponding to line IV-IV′ shown in FIG. Fig. 10B is with Fig. 9 FIG. 4 is a cross-sectional view of the input sensor corresponding to the line V-V′ shown in FIG.

[0187] In the input sensor 200 according to the embodiment, a first sensor layer that senses an external input using an electromagnetic induction method may be disposed under a second sensor layer that senses an external input using a capacitive method.

[0188] refer to Fig. 9 Each of the extension portions 1-1SE1-1 and 1-2SE1-2 of the electrode 2-1SE1 may include first sensing patterns SP1 arranged along the second direction DR2 and first bridge patterns EP1 (e.g., crossing portions) each connecting two adjacent first sensing patterns SP1 among the first sensing patterns SP1.

[0189] The first sensing pattern SP1 may have a bent shape. For example, the first sensing pattern SP1 may have a shape that is bent leftward or rightward in the first direction DR1 to maintain a desired distance (e.g., a specific or predetermined distance) from the electrode 1-1PSE1. For example, the first sensing pattern SP1 disposed on the left side relative to the electrode 1-1PSE1 may have a less than sign ("<") shape, and the first sensing pattern SP1 disposed on the right side relative to the electrode 1-1PSE1 may have a greater than sign (">") shape. The first sensing pattern SP1 and the first bridge pattern EP1 may be connected together to define a first groove S-H1 surrounding at least a portion of the electrode 1-1PSE1 (e.g., around the periphery of at least a portion of the electrode 1-1PSE1). On a plane (e.g., in a plan view), the electrode 1-1PSE1 may be disposed in the first groove S-H1.

[0190] According to an embodiment, the first sensing pattern SP1 may have a width greater than that of the first bridge pattern EP1. However, not limited thereto, the first sensing pattern SP1 may have a width the same as or substantially the same as that of the first bridge pattern EP1.

[0191] Each of the extension portion 2-1SE2-1 and the extension portion 2-2SE2-2 of the electrode 2-2SE2 may include second sensing patterns SP2 arranged along the first direction DR1 and second bridge patterns EP2 each of which is disposed between two second sensing patterns SP2 adjacent to each other among the second sensing patterns SP2. The second sensing patterns SP2 and the second bridge patterns EP2 may be implemented in a pattern provided as one or substantially one body, but are described as being distinguished from each other for the sake of convenience.

[0192] The second sensing pattern SP2 may have a bent shape. For example, the second sensing pattern SP2 may have a shape that is bent upward or downward in the second direction DR2 to maintain a desired distance (e.g., a specific or predetermined distance) from the electrode 1-2PSE2. For example, the second sensing pattern SP2 disposed on the upper side relative to the electrode 1-2PSE2 may have an inverted V ("∧") shape, and the second sensing pattern SP2 disposed on the lower side relative to the electrode 1-2PSE2 may have a V ("v") shape. The second sensing pattern SP2 and the second bridge pattern EP2 may be connected together to define a second groove S-H2 surrounding at least a portion of the electrode 1-2PSE2 (e.g., around the periphery of at least a portion of the electrode 1-2PSE2). On a plane (e.g., in a plan view), the electrode 1-2PSE2 may be disposed in the second groove S-H2.

[0193] According to an embodiment, the second sensing pattern SP2 may have a width greater than that of the second bridge pattern EP2. However, not limited thereto, the second sensing pattern SP2 may have a width the same as or substantially the same as that of the second bridge pattern EP2.

[0194] The electrode 1-1PSE1 may include third sensing patterns PSP1 arranged along the second direction DR2 and third bridge patterns PEP1 each connecting two adjacent third sensing patterns PSP1 among the third sensing patterns PSP1. The third sensing patterns PSP1 may have a shape identical to or similar to a diamond shape protruding leftward and rightward in the first direction DR1.

[0195] The electrode 1-2PSE2 may include an upper pattern PSE2-1 and a lower pattern PSE2-2 extending in the first direction DR1 and spaced apart from each other in the second direction DR2. The upper pattern PSE2-1 may have a shape that is the same as or similar to that of the second sensing pattern SP2 disposed at the upper side with respect to the electrode 1-2PSE2 and the second bridge pattern EP2 connecting adjacent second sensing patterns SP2 to each other.

[0196] The lower pattern PSE2 - 2 may have a shape that is the same as or similar to that of the second sensing pattern SP2 disposed at a lower side with respect to the electrode 1 - 2 PSE2 and the second bridge pattern EP2 connecting adjacent second sensing patterns SP2 to each other.

[0197] A groove PH surrounding at least a portion of the electrode 2-3SE-H (e.g., around a periphery of at least a portion of the electrode 2-3SE-H) may be defined between the upper pattern PSE2-1 and the lower pattern PSE2-2. On a plane (e.g., in a plan view), the electrode 2-3SE-H may be disposed in the groove PH.

[0198] Portions of the electrode 2-3SE-H disposed between the second sensing patterns SP2 facing each other in the second direction DR2 may have a rhombus shape. Portions of the electrode 2-3SE-H disposed between the second bridge patterns EP2 facing each other in the second direction DR2 may have a straight line shape connected to the rhombus shape and extending in the first direction DR1.

[0199] refer to Fig. 10A and Fig. 10B The third sensing pattern PSP1, the upper pattern PSE2-1 and the lower pattern PSE2-2 of the first group electrode PSE may be disposed on the second insulating layer 200-IL2. The first sensing pattern SP1, the second sensing pattern SP2, the second bridge pattern EP2 and the electrode 2-3SE-H of the second group electrode SE may be disposed on the third insulating layer 200-IL3.

[0200] The third bridge pattern PEP1 of the first group electrode PSE may be disposed on the first insulating layer 200 - IL1 . In addition, the first bridge pattern EP1 of the second group electrode SE may be disposed on the first insulating layer 200 - IL1 .

[0201] like Fig. 10A As shown in FIG. 1 , the first sensing pattern SP1 may be disposed in a third contact hole T-CH3 defined in the second insulating layer 200 - IL2 and the third insulating layer 200 - IL3 and may be connected to the first bridge pattern EP1.

[0202] like Fig. 10BAs shown in FIG. 2 , the third sensing pattern PSP1 may be disposed in a fourth contact hole T-CH4 defined in the second insulating layer 200 - IL2 and may be connected to the third bridge pattern PEP1.

[0203] As referenced above Fig. 8A and Figure 8B As described above, the lines included in the line groups G-L1 to G-L8, the first bridge pattern EP1, and the third bridge pattern PEP1 may be disposed on the first insulating layer 200 - IL1.

[0204] Fig.11 is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure. Fig. 12A is with Fig.11 FIG. 5 is a cross-sectional view of the input sensor corresponding to the line VI-VI′ shown in FIG. Fig. 12B is with Fig.11 The cross-sectional view of the input sensor corresponding to the line VII-VII' shown in FIG. Figures 11 to 12B In the above reference FIG. 8A to FIG. 10B Components that are the same or substantially the same as the components described are denoted by the same or similar reference numerals, and thus redundant descriptions thereof may not be repeated.

[0205] refer to Figures 11 to 12B , in the input sensor 200 - 1 according to the embodiment, a first sensor layer that senses an external input using an electromagnetic induction method may be disposed on a second sensor layer that senses an external input using a capacitive method.

[0206] Each of the extension portions 1-1SE1-1 and 1-2SE1-2 of the electrode 2-1SE1 may include first sensing patterns SP1 arranged along the second direction DR2 and first bridge patterns EP1 (eg, crossing portions) each connecting two adjacent first sensing patterns SP1 among the first sensing patterns SP1.

[0207] Each of the extension portion 2-1SE2-1 and the extension portion 2-2SE2-2 of the electrode 2-2SE2 may include second sensing patterns SP2 arranged along the first direction DR1 and second bridge patterns EP2 each disposed between two second sensing patterns SP2 adjacent to each other among the second sensing patterns SP2. The second sensing patterns SP2 and the second bridge patterns EP2 may be implemented in a pattern provided as one or substantially one body, but are described as being distinguished from each other for the sake of convenience.

[0208] The electrode 1-1PSE1 may include third sensing patterns PSP1 arranged along the second direction DR2 and third bridge patterns PEP1 each connecting two adjacent third sensing patterns PSP1 among the third sensing patterns PSP1. The third sensing patterns PSP1 may have a shape identical to or similar to a diamond shape protruding leftward and rightward in the first direction DR1.

[0209] The electrode 1-2PSE2 may include an upper pattern PSE2-1 and a lower pattern PSE2-2 extending in the first direction DR1 and spaced apart from each other in the second direction DR2. The upper pattern PSE2-1 may have a shape similar to that of the second sensing pattern SP2 disposed at the upper side with respect to the electrode 1-2PSE2 and the second bridge pattern EP2 connecting adjacent second sensing patterns SP2 to each other.

[0210] refer to Fig. 12A and Fig. 12B The third sensing pattern PSP1, the upper pattern PSE2-1 and the lower pattern PSE2-2 of the first group electrode PSE may be disposed on the third insulating layer 200-IL3. The first sensing pattern SP1, the second sensing pattern SP2, the second bridge pattern EP2 and the electrode 2-3SE-H of the second group electrode SE may be disposed on the second insulating layer 200-IL2.

[0211] The third bridge pattern PEP1 of the first group electrode PSE may be disposed on the first insulating layer 200 - IL1 . In addition, the first bridge pattern EP1 of the second group electrode SE may be disposed on the first insulating layer 200 - IL1 .

[0212] like Fig. 12A As shown in FIG. 1 , the first sensing pattern SP1 may be disposed in the fifth contact hole T-CH5 defined in the second insulating layer 200 - IL2 and may be connected to the first bridge pattern EP1.

[0213] like Fig. 12B As shown in FIG. 1 , the third sensing pattern PSP1 may be disposed in a sixth contact hole T-CH6 defined in the second insulating layer 200 - IL2 and the third insulating layer 200 - IL3 and may be connected to the third bridge pattern PEP1.

[0214] Fig.13 is an enlarged plan view of a local area of ​​an input sensor according to an embodiment of the present disclosure. Fig.13 Pictured Fig. 9 2 is an enlarged view (eg, an enlarged picture) of the first sensing pattern SP1 and the third sensing pattern PSP1 illustrated in FIG. The first sensing pattern SP1 is illustrated to represent the second group of electrodes SE, and the third sensing pattern PSP1 is illustrated to represent the first group of electrodes PSE.

[0215] refer to Fig.13 , the first sensing pattern SP1 and the third sensing pattern PSP1 may have a mesh shape. For example, each of the first sensing pattern SP1 and the third sensing pattern PSP1 may include a first conductive line BP1 extending in the second crossing direction CDR2 and a second conductive line BP2 extending in the first crossing direction CDR1. The first conductive line BP1 and the second conductive line BP2 may be formed by the same or substantially the same process as each other and may be formed as one body.

[0216] The mesh sheet formed by the first conductive wire BP1 and the second conductive wire BP2 may be subjected to patterning to form Fig. 9 In the figure, there are a part of the electrode 2-1SE1, the electrode 2-2SE2, a part of the electrode 1-1PSE1, and the electrode 1-2PSE2.

[0217] The opening T-OP having a rhombus shape may be defined by the first conductive wire BP1 and the second conductive wire BP2. Figure 6 In other words, the first conductive line BP1 and the second conductive line BP2 may correspond to the emission area LA shown in FIG. Figure 6 The non-emitting area NLA shown in the figure overlaps.

[0218] Fig.14 is a plan view illustrating an operation period of an input sensor for sensing an external input using a capacitance method according to an embodiment of the present disclosure. Fig.14 It is a reference to the picture above Fig. 7A 1 is a plan view of an operation period (ie, a second operation period) of the second group of electrodes SE described.

[0219] During the second operation period, the above reference Fig. 7A The first set of electrodes PSE described above may not participate in the operation of the input sensor 200. In other words, the input sensor 200 may not provide a driving signal to the first set of electrodes PSE and may not sense a signal from the first set of electrodes PSE. Fig.14 Medium icon Fig. 7A The first set of electrodes PSE.

[0220] During the second operation period, the driving circuit of the input sensor 200 may provide a driving signal to the electrode 2-1SE1. In other words, the driving circuit of the input sensor 200 may scan the electrode 2-1SE1. For example, the driving circuit may sequentially provide the driving signal to the electrode 2-1SE1 through the signal line 2-1SL1 provided in the non-display area NDA. The activation periods of the driving signals applied to the electrode 2-1SE1 may be different from each other. The driving signal may include a plurality of pulse waves or a plurality of sine waves within the activation period. The driving circuit of the input sensor 200 that provides the driving signal may be embedded in a separate driver IC of the input sensor 200, or may be embedded in a driver IC DIC mounted on the display panel 100 (for example, refer to Figure 2 )middle.

[0221] A current path is formed from the electrode receiving the drive signal among the electrodes 2-1SE1 to the electrode 2-2SE2. The current path passes through the first capacitor ICP1 formed between the electrode 2-1SE1 and the electrode 2-2SE2. The amount of change in the capacitance of the first capacitor ICP1 can be detected by the electrode 2-2SE2. Figure 1A ) and noise other than the external input through the user's body FG may be included in the amount of change in capacitance of the first capacitor ICP1 that may be detected through the electrode 2-2SE2.

[0222] According to one or more embodiments of the present disclosure, a current path is formed from the electrode receiving the drive signal among the electrodes 2-1SE1 to the electrode 2-3SE-H. The current path passes through the second capacitor ICP2 formed between the electrode 2-1SE1 and the electrode 2-3SE-H. The change in capacitance of the second capacitor ICP2 can be detected by the electrode 2-3SE-H. The change in capacitance of the second capacitor ICP2 that can be detected by the electrode 2-3SE-H may include noise.

[0223] According to the present embodiment, the differential amplifier AM may be connected to the side of the pad portions PD2 and PD3. The difference between the amount of change in capacitance detected by the electrode 2-2SE2 and the amount of change in capacitance detected by the electrode 2-3SE-H may be obtained by the differential amplifier AM. Accordingly, the sensing coordinates (e.g., only the pure sensing coordinates) other than the noise value generated in the input sensor 200 may be obtained during the second operation period. The sensing coordinates may be the value of the capacitance detected by the user's body FG (e.g., reference Figure 1A) input. The sensing circuit of the input sensor 200 can calculate the difference of the capacitance change through the differential amplifier AM. The sensing circuit of the input sensor 200 can be embedded in a separate driver IC of the input sensor 200, or can be embedded in a driver IC DIC mounted on the display panel 100 (for example, refer to Figure 2 )middle.

[0224] The input sensor 200 according to the present disclosure may remove the signal passing through the user's body FG (eg, reference signal) through the electrodes 2-3SE-H during the second operation period. Figure 1A ). Accordingly, an input sensor 200 with improved sensing sensitivity can be provided.

[0225] FIG. 15A to FIG. 15C is a plan view illustrating a charging period of an operation period of an input sensor that senses an external input using an electromagnetic induction method according to an embodiment of the present disclosure. Fig.16 is a plan view illustrating a sensing period of an operation period of an input sensor for sensing an external input using an electromagnetic induction method according to an embodiment of the present disclosure.

[0226] FIG. 15A to FIG. 15C It is a graphic Fig. 7A FIG. 4 is a plan view of a charging period of an operation period (ie, a first operation period) of a first group of electrodes PSE. Fig.16 It is a graphic Fig. 7A FIG. 4 is a plan view of a sensing period of a first operation period of a first group of electrodes PSE.

[0227] During a charging period of the first operation period, Fig. 7A The second group of electrodes SE may not participate in the operation of the input sensor 200. In other words, the driving signal may not be provided to the second group of electrodes SE. FIG. 15A to FIG. 15C Medium icon Fig. 7A The second set of electrodes SE.

[0228] exist FIG. 15A to FIG. 15C For ease of illustration, among the three lines 1-1PSL11 set in the non-display area NDA, the left line 1-1PSL11 is defined as the first line PSL11-1, the middle line 1-1PSL11 is defined as the second line PSL11-2, and the right line 1-1PSL11 is defined as the third line PSL11-3.

[0229] According to one or more embodiments of the present disclosure, a portion of the first left line PSL2-1 and the first right line PSL2-2 included in each of the line groups G-L1 to G-L8 may be set in the display area DA, and the remaining portions thereof may be set in the non-display area NDA and may be connected to the corresponding pad portions PD2 and PD3.

[0230] During the charging period, the line 1-2PSL12 may receive a driving signal or a ground voltage from at least one of the second pad portion PD2 and the third pad portion PD3. A portion of the first line PSL11-1, the second line PSL11-2, and the third line PSL11-3 may be selected, and the remaining portion thereof may not be selected. The selected line may receive a driving signal or a ground voltage. The electrode 1-1PSE1 connected to the selected line may also receive a driving signal or a ground voltage. The unselected line may be floated. Some of the line 1-2PSL12, the electrode 1-1PSE1, and the line 1-1PSL11 may be selected so that a current path may be formed in the coil (e.g., the coil is defined).

[0231] refer to Fig.15A , during the first period of the charging period, the driving circuit of the input sensor 200 may select the second pad PD2 connected to the line 1-2 PSL12 and the second pad PD2 to which the second line PSL11-2 is connected. The driving circuit of the input sensor 200 applies a driving signal to the second pad PD2 connected to the line 1-2 PSL12, and applies a ground voltage to the second pad PD2 connected to the second line PSL11-2. In this case, the first line PSL11-1 and the third line PSL11-3 may be floated.

[0232] The wire 1 - 2 PSL12 , the electrode 1 - 1 PSE1 disposed at the center among the electrodes 1 - 1 PSE1 , and the second wire PSL11 - 2 may define a current path having a coil shape. The coil-shaped current path may generate a magnetic field.

[0233] refer to Fig. 15B, during the second period of the charging period, the driving circuit of the input sensor 200 may select the second pad PD2 connected to the first line PSL11-1 and the third pad PD3 to which the third line PSL11-3 is connected. The driving circuit of the input sensor 200 may apply a driving signal to the second pad PD2 connected to the first line PSL11-1, and may apply a ground voltage to the third pad PD3 connected to the third line PSL11-3. The first line PSL11-1, the electrode 1-1PSE1 disposed on the left side among the electrodes 1-1PSE1, the line 1-2PSL12, the electrode 1-1PSE1 disposed on the right side among the electrodes 1-1PSE1, and the third line PSL11-3 may define a current path having a coil shape.

[0234] refer to Fig. 15C , during the third period of the charging period, the driving circuit of the input sensor 200 may select the second pad PD2 connected to the second line PSL11-2 and the third pad PD3 to which the line 1-2PSL12 is connected. The driving circuit of the input sensor 200 may apply a driving signal to the second pad PD2 connected to the second line PSL11-2, and may apply a ground voltage to the third pad PD3 connected to the line 1-2PSL12. The second line PSL11-2, the electrode 1-1PSE1 disposed at the center among the electrodes 1-1PSE1, and the line 1-2PSL12 may define a current path having a coil shape.

[0235] Reference above FIG. 15A to FIG. 15C During the charging period described above, a constant or substantially constant voltage may be applied to the electrode 1-2PSE2 via the signal line 1-2PSL2. FIG. 15A to FIG. 15C The driving sequence of the described charging period is an example, and the present disclosure is not necessarily limited thereto. The operation sequence of the first period to the third period may be changed. In addition, two electrodes 1-1PSE1 closest to each other among the electrodes 1-1PSE1 may define a portion of a coil-shaped current path.

[0236] refer to Fig. 15B , the resonant circuit of the stylus STP can be charged during the second period of the charging period. The resonant circuit of the stylus STP disposed on the central electrode 1-1 PSE1 receives the reference Fig. 15B The magnetic field formed in the current path described above. The resonant circuit of the stylus STP uses the Fig. 15B The signal received by the change of the magnetic field in the described current path resonates. The resonant circuit of the stylus STP may include an inductor L and a capacitor C connected to the inductor L. An LC resonant circuit may be formed by the inductor L and the capacitor C. The capacitor C may be a variable capacitor with a changing capacitance.

[0237] Fig.16 The sensing period of the first operation period is shown. Fig.16 In FIG. 1 , an electrode 2-1SE1 and an electrode 1-1PSE1 are illustrated in which an induced current is generated by a magnetic field signal output from a stylus pen STP. Fig.16 Induction current is generated in the electrode 2-2SE2 and one electrode 1-2PSE2 shown in the figure.

[0238] refer to Fig. 7A and Fig.16 , during the sensing period after the charging period, the sensing circuit of the input sensor 200 may ground the line 1-2PSL12 and may ground the signal line 1-2PSL2. Fig.16 , a ground voltage is applied to the second pad PD2 connected to the line 1-2PSL12, and a ground voltage is applied to the third pad PD3 connected to the signal line 1-2PSL2 arranged in the right area. The resonant circuit of the stylus STP generates a magnetic field while discharging. By the magnetic field emitted from the stylus STP, an induced current can be generated in the input sensor 200 inductively coupled to the resonant circuit of the stylus STP.

[0239] A first capacitor ICP1 is defined between the electrode 2 - 1SE1 and the electrode 1 - 1PSE1, and a second capacitor ICP2 is defined between the electrode 2 - 2SE2 and the electrode 1 - 2PSE2.

[0240] As the line 1-2PSL12 is grounded, the first sense current IC1 flows from the electrode 2-1SE1 to the electrode 1-1PSE1 through the first capacitor ICP1. In addition, as the signal line 1-2PSL2 is grounded, the second sense current IC2 flows from the electrode 2-2SE2 to the electrode 1-2PSE2 through the second capacitor ICP2. The sensing circuit of the input sensor 200 can sense the first sense current IC1 through the signal line 1-1SL1 and the second pad PD2 connected thereto, and can sense the second sense current IC2 through the signal line 2-1SL2 and the third pad PD3 connected thereto, thereby recognizing the input of the stylus STP.

[0241] In the input sensor 200 according to one or more embodiments of the present disclosure, a first sensor layer that senses an external input using an electromagnetic induction method and a second sensor layer that senses an external input using a capacitive method may be stacked on each other. Accordingly, a relatively thin electronic device ED may be provided. In addition, signal lines connected to some of the electrodes included in the first sensor layer and the second sensor layer may be provided in the display area DA (e.g., reference numeral 406). Fig. 7A Accordingly, an electronic device ED with a reduced dead zone can be provided.

[0242] According to one or more embodiments of the present disclosure, a first sensor layer for sensing external input using an electromagnetic induction method and a second sensor layer for sensing external input using a capacitance method may be stacked on each other in an input sensor. Accordingly, a relatively thin electronic device may be provided.

[0243] According to one or more embodiments of the present disclosure, signal lines connected to some of the electrodes included in the first sensor layer and the second sensor layer may be provided in the display area. Accordingly, an electronic device with a reduced dead zone may be provided. In addition, an electronic device including an input sensor with improved sensing performance may be provided.

[0244] The foregoing is an illustration of some embodiments of the present disclosure and should not be construed as limiting them. Although some embodiments have been described, it will be readily understood by those skilled in the art that various modifications may be made to the embodiments without departing from the spirit and scope of the present disclosure. It will be understood that, unless otherwise described, the description of the features or aspects within each embodiment should generally be considered to be applicable to other similar features or aspects in other embodiments. Therefore, as will be apparent to those of ordinary skill in the art, unless otherwise specifically noted, the features, characteristics and / or elements described in conjunction with a particular embodiment may be used alone or in combination with the features, characteristics and / or elements described in conjunction with other embodiments. Therefore, it should be understood that the foregoing is an illustration of various example embodiments and should not be construed as being limited to the specific embodiments disclosed herein, and that various modifications to the disclosed embodiments and other example embodiments are intended to be included in the spirit and scope of the present disclosure as defined by the claims and their equivalents.

Claims

1. An electronic device, comprising: A display panel comprising a display area including pixels and a non-display area adjacent to the display area; as well as An input sensor, on the display panel, Wherein, the input sensor comprises: a first sensor layer configured to sense external input using an electromagnetic induction method and comprising a first set of electrodes; a second sensor layer configured to sense external input using a capacitive method and comprising a second set of electrodes insulated from the first set of electrodes; A pad portion, comprising a pad overlapping the non-display area; a first signal line connected to the first group of electrodes and the pad; and a second signal line connected to the second group of electrodes and the pad, and Wherein, at least some of the first signal lines and the second signal lines overlap with the display area.

2. The electronic device according to claim 1, wherein: The first set of electrodes comprises: first-first electrodes arranged along a first direction, each of the first-first electrodes including first-first sensing patterns arranged along a second direction crossing the first direction and first bridge patterns configured to connect the first-first sensing patterns adjacent to each other; and first-second electrodes, insulated from the first-first electrodes and arranged along the second direction, each of the first-second electrodes extending in the first direction, The first signal line includes a first-first signal line configured to at least partially overlap the display area and a first-second signal line configured to overlap the non-display area, and Wherein, the first-first signal line is connected to the first-second electrode.

3. The electronic device according to claim 2, wherein: The second set of electrodes comprises: second-first electrodes arranged along the first direction, each of the second-first electrodes including a second-first sensing pattern arranged along the second direction and a second bridge pattern configured to connect the second-first sensing patterns adjacent to each other; second-second electrodes insulated from the second-first electrodes and arranged along the second direction, each of the second-second electrodes extending in the first direction; and second-third electrodes arranged along the second direction and positioned inside the second-second electrodes in a plan view, each of the second-third electrodes extending in the first direction, The second signal line includes a second-first signal line configured to at least partially overlap the display area and a second-second signal line configured to overlap the non-display area, and Some of the second-first signal lines are connected to the second-second electrodes, and other of the second-first signal lines are connected to the second-third electrodes.

4. The electronic device according to claim 3, wherein: The input sensor further comprises: A first insulating layer, on the display panel; a second insulating layer, on the first insulating layer; a third insulating layer on the second insulating layer; and a fourth insulating layer on the third insulating layer, and The first-first signal line and the second-first signal line are on the first insulating layer and covered by the second insulating layer.

5. The electronic device according to claim 4, wherein: The first bridge pattern and the second bridge pattern are on the first insulating layer and covered by the second insulating layer.

6. The electronic device according to claim 5, wherein: The first-first sensing patterns and the first-second electrodes are on the second insulating layer and covered by the third insulating layer, and The first-first sensing pattern is connected to the first bridge pattern through a contact hole defined in the second insulating layer.

7. The electronic device according to claim 5, wherein: The second-first sensing pattern, the second-second electrode and the second-third electrode are on the third insulating layer and covered by the fourth insulating layer, and The second-first sensing pattern is connected to the second bridge pattern through a contact hole defined in the second insulating layer and the third insulating layer.

8. The electronic device according to claim 6, wherein: Each of the second-first sensing pattern, the second-second electrode, and the second-third electrode includes conductive lines configured to cross each other, and The conductive line has an opening defined in the conductive line to overlap with an emission region through which light generated by the pixel is provided.

9. The electronic device according to claim 3, wherein: Each of the first-first electrodes includes a side adjacent to the pad portion and an opposite side facing away from the one side, and wherein one of the first-second signal lines is connected to the opposite side of each of the first-first electrodes.

10. The electronic device according to claim 9, further comprising: A connection portion is configured to connect the one sides of the first-first electrodes adjacent to each other in the first direction among the first-first electrodes.

11. The electronic device according to claim 3, wherein: The first-first signal line and the second-first signal line located between the second-first electrodes adjacent to each other in the first direction are defined as one line group among a plurality of line groups, and Wherein, the number of the first-first signal lines and the second-first signal lines included in each of the plurality of line groups is greater than or equal to 5.

12. The electronic device according to claim 11, wherein: Each of the plurality of line groups comprises: a first left line and a first right line connected to one of the first-second electrodes and spaced apart from each other in the first direction; a second left line and a second right line connected to a second-second electrode configured to surround the one of the first-second electrodes among the second-second electrodes, the second left line and the second right line being located between the first left line and the first right line; and A central line connected to the second-third electrode surrounded by the one of the first-second electrodes among the second-third electrodes, the central line being located between the second left line and the second right line.

13. The electronic device according to claim 12, wherein: The center lines included in the plurality of line groups have different lengths from each other in the second direction.

14. The electronic device according to claim 4, wherein: The second-first sensing pattern, the second-second electrode and the second-third electrode are on the second insulating layer and covered by the third insulating layer, and The second-first sensing pattern is connected to the second bridge pattern through a contact hole defined in the second insulating layer.

15. The electronic device according to claim 14, wherein: The first-first sensing patterns and the first-second electrodes are on the third insulating layer and covered by the fourth insulating layer, and The first-first sensing pattern is connected to the first bridge pattern through a contact hole defined in the second insulating layer and the third insulating layer.

16. The electronic device according to claim 3, wherein: In the plan view, each of the first-second electrodes has an open loop shape and defines a groove configured to extend in the first direction and overlap with a corresponding second-third electrode among the second-third electrodes.

17. The electronic device according to claim 16, wherein: In the plan view, each of the second-second electrodes has an open loop shape and defines a groove configured to extend in the first direction and overlap with a corresponding first-second electrode among the first-second electrodes.

18. The electronic device according to claim 3, wherein: In the plan view, each of the second-first electrodes has an open loop shape and defines a groove configured to extend in the second direction and overlap with a corresponding first-first electrode among the first-first electrodes.

19. The electronic device according to any one of claims 1 to 18, wherein: Each of the first group of electrodes and the second group of electrodes includes a first layer, a second layer, and a third layer sequentially stacked one after another, the first layer and the third layer having a thickness smaller than that of the second layer, and Wherein, the first layer and the third layer include titanium, and the second layer includes aluminum.

20. The electronic device according to any one of claims 1 to 18, wherein: The first sensor layer is configured to sense the external input provided from a stylus including a resonant circuit.

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