Data processing method and device, host, universal flash memory and electronic equipment

Abstract

The invention discloses a data processing method, a data processing device, a host, universal flash memory electronic equipment and a nonvolatile computer readable storage medium. The method comprises the steps of determining first request information and second request information; generating a data processing request according to a preset transmission format, adding the first request information to a first field of the data processing request, and adding the second request information to a second field of the data processing request; and sending the data processing request to a universal flash memory. And additionally loading the second request information by utilizing a second field reserved in the UFS protocol format, so that the same data processing request simultaneously realizes two UFS requests. According to the method and the device, the number of UFS requests can be reduced, so that frequent proceeding of requests and responses between the host and the UFS is avoided, the interaction frequency is reduced, the host load is reduced, and the operation efficiency of the host is improved.

Description

Technical Field

[0001] The present application relates to the field of data processing technology, and more specifically, to a data processing method, a data processing device, a host, a universal flash memory, an electronic device, and a non-volatile computer-readable storage medium. Background Art

[0002] When the host of an electronic device processes (such as reading, writing, etc.) data in a storage device (such as universal flash storage (UFS)), it needs to send a UFS request to the storage device. After the storage device receives the UFS request, it can perform the operation corresponding to the UFS request.

[0003] However, as the number of UFS requests increases, the requests and responses between the host and the UFS are frequent, and the increase in the number of interactions leads to an increase in the host load, which in turn affects the operating efficiency of the host. Summary of the invention

[0004] Embodiments of the present application provide a data processing method, a data processing device, a host, a universal flash memory, an electronic device, and a non-volatile computer-readable storage medium.

[0005] The data processing method of the embodiment of the present application is applied to a host, and the method includes determining first request information and second request information, wherein the first request information is different from the second request information; generating a data processing request according to a preset transmission format, and adding the first request information to a first field of the data processing request, and adding the second request information to a second field of the data processing request; and sending the data processing request to a universal flash memory.

[0006] A data processing method in another embodiment of the present application is applied to a universal flash memory, the method comprising receiving a data processing request sent by a host, the data processing request comprising a first field and a second field, the first field comprising first request information, the second field comprising second request information, the first request information being different from the second request information; and executing operations corresponding to the first request information and the second request information.

[0007] The data processing device of the embodiment of the present application includes a first determination module, a first generation module and a sending module. The first determination module is used to determine first request information and second request information, and the first request information is different from the second request information; the first generation module is used to generate a data processing request according to a preset transmission format, and add the first request information to a first field of the data processing request, and add the second request information to a second field of the data processing request; the sending module is used to send the data processing request to a universal flash memory.

[0008] A data processing device in another embodiment of the present application includes a first receiving module and an execution module. The first receiving module is used to receive a data processing request sent by a host, the data processing request includes a first field and a second field, the first field includes first request information, the second field includes second request information, and the first request information is different from the second request information; and the execution module is used to execute operations corresponding to the first request information and the second request information.

[0009] The host of the embodiment of the present application includes a processor, a memory and a computer program, wherein the computer program is stored in the memory and executed by the processor, and the computer program includes instructions for executing a data processing method. The data processing method includes determining first request information and second request information, the first request information is different from the second request information; generating a data processing request according to a preset transmission format, adding the first request information to a first field of the data processing request, adding the second request information to a second field of the data processing request; and sending the data processing request to a universal flash memory.

[0010] The universal flash memory of the embodiment of the present application includes a controller, and the controller is used to execute a data processing method. The data processing method includes receiving a data processing request sent by a host, the data processing request includes a first field and a second field, the first field includes first request information, the second field includes second request information, and the first request information is different from the second request information; and executing operations corresponding to the first request information and the second request information.

[0011] The electronic device of the embodiment of the present application includes a host and a universal flash memory. The host includes a processor, a memory and a computer program, wherein the computer program is stored in the memory and executed by the processor, and the computer program includes instructions for executing a data processing method. The data processing method includes determining first request information and second request information, the first request information is different from the second request information; generating a data processing request according to a preset transmission format, adding the first request information to a first field of the data processing request, and adding the second request information to a second field of the data processing request; and sending the data processing request to the universal flash memory. The universal flash memory includes a controller, and the controller is used to execute the data processing method. The data processing method includes receiving a data processing request sent by the host, the data processing request includes a first field and a second field, the first field includes first request information, the second field includes second request information, and the first request information is different from the second request information; and performing operations corresponding to the first request information and the second request information.

[0012] The computer-readable storage medium of the embodiment of the present application includes a computer program, and when the computer program is executed by a processor, the processor executes the data processing method. The data processing method includes determining first request information and second request information, the first request information is different from the second request information; generating a data processing request according to a preset transmission format, and adding the first request information to the first field of the data processing request, and adding the second request information to the second field of the data processing request; and sending the data processing request to a universal flash memory. Alternatively, the data processing method includes receiving a data processing request sent by a host, the data processing request includes a first field and a second field, the first field includes first request information, the second field includes second request information, and the first request information is different from the second request information; and performing operations corresponding to the first request information and the second request information.

[0013] The data processing method, data processing device, host, universal flash memory, electronic device and computer-readable storage medium of the implementation mode of the present application first determine different first request information and second request information, and then in the same data processing request, add the first request information and the second request information to the first field and the second field of the data processing request respectively, and use the second field reserved in the UFS protocol format to additionally load the second request information, so as to realize the same data processing request to realize two UFS requests at the same time. For example, in the data processing request of the write request, the second request information corresponding to the read request is additionally loaded, so that after the data processing request is sent to the UFS, the UFS can perform the write operation corresponding to the write request while also performing the read operation corresponding to the read request. Compared with respectively realizing the write operation and the read operation through two UFS requests, the present application can reduce the number of UFS requests, thereby avoiding frequent requests and responses between the host and the UFS, reducing the number of interactions to reduce the host load, and thus improving the operation efficiency of the host.

[0014] Additional aspects and advantages of the embodiments of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the embodiments of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0016] Figure 1 is a schematic plan view of an electronic device according to some embodiments of the present application;

[0017] Figure 2 is a schematic diagram of the structure of a universal flash memory of certain embodiments of the present application;

[0018] Figure 3 is a flowchart of a data processing method of certain embodiments of the present application;

[0019] Figure 4 is a schematic diagram of the data format of a data processing request in certain embodiments of the present application;

[0020] Figure 5 It is a schematic diagram of the structure of a host in some embodiments of the present application;

[0021] Figure 6 It is a scenario schematic diagram of a data processing method of certain embodiments of the present application;

[0022] Figure 7 is a schematic diagram of a data structure of second request information in certain implementation modes of the present application;

[0023] Figure 8 It is a schematic diagram of the data format of the response information of some implementation modes of the present application;

[0024] Fig. 9 It is a scenario schematic diagram of a data processing method of certain embodiments of the present application;

[0025] Fig.10 is a flowchart of a data processing method of certain embodiments of the present application;

[0026] Fig.11 is a schematic diagram of a module of a data processing device in some embodiments of the present application;

[0027] Fig.12 is a schematic diagram of a module of a data processing device in some embodiments of the present application;

[0028] Fig.13 It is a schematic diagram of the connection status of a non-volatile computer-readable storage medium and a processor in certain embodiments of the present application. DETAILED DESCRIPTION

[0029] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals represent the same or similar elements or elements having the same or similar functions from beginning to end. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the embodiments of the present application, and cannot be understood as limiting the embodiments of the present application.

[0030] See also Figure 1 To facilitate understanding of the present application, the hardware architecture of the present application is first explained here. The electronic device 1000 of the present application includes a host 100 and a universal flash memory 200, and the host 100 is connected to the UFS.

[0031] Optionally, the electronic device 1000 may be a mobile phone, a tablet computer, a desktop computer, a laptop computer, a car, or other device having a storage device or capable of processing data on a storage device, etc. This application is described using the electronic device 1000 as a mobile phone as an example.

[0032] The host 100 includes a processor 30 and a memory 40. The memory 40 stores a computer program 50. The computer program 50 includes instructions for a data processing method. When the computer program 50 is executed by the processor, the data processing method can be executed.

[0033] See also Figure 2, UFS consists of a controller 210 and a storage array 220, wherein the controller 210 is a hardware chip that can realize functions such as receiving requests and data from the host 100 or sending responses and data to the host 100, accessing the storage array 220, logical operations, and error handling. The controller 210 has one or more cores for processing different functions. The controller 210 usually also includes a static random access memory (SRAM) for caching mapping tables, recording storage task information and key information of device operation, etc.

[0034] Optionally, the controller 210 may also include important modules such as dynamic random access memory (DRAM), which is not limited in this application.

[0035] The storage array 220 is composed of a non-volatile storage medium, that is, the stored data will not be lost after power failure. The storage array 220 is connected to the controller 210 and can interact with the controller 210 for instructions and data. The non-volatile storage medium involved in this application includes flash memory (i.e., NAND Flash), magnetic random access memory (magnetic random access memory, MRAM), resistive random access memory (resistive random access memory, RRAM), etc., which are not limited in this solution.

[0036] Optionally, the mapping table involved in the present application is a data structure recorded by UFS, representing the mapping relationship between logical addresses and physical addresses. The logical address is a relative address used by the host 100, and the physical address represents a location on the storage array 220, storing a data unit. In the mapping table, each logical address has a corresponding physical address. Before the logical address is written to the mapping table, or after the logical address is erased by the host 100 through an erase request, the corresponding physical address in the mapping table can be an invalid value, indicating that there is no valid data at this logical address. The complete mapping table is stored on the storage array 220, and there is also a partial or full backup of the mapping table on the controller 210. When searching or modifying the mapping table, the controller 210 reads the part of the mapping table that the logical address hits from the storage array 220 and caches it on the controller 210, such as caching it on SRAM or DRAM, for fast access.

[0037] Optionally, the electronic device 1000 further includes a housing 60 , and the UFS may be located inside the housing 60 and connected to the host, or the UFS may be located outside the housing 60 and connected to the host 100 via a connecting line connected to an interface exposed in the housing 60 .

[0038] Below Figure 1 The data processing method is described by taking the case where the UFS is located inside the housing 60 and connected to the host 100 as an example. The principle when the UFS is located outside the housing 60 is basically similar and will not be repeated here.

[0039] Please refer to 3. The data processing method performed by the host 100 in the present application includes:

[0040] Step 011: Determine the first request information and the second request information, the first request information is different from the second request information; specifically, during the operation of the host 100, many data processing operations will be generated, such as reading, writing, erasing, etc. For different data processing operations, requests of corresponding request types are generally used to request UFS to process. For example, when the host 100 reads, a read request is generated and then sent to the UFS. The UFS reads the mapping table of the logical address (Logical block address, LBA) and the physical address (Physical block address, PBA), and then finds the PBA corresponding to the LBA of the read request, and then the UFS reads the data of the corresponding PBA; or, when the host 100 writes, a write request is generated and then sent to the UFS. The UFS writes the data and updates the mapping table according to the logical address and physical address of the written data.

[0041] In addition, data processing operations may generate invalid data, such as old data and deleted data that remain in the host 100 and have not been processed after a file is updated or deleted. In the UFS mapping table, the logical addresses corresponding to these invalid data are still recorded and are considered valid data by the UFS. The host 100 needs to periodically send one or more erase requests to inform the UFS that these data are invalid, and the UFS can clear their mapping relationship or delete them from the UFS.

[0042] Optionally, invalid data of the present application may refer to data that has been identified as physically and / or logically erasable for any reason (such as the data is old and unused, designated to be erased by the user, low priority, damaged or suspected of being damaged, etc.).

[0043] Optionally, the request types corresponding to the first request information and the second request information include a write request, a read request, an erase request, a pre-read request, data output (data out), data input (data in) or a task management request.

[0044] The difference between the pre-read request and the read request is that the pre-read request only reads data into the UFS controller 210 (such as the SRAM of the controller 210), while the read request reads data into the host 100 (such as the memory of the host 100). The data output request is used to write the data corresponding to the write request, the data input request is used to read the data of the read request, and the erase request is used to erase the data in the logical address corresponding to the invalid data in the mapping table or the corresponding physical address.

[0045] Optionally, the first request information is different from the second request information, which means that the request types of the first request information and the second request information are different.

[0046] Specifically, it can be understood that for the same request type, they can be included in the same field. Since there is a field in the UFS request that defines the request type of the first field, the same request information can be included in the first field. When the request types of the first request information and the second request information are different, if they are still in the first field, the same operation may be performed on the logical addresses of the two. Therefore, the second field needs to be used alone to load the second request information to ensure that the UFS can accurately perform the operations corresponding to the first request information and the second request information.

[0047] In this way, the first request information and the second request information may be determined according to the data processing operation that the host 100 may currently need to perform.

[0048] Step 012: Generate a data processing request according to a preset transmission format, and add the first request information to the first field of the data processing request, and add the second request information to the second field of the data processing request;

[0049] Specifically, it can be understood that, for UFS, the UFS protocol information unit (UPIU) specifies the transmission format of various requests and data between the UFS and the host 100, that is, the preset transmission format. When the UFS and the host 100 interact, the data processing request sent by the host 100 must meet the transmission format. Therefore, the data processing request can be generated according to the transmission format, and the transmission format includes a variety of different fields, please refer to Figure 4 , which is the transmission format specified by the UFS protocol. In addition to the basic fields required by the request (such as Figure 4 Fields 0 to 4 in the , are used to indicate that this is a request, and fields 16 to 31 are used to load the first request information (such as Figure 4The command descriptor block (CDB) fields, i.e., CDB[0] to CDB

[15] , can automatically allocate an appropriate number of fields according to the size of the first logical address set included in the first request information to ensure that the data processing request can load the first request information)).

[0050] The transmission format also includes unused EHS fields (i.e., extension fields, which may also be called EHS extension fields, or EHS extension spaces, etc.). Figure 4 The size of the EHS field and the data segment field is allocated by the host 100 according to the size of the second request information to meet the requirement of recording the logical address set. The logical address set may include one or more logical addresses, or the logical address set may include one or more logical addresses and the access length corresponding to each logical address.

[0051] Therefore, the first request information may be added to the first field of the data processing request, and the second request information may be added to the second field of the data processing request. For example, the first field may include fields 16 to 31, and the second field may be an EHS field or a data segment field.

[0052] In this way, the second field reserved by the UFS is used to load additional second request information, so that two UFS requests are transmitted simultaneously for the same data processing request, thereby reducing the number of UFS requests.

[0053] Step 013: Send a data processing request to the universal flash memory 200.

[0054] Specifically, see Figure 5 The host 100 may include hardware such as a central processing unit (CPU), a memory, a UFS host controller and peripheral devices, as well as software running on the host 100, such as an operating system, a file system, an application, a UFS driver, a UFS protocol information unit, etc.

[0055] Optionally, the processor 30 may be a CPU, a UFS host controller, or the like.

[0056] The host 100 and the UFS (such as Figure 5 The UFS device shown in the figure follows the UFS protocol when connected, and the request, response, data and other interactions between the host 100 and the UFS are realized through the UFS protocol information unit. When the software running on the host 100 accesses the data stored on the UFS, it first sends a request to the UFS driver, which is converted by the UFS driver into a UFS request that complies with the UPIU and sent to the UFS through the UFS host controller.

[0057] After determining the data processing request (i.e., the UFS request converted by the UFS driver), the data processing request can be sent to the UFS, so that the UFS executes the operations corresponding to the first request information and the second request information, and completes the operations corresponding to the two requests with one request. For example, in the data processing request for a write request, the second request information corresponding to the read request is additionally loaded. After receiving the write request, the UFS will perform the read operation corresponding to the read request in addition to the write operation corresponding to the write request; or, in the data processing request for a write request, the second request information corresponding to the erase request is additionally loaded. After receiving the write request, the UFS will perform the erase operation corresponding to the erase request in addition to the write operation corresponding to the write request.

[0058] The data processing method of the present application first determines the first request information and the second request information, and then in the same data processing request, adds the first request information and the second request information to the first field and the second field of the data processing request respectively, and uses the second field reserved in the UFS protocol format to additionally load the second request information, thereby realizing the same data processing request to realize two UFS requests at the same time. For example, in the data processing request for a write request, the second request information corresponding to the read request is additionally loaded, so that after the data processing request is sent to the UFS, the UFS can perform the write operation corresponding to the write request while also performing the read operation corresponding to the read request. Compared with respectively realizing the write operation and the read operation through two UFS requests, the present application can reduce the number of UFS requests, thereby avoiding frequent requests and responses between the host 100 and the UFS, reducing the number of interactions to reduce the load of the host 100, and thereby improving the operating efficiency of the host 100.

[0059] In some embodiments, the first request information includes a first logical address set, the request type corresponding to the second request information includes an erase request, the second request information includes a second logical address set, the second logical address set includes an invalid logical address, and when the universal flash memory 200 receives the erase request, it removes the mapping relationship data corresponding to the second logical address set in a preset mapping table.

[0060] Specifically, in the conventional solution, the time when the host 100 sends the erase request is delayed relative to the time when the invalid data is generated, which may cause the UFS to identify these invalid data as valid data for data migration during the garbage collection (GC) process, which will increase the write amplification factor (WAF) and affect the life of the UFS. The write amplification factor is the ratio of the sum of the data to be written by the host 100 and the data moved during the GC process to the data to be written by the host 100.

[0061] In addition, UFS may not be able to process the received UFS request immediately when performing GC, resulting in a higher delay. The delay of the erase request of the host 100 may increase the number of GCs in the UFS. The erase request is received after multiple GCs to erase invalid data. The invalid data causes the amount of data moved each time by GC to increase, which prolongs the GC time and increases the response delay of UFS to the request of the host 100.

[0062] Therefore, in order to process invalid data in a timely manner, the second request information corresponding to the erase request can be additionally loaded each time a data processing request is sent, so that the UFS can receive the erase request in a timely manner. Compared with receiving an erase request after receiving a UFS request (such as a read request or a write request, etc.), the erase request can be received faster, thereby erasing the invalid data in a timely manner.

[0063] Optionally, the invalid logical addresses of the second logical address set are generated according to the invalid logical addresses corresponding to the first logical address set and / or existing invalid logical addresses.

[0064] Moreover, the second request information of the present application includes a second logical address set, and the invalid logical addresses of the second logical address set are generated according to the invalid logical addresses corresponding to the first logical address set of the first request information and / or the existing invalid logical addresses. In other words, the invalid logical addresses that need to be erased can be predicted in advance based on the first request information that has not been processed. If there are no invalid logical addresses in the operation corresponding to the first request information, it is only necessary to erase the existing invalid logical addresses generated in history. If there are invalid logical addresses in the operation corresponding to the first request information, after the UFS executes the operation corresponding to the first request information, the invalid logical addresses corresponding to the first request information can be erased according to the erase request, that is, the mapping relationship data corresponding to the second logical address set in the preset mapping table is removed, thereby realizing the timely erasure of invalid logical addresses.

[0065] In this way, by timely erasing invalid data (such as the logical address corresponding to the invalid data), it can be ensured that there is less or even no invalid data in the GC process, thereby reducing WAF and extending the service life of the UFS. The reduction in the amount of data moved by GC can also reduce the resources occupied by GC and the duration of GC, so that even during the GC process, the UFS has sufficient resources to respond to the request of the host 100, reducing the response delay of the UFS. In addition, a data processing request includes an additional erase request, which can reduce the number of UFS requests, thereby avoiding frequent requests and responses between the host 100 and the UFS, reducing the number of interactions to reduce the load on the host 100, and thus improving the operating efficiency of the host 100.

[0066] See also Figure 6 In one example, an example is given in which an additional erase request (ie, the request type corresponding to the second request information) is carried in a write request (ie, the request type corresponding to the first request information) for explanation.

[0067] The specific steps include:

[0068] Step 601: Generate a write request, and add first request information to the first field of the write request;

[0069] Step 602: Add the second request information to the second field of the write request;

[0070] Step 603: Send a write request to UFS;

[0071] Step 604: Execute a write operation corresponding to the first request information;

[0072] Step 605: Execute an erasure operation corresponding to the second request information;

[0073] Step 606 : Send response information to the host 100 .

[0074] In the above step 601, the host 100 generates a first logical address and a corresponding access length (ie, first request information) according to the logical address of the data to be written and the amount of data to be written, and includes them in the first field of the write request.

[0075] In the above step 2, the second logical address set is a set of invalid logical addresses that have been generated by the current host 100 and / or invalid logical addresses that may be generated by the write request (i.e., the second request information). The second field of the write request containing the second logical address may be an expandable field in the write request (such as an EHS field), or a data fragment field in the write request.

[0076] The second logical address set is included in Figure 4 For example, the EHS field in the second logical address set may include one or more second logical addresses and the access length corresponding to each second logical address. The data format of recording the second logical address set using the EHS field is as follows: Figure 7 When UFS processes the second logical address set, it performs erasure according to each second logical address and the corresponding access length. Figure 7 The second logical address 0 and the access length of the second logical address 0 in the erasure mapping table correspond to the mapping relationship data of the second logical address 0 and the access length of the second logical address 0; for another example, according to Figure 7 The second logical address m and the access length of the second logical address m in the erasing mapping table correspond to the mapping relationship data of the second logical address m and the access length of the second logical address m.

[0077] Figure 7 It is a feasible data format for loading the second logical address set of the EHS field or data segment area. This application does not limit the data format to strictly follow Figure 7 The data structure of the second logical address recorded in the EHS field or the data segment field defined in the present application needs to at least include multiple second logical addresses and the access length corresponding to each second logical address.

[0078] Please combine Figure 3 In the above step 604, UFS performs a write operation, and the main steps are:

[0079] 1) The controller 210 receives a write request;

[0080] 2) The controller 210 sends a ready to transfer (RTT) notification to the host 100 to inform the host 100 that it is ready to receive data;

[0081] 3) The host 100 sends a data out request to send the data to be written to the UFS;

[0082] 4) The controller 210 receives the data and caches it in the SRAM;

[0083] 5) The controller 210 writes the cached data to the storage array 220;

[0084] 6) After writing is completed, the controller 210 modifies the mapping table and adds mapping relationship data between the first logical address and the corresponding physical address.

[0085] Optionally, the controller 210 receiving all the data can represent the completion of step 604 without waiting for all the data to be written to the storage array 220, so as to improve the response efficiency of the write request.

[0086] In the above step 605, the UFS performs an erase operation of the second logical address, and the main steps are:

[0087] 1) The controller 210 processes the second logical address set into an erase instruction (specifically, the request type corresponding to the second logical address set may be added in the second field, or the request type of the second request information may be added in the reserved field of the write request);

[0088] 2) The controller 210 executes an erase instruction to modify the mapping relationship data corresponding to the second logical address in the mapping table and remove the corresponding valid physical address information.

[0089] In the above step 606, the response information sent by UFS to the host 100 corresponds to the write request. The format of the response information is shown in FIG. Figure 8 . The response information may include first response information and second response information. The first response information records the execution result of writing to the first logical address (i.e., the first processing result), and the second response information records the erasure result of the second logical address (i.e., the second processing result). For example, fields 0 to 15 are all used to represent the content related to the first response information, such as field 6 contains the first processing result, field 7 contains the status information of the UFS, etc.

[0090] The second response information may be included in one of the reserved fields of the response information. After receiving the response information, the host 100 may determine the execution result of the data processing request. If the data processing request fails or is not executed, the data processing request may be reissued to synchronize the status of the host 100 and the UFS, thereby ensuring the execution accuracy of the data processing request.

[0091] Before executing the operation corresponding to the second request information, the host 100 determines whether the operation corresponding to the second request information (i.e., the erase operation) is executable based on the workload information of the UFS (such as the current number of data processing requests and the total data volume); or, after the UFS controller 210 parses the second logical address, it determines whether the operation corresponding to the second request information (i.e., the erase operation) is executable based on the workload information (such as the current number of data processing requests and the total data volume).

[0092] If it is not executable, skip the above step 605, and record in the second response information that the second logical address erasure is not executed (that is, the second processing result is not executed); if it is executable, record in the second response information that the second logical address erasure is executed after the erasure is executed in step 5 (that is, the second processing result is executed).

[0093] Optionally, in order to improve the response of the erase operation, after the UFS parses the second logical address, the instruction corresponding to the second request information (such as the erase instruction corresponding to the second logical address) can be cached in the instruction queue of the controller 210, or the second request information can be marked, that is, the second logical address to be erased is marked, and then step 606 is executed, and recorded as executed in the second response information (that is, the second processing result is determined to be executed). At this time, it can be ensured that the UFS has received the erase request, and that the erase request is being executed or has been added to the execution queue. It may be that due to the high workload of the UFS, more important requests are executed first, and the erase operation is performed when the UFS is at an appropriate time (such as idle time, low workload) later. In this way, the response speed of the erase request is improved while ensuring the operating efficiency of the UFS.

[0094] In certain embodiments, the request type corresponding to the second request information includes a pre-read request or a read request, the second request information is determined based on predicted read data, the second request information includes a second logical address set, and the universal flash memory 200, upon receiving the pre-read request or the read request, reads the mapping relationship data corresponding to the second logical address set in a preset mapping table; or, upon receiving the pre-read request or the read request, the universal flash memory 200 determines the corresponding physical address set based on the second logical address set and the mapping table, and reads the data corresponding to the physical address set.

[0095] Specifically, it can be understood that during use, the host 100 is able to predict the data that the user will access next. For example, when reading, the user generally reads the next page. Therefore, the data in the next page is the predicted read data, and the data in the next page can be pre-read in advance.

[0096] Optionally, the host 100 may determine that data associated with a UI (User Interface) component capable of jumping in the display content of the current display interface is the predicted read data.

[0097] Therefore, when a data processing request (such as a write request) is issued, the second request information corresponding to the pre-read request or the read request can be loaded. When the UFS receives the pre-read request or the read request, it can read the mapping relationship data corresponding to the second logical address set in the preset mapping table. At this time, since only the mapping relationship data is read, the data reading amount is small and the cache pressure of the UFS is small; or, when the UFS receives the pre-read request or the read request, it can determine the corresponding physical address set according to the second logical address set and the mapping table, and read the data corresponding to the physical address set. At this time, since the actual data is directly read out (such as reading into the memory of the host 100 or the control 210 of the UFS), the efficiency of subsequent data reading by the host can be improved.

[0098] Optionally, the UFS can determine whether to read the mapping relationship data or directly read the data corresponding to the physical address set according to the remaining storage space of the controller 210. For example, when the storage space is small (such as less than 20%), the reading method is to read the mapping relationship data, and when the storage space is large, the reading method is to read the data corresponding to the physical address set.

[0099] Still taking reading as an example, when performing pre-reading, UFS can read the data of the next page into the memory when receiving a read request, or UFS can read the data of the next page into the UFS controller 210 when receiving a pre-read request, or read the partial mapping table corresponding to the data of the next page into the controller 210 (the read request delay mainly comes from looking up the mapping table). In this way, when the user reads the next page, the data of the next page can be quickly read, and the content of the next page can be quickly displayed.

[0100] See also Fig. 9 In one example, an example is given in which a read request (ie, a request type corresponding to the first request information) carries an additional pre-read request (ie, a request type corresponding to the second request information).

[0101] The specific steps include:

[0102] Step 901: the host 100 generates a read request and adds first request information to the first field of the read request;

[0103] Step 902: the host 100 adds the second request information to the second field of the read request;

[0104] Step 903: the host 100 sends a read request to the UFS;

[0105] Step 904: The UFS executes a read operation corresponding to the first request information;

[0106] Step 905: UFS sends the data to the host 100;

[0107] Step 906: UFS sends a response message to the host 100, including the read execution result of the first logical address of the read request;

[0108] Step 907: The UFS executes a pre-read operation corresponding to the second request information.

[0109] The second logical address set of the second request information referred to in the above step 902 includes a second logical address and a corresponding access length. The second logical address is a logical address of data that may be read in a short time predicted by the host 100. The access length corresponding to the second logical address is the number of units corresponding to the data that may be read in the UFS predicted by the host 100.

[0110] In the above steps 904, 905 and 906, the controller 210 searches the mapping table to find the first logical address and the set of physical addresses corresponding to the subsequent logical addresses to be read according to the first logical address and the access length, and then reads the specified physical address from the SRAM cache or the storage array 220, thereby reading the data required by the host 100. The data read by the controller 210 is transmitted to the host 100 through a data input request. After the controller 210 reads all the data and transmits all of them to the host 100, the controller 210 sends a response message to the host 100, indicating that the data reading has been executed, and records the execution result of the read request (i.e., the first processing result) in the response message.

[0111] Since the pre-read operation only needs to pre-read part of the data, the pre-read operation may not be responded to. In the above step 906, the response information includes the execution result of the read request, but does not include the execution result of the pre-read request.

[0112] In the above step 907, performing the pre-reading operation may be:

[0113] The controller 210 parses the second logical address set and the corresponding access length in the read request, and reads the mapping table corresponding to the second logical address set from the storage array 220, and caches it in the mapping table cache space of the SRAM. When the logical address accessed by the subsequent read request of the host 100 hits the cached mapping table, the controller 210 can skip the operation of reading the mapping table from the storage array 220 and directly search the mapping table cached in the SRAM, thereby speeding up the execution speed of the read request and reducing the delay.

[0114] The pre-read operation can also be performed as follows: the controller 210 searches the mapping table to find the second logical address and the set of physical addresses corresponding to the subsequent logical addresses to be read, and then reads the specified physical address from the storage array 220, and reads the pre-read data into the SRAM cache. Since the amount of data read may exceed the size of the space used by the SRAM to cache read data, the controller 210 can choose to cache only part of the data in the SRAM, and the cached data content and the corresponding second logical address are not limited here. When the host 100 hits the cached data through a read request, the controller 210 can directly send the cached data in the SRAM to the host 100, skipping the process of searching the mapping table and reading data from the storage array 220, thereby reducing the read request delay.

[0115] Optionally, the mapping table or pre-read data read by the controller 210 from the storage array 220 is cached in other areas of the storage device, such as DRAM, which is not limited in this solution.

[0116] It can be understood that the principle of loading the second request information of other request types based on a write request is basically similar to the principle of loading an erase request based on a write request, or the principle of loading the second request information of other request types based on a read request is basically similar to the principle of loading a pre-read request based on a read request. For the sake of brevity, they are not listed one by one here.

[0117] In some implementations, the data processing request further includes a third field, and the third field includes third request information.

[0118] Specifically, since there are EHS fields and data segment fields in UFS, both of which can carry additional requests, one of the extension fields or data segment fields included in the preset request format can be used as the second field, and the other of the extension field or data segment field can be used as the third field.

[0119] The host 100 may also determine additional third request information, and then load the first request information in the first field, load the second request information in the second field, and load the third request information in the third field.

[0120] Optionally, the request type corresponding to the third request information may also include a write request, a read request, an erase request, a pre-read request, data output (data out), data input (data in) or a task management request.

[0121] In this way, one data processing request includes three requests at the same time, thereby further reducing the number of UFS requests.

[0122] In some implementations, the host 100 may further determine additional third request information and also load the third request information into the second field.

[0123] In this way, multiple request information is loaded through the second field, so that one data processing request includes three requests, further reducing the number of UFS requests.

[0124] It can be understood that the electronic device 100 can also determine that the fourth request information, the fifth request information, etc. can all be loaded into the second field, so that one data processing request contains more requests.

[0125] In some implementations, the data processing request further includes a fourth field, and the fourth field includes the field where the second request information is located and the request type corresponding to the second request information.

[0126] Specifically, in order for UFS to determine the request type of the second request information and the field where the second request information is located, in the data processing request, it is also necessary to define a fourth field that can indicate the field where the second request information is located and the request type corresponding to the second request information. For example, the fourth field is one of the reserved fields in the transmission format requested by UFS, so that UFS can quickly find the second request information and the request type corresponding to the second request information through the fourth field, thereby performing operations on the second request information and the request type corresponding to the second request information, and ensuring that the second request information can be processed correctly.

[0127] Optionally, request type information may be added to the second request information. When the UFS obtains the second request information, it may execute the second request information and an operation of the request type corresponding to the second request information according to the request type information carried in the second request information.

[0128] See also Figure 3 and Fig.10 In some implementations, the data processing method performed by the present application on the UFS side includes:

[0129] Step 021: receiving a data processing request sent by the host 100, the data processing request including a first field and a second field, the first field including first request information, the second field including second request information, the first request information being different from the second request information; and

[0130] Step 022: Execute operations corresponding to the first request information and the second request information.

[0131] Specifically, after receiving the data processing request sent by the host 100, the UFS parses the data processing request to obtain the first request information, the request type of the first request information, the second request information and the request type corresponding to the second request information, and then performs corresponding operations on the first request information according to the first request information and the corresponding request type, and performs corresponding operations on the second request information according to the second request information and the corresponding request type.

[0132] After executing the operation corresponding to the first request information, the UFS will also generate response information and feed it back to the host 100, so that the status of the host 100 and the UFS are synchronized to ensure the accurate execution of the data processing request.

[0133] Optionally, the response information includes at least a first processing result corresponding to the first request information.

[0134] Optionally, the response information also includes a second processing result corresponding to the second request information. When the operation corresponding to the second request information has been executed, or the instruction corresponding to the second request information has been stored in a preset instruction queue, or the second request information has been marked, the second processing result is determined to have been executed.

[0135] Optionally, the UFS controller 210 can also determine whether the operation corresponding to the second request information is executable based on the workload information. For example, if the workload is large, it is determined that the operation corresponding to the second request information is not executable, and only the operation corresponding to the first request information is executed, and the operation corresponding to the second request information is not executed, and priority is given to ensuring that the UFS has sufficient resources to execute the operation corresponding to the first request information, so as to avoid the operation corresponding to the second request information affecting the execution of the operation corresponding to the first request information. If the workload is small, it is determined that the operation corresponding to the second request information is executable, and the operation corresponding to the first request information and the operation corresponding to the second request information can be executed.

[0136] For example, for an erase request that is additionally loaded with a read request, if the current workload is large, continuing to execute the erase request may lead to a decrease in the reading efficiency of the current read request, and the content that the user needs to view cannot be displayed for a long time because the data cannot be read, which has a greater impact on the user experience. If the erase request is not processed temporarily, it generally will not have a significant impact on the user experience.

[0137] See also Fig.11 In order to better implement the data processing method of the embodiment of the present application, the embodiment of the present application also provides a data processing device 10. The data processing device 10 may include a first determination module 11, a first generation module 12 and a sending module 13. The first determination module 11 is used to determine the first request information and the second request information, and the first request information is different from the second request information. The first generation module 12 is used to generate a data processing request according to a preset transmission format, and add the first request information to the first field of the data processing request, and add the second request information to the second field of the data processing request; the sending module 13 is used to send the data processing request to the universal flash memory 200.

[0138] The first determining module 11 is further configured to determine third request information. The first generating module 12 is further configured to add the third request information to the second field.

[0139] The data processing device further includes a second receiving module 14, and the second receiving module 14 is used to receive response information, and the response information at least includes a first processing result corresponding to the first request information.

[0140] The data processing device further includes a control module 15 , which is used to determine whether the operation corresponding to the second request information is executable according to the workload information of the universal flash memory 200 .

[0141] See also Fig.12 In order to better implement the data processing method of the embodiment of the present application, the embodiment of the present application also provides another data processing device 10.

[0142] The data processing device 10 includes a first receiving module 21 and an execution module 22. The first receiving module is used to receive a data processing request sent by the host 100, the data processing request includes a first field and a second field, the first field includes first request information, the second field includes second request information, and the first request information is different from the second request information; and the execution module 22 is used to execute operations corresponding to the first request information and the second request information.

[0143] The data processing device 10 further includes a second generating module 23, which is used to generate response information, and the response information at least includes a first processing result corresponding to the first request information.

[0144] The data processing device 10 further includes a second determination module 24. The second determination module 24 is configured to determine that the second processing result is executed if the operation corresponding to the second request information has been executed, or the instruction corresponding to the second request information has been stored in a preset instruction queue, or the second request information has been marked.

[0145] The execution module 22 is further configured to determine whether the operation corresponding to the second request information is executable according to the workload information.

[0146] See also Fig.13 The embodiment of the present application also provides a computer-readable storage medium 300 on which a computer program 310 is stored. When the computer program 310 is executed by a processor 320, the steps of the data processing method of any of the above-mentioned embodiments are implemented. For the sake of brevity, they are not repeated here.

[0147] In the description of this specification, the descriptions with reference to the terms "certain embodiments", "in an example", "exemplarily", etc., mean that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, unless they are contradictory.

[0148] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, segment or portion of code that includes one or more executable instructions for implementing the steps of a specific logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in the reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0149] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A data processing method, applied to a host, characterized in that: include: Determining first request information and second request information, wherein the first request information is different from the second request information; Generate a data processing request according to a preset transmission format, and add the first request information to a first field of the data processing request, and add the second request information to a second field of the data processing request; and The data processing request is sent to the universal flash memory.

2. The data processing method according to claim 1, characterized in that: The request types corresponding to the first request information and the second request information include write request, read request, erase request, pre-read request, data output, data input or task management request. When the universal flash memory receives the data processing request, it executes the operations corresponding to the first request information and the second request information.

3. The data processing method according to claim 2, characterized in that: The first request information includes a first logical address set, the request type corresponding to the second request information includes an erase request, the second request information includes a second logical address set, and the second logical address set includes invalid logical addresses; when the universal flash memory receives the erase request, it removes the mapping relationship data corresponding to the second logical address set in a preset mapping table.

4. The data processing method according to claim 3, characterized in that: The invalid logical address includes at least one of an invalid logical address corresponding to the first logical address set and an existing invalid logical address.

5. The data processing method according to claim 2, characterized in that: The request type corresponding to the second request information includes a pre-read request or a read request. The second request information is determined based on the predicted read data. The second request information includes a second logical address set. When the universal flash memory receives the pre-read request or the read request, it reads the mapping relationship data corresponding to the second logical address set in a preset mapping table.

6. The data processing method according to claim 2, characterized in that: The request type corresponding to the second request information includes a pre-read request or a read request. The second request information is determined based on the predicted read data. The second request information includes a second logical address set. When the universal flash memory receives the pre-read request or the read request, the universal flash memory determines the corresponding physical address set based on the second logical address set and a preset mapping table, and reads the data corresponding to the physical address set.

7. The data processing method according to claim 1, characterized in that: The data processing request further includes a third field, and the third field includes third request information.

8. The data processing method according to claim 7, characterized in that: The second field is one of an extension field or a data segment field included in a preset request format, and the third field is the other of the extension field or the data segment field.

9. The data processing method according to claim 1, characterized in that: The second field is an extension field or the data segment field included in a preset request format, and the method further includes: determining third request information; and The third request information is added to the second field.

10. The data processing method according to claim 1, characterized in that: Also includes: Receive response information, where the response information at least includes a first processing result corresponding to the first request information.

11. The data processing method according to claim 10, characterized in that: The method further comprises: Determine whether the operation corresponding to the second request information is executable according to the workload information of the universal flash memory.

12. The data processing method according to claim 1, characterized in that: The data processing request also includes a fourth field, and the fourth field includes the field where the second request information is located and the request type corresponding to the second request information.

13. A data processing method, applied to a universal flash memory, characterized in that: include: receiving a data processing request sent by a host, the data processing request comprising a first field and a second field, the first field comprising first request information, the second field comprising second request information, the first request information being different from the second request information; and Execute operations corresponding to the first request information and the second request information.

14. The data processing method according to claim 13, characterized in that: Also includes: Generate response information, where the response information at least includes a first processing result corresponding to the first request information.

15. The data processing method according to claim 14, characterized in that: The response information also includes a second processing result corresponding to the second request information, and the method further includes: When the operation corresponding to the second request information has been executed, or the instruction corresponding to the second request information has been stored in a preset instruction queue, or the second request information has been marked, it is determined that the second processing result has been executed.

16. The data processing method according to claim 13, characterized in that: Before executing the operation corresponding to the second request information, the method further includes: Determine whether the operation corresponding to the second request information is executable according to the workload information.

17. A data processing device, characterized in that: Applied to a host, the data processing device comprises: A first determining module, configured to determine first request information and second request information, wherein the first request information is different from the second request information; A first generating module, configured to generate a data processing request according to a preset transmission format, and add the first request information to a first field of the data processing request, and add the second request information to a second field of the data processing request; The sending module is used to send the data processing request to the universal flash memory.

18. A data processing device, characterized in that: Applied to a universal flash memory, the data processing device comprises: a first receiving module, configured to receive a data processing request sent by a host, the data processing request comprising a first field and a second field, the first field comprising first request information, the second field comprising second request information, the first request information being different from the second request information; and An execution module is used to execute operations corresponding to the first request information and the second request information.

19. A host, characterized in that: include: Processor, memory; and A computer program, wherein the computer program is stored in the memory and executed by the processor, and the computer program includes instructions for executing the data processing method according to any one of claims 1 to 12.

20. A universal flash memory, characterized in that: It comprises a controller, wherein the controller is used to execute the data processing method according to any one of claims 13 to 16.

21. An electronic device, characterized in that: It comprises the host as claimed in claim 19 and the universal flash memory as claimed in claim 20.

22. A non-volatile computer-readable storage medium containing a computer program, wherein when the computer program is executed by a processor, the processor executes the data processing method according to any one of claims 1 to 16.

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