Central processing unit (CPU) idle state scheduling method, device and equipment and storage medium

Abstract

The invention discloses a central processing unit (CPU) idle state scheduling method and device, equipment and a storage medium, and the method comprises the steps: obtaining a current counter data set corresponding to a CPU based on an expanded data structure and at least one tracked function logic; performing feature extraction on the data in the current counter data set to obtain feature data; calling an idle state prediction model, and inputting the feature data into the idle state prediction model to obtain a target idle state matched with the current service demand; controlling the CPU to enter a target idle state; wherein the idle state prediction model is obtained by training and verifying a pre-constructed prediction model by using a plurality of historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on the extended data structure and at least one function logic added with the trace. By adopting the method, the accuracy of CPU idle state prediction can be improved.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a method, device, equipment and storage medium for scheduling a central processing unit (CPU) idle state. Background Art

[0002] The Central Processing Unit (CPU) usually has several different power-saving (idle) states, which are usually referred to as C-states. Each C-state corresponds to a different level of power saving, and also corresponds to a different time and energy consumption required to wake up the CPU. Unnecessarily keeping the CPU in a higher C-state (such as C0 or C1) will increase energy consumption, while allowing the CPU to enter a deep sleep state (such as C6) excessively may cause performance degradation due to longer wake-up time. Therefore, the operating system will dynamically adjust the CPU's C-state according to the current workload and performance requirements to achieve the best balance between performance and energy consumption.

[0003] The CPU idle governor is a component in the operating system that is responsible for managing the power consumption and performance of the CPU when there is no workload. Currently, the Linux kernel provides the following different CPU idle scheduling strategies to predict the idle state of the CPU (i.e., predict the C-state): using the Menu scheduler to intelligently select the most appropriate C-state based on factors such as the current system load, recent CPU activity, and timer events; using the Timer Events Oriented (TEO) scheduler to predict when the CPU needs to work again by analyzing the frequency and timing of timer events, thereby selecting an appropriate C-state; using the Ladder scheduler to select a C-state through predefined ladder levels. However, the above CPU idle scheduling strategies are usually based on limited system counters and simple historical data to predict C-states, which are difficult to cope with complex and changing workload environments. Especially under high load and multi-tasking conditions, the prediction accuracy is low, which makes it difficult to achieve the best balance between energy consumption and performance.

[0004] Therefore, how to improve the accuracy of CPU idle state prediction has become an urgent problem to be solved. Summary of the invention

[0005] The embodiments of the present application provide a method, apparatus, device and storage medium for scheduling a central processing unit (CPU) idle state, which can improve the accuracy of CPU idle state prediction.

[0006] In a first aspect, the present application provides a method for scheduling a central processing unit (CPU) idle state, the method comprising:

[0007] Based on the extended data structure and at least one function logic after adding tracking, a current counter data set corresponding to the CPU is obtained; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0008] Extract features from the data in the current counter data set to obtain feature data;

[0009] Call the idle state prediction model and input the feature data into the idle state prediction model to obtain the target idle state that matches the current business demand;

[0010] Control the CPU to enter the target idle state;

[0011] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0012] In one of the embodiments, the idle state prediction model is obtained in the following manner: based on the expanded data structure and at least one function logic after adding tracking, multiple historical counter data sets are obtained; the multiple historical counter data sets are divided into a first group of historical data sets and a second group of historical data sets; a pre-built prediction model is trained using the first group of historical data sets to obtain a trained prediction model; the trained prediction model is verified and evaluated using the second group of historical data sets, and when the evaluation indicators meet the verification pass conditions, the trained prediction model is used as the idle state prediction model.

[0013] In one of the embodiments, a pre-constructed prediction model is trained using a first group of historical data sets, including: filtering and denoising the data in each historical data set in the first group of historical data sets to obtain multiple processed historical data sets; extracting features from the data in each processed historical data set to obtain historical feature data corresponding to each historical data set; inputting the multiple historical feature data into the pre-constructed prediction model to obtain a predicted idle state corresponding to each historical data set; and updating the model parameters of the pre-constructed prediction model in a direction of reducing the difference between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set until a training end condition is met.

[0014] In one of the embodiments, the method further includes: storing the idle state prediction model in a target file, the target file including a plurality of prediction models; calling the idle state prediction model, including: calling the idle state prediction model corresponding to the current business demand from the target file.

[0015] In one of the embodiments, the method further includes: when it is determined that a first programming language corresponding to the idle state prediction model is different from a second programming language corresponding to the operating system of the device where the CPU is located, converting the idle state prediction model to obtain a converted idle state prediction model; the converted idle state prediction model is compiled using the second programming language; storing the idle state prediction model in a target file, including: storing the converted idle state prediction model in the target file.

[0016] In one of the embodiments, the method also includes: adding at least one new field in the data structure of the CPU idle scheduler for timer events to expand the data structure to obtain an extended data structure; wherein the complexity of the extended data structure is greater than the complexity of the data structure; adding tracking to at least one function logic corresponding to the CPU idle scheduler for timer events to obtain at least one function logic after adding tracking.

[0017] In a second aspect, the present application provides a central processing unit (CPU) idle state scheduling device, the device comprising:

[0018] An acquisition module, used for acquiring a current counter data set corresponding to the CPU based on an extended data structure and at least one function logic after adding tracking; the extended data structure is obtained by extending a data structure of a CPU idle scheduler for timer events;

[0019] A feature extraction module is used to extract features from the data in the current counter data set to obtain feature data;

[0020] A processing module is used to call the idle state prediction model and input the characteristic data into the idle state prediction model to obtain a target idle state that matches the current business demand;

[0021] A control module, used for controlling the CPU to enter a target idle state;

[0022] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0023] In a third aspect, the present application provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are implemented:

[0024] Based on the extended data structure and at least one function logic after adding tracking, a current counter data set corresponding to the CPU is obtained; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0025] Extract features from the data in the current counter data set to obtain feature data;

[0026] Call the idle state prediction model and input the feature data into the idle state prediction model to obtain the target idle state that matches the current business demand;

[0027] Control the CPU to enter the target idle state;

[0028] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0029] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the following steps are implemented:

[0030] Based on the extended data structure and at least one function logic after adding tracking, a current counter data set corresponding to the CPU is obtained; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0031] Extract features from the data in the current counter data set to obtain feature data;

[0032] Call the idle state prediction model and input the feature data into the idle state prediction model to obtain the target idle state that matches the current business demand;

[0033] Control the CPU to enter the target idle state;

[0034] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0035] In a fifth aspect, the present application further provides a computer program product, including a computer program, which implements the following steps when executed by a processor:

[0036] Based on the extended data structure and at least one function logic after adding tracking, a current counter data set corresponding to the CPU is obtained; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0037] Extract features from the data in the current counter data set to obtain feature data;

[0038] Call the idle state prediction model and input the feature data into the idle state prediction model to obtain the target idle state that matches the current business demand;

[0039] Control the CPU to enter the target idle state;

[0040] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0041] The above-mentioned central processing unit CPU idle state scheduling method, device, equipment and storage medium, the computer equipment can obtain the current counter data set corresponding to the CPU based on the expanded data structure and at least one function logic after adding tracking; the expanded data structure is obtained by expanding the data structure of the CPU idle scheduler for timer events; feature extraction is performed on the data in the current counter data set to obtain feature data; the idle state prediction model is called, and the feature data is input into the idle state prediction model to obtain the target idle state matching the current business needs; the CPU is controlled to enter the target idle state; wherein the idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on the expanded data structure and at least one function logic after adding tracking. By adopting this method, a computer device can obtain a current counter data set corresponding to a CPU through an expanded data structure and at least one function logic after adding tracking, wherein the set includes multiple current counter data; thereafter, by calling an idle state prediction model obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU, the current idle state of the CPU is predicted, and a more accurate target idle state that matches the current business needs can be obtained, thereby improving the accuracy of the CPU idle state prediction. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present application or related technologies, the drawings required for use in the embodiments of the present application or related technical descriptions will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0043] Figure 1 This is a schematic diagram of an application scenario of a CPU idle state scheduling method provided in an embodiment of the present application;

[0044] Figure 2 It is a flowchart of a CPU idle state scheduling method provided by an embodiment of the present application;

[0045] Figure 3 It is a flowchart of a method for determining an idle state prediction model provided by an embodiment of the present application;

[0046] Figure 4 It is a structural diagram of a CPU idle state scheduling device provided in an embodiment of the present application;

[0047] Figure 5 It is a structural diagram of another CPU idle state scheduling device provided in an embodiment of the present application;

[0048] Figure 6 It is a structural diagram of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0050] The CPU idle governor is a component of the operating system responsible for managing the power consumption and performance of the CPU when it has no workload. When the system detects that the CPU has no tasks to execute, the scheduler selects the appropriate idle state based on the current system state and historical data to optimize the balance between energy consumption and performance. The CPU idle state (or C-state) refers to the low-power state that the CPU enters when there is no task to execute, such as C0, C1, C2, C3, etc. Each state corresponds to a different power saving level and an increase in the time and energy consumption required to wake up the CPU. Selecting the right C-state is critical to the energy efficiency of the system, because unnecessarily keeping the CPU in a higher C-state (such as C0 or C1) will increase energy consumption, and allowing the CPU to enter a deep sleep state (such as C6) excessively may result in performance degradation due to longer wake-up times.

[0051] Currently, the Linux kernel provides the following different CPU idle scheduling strategies to predict the CPU idle state (i.e., predict the C-state): (1) Using the Menu scheduler to intelligently select the most appropriate C-state based on factors such as the current system load, recent CPU activity, and timer events. This method is based on a comprehensive analysis of multiple factors and can adjust the idle state in real time to adapt to changing system loads and power management requirements, but it has some limitations. First, due to the involvement of multiple factors and complex decision logic, its prediction may be inaccurate in certain scenarios. Second, calculating the most appropriate C-state requires a certain amount of overhead, which may affect performance under extreme conditions. (2) Using the TEO scheduler to predict when the CPU needs to work again by analyzing the frequency and timing of timer events, and thus select an appropriate C-state. This method is suitable for processing periodic loads and timed tasks, and reduces the computational overhead compared to the Menu scheduler. However, since it is mainly optimized for timer events, it may perform poorly under non-periodic loads. In addition, for complex load patterns, the prediction accuracy may not be as good as the Menu scheduler. (3) Using the Ladder scheduler to select C-states using predefined step levels. However, although this scheduling method has simple logic and fast C-state selection, it cannot dynamically adjust the idle state to adapt to the current system load. In summary, the above CPU idle scheduling strategy is usually based on limited system counters and simple historical data to predict the C-state, which is difficult to cope with complex and changing workload environments. Especially in the case of high load and multi-tasking, the prediction accuracy is low, which makes it difficult to achieve the optimal balance between energy consumption and performance.

[0052] Based on this, the embodiment of the present application provides a method, device, equipment and storage medium for scheduling the idle state of a central processing unit (CPU), which can improve the accuracy of CPU idle state prediction. The method includes: based on the extended data structure and at least one function logic after adding tracking, obtaining the current counter data set corresponding to the CPU; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events; extracting features from the data in the current counter data set to obtain feature data; calling the idle state prediction model, and inputting the feature data into the idle state prediction model to obtain a target idle state that matches the current business needs; controlling the CPU to enter the target idle state; wherein the idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on the extended data structure and at least one function logic after adding tracking. By adopting this method, a computer device can obtain a current counter data set corresponding to a CPU through an expanded data structure and at least one function logic after adding tracking, wherein the set includes multiple current counter data; thereafter, by calling an idle state prediction model obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU, the current idle state of the CPU is predicted, and a more accurate target idle state that matches the current business needs can be obtained, thereby improving the accuracy of the CPU idle state prediction.

[0053] See also Figure 1 , Figure 1 Schematic diagram of an application scenario of a CPU idle state scheduling method provided by an embodiment of the present application. Figure 1As shown, the computer device 100 includes a CPU 101. The computer device can obtain a current counter data set corresponding to the CPU 101 based on an extended data structure and at least one function logic after adding tracking; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events; feature extraction is performed on the data in the current counter data set to obtain feature data; an idle state prediction model is called, and the feature data is input into the idle state prediction model to obtain a target idle state matching the current business demand; the CPU 101 is controlled to enter the target idle state; wherein the idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on the extended data structure and at least one function logic after adding tracking. By adopting this method, a computer device can obtain a current counter data set corresponding to a CPU through an expanded data structure and at least one function logic after adding tracking, wherein the set includes multiple current counter data; thereafter, by calling an idle state prediction model obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU, the current idle state of the CPU is predicted, and a more accurate target idle state that matches the current business needs can be obtained, thereby improving the accuracy of the CPU idle state prediction.

[0054] See also Figure 2 , Figure 2 1 is a flow chart of a CPU idle state scheduling method provided in an embodiment of the present application. The method can be executed by a computer device (for example, a server). Figure 2 As shown, the CPU idle state scheduling method may include but is not limited to the following steps:

[0055] S201. Based on the expanded data structure and at least one function logic after adding tracking, obtain a current counter data set corresponding to the CPU.

[0056] The extended data structure is obtained by extending the data structure of the CPU idle scheduler oriented to the timer event.

[0057] Optionally, the data in the current counter data combination may include but is not limited to maximum capacity (max_cap), run queue CPU time (rq_cpu_time), wake-up times (ttwu_count), yield times (yld_count), scheduling times (sched_count) and sleep identifier (sleep_id), as well as CPU core number, selected idle state, sleep length, time span, hit times and intercept times of each state, etc.

[0058] S202: Extract features from data in the current counter data set to obtain feature data.

[0059] Among them, the computer device performs feature extraction on the data in the current counter data set, with the purpose of extracting key data (i.e., feature data) in the current counter data set, which can reduce the amount of data and thus help to subsequently improve the efficiency of CPU idle state prediction.

[0060] In an optional embodiment, the computer device performs feature extraction on the data in the current counter data set to obtain feature data, which may include: filtering, denoising and removing irrelevant data on the data in the current counter data set to obtain a processed current counter data set; and extracting features from the data in the processed current counter data set to obtain feature data.

[0061] Optionally, the characteristic data may include but is not limited to CPU usage, sleep time, and wake-up times.

[0062] S203: calling an idle state prediction model, and inputting feature data into the idle state prediction model to obtain a target idle state that matches the current business demand.

[0063] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0064] In an optional implementation, the idle state prediction model is stored in a target file, and the target file includes a plurality of prediction models for predicting the CPU idle state.

[0065] In an optional implementation, the computer device may call an idle state prediction model based on business needs. Exemplarily, the idle state prediction model may include an idle state prediction model corresponding to a data stream processing scenario (e.g., a video playback scenario), an idle state prediction model corresponding to a distributed computing scenario (or a large-scale data processing scenario), and an idle state prediction model corresponding to a low-load operation scenario (e.g., a CPU idle state scenario). The specific application scenarios are not limited. Assuming that the current business demand is data stream processing, the server may call the idle state prediction model corresponding to the data stream processing scenario; assuming that the current business demand is distributed computing, the server may call the idle state prediction model corresponding to the distributed computing scenario.

[0066] S204, controlling the CPU to enter a target idle state.

[0067] Exemplarily, assuming that the target idle state is the C1 state, the computer device may control the CPU to enter the C1 state. assuming that the target idle state is the C2 state, the computer device may control the CPU to enter the C2 state.

[0068] In an optional implementation, the computer device may control the CPU to enter the target idle state through a CPU driver.

[0069] In an embodiment of the present application, a computer device can obtain a current counter data set corresponding to a CPU based on an extended data structure and at least one function logic after adding tracking; the extended data structure is obtained by extending the data structure of a CPU idle scheduler for timer events; feature extraction is performed on the data in the current counter data set to obtain feature data; an idle state prediction model is called, and the feature data is input into the idle state prediction model to obtain a target idle state matching the current business requirements; the CPU is controlled to enter the target idle state; wherein the idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an extended data structure and at least one function logic after adding tracking. Using this method, a computer device can obtain a current counter data set corresponding to a CPU through an extended data structure and at least one function logic after adding tracking, and the set includes multiple current counter data; thereafter, by calling an idle state prediction model obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU, the current idle state of the CPU is predicted, and a more accurate target idle state matching the current business requirements can be obtained, thereby improving the accuracy of CPU idle state prediction.

[0070] In an optional embodiment, the computer device executes Figure 2 Before implementing the CPU idle state scheduling method, an idle state prediction model may also be determined.

[0071] Combine the following Figure 3 , the specific process of determining the idle state prediction model of computer equipment is explained. Figure 3 FIG. 1 is a flow chart of a method for determining an idle state prediction model provided by an embodiment of the present application. Figure 3 As shown, the method for determining the idle state prediction model may include but is not limited to the following steps:

[0072] S301 . Obtain multiple historical counter data sets based on an expanded data structure and at least one function logic after adding tracking.

[0073] In an optional implementation, before step S301, the computer device may also add at least one new field to the data structure of the CPU idle scheduler (i.e., TEO scheduler) for timer events to expand the data structure to obtain an expanded data structure; wherein the complexity of the expanded data structure is greater than the complexity of the data structure; and add tracking to at least one function logic corresponding to the CPU idle scheduler for timer events to obtain at least one function logic after adding tracking. In this way, the complexity of the acquired counter data set can be increased, which is conducive to the subsequent training of a highly accurate idle state prediction model based on a highly complex counter data set. In other words, the use of this implementation is conducive to improving the performance of the trained idle state prediction model.

[0074] In this implementation, the at least one new field added by the computer device to the data structure of the TEO scheduler may include but is not limited to maximum capacity (max_cap), run queue CPU time (rq_cpu_time), wake-up times (ttwu_count), yield times (yld_count), scheduling times (sched_count), and sleep identifier (sleep_id), etc. These fields may be used to store additional data and information.

[0075] In this implementation, the computer device adds tracking to at least one function logic corresponding to the TEO idle scheduler, which may include but is not limited to adding trace_printk calls in key functions teo_update, teo_select and teo_reflect. In this way, data such as the CPU core number, sleep identifier, selected idle state, sleep length, time span, hit count and intercept count of each state can be recorded.

[0076] In an optional implementation, the plurality of historical counter data sets may be stored in a kernel trace buffer. In this implementation, the computer device may obtain the plurality of historical counter data sets from a / sys / kernel / debug / tracing / trace file.

[0077] In an optional implementation, the plurality of historical counter data sets may be obtained based on the expanded data structure and at least one function logic after adding tracking when the computer device is running under different working conditions. Exemplarily, the plurality of historical counter data sets may be obtained based on the expanded data structure and at least one function logic after adding tracking when the computer device is running under working conditions such as Geekbench 5, Nginx benchmark, and CPU no-load.

[0078] S302: Divide a plurality of historical counter data sets into a first historical data set and a second historical data set.

[0079] The first set of historical data sets is used to train the pre-built prediction model; the second set of historical data sets is used to verify the trained prediction model.

[0080] Exemplarily, the computer device divides the multiple historical counter data sets into the first historical data set and the second historical data set, and the multiple historical counter data sets can be divided into the first historical data set and the second historical data set according to a division ratio of 8:2. Assuming that the number of the multiple historical counter data sets is 500, the computer device can divide the 500 historical counter data sets into 400 historical counter data sets and 100 historical counter data sets according to a division ratio of 8:2, wherein the 400 historical counter data sets are the first historical data set, and the 100 historical counter data sets are the second historical data set.

[0081] In an optional implementation, before step S302, the computer device may also construct a prediction model for predicting the CPU idle state.

[0082] Optionally, the prediction model may be a random forest model. Random forest is an ensemble learning method based on decision trees, which improves the accuracy and stability of the model by constructing multiple decision trees and combining their prediction results.

[0083] Optionally, before step S302, the computer device may use the scikit-learn library to build a random forest model.

[0084] S303: Use the first set of historical data to train the pre-built prediction model to obtain a trained prediction model.

[0085] Continuing with the above example, assuming that the pre-built prediction model is a random forest model, the computer device can use 400 historical counter data sets to train the pre-built random forest model to obtain a trained random forest model.

[0086] S304: Use the second set of historical data to verify and evaluate the trained prediction model, and if the evaluation index meets the verification pass condition, use the trained prediction model as the idle state prediction model.

[0087] Continuing with the above example, the computer device can use 100 historical counter data sets to verify and evaluate the trained random forest model, and when the evaluation indicators meet the verification pass conditions, the trained prediction model is used as the idle state prediction model.

[0088] In an optional implementation, the evaluation indicators may include but are not limited to accuracy, precision, recall, etc.

[0089] In an optional implementation, the multiple historical counter data sets may be obtained based on the expanded data structure and at least one function logic after adding tracking when the computer device is running in different working conditions, that is, the multiple historical counter data sets include multiple historical counter data sets obtained under different working conditions. In this case, the computer device may determine that the idle state prediction model finally obtained is the idle state prediction model corresponding to the working condition to which the historical counter data set of the most types among the multiple historical counter data sets belongs.

[0090] Exemplarily, it is assumed that the multiple historical counter data sets include 200 historical counter data sets 1 obtained under the CPU performance test condition of processing multi-core computing tasks (such as running the Geekbench 5 benchmark test), 50 historical counter data sets 2 obtained under the load balancing performance test condition of processing high-concurrency network requests (such as running the Nginx benchmark benchmark test), and 50 historical counter data sets 3 obtained under the no-load condition. In this case, the computer device can determine the final idle state prediction model according to the weighted principle based on the proportion of the historical counter data sets under each condition. For example, for the multi-core computing task condition, the weight is allocated to 0.67; for the high-concurrency network request condition, the weight is allocated to 0.17; for the no-load condition, the weight is allocated to 0.17. The final idle state prediction model will be determined by integrating the weight calculation results of each condition. In this case, the computer device can determine that the idle state prediction model finally obtained is the idle state prediction model corresponding to the multi-core computing task condition.

[0091] In the embodiment of the present application, the computer device can obtain multiple historical counter data sets based on the expanded data structure and at least one function logic after adding tracking; divide the multiple historical counter data sets into a first group of historical data sets and a second group of historical data sets; use the first group of historical data sets to train the pre-built prediction model to obtain the trained prediction model; use the second group of historical data sets to verify and evaluate the trained prediction model, and when the evaluation index meets the verification pass condition, use the trained prediction model as the idle state prediction model. In this way, by using the multiple historical counter data sets of the CPU to train and verify the pre-built prediction model, the accuracy of the idle prediction model can be improved.

[0092] In an optional embodiment, Figure 3In the method for determining the idle state prediction model shown, step S303, i.e. the computer device trains the pre-built prediction model using the first set of historical data, may include but is not limited to the following steps:

[0093] Step 1: Filter and denoise the data in each historical data set in the first group of historical data sets to obtain multiple processed historical data sets.

[0094] Step 2: Extract features from the data in each processed historical data set to obtain historical feature data corresponding to each historical data set.

[0095] Optionally, the historical feature data corresponding to each historical data set may include but is not limited to historical CPU usage, historical sleep time, historical wake-up times, etc.

[0096] Step 3: Input multiple historical feature data into a pre-built prediction model to obtain the predicted idle state corresponding to each historical data set.

[0097] Alternatively, the pre-built prediction model may be a random forest model.

[0098] Step 4: Update the model parameters of the pre-built prediction model in the direction of reducing the difference between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set until the training end condition is met.

[0099] In an optional embodiment, the computer device may calculate the loss value between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set, and update the model parameters of the pre-built prediction model based on the loss until the training end condition is met.

[0100] In this implementation, the training end condition may be that the loss value between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set is less than a preset loss threshold. That is, the computer device may determine that the training end condition is satisfied when it is determined that the loss value between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set is less than the preset loss threshold, and at this time, the trained prediction model may be obtained.

[0101] By adopting this implementation mode, the computer device can determine the accuracy and relevance of the data by preprocessing (i.e., filtering and denoising) the data in each historical data set, thereby training a pre-built prediction model based on the preprocessed data to further improve the prediction accuracy and stability of the model.

[0102] In an optional implementation, after step S204, the computer device may also store the idle state prediction model in a target file, where the target file includes multiple prediction models. In this implementation, the computer device calling the idle state prediction model may include: calling the idle state prediction model corresponding to the current business demand from the target file.

[0103] In an optional implementation, after step S204, the computer device may further convert the idle state prediction model to obtain a converted idle state prediction model when determining that the first programming language corresponding to the idle state prediction model is different from the second programming language corresponding to the operating system of the device where the CPU is located; the converted idle state prediction model is compiled using the second programming language. In this implementation, the computer device stores the idle state prediction model in a target file, which may include: storing the converted idle state prediction model in the target file.

[0104] For example, assuming that the programming language corresponding to the idle state prediction model is Python, and the programming language corresponding to the operating system of the device where the CPU is located is C language, in this case, the computer device can determine that the programming language corresponding to the idle state prediction model is different from the programming language corresponding to the operating system of the device where the CPU is located. At this time, the computer device can convert the idle state prediction model (recorded as a Python model) into a C language model. This is conducive to improving the operating efficiency of the idle state prediction model on the device where the CPU is located and improving its adaptability in the target environment.

[0105] In an optional implementation, the idle state prediction model mentioned in the present application may also be referred to as a ctidle model, or a ctidle scheduler. In order to verify the performance of the CPU idle state scheduling method provided in the embodiment of the present application, the following comparative experiment was conducted.

[0106] Please refer to Table 1, which is a comparison table of the results of CPU idle state prediction using different schedulers.

[0107] Table 1

[0108]

[0109] As shown in Table 1, under the GeekBench load condition, the average hit rate of the ctidle scheduler is increased to about 78% to 91%, while the average hit rate of the TEO scheduler is between 50% and 62%. Under the Nginx load condition, the average hit rate of the ctidle scheduler is significantly increased to about 74%, while the average hit rate of the TEO scheduler is only 25% to 28%. Under the CPU no-load condition, the average hit rate of the ctidle scheduler is significantly increased to about 74%, while the average hit rate of the TEO scheduler is only 25% to 28%. It can be seen that the method provided in the embodiment of the present application can improve the accuracy of CPU idle state prediction.

[0110] Please refer to Table 2, which is a comparison table of system power consumption obtained by testing different schedulers under Nginx and CPU no-load conditions.

[0111] Table 2

[0112]

[0113] As shown in Table 2 above, under the condition of Nginx and CPU no-load, the average power consumption of Menu scheduler is 121.53 W; the average power consumption of TEO scheduler is 122.92 W; and the average power consumption of ctidle scheduler is 117.19 W. It can be seen that the energy consumption of ctidle scheduler is reduced by about 5% to 7% on average compared with TEO scheduler and Menu scheduler, which significantly improves the energy efficiency of the system. In other words, the method provided in the embodiment of the present application can reduce energy consumption.

[0114] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0115] Based on the same inventive concept, the embodiment of the present application also provides a central processing unit CPU idle state scheduling device for implementing the central processing unit CPU idle state scheduling method involved above. The implementation scheme for solving the problem provided by the device is similar to the implementation scheme recorded in the above method, so the specific limitations in the embodiments of one or more central processing unit CPU idle state scheduling devices provided below can refer to the limitations of the central processing unit CPU idle state scheduling method above, and will not be repeated here.

[0116] See also Figure 4 , Figure 4 Schematic diagram of a CPU idle state scheduling device provided in an embodiment of the present application. Figure 4 As shown, it includes a data collection module 401, a model construction module 402, a model import module 403, a CPU idle scheduling model 404 and an online verification model 405.

[0117] The data collection module 401 includes a data collector 4011, which is used to collect counter data to obtain a counter data set.

[0118] The model building module 402 includes a data preprocessor 4021, a model trainer 4022, and a model verifier 4023. The data preprocessor 4021 is used to filter, denoise, and remove useless data from the data in the multiple historical counter data sets collected to obtain multiple processed historical data sets. The model trainer 4022 is used to train the prediction model based on most of the historical data sets in the multiple processed historical data sets to obtain the trained prediction model. The model verifier 4023 is used to verify the trained prediction model based on the remaining historical data sets in the multiple processed historical data sets to obtain the idle state prediction model that is ultimately used to predict the CPU idle state.

[0119] The model import module 403 includes a model converter 4031 and a model manager 4032. The model converter 4031 is used to convert the idle state prediction model into a model that can be compiled by the device where the CPU is located. The model manager 4032 is used to manage multiple idle state prediction models through relevant interfaces to view and switch models.

[0120] Optionally, the plurality of idle state prediction models may include but are not limited to a default model (default) and a sample model (demo), as well as a ctidle model, etc., wherein different models may adapt to different server working conditions. Optionally, the computer device may be hot-swappable, and the model may be dynamically loaded and unloaded without restarting the system, thus improving the flexibility and scalability of the system.

[0121] The CPU idle scheduling model 404 includes a scheduling policy manager 4041. The scheduling policy manager 4041 is used to select and configure different idle state scheduling models. The scheduling policy manager 4041 can select an idle state prediction model that matches the current business demand from multiple idle state prediction models based on business demand.

[0122] The online verification module 405 includes a real-time monitor 4051 and a dynamic monitor 4052. The real-time monitor 4051 can be used to monitor the prediction accuracy and precision of the currently selected idle state prediction model in real time; the dynamic monitor 4052 can be used to dynamically evaluate the prediction accuracy and precision of the currently selected idle state prediction model, as well as the energy consumption and performance indicators under specific working conditions. By comparing with the TEO scheduler and other models, the engineering significance of the idle state prediction model in this application in practical applications is further verified.

[0123] In an optional implementation, the online verification module 405 may perform the following operations:

[0124] (1) Dynamic evaluation model: Turn on the trace event switch in ftrace to dynamically evaluate the prediction accuracy and precision of the current ctidle scheduler.

[0125] (2) Comparison of prediction accuracy and precision: The ftrace tool is used to obtain detailed tracking information during system runtime, and the data preprocessing and offline verification code logic in the data acquisition module are reused.

[0126] (3) Energy consumption indicator observation: Use the turbostat tool provided by the kernel to observe energy consumption indicators and compare the energy consumption and performance under different schedulers and models.

[0127] (4) Performance comparison: By measuring the system's response time, processing power and other performance indicators, and using the load testing tool siege to compare the performance under different schedulers and models, the engineering significance of the ctidle sub-model is further verified.

[0128] See also Figure 5 , Figure 5 Schematic diagram of another CPU idle state scheduling device provided in an embodiment of the present application. Figure 5 As shown, the CPU idle state scheduling device may include but is not limited to:

[0129] The acquisition module 501 is used to acquire the current counter data set corresponding to the CPU based on the extended data structure and at least one function logic after adding tracking; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0130] A feature extraction module 502 is used to extract features from data in the current counter data set to obtain feature data;

[0131] The processing module 503 is used to call the idle state prediction model and input the characteristic data into the idle state prediction model to obtain a target idle state matching the current business demand;

[0132] A control module 504, used to control the CPU to enter a target idle state;

[0133] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0134] In one embodiment, the device further includes a model training and verification module. The model training and verification module is used to: obtain multiple historical counter data sets based on the expanded data structure and at least one function logic after adding tracking; divide the multiple historical counter data sets into a first group of historical data sets and a second group of historical data sets; use the first group of historical data sets to train a pre-built prediction model to obtain a trained prediction model; use the second group of historical data sets to verify and evaluate the trained prediction model, and when the evaluation index meets the verification pass condition, use the trained prediction model as the idle state prediction model.

[0135] In one embodiment, when the model training and verification module is used to train a pre-built prediction model using a first set of historical data sets, it is specifically used to: filter and denoise the data in each historical data set in the first set of historical data sets to obtain multiple processed historical data sets; extract features from the data in each processed historical data set to obtain historical feature data corresponding to each historical data set; input the multiple historical feature data into the pre-built prediction model to obtain a predicted idle state corresponding to each historical data set; and update the model parameters of the pre-built prediction model in the direction of reducing the difference between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set until the training end condition is met.

[0136] In one embodiment, the processing module 503 is also used to store the idle state prediction model in a target file, which includes multiple prediction models; when the processing module 503 is used to call the idle state prediction model, it is specifically used to: call the idle state prediction model corresponding to the current business demand from the target file.

[0137] In one embodiment, the processing module 503 is also used for: when it is determined that the first programming language corresponding to the idle state prediction model is different from the second programming language corresponding to the operating system of the device where the CPU is located, converting the idle state prediction model to obtain a converted idle state prediction model; the converted idle state prediction model is compiled using the second programming language; when the processing module 503 is used to store the idle state prediction model in a target file, it is specifically used for: storing the converted idle state prediction model in the target file.

[0138] In one embodiment, the processing module 503 is also used to: add at least one new field in the data structure of the CPU idle scheduler for timer events to expand the data structure to obtain an extended data structure; wherein the complexity of the extended data structure is greater than the complexity of the data structure; add tracking to at least one function logic corresponding to the CPU idle scheduler for timer events to obtain at least one function logic after adding tracking.

[0139] Each module in the above-mentioned central processing unit CPU idle state scheduling device can be implemented in whole or in part by software, hardware and their combination. Each of the above-mentioned modules can be embedded in or independent of the processor in the terminal device in the form of hardware, or can be stored in the memory in the terminal device in the form of software, so that the processor can call and execute the corresponding operations of each of the above modules.

[0140] In an exemplary embodiment, the present application provides a computer device, which may be a server, and its internal structure diagram may be as follows: Figure 6 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface and an input device. The processor, the memory and the input / output interface are connected through a system bus, and the communication interface and the input device are connected to the system bus through the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, near field communication (NFC) or other technologies. When the computer program is executed by the processor, a central processing unit CPU idle state scheduling method is implemented.

[0141] Those skilled in the art will understand that Figure 6 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0142] In an exemplary embodiment, the present application provides a computer device, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented:

[0143] Based on the extended data structure and at least one function logic after adding tracking, a current counter data set corresponding to the CPU is obtained; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0144] Extract features from the data in the current counter data set to obtain feature data;

[0145] Call the idle state prediction model and input the feature data into the idle state prediction model to obtain the target idle state that matches the current business demand;

[0146] Control the CPU to enter the target idle state;

[0147] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0148] In one embodiment, the processor executes the computer program to further implement the following steps: based on the expanded data structure and at least one function logic after adding tracking, multiple historical counter data sets are obtained; the multiple historical counter data sets are divided into a first group of historical data sets and a second group of historical data sets; a pre-built prediction model is trained using the first group of historical data sets to obtain a trained prediction model; the trained prediction model is verified and evaluated using the second group of historical data sets, and when the evaluation indicators meet the verification pass conditions, the trained prediction model is used as the idle state prediction model.

[0149] In one embodiment, when a processor executes a computer program to implement training of a pre-built prediction model using a first set of historical data sets, the following steps are specifically implemented: filtering and denoising the data in each historical data set in the first set of historical data sets to obtain multiple processed historical data sets; extracting features from the data in each processed historical data set to obtain historical feature data corresponding to each historical data set; inputting the multiple historical feature data into the pre-built prediction model to obtain a predicted idle state corresponding to each historical data set; and updating the model parameters of the pre-built prediction model in a direction of reducing the difference between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set until the training end condition is met.

[0150] In one embodiment, the processor executes a computer program to further implement the following steps: storing the idle state prediction model in a target file, wherein the target file includes multiple prediction models; when the processor executes the computer program to implement calling the idle state prediction model, the processor specifically implements the following steps: calling the idle state prediction model corresponding to the current business demand from the target file.

[0151] In one embodiment, the processor executes the computer program to further implement the following steps: when it is determined that the first programming language corresponding to the idle state prediction model is different from the second programming language corresponding to the operating system of the device where the CPU is located, the idle state prediction model is converted to obtain a converted idle state prediction model; the converted idle state prediction model is compiled using the second programming language; when the processor executes the computer program to store the idle state prediction model in the target file, the following steps are specifically implemented: the converted idle state prediction model is stored in the target file.

[0152] In one embodiment, the processor executes the computer program to further implement the following steps: adding at least one new field to the data structure of the CPU idle scheduler for timer events to expand the data structure to obtain an expanded data structure; wherein the complexity of the expanded data structure is greater than the complexity of the data structure; adding tracking to at least one function logic corresponding to the CPU idle scheduler for timer events to obtain at least one function logic after adding tracking.

[0153] In an exemplary embodiment, the present application provides a computer-readable storage medium having a computer program stored thereon, and when the computer program is executed by a processor, the following steps are implemented:

[0154] Based on the extended data structure and at least one function logic after adding tracking, a current counter data set corresponding to the CPU is obtained; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0155] Extract features from the data in the current counter data set to obtain feature data;

[0156] Call the idle state prediction model and input the feature data into the idle state prediction model to obtain the target idle state that matches the current business demand;

[0157] Control the CPU to enter the target idle state;

[0158] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0159] In one embodiment, the computer program executed by the processor also implements the following steps: based on the expanded data structure and at least one function logic after adding tracking, multiple historical counter data sets are obtained; the multiple historical counter data sets are divided into a first group of historical data sets and a second group of historical data sets; a pre-built prediction model is trained using the first group of historical data sets to obtain a trained prediction model; the trained prediction model is verified and evaluated using the second group of historical data sets, and when the evaluation indicators meet the verification pass conditions, the trained prediction model is used as the idle state prediction model.

[0160] In one embodiment, when a computer program is executed by a processor to implement training of a pre-built prediction model using a first set of historical data sets, the following steps are specifically implemented: filtering and denoising the data in each historical data set in the first set of historical data sets to obtain multiple processed historical data sets; extracting features from the data in each processed historical data set to obtain historical feature data corresponding to each historical data set; inputting the multiple historical feature data into the pre-built prediction model to obtain a predicted idle state corresponding to each historical data set; and updating the model parameters of the pre-built prediction model in a direction of reducing the difference between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set until the training end condition is met.

[0161] In one embodiment, the computer program is executed by a processor to further implement the following steps: storing the idle state prediction model in a target file, wherein the target file includes multiple prediction models; when the computer program is executed by the processor to implement calling the idle state prediction model, the following steps are specifically implemented: calling the idle state prediction model corresponding to the current business demand from the target file.

[0162] In one embodiment, the computer program is executed by the processor to further implement the following steps: when it is determined that the first programming language corresponding to the idle state prediction model is different from the second programming language corresponding to the operating system of the device where the CPU is located, the idle state prediction model is converted to obtain a converted idle state prediction model; the converted idle state prediction model is compiled using the second programming language; when the computer program is executed by the processor to store the idle state prediction model in the target file, the following steps are specifically implemented: the converted idle state prediction model is stored in the target file.

[0163] In one embodiment, the computer program executed by the processor also implements the following steps: adding at least one new field to the data structure of the CPU idle scheduler for timer events to expand the data structure to obtain an expanded data structure; wherein the complexity of the expanded data structure is greater than the complexity of the data structure; adding tracking to at least one function logic corresponding to the CPU idle scheduler for timer events to obtain at least one function logic after adding tracking.

[0164] In an exemplary embodiment, the present application provides a computer program product, including a computer program, which implements the following steps when executed by a processor:

[0165] Based on the extended data structure and at least one function logic after adding tracking, a current counter data set corresponding to the CPU is obtained; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events;

[0166] Extract features from the data in the current counter data set to obtain feature data;

[0167] Call the idle state prediction model and input the feature data into the idle state prediction model to obtain the target idle state that matches the current business demand;

[0168] Control the CPU to enter the target idle state;

[0169] The idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each historical counter data set is obtained based on an expanded data structure and at least one function logic after adding tracking.

[0170] In one embodiment, the computer program executed by the processor also implements the following steps: based on the expanded data structure and at least one function logic after adding tracking, multiple historical counter data sets are obtained; the multiple historical counter data sets are divided into a first group of historical data sets and a second group of historical data sets; a pre-built prediction model is trained using the first group of historical data sets to obtain a trained prediction model; the trained prediction model is verified and evaluated using the second group of historical data sets, and when the evaluation indicators meet the verification pass conditions, the trained prediction model is used as the idle state prediction model.

[0171] In one embodiment, when a computer program is executed by a processor to implement training of a pre-built prediction model using a first set of historical data sets, the following steps are specifically implemented: filtering and denoising the data in each historical data set in the first set of historical data sets to obtain multiple processed historical data sets; extracting features from the data in each processed historical data set to obtain historical feature data corresponding to each historical data set; inputting the multiple historical feature data into the pre-built prediction model to obtain a predicted idle state corresponding to each historical data set; and updating the model parameters of the pre-built prediction model in a direction of reducing the difference between the predicted idle state corresponding to each historical data set and the historical actual idle state corresponding to the historical data set until the training end condition is met.

[0172] In one embodiment, the computer program is executed by a processor to further implement the following steps: storing the idle state prediction model in a target file, wherein the target file includes multiple prediction models; when the computer program is executed by the processor to implement calling the idle state prediction model, the following steps are specifically implemented: calling the idle state prediction model corresponding to the current business demand from the target file.

[0173] In one embodiment, the computer program is executed by the processor to further implement the following steps: when it is determined that the first programming language corresponding to the idle state prediction model is different from the second programming language corresponding to the operating system of the device where the CPU is located, the idle state prediction model is converted to obtain a converted idle state prediction model; the converted idle state prediction model is compiled using the second programming language; when the computer program is executed by the processor to store the idle state prediction model in the target file, the following steps are specifically implemented: the converted idle state prediction model is stored in the target file.

[0174] In one embodiment, the computer program executed by the processor also implements the following steps: adding at least one new field to the data structure of the CPU idle scheduler for timer events to expand the data structure to obtain an expanded data structure; wherein the complexity of the expanded data structure is greater than the complexity of the data structure; adding tracking to at least one function logic corresponding to the CPU idle scheduler for timer events to obtain at least one function logic after adding tracking.

[0175] It should be noted that the data involved in this application (including but not limited to the current counter data set, idle state prediction model, historical counter data set, etc.) are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data must comply with relevant regulations.

[0176] A person of ordinary skill in the art can understand that all or part of the processes in the above-mentioned embodiment method can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, an artificial intelligence (AI) processor, etc., but are not limited to this.

[0177] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0178] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A method for scheduling a CPU idle state, characterized in that: The method comprises: Based on the extended data structure and at least one function logic after adding tracking, obtaining a current counter data set corresponding to the CPU; the extended data structure is obtained by extending the data structure of the CPU idle scheduler for timer events; Extracting features from the data in the current counter data set to obtain feature data; Calling an idle state prediction model and inputting the characteristic data into the idle state prediction model to obtain a target idle state matching the current business demand; Controlling the CPU to enter the target idle state; Among them, the idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each of the historical counter data sets is obtained based on the expanded data structure and at least one function logic after adding tracking.

2. The method according to claim 1, characterized in that The idle state prediction model is obtained in the following way: Based on the expanded data structure and at least one of the function logics after adding tracking, obtain multiple historical counter data sets; dividing the plurality of said historical counter data sets into a first group of historical data sets and a second group of historical data sets; Using the first set of historical data to train the pre-built prediction model to obtain a trained prediction model; The trained prediction model is verified and evaluated using the second set of historical data sets, and when the evaluation index meets the verification pass condition, the trained prediction model is used as the idle state prediction model.

3. The method according to claim 2, characterized in that The using the first set of historical data to train the pre-built prediction model includes: Filtering and denoising the data in each historical data set in the first group of historical data sets to obtain a plurality of processed historical data sets; Performing feature extraction on the data in each of the processed historical data sets to obtain historical feature data corresponding to each of the historical data sets; Inputting the plurality of historical feature data into the pre-built prediction model to obtain a predicted idle state corresponding to each set of historical data; The model parameters of the pre-built prediction model are updated in a direction of reducing the difference between the predicted idle state corresponding to each of the historical data sets and the historical actual idle state corresponding to the historical data set until the training end condition is met.

4. The method according to claim 2 or 3, characterized in that: The method further comprises: storing the idle state prediction model in a target file, wherein the target file includes a plurality of prediction models; The calling of the idle state prediction model comprises: An idle state prediction model corresponding to the current business demand is called from the target file.

5. The method according to claim 4, characterized in that The method further comprises: When it is determined that the first programming language corresponding to the idle state prediction model is different from the second programming language corresponding to the operating system of the device where the CPU is located, converting the idle state prediction model to obtain a converted idle state prediction model; the converted idle state prediction model is compiled using the second programming language; The storing the idle state prediction model in a target file comprises: The converted idle state prediction model is stored in a target file.

6. The method according to claim 2, characterized in that The method further comprises: Adding at least one new field in the data structure of the CPU idle scheduler for timer events to expand the data structure to obtain an expanded data structure; wherein the complexity of the expanded data structure is greater than the complexity of the data structure; Add tracing to at least one function logic corresponding to the CPU idle scheduler oriented to the timer event, and obtain at least one function logic after adding tracing.

7. A central processing unit CPU idle state scheduling device, characterized in that: The device comprises: An acquisition module, used for acquiring a current counter data set corresponding to the CPU based on an extended data structure and at least one function logic after adding tracking; the extended data structure is obtained by extending a data structure of a CPU idle scheduler for timer events; A feature extraction module, used to extract features from the data in the current counter data set to obtain feature data; A processing module, used for calling an idle state prediction model and inputting the characteristic data into the idle state prediction model to obtain a target idle state matching the current business demand; A control module, used for controlling the CPU to enter the target idle state; Among them, the idle state prediction model is obtained by training and verifying a pre-built prediction model using multiple historical counter data sets corresponding to the CPU; each of the historical counter data sets is obtained based on the expanded data structure and at least one function logic after adding tracking.

8. A computer device, characterized in that: The method comprises a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method according to any one of claims 1 to 6 when executing the computer program.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 6 are implemented.

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