Light emitting diode for improving overhigh voltage

Abstract

The invention provides a light emitting diode for improving overhigh voltage, and belongs to the technical field of photoelectron manufacturing. The light emitting diode comprises an epitaxial layer and a current expansion layer, the current expansion layer is laminated on the surface of the epitaxial layer, the current expansion layer comprises an alloy layer, and the alloy layer comprises at least one of an AuGe layer and an AuGeNi layer. According to the embodiment of the invention, the working voltage of the light-emitting diode under large-current driving can be reduced, and the reliability of the light-emitting diode is improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of optoelectronic manufacturing, and in particular to a light emitting diode for improving excessively high voltage. Background Art

[0002] Micro Light Emitting Diode (Micro LED) refers to an ultra-small light-emitting diode with a side length of 10μm to 100μm. Micro LEDs are small in size and can be arranged more densely to greatly improve resolution. They also have self-luminous properties and have the characteristics of high brightness, high contrast, high responsiveness and power saving.

[0003] In the related art, a light emitting diode generally includes a substrate, an epitaxial layer and an electrode. The epitaxial layer is stacked on the substrate, and the electrode is arranged on the surface of the epitaxial layer away from the substrate. By supplying power to the electrode, the light emitting diode is controlled to emit light.

[0004] In order to achieve ideal display vision, the operating current of red LEDs is usually 2 to 5 times that of blue or green LEDs. However, driving red LEDs with high current will cause the operating voltage to increase significantly, which will increase the power consumption of the device and affect the reliability of the LED. Summary of the invention

[0005] The embodiment of the present disclosure provides a method for improving the over-voltage of a light emitting diode, which can reduce the operating voltage of the light emitting diode under high current driving and improve the reliability of the light emitting diode. The technical solution is as follows:

[0006] On the one hand, an embodiment of the present disclosure provides a light-emitting diode, which includes: an epitaxial layer and a current spreading layer, wherein the current spreading layer is stacked on the surface of the epitaxial layer, the current spreading layer includes an alloy layer, and the alloy layer includes at least one of an AuGe layer and an AuGeNi layer.

[0007] In one implementation of the present disclosure, the thickness of the alloy layer is less than or equal to 50 angstroms.

[0008] In another implementation of the present disclosure, the current spreading layer further includes a transparent conductive layer, and the transparent conductive layer is located on a surface of the alloy layer close to the epitaxial layer or on a surface of the alloy layer far from the epitaxial layer.

[0009] In another implementation of the present disclosure, the ratio of the thickness of the alloy layer to the thickness of the transparent conductive layer is 0.1 to 0.5.

[0010] In another implementation of the present disclosure, the light-emitting diode also includes a reflective electrode, which is located on the surface of the current spreading layer away from the epitaxial layer; the reflective electrode includes: at least one of: an Au layer, an Ag layer, an Al layer, a Ti layer, a Pt layer and a Ni layer.

[0011] In a second aspect, an embodiment of the present disclosure provides a light-emitting diode, the light-emitting diode comprising: an epitaxial layer and a current spreading layer, the current spreading layer being stacked on a surface of the epitaxial layer, the current spreading layer making the ratio of the increment of the voltage of the light-emitting diode to the increment of the current density of the light-emitting diode greater than 0.0018V*CM 2 / A and less than 0.0077V*CM 2 / A.

[0012] In another implementation of the present disclosure, the current spreading layer includes an alloy layer, and the alloy layer includes at least one of an AuGe layer and an AuGeNi layer.

[0013] In another implementation of the present disclosure, the thickness of the alloy layer is less than or equal to 50 angstroms.

[0014] In another implementation of the present disclosure, the current spreading layer further includes a transparent conductive layer, and the transparent conductive layer is located on a surface of the alloy layer close to the epitaxial layer or on a surface of the alloy layer far from the epitaxial layer.

[0015] In another implementation of the present disclosure, the ratio of the thickness of the alloy layer to the thickness of the transparent conductive layer is 0.1 to 0.5.

[0016] The beneficial effects brought by the technical solution provided by the embodiments of the present disclosure include at least:

[0017] The light-emitting diode provided in the embodiment of the present disclosure includes an epitaxial layer and a current spreading layer, and the alloy layer of the current spreading layer includes at least one of an AuGe layer and an AuGeNi layer. Compared with the related art, a transparent conductive layer is used to directly contact the epitaxial layer. By using an AuGe layer or an AuGeNi layer in contact with the epitaxial layer, a more ideal ohmic contact characteristic can be obtained between the alloy layer and the epitaxial layer, which will improve the current spreading efficiency and make it easier for the current to diffuse to various areas of the epitaxial layer, thereby reducing the local voltage on the epitaxial layer. In this way, even under the condition of a large current driving the light-emitting diode, the operating voltage of the light-emitting diode will not increase significantly, but can remain unchanged or increase slightly. Therefore, the problem of increased power consumption of the light-emitting diode due to an increase in the operating voltage of the light-emitting diode under the condition of a large current driving the light-emitting diode can be effectively avoided, thereby improving the reliability of the light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present disclosure, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 is a structural schematic diagram of a light emitting diode provided by an embodiment of the present disclosure;

[0020] Figure 2 is a flow chart of manufacturing a light emitting diode provided by an embodiment of the present disclosure;

[0021] Figure 3 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0022] Figure 4 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0023] Figure 5 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0024] Figure 6 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0025] Figure 7 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0026] Figure 8 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0027] Fig. 9 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0028] Fig.10 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0029] Fig.11 is a diagram of a preparation state of a light emitting diode provided by an embodiment of the present disclosure;

[0030] Fig.12 It is a current density and voltage characteristic curve diagram of a light emitting diode provided in an embodiment of the present disclosure.

[0031] The descriptions of the marks in the figure are as follows:

[0032] 10. substrate; 11. GaAs wafer;

[0033] 20. epitaxial layer; 21. first semiconductor layer; 22. multi-quantum well layer; 23. second semiconductor layer; 24. groove; 25. isolation groove;

[0034] 30. current spreading layer; 31. alloy layer; 32. transparent conductive layer;

[0035] 41. reflective electrode; 42. contact electrode;

[0036] 50. passivation layer; 51. through hole;

[0037] 60. Solder pad;

[0038] 70. Bonding layer. DETAILED DESCRIPTION

[0039] In order to make the objectives, technical solutions and advantages of the present disclosure more clear, the embodiments of the present disclosure will be further described in detail below with reference to the accompanying drawings.

[0040] Unless otherwise defined, the technical terms or scientific terms used herein shall have the usual meanings understood by persons with ordinary skills in the field to which the present disclosure belongs. The words "first", "second", "third" and similar words used in the patent application specification and claims of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "one" do not indicate a quantity limitation, but indicate the existence of at least one. Words such as "include" or "comprise" and similar words mean that the elements or objects appearing before "include" or "comprise" include the elements or objects listed after "include" or "comprise" and their equivalents, and do not exclude other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "down", "left", "right", "top", "bottom" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0041] Figure 1 Schematic diagram of the structure of a light emitting diode provided by an embodiment of the present disclosure. Figure 1 As shown, the light emitting diode includes: an epitaxial layer 20 and a current spreading layer 30 , wherein the current spreading layer 30 is stacked on the surface of the epitaxial layer 20 .

[0042] The current spreading layer 30 includes an alloy layer 31 , and the alloy layer 31 includes at least one of an AuGe layer and an AuGeNi layer.

[0043] Exemplarily, the alloy layer 31 is an AuGe layer.

[0044] Exemplarily, the alloy layer 31 is a AuGeNi layer.

[0045] Exemplarily, the alloy layer 31 includes at least one AuGe layer and at least one AuGeNi layer alternately stacked.

[0046] The light-emitting diode provided in the embodiment of the present disclosure includes an epitaxial layer 20 and a current spreading layer 30, and the alloy layer 31 of the current spreading layer 30 includes at least one of an AuGe layer and an AuGeNi layer. Compared with the related art, a transparent conductive layer 32 is used to directly contact the epitaxial layer 20. By using an AuGe layer or an AuGeNi layer to contact the epitaxial layer 20, a more ideal ohmic contact characteristic can be obtained between the alloy layer 31 and the epitaxial layer 20, which will improve the current spreading efficiency and make it easier for the current to diffuse to various regions of the epitaxial layer 20, thereby reducing the local voltage on the epitaxial layer 20. In this way, even under the condition of driving the light-emitting diode with a large current, the operating voltage of the light-emitting diode will not increase significantly, but can remain unchanged or increase slightly. Therefore, the problem of increased power consumption of the light-emitting diode due to an increase in the operating voltage of the light-emitting diode under the condition of driving the light-emitting diode with a large current can be effectively avoided, thereby improving the reliability of the light-emitting diode.

[0047] Optionally, the thickness of the alloy layer 31 is less than or equal to 50 angstroms.

[0048] By controlling the thickness of the alloy layer 31 within the above range, it is possible to avoid the alloy layer 31 being too thin, which would result in insufficient current expansion capability of the alloy layer 31; it is also possible to avoid the alloy layer 31 being too thick, which would reduce the light transmittance of the alloy layer 31, causing the alloy layer 31 to absorb more light and affect the light emitting effect of the LED.

[0049] Exemplarily, the thickness of the alloy layer 31 is 50 angstroms.

[0050] Optionally, the current spreading layer 30 further includes a transparent conductive layer 32 , and the transparent conductive layer 32 is located on a surface of the alloy layer 31 close to the epitaxial layer 20 or on a surface of the alloy layer 31 far from the epitaxial layer 20 .

[0051] For example, the transparent conductive layer 32 may be an indium tin oxide (ITO) layer, which has good transmittance and low resistivity.

[0052] For example, the transparent conductive layer 32 may be an indium zinc oxide (IZO) layer, which has good transmittance and low resistivity.

[0053] Among them, using an ITO layer or an IZO layer as the transparent conductive layer 32 can allow more light to be transmitted from the transparent conductive layer 32, thereby ensuring the light output effect; at the same time, due to the low resistivity, it is easier for carriers to be conducted to the alloy layer 31 more efficiently, thereby improving the injection efficiency.

[0054] For example, Figure 1 As shown, the transparent conductive layer 32 is located on the surface of the alloy layer 31 away from the epitaxial layer 20 .

[0055] For red light emitting diodes, the epitaxial layer 20 is mostly made of GaP or AlGaInP materials. Since it is difficult to obtain ideal ohmic contact characteristics between GaP or AlGaInP materials and the transparent conductive layer 32, the transparent conductive layer 32 is disposed on the surface of the alloy layer 31 away from the epitaxial layer 20, and the alloy layer 31 is first used to form a good ohmic contact with the epitaxial layer 20, and then the transparent conductive layer 32 is used to expand the current, so that the current can be transmitted to various regions of the alloy layer 31, and then also transmitted from various regions of the alloy layer 31 to the epitaxial layer 20. The current expansion effect of the current expansion layer 30 is improved.

[0056] Furthermore, since the light transmittance of the transparent conductive layer 32 is higher than that of the alloy layer 31, the current spreading layer 30 is prepared by stacking the alloy layer 31 and the transparent conductive layer 32. This can not only utilize the good ohmic contact characteristics between the alloy layer 31 and the epitaxial material, but also avoid setting the alloy layer 31 to be too thick, which absorbs more light and reduces the luminous effect.

[0057] Optionally, the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 is 0.1 to 0.5.

[0058] Exemplarily, the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 is 0.5, that is, the thickness of the alloy layer 31 is less than the thickness of the transparent conductive layer 32 .

[0059] For example, the thickness of the alloy layer 31 is 50 angstroms, and the thickness of the transparent conductive layer 32 is also 100 angstroms.

[0060] By controlling the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 within the above range, it is possible to avoid a large difference in thickness between the alloy layer 31 and the transparent conductive layer 32, which would cause the alloy layer 31 to be too thin and unable to spread the current, and also to avoid the alloy layer 31 being too thick and absorbing more light.

[0061] Alternatively, if Figure 1 As shown, the light emitting diode further includes a light reflecting electrode 41 , which is located on the surface of the current spreading layer 30 away from the epitaxial layer 20 .

[0062] The light-reflecting electrode 41 includes at least one of an Au layer, an Ag layer, an Al layer, a Ti layer, a Pt layer and a Ni layer.

[0063] In the embodiment of the present disclosure, the reflective electrode 41 is made of Au layer, Ag layer, Al layer, Ti layer, Pt layer or Ni layer, and compared with the electrode containing AuGe or AuGeNi material in the related art, the reflective effect of the electrode can be greatly improved, thereby increasing the luminous intensity of the light-emitting diode.

[0064] Exemplarily, the light-reflecting electrode 41 includes Au, Ag, Al, Ti, Pt and Ni layers stacked in sequence, and the thickness of each metal layer is 30 angstroms, 2000 angstroms, 1000 angstroms, 2000 angstroms, 1000 angstroms and 2000 angstroms respectively.

[0065] Alternatively, if Figure 1 As shown, the epitaxial layer 20 includes a first semiconductor layer 21, a multi-quantum well layer 22 and a second semiconductor layer 23 which are stacked in sequence.

[0066] In the embodiment of the present disclosure, one of the first semiconductor layer 21 and the second semiconductor layer 23 is a p-type layer, and the other of the first semiconductor layer 21 and the second semiconductor layer 23 is an n-type layer.

[0067] As an example, the first semiconductor layer 21 is a p-type layer, and the second semiconductor layer 23 is an n-type layer.

[0068] Optionally, the first semiconductor layer 21 includes an indium-doped p-type GaP layer. The p-type GaP layer may have a thickness of 0.5 μm to 3 μm.

[0069] Optionally, the multi-quantum well layer 22 includes an AlGaInP quantum well layer and an AlGaInP quantum barrier layer grown alternately, wherein the Al content in the AlGaInP quantum well layer and the AlGaInP quantum barrier layer is different. The multi-quantum well layer 22 may include 3 to 8 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers stacked alternately.

[0070] As an example, in the embodiment of the present disclosure, the multi-quantum well layer 22 includes five periods of alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0071] Optionally, the thickness of the multi-quantum well layer 22 may be 150 nm to 200 nm.

[0072] Optionally, the second semiconductor layer 23 is an n-type AlGaInP layer, and the thickness of the n-type AlGaInP layer may be 0.5 μm to 3 μm.

[0073] Alternatively, if Figure 1As shown, the surface of the current spreading layer 30 has a groove 24 which sequentially penetrates the current spreading layer 30 , the second semiconductor layer 23 and the multi-quantum well layer 22 , and the groove 24 exposes the first semiconductor layer 21 .

[0074] like Figure 1 As shown, the light reflecting electrode 41 is located on the surface of the current spreading layer 30 away from the epitaxial layer 20 and connected to the current spreading layer 30. A contact electrode 42 is also disposed in the groove 24 and connected to the first semiconductor layer 21.

[0075] Exemplarily, the contact electrode 42 includes at least one of an Au layer, an AuBe layer, a Ti layer, a Pt layer, and a Ni layer.

[0076] Alternatively, if Figure 1 As shown, the light emitting diode further includes a substrate 10 , an epitaxial layer 20 is stacked on the substrate 10 , and a bonding layer 70 is arranged between the substrate 10 and the epitaxial layer 20 .

[0077] Exemplarily, the bonding layer 70 includes a silicon oxide layer. Using silicon oxide as the bonding layer 70 can effectively adhere the substrate 10 and the epitaxial layer 20, and during the preparation process, the epitaxial layer 20 can be more reliably fixed on the substrate 10.

[0078] By way of example, the bonding layer 70 is benzocyclobutene glue, which can well bond the substrate 10 and the epitaxial layer 20 together.

[0079] Illustratively, the thickness of the bonding layer 70 is 3000 angstroms to 5000 angstroms. As an example, the thickness of the bonding layer 70 is 3500 angstroms.

[0080] Optionally, the substrate 10 is a sapphire substrate 10. The sapphire substrate 10 has a relatively high light transmittance, that is, the substrate 10 is a transparent substrate 10. In addition, the sapphire material is relatively hard and has relatively stable chemical properties, so that the light-emitting diode has good light-emitting effect and stability.

[0081] Alternatively, if Figure 1 As shown, the light emitting diode further includes a passivation layer 50 . The passivation layer 50 is located in the groove 24 and on the surface of the current spreading layer 30 away from the epitaxial layer 20 . The passivation layer 50 covers the light reflecting electrode 41 and the contact electrode 42 .

[0082] For example, the passivation layer 50 may be a SiO2 layer, a SiN x At least one of a layer, an Al2O3 layer and a Ti3O5 layer.

[0083] For example, the passivation layer 50 may be a SiO 2 layer, and the passivation layer 50 may have a thickness of 3.5 μm to 4.5 μm.

[0084] Exemplarily, the passivation layer 50 may include a plurality of first material layers and a plurality of second material layers alternately stacked, wherein the first material layers and the second material layers have different refractive indices, so that a distributed Bragg reflector (DBR) layer can be formed by alternately stacking material layers with different refractive indices.

[0085] By providing the DBR layer, the light emitted from the epitaxial layer 20 can be reflected, so that more light can be emitted from the light emitting surface of the light emitting diode, thereby improving the light emitting intensity of the light emitting diode.

[0086] As an example, the passivation layer 50 may include a plurality of Ti3O5 layers and a plurality of SiO2 layers stacked alternately, wherein the thickness of the passivation layer 50 is 0.5 μm to 2 μm, and the effective reflection band of the passivation layer 50 is 500 nm to 700 nm.

[0087] Alternatively, if Figure 1 As shown, through holes are provided on the passivation layer 50 to expose the light-reflecting electrode 41 and the contact electrode 42 respectively. At least two pads 60 are provided on the surface of the passivation layer 50 away from the epitaxial layer 20, one of which is connected to the light-reflecting electrode 41 on the current spreading layer 30 through the through hole, and the other is connected to the contact electrode 42 located in the groove 24 through the through hole.

[0088] Optionally, the pad 60 is a rectangular block to increase the area and facilitate conduction. In addition, on the surface of the passivation layer 50, the two parts of the pads 60 are distributed at intervals.

[0089] Optionally, a protective layer is further provided on the surface of the passivation layer 50 , and the protective layer extends from the surface of the passivation layer 50 to the substrate 10 , and the protective layer has a through hole exposing the pad 60 for electrical connection.

[0090] Illustratively, in the embodiment of the present disclosure, the protective layer may be a silicon oxide layer, and the thickness of the silicon oxide layer is 2000 angstroms.

[0091] Figure 2 FIG. 1 is a flow chart of manufacturing a light emitting diode according to an embodiment of the present disclosure. Figure 2 As shown, the preparation method comprises:

[0092] Step S11: forming the epitaxial layer 20 .

[0093] The epitaxial layer 20 includes a first semiconductor layer 21 , a multi-quantum well layer 22 and a second semiconductor layer 23 which are stacked in sequence.

[0094] Step S12 : forming a current spreading layer 30 on the surface of the epitaxial layer 20 .

[0095] The current spreading layer 30 includes an alloy layer 31 , and the alloy layer 31 includes at least one of an AuGe layer and an AuGeNi layer.

[0096] The light-emitting diode prepared in the embodiment of the present disclosure includes an epitaxial layer 20 and a current spreading layer 30, and the alloy layer 31 of the current spreading layer 30 includes at least one of an AuGe layer and an AuGeNi layer. Compared with the related art, a transparent conductive layer 32 is used to directly contact the epitaxial layer 20. By using an AuGe layer or an AuGeNi layer to contact the epitaxial layer 20, a more ideal ohmic contact characteristic can be obtained between the alloy layer 31 and the epitaxial layer 20, which will improve the current spreading efficiency and make it easier for the current to diffuse to various regions of the epitaxial layer 20, thereby reducing the local voltage on the epitaxial layer 20. In this way, even under the condition of driving the light-emitting diode with a large current, the operating voltage of the light-emitting diode will not increase significantly, but can remain unchanged or increase slightly. Therefore, the problem of increased power consumption of the light-emitting diode due to an increase in the operating voltage of the light-emitting diode under the condition of driving the light-emitting diode with a large current can be effectively avoided, thereby improving the reliability of the light-emitting diode.

[0097] Step S11 of preparing the epitaxial layer 20 may include the following steps:

[0098] First, a GaAs wafer is provided.

[0099] Then, if Figure 3 As shown, an epitaxial layer 20 is grown on a GaAs wafer 11 , and the epitaxial layer 20 includes a second semiconductor layer 23 , a multi-quantum well layer 22 , and a first semiconductor layer 21 which are stacked in sequence.

[0100] Exemplarily, the first semiconductor layer 21 is an indium-doped p-type GaP layer, and the thickness of the p-type GaP layer may be 0.5 μm to 3 μm.

[0101] For example, the second semiconductor layer 23 may be an n-type AlGaInP layer, and the thickness of the n-type AlGaInP layer may be 0.5 μm to 3 μm.

[0102] Optionally, the multi-quantum well layer 22 includes an AlGaInP quantum well layer and an AlGaInP quantum barrier layer grown alternately, wherein the Al content in the AlGaInP quantum well layer and the AlGaInP quantum barrier layer is different. The multi-quantum well layer 22 may include 3 to 8 periods of AlGaInP quantum well layers and AlGaInP quantum barrier layers stacked alternately.

[0103] As an example, in the embodiment of the present disclosure, the multi-quantum well layer 22 includes five periods of alternately stacked AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0104] Optionally, the thickness of the multi-quantum well layer 22 may be 150 nm to 200 nm.

[0105] Here, an etching stop layer may be grown before growing the second semiconductor layer 23 , and an AlInP carrier confinement layer may be grown before growing the multi-quantum well layer 22 .

[0106] A GaP window layer may be further grown after the first semiconductor layer 21 is grown, wherein the thickness of the GaP window layer is 10000 angstroms to 20000 angstroms.

[0107] Exemplarily, the GaP window layer has a thickness of 11,000 angstroms.

[0108] Next, the substrate 10 is bonded to the surface of the first semiconductor layer 21 and the GaAs wafer 11 is removed.

[0109] The substrate 10 may be a sapphire substrate 10 .

[0110] Specifically, the method may include: first, treating the surface of the p-type GaP layer with an iodic acid roughening solution.

[0111] The roughening process is as follows: the flat edge of the epitaxial film is immersed in the iodic acid roughening solution for 40 seconds, and then shaken and rinsed in a water tank for at least 6 minutes, and then dried. This is repeated three times and the flat edge needs to be rotated 90° before each roughening.

[0112] Then, if Figure 4 As shown, benzocyclobutene glue is coated on the roughened surface of the p-type GaP layer. The benzocyclobutene glue can well bond the substrate 10 and the epitaxial layer 20 together to form a bonding layer 70, and remove the GaAs sheet.

[0113] Illustratively, the bonding layer 70 has a thickness of 3000 angstroms to 5000 angstroms.

[0114] Step S12 may include the following two steps:

[0115] First, an alloy film is formed on the surface of the epitaxial layer 20 .

[0116] Specifically, it may include: forming an alloy film on the surface of the epitaxial layer 20 by metal vacuum coating, metal sputtering or resistive thermal evaporation, and controlling the thickness of the alloy film to be less than or equal to 50 angstroms.

[0117] By controlling the thickness of the alloy layer 31 within the above range, it is possible to avoid the alloy layer 31 being too thin, which would result in insufficient current expansion capability of the alloy layer 31; it is also possible to avoid the alloy layer 31 being too thick, which would reduce the light transmittance of the alloy layer 31, causing the alloy layer 31 to absorb more light and affect the light emitting effect of the LED.

[0118] Exemplarily, the thickness of the alloy layer 31 is 50 angstroms.

[0119] Next, oxygen is injected into the annealing furnace, and the oxygen injection rate is controlled to be less than or equal to 1 L / min. The alloy film is heated to 400° C. to 500° C. in the annealing furnace and maintained for 100 to 300 seconds before annealing to obtain the alloy layer 31 .

[0120] After the alloy film is prepared, it is also necessary to perform a rapid annealing treatment on the alloy film in an annealing furnace to obtain an alloy layer 31 with high light transmittance and ideal ohmic contact characteristics.

[0121] Exemplarily, during annealing, the injection rate of oxygen into the annealing furnace is controlled to be 1 L / min, and the annealing temperature is heated to 450° C. and maintained for 200 seconds before annealing to form an alloy layer 31 with high light transmittance and ideal ohmic contact characteristics.

[0122] Then, if Figure 5 As shown, a transparent conductive layer 32 is formed on the surface of the alloy layer 31 to obtain a current spreading layer 30 .

[0123] The ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 is 0.1 to 0.5.

[0124] Exemplarily, the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 is 0.5, that is, the thickness of the alloy layer 31 is less than the thickness of the transparent conductive layer 32 .

[0125] For example, the thickness of the alloy layer 31 is 50 angstroms, and the thickness of the transparent conductive layer 32 is also 100 angstroms.

[0126] By controlling the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 within the above range, it is possible to avoid a large difference in thickness between the alloy layer 31 and the transparent conductive layer 32, which would cause the alloy layer 31 to be too thin and unable to spread the current, and also to avoid the alloy layer 31 being too thick and absorbing more light.

[0127] In the embodiment of the present disclosure, after preparing the current spreading layer 30, the preparation method further includes the following steps:

[0128] The first step, such as Figure 6 As shown, photolithography is performed on the current spreading layer 30 , and a groove 24 exposing the first semiconductor layer 21 is opened on the current spreading layer 30 using a dry etching technique.

[0129] Exemplarily, the slope angle of the groove 24 is 70° to 85°. For example, the slope angle of the groove 24 is 75°.

[0130] By setting the slope angle of the groove 24 within the above angle range, the side wall of the groove 24 can be ensured to be smoother, making it less likely for cracks to appear in the film layer formed subsequently.

[0131] The second step is, Figure 7 As shown, after photolithography and development are performed on the surface of the first semiconductor layer 21, the isolation groove 25 is prepared by using dry etching technology.

[0132] like Figure 7 As shown, the isolation trench 25 surrounds the epitaxial layer 20 to physically isolate different light emitting diodes on the sapphire.

[0133] For example, the slope angle of the isolation groove is 85° to 90°. The isolation groove is used to allow each light emitting diode to be independently and selectively transferred during subsequent laser lift-off.

[0134] The third step is Figure 8 As shown, a contact electrode 42 is formed in the groove 24 .

[0135] Specifically, it may include: after performing photolithography and development on the first semiconductor layer 21 , using electron beam metal vacuum coating technology to prepare the contact electrode 42 .

[0136] The contact electrode 42 is made of at least one of Au, AuBe, Ti, Pt and Ni.

[0137] Optionally, after the contact electrode 42 is stripped and the resist is removed, an alloy annealing treatment is required to obtain an ideal ohmic contact characteristic.

[0138] The annealing conditions are as follows: the annealing temperature is 350° C. to 450° C., the temperature is maintained for 100 s to 300 s, and the nitrogen injection rate is 10 L / min to 15 L / min.

[0139] The fourth step is Fig. 9 As shown, a light reflecting electrode 41 is formed on the surface of the current spreading layer 30 .

[0140] The light-reflecting electrode 41 includes at least one of an Au layer, an Ag layer, an Al layer, a Ti layer, a Pt layer and a Ni layer.

[0141] Specifically, it may include: after photolithography and development are performed on the surface of the current spreading layer 30 , electron beam metal vacuum coating technology is used to prepare a light-reflecting electrode 41 with high reflectivity.

[0142] Step 5: Fig.10 As shown, a passivation layer 50 is formed in the groove 24 and on the surface of the current spreading layer 30 away from the epitaxial layer 20 , so that the passivation layer 50 covers the light reflecting electrode 41 and the contact electrode 42 .

[0143] Specifically, it may include: using plasma enhanced chemical vapor deposition (PECVD) technology or atomic layer deposition (ALD) technology to prepare SiO2, SiN x , Al2O3 and Ti3O5 material films.

[0144] Exemplarily, the passivation layer 50 may include a plurality of first material layers and a plurality of second material layers alternately stacked, wherein the first material layers and the second material layers have different refractive indices, so that a distributed Bragg reflection layer can be formed by alternately stacking material layers with different refractive indices.

[0145] As an example, the passivation layer 50 may include a plurality of Ti3O5 layers and a plurality of SiO2 layers stacked alternately, wherein the thickness of the passivation layer 50 is 0.5 μm to 2 μm, and the effective reflection band of the passivation layer 50 is 500 nm to 700 nm.

[0146] Step 6: Fig.11 As shown, after photolithography and development are performed on the passivation layer 50, patterning is performed on the contact electrode 42, the light reflecting electrode 41 and the isolation groove. The passivation layer 50 is removed from the patterned area using ICP dry etching technology to form through holes 51 connecting the contact electrode 42 and the light reflecting electrode 41.

[0147] It should be noted that each through hole can be prepared by photolithography patterning and etching separately or by photolithography and etching simultaneously.

[0148] Step 7: Figure 1 As shown, at least two pads 60 are prepared on the surface of the passivation layer 50 by electron beam metal vacuum coating technology, one pad 60 is connected to the reflective electrode 41 through a through hole, and the other pad 60 is connected to the contact electrode 42 through a through hole.

[0149] Fig.12 This is a current density and voltage characteristic curve diagram of a light emitting diode provided in an embodiment of the present disclosure. Fig.12 In the figure, the blue curve is the characteristic curve VF1 of the light emitting diode in the related art, and the orange curve is the characteristic curve VF2 of the light emitting diode provided by the embodiment of the present disclosure.

[0150] like Fig.12 As shown, as the current density gradually increases, that is, under high current conditions, the operating voltage of the light-emitting diode provided by the embodiment of the present disclosure is always lower than the operating voltage of the light-emitting diode in the related art.

[0151] Table 1 below is a parameter table of current density and voltage characteristic curves.

[0152] Table 1

[0153] I(μA) <![CDATA[J(A / CM 2 )]]> VF1(V) VF2(V) 1 0.02 1.52 1.53 10 0.21 1.65 1.67 100 2.17 1.79 1.8 1000 21.67 1.98 1.95 2000 43.34 2.09 2.02 3000 65.01 2.18 2.08 4000 86.68 2.27 2.12 5000 108.35 2.35 2.17 6000 130.02 2.43 2.22 7000 151.69 2.5 2.26 8000 173.36 2.57 2.3 9000 195.03 2.64 2.34 10000 216.7 2.7 2.38

[0154] According to Table 1, under high current conditions, the operating voltage of the light emitting diode provided by the embodiment of the present disclosure is always lower than that of the light emitting diode in the related art, and when the current density reaches 100A / CM 2 After that, the working voltage difference can reach more than 0.2V. It can be seen that under the condition of high current driving the light emitting diode, the working voltage of the light emitting diode provided by the embodiment of the present disclosure will not increase significantly, but can remain unchanged or increase slightly. Therefore, it can effectively avoid the problem of increased power consumption of the light emitting diode caused by the increase of the working voltage of the light emitting diode under the condition of high current driving the light emitting diode, and improve the reliability of the light emitting diode.

[0155] The embodiment of the present disclosure provides a light emitting diode, which includes: an epitaxial layer 20 and a current spreading layer 30, wherein the current spreading layer 30 is stacked on the surface of the epitaxial layer 20, and the current spreading layer 30 makes the ratio of the increment of the voltage of the light emitting diode to the increment of the current density of the light emitting diode greater than 0.0018V*CM 2 / A and less than 0.0077V*CM 2 / A.

[0156] Optionally, the current spreading layer 30 includes an alloy layer 31 , and the alloy layer 31 includes at least one of an AuGe layer and an AuGeNi layer.

[0157] By using an AuGe layer or AuGeNi layer in contact with the epitaxial layer 20, a more ideal ohmic contact characteristic can be obtained between the alloy layer 31 and the epitaxial layer 20, which will improve the current spreading efficiency, making it easier for the current to diffuse to various regions of the epitaxial layer 20, thereby reducing the local voltage on the epitaxial layer 20. In this way, even under the condition of driving the light-emitting diode with a large current, the operating voltage of the light-emitting diode will not increase significantly, but can remain unchanged or increase slightly. Therefore, the problem of increased power consumption of the light-emitting diode due to an increase in the operating voltage of the light-emitting diode under the condition of driving the light-emitting diode with a large current can be effectively avoided, thereby improving the reliability of the light-emitting diode.

[0158] Optionally, the thickness of the alloy layer 31 is less than or equal to 50 angstroms.

[0159] By controlling the thickness of the alloy layer 31 within the above range, it is possible to avoid the alloy layer 31 being too thin, which would result in insufficient current expansion capability of the alloy layer 31; it is also possible to avoid the alloy layer 31 being too thick, which would reduce the light transmittance of the alloy layer 31, causing the alloy layer 31 to absorb more light and affect the light emitting effect of the LED.

[0160] Exemplarily, the thickness of the alloy layer 31 is 50 angstroms.

[0161] Optionally, the current spreading layer 30 further includes a transparent conductive layer 32 , and the transparent conductive layer 32 is located on a surface of the alloy layer 31 close to the epitaxial layer 20 or on a surface of the alloy layer 31 far from the epitaxial layer 20 .

[0162] For example, the transparent conductive layer 32 may be an ITO layer or an IZO layer. Both the ITO layer and the IZO layer have good transmittance and low resistivity.

[0163] Among them, using an ITO layer or an IZO layer as the transparent conductive layer 32 can allow more light to be transmitted from the transparent conductive layer 32, thereby ensuring the light output effect; at the same time, due to the low resistivity, it is easier for carriers to be conducted to the alloy layer 31 more efficiently, thereby improving the injection efficiency.

[0164] Optionally, the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 is 0.1 to 0.5.

[0165] Exemplarily, the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 is 0.5, that is, the thickness of the alloy layer 31 is less than the thickness of the transparent conductive layer 32 .

[0166] For example, the thickness of the alloy layer 31 is 50 angstroms, and the thickness of the transparent conductive layer 32 is also 100 angstroms.

[0167] By controlling the ratio of the thickness of the alloy layer 31 to the thickness of the transparent conductive layer 32 within the above range, it is possible to avoid a large difference in thickness between the alloy layer 31 and the transparent conductive layer 32, which would cause the alloy layer 31 to be too thin and unable to spread the current, and also to avoid the alloy layer 31 being too thick and absorbing more light.

[0168] The above description is only an optional embodiment of the present disclosure and is not intended to limit the present disclosure. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present disclosure shall be included in the protection scope of the present disclosure.

Claims

1. A light emitting diode, characterized in that: The light-emitting diode comprises: an epitaxial layer (20) and a current spreading layer (30), wherein the current spreading layer (30) is stacked on the surface of the epitaxial layer (20), and the current spreading layer (30) comprises an alloy layer (31), and the alloy layer (31) comprises at least one of an AuGe layer and an AuGeNi layer.

2. The light emitting diode according to claim 1, characterized in that: The thickness of the alloy layer (31) is less than or equal to 50 angstroms.

3. The light emitting diode according to claim 1 or 2, characterized in that: The current spreading layer (30) further comprises a transparent conductive layer (32), wherein the transparent conductive layer (32) is located on a surface of the alloy layer (31) close to the epitaxial layer (20) or on a surface of the alloy layer (31) far from the epitaxial layer (20).

4. The light emitting diode according to claim 3, characterized in that: The ratio of the thickness of the alloy layer (31) to the thickness of the transparent conductive layer (32) is 0.1 to 0.

5.

5. The light emitting diode according to claim 1 or 2, characterized in that: The light-emitting diode further comprises a light-reflecting electrode (41), wherein the light-reflecting electrode (41) is located on a surface of the current spreading layer (30) away from the epitaxial layer (20); The light-reflecting electrode (41) comprises at least one of an Au layer, an Ag layer, an Al layer, a Ti layer, a Pt layer and a Ni layer.

6. A light emitting diode, characterized in that: The light emitting diode comprises: an epitaxial layer (20) and a current spreading layer (30), wherein the current spreading layer (30) is stacked on the surface of the epitaxial layer (20), and the current spreading layer (30) enables the ratio of the increment of the voltage of the light emitting diode to the increment of the current density of the light emitting diode to be greater than 0.0018 V*CM 2 / A and less than 0.0077V*CM 2 / A.

7. The light emitting diode according to claim 6, characterized in that: The current spreading layer (30) comprises an alloy layer (31), and the alloy layer (31) comprises at least one of an AuGe layer and an AuGeNi layer.

8. The light emitting diode according to claim 7, characterized in that: The thickness of the alloy layer (31) is less than or equal to 50 angstroms.

9. The light emitting diode according to claim 8, characterized in that: The current spreading layer (30) further comprises a transparent conductive layer (32), wherein the transparent conductive layer (32) is located on a surface of the alloy layer (31) close to the epitaxial layer (20) or on a surface of the alloy layer (31) far from the epitaxial layer (20).

10. The light emitting diode according to claim 9, characterized in that: The ratio of the thickness of the alloy layer (31) to the thickness of the transparent conductive layer (32) is 0.1 to 0.5.

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