Display panel, method for manufacturing display panel, and display device

By setting a bubble structure in the silicon-based OLED display panel to separate the charge generation layer and the pixel cathode layer, the leakage path problem caused by the overlap between the pixel cathode layer and the charge generation layer is solved, and power consumption is reduced.

CN119486510BActive Publication Date: 2026-01-13BOE TECHNOLOGY GROUP CO LTD +2
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Patent Information

Application Number
CN202411612728.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-11-12
Publication Date
2026-01-13
Estimated Expiration
2044-11-12

AI Technical Summary

Technical Problem

In silicon-based OLED display panels, the pixel cathode layer can easily overlap with the charge generation layer, forming a leakage path and leading to increased power consumption.

Method used

A bubble structure is set on the side of the charge generation layer away from the substrate to separate the charge generation layer from the pixel cathode layer and avoid overlap.

Benefits of technology

This effectively avoids the formation of leakage paths and reduces the power consumption of the display panel.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a display panel, a preparation method of the display panel and a display device. The display panel comprises a substrate, a pixel anode layer arranged on one side of the substrate, a pixel definition layer on the side of the pixel anode layer away from the substrate, a pixel light-emitting layer on the side of the pixel definition layer away from the substrate, and a pixel cathode layer on the side of the pixel light-emitting layer away from the substrate. The pixel light-emitting layer comprises a charge generation layer. The charge generation layer covers a pixel opening area and extends from the pixel opening area to two pixel definition areas adjacent to the pixel opening area, and the charge generation layers of adjacent pixel opening areas are disconnected. A bubble structure is arranged at a position corresponding to an intermittent area in the pixel light-emitting layer, and the bubble structure is located between the side of the charge generation layer away from the substrate and the pixel cathode layer. The bubble structure can be used to separate the charge generation layer and the pixel cathode layer, thereby avoiding the situation that the pixel cathode layer is easily overlapped with the charge generation layer to form a leakage path inside the display panel.
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Description

Technical Field

[0001] This disclosure generally relates to the field of display device technology, and specifically to a display panel, a method for manufacturing the display panel, and a display device. Background Technology

[0002] With the continuous development of display technology, silicon-based organic light-emitting diodes (OLEDs), which serve as micro-display panels, can be fabricated into OLED display devices with high pixel density and high refresh rate through silicon-based semiconductor fabrication processes. For example, such OLED display devices can be applied in the fields of virtual reality (VR) and augmented reality (AR).

[0003] Specifically, to avoid pixel crosstalk in silicon-based OLEDs, the spacing of the current generation layer (CGL) in different pixel regions can be achieved by filling the non-pixel regions between adjacent pixel regions of the silicon-based OLED.

[0004] However, when the filling effect of the non-pixel areas is not ideal, it can easily lead to distortion and bending of the pixel cathode layer of the silicon-based OLED. This causes the pixel cathode layer to come into contact with the charge generation layer distributed in the pixel area and form a leakage path (i.e., a cathode puncture phenomenon), thereby increasing the power consumption of the display device. Summary of the Invention

[0005] In view of the above-mentioned defects or deficiencies in the prior art, it is desirable to provide a display panel, a method for manufacturing a display panel, and a photomask for a display device. The display panel provided in this application can use a bubble structure disposed on the side of the charge generation layer away from the substrate to separate the charge generation layer and the pixel cathode layer, thereby making it easy for the pixel cathode layer to overlap with the charge generation layer and form a leakage path inside the display panel.

[0006] According to a first aspect of this application, a display panel is provided, comprising a substrate, a pixel anode layer disposed on one side of the substrate, a pixel definition layer on the side of the pixel anode layer away from the substrate, a pixel light-emitting layer on the side of the pixel definition layer away from the substrate, and a pixel cathode layer on the side of the pixel light-emitting layer away from the substrate; wherein, the pixel definition layer includes a plurality of pixel opening regions and a pixel definition region located between adjacent pixel opening regions; the pixel light-emitting layer includes a charge generation layer; the charge generation layer covers the pixel opening regions and extends from the pixel opening regions to two pixel definition regions adjacent to the pixel opening regions, and the charge generation layer of adjacent pixel opening regions is disconnected; each pixel definition region is provided with an intermittent region;

[0007] A bubble structure is provided at the position corresponding to the discontinuity region in the pixel light-emitting layer, and the bubble structure is located between the side of the charge generation layer away from the substrate and the pixel cathode layer.

[0008] In addition, the display panel of this application may also have the following additional technical features:

[0009] In one possible example, each pixel-defined region further includes inorganic regions located on both sides of the discontinuous region;

[0010] The charge generation layer extends from the pixel opening region into the cavity structure of the inorganic region, and the cavity structure communicates with the bubble structure.

[0011] In one possible example, the inorganic region includes a first sub-layer, a second sub-layer, and a third sub-layer stacked together, wherein the orthographic projection pattern of the second sub-layer is contained within the orthographic projection patterns of the first sub-layer and the third sub-layer, respectively, and the orthographic projection pattern of the third sub-layer is contained within the orthographic projection pattern of the first sub-layer.

[0012] The cavity structure is disposed on the circumferential side of the second sublayer near the discontinuity region.

[0013] In one possible example, the pixel anode layer includes multiple patterned regions and a flat region located between adjacent patterned regions;

[0014] The orthographic projection pattern of the discontinuous region is contained within the orthographic projection pattern of the flat region, and the pixel opening region is set correspondingly to the pattern region.

[0015] In one possible example, the end of the bubble structure closer to the substrate is a pointed end, and the end of the bubble structure farther from the substrate is a rounded end.

[0016] In one possible example, the radius of the bubble structure is 300 Å to 600 Å.

[0017] According to a second aspect of this application, a method for manufacturing a display panel is provided, the method comprising:

[0018] A metal material is deposited on one side of the substrate to form the pixel anode layer;

[0019] An entire layer of inorganic material is deposited on the side of the pixel anode layer away from the substrate, and the inorganic material in a predetermined area is removed to form a pixel definition layer including multiple pixel opening regions and pixel definition regions located between adjacent pixel opening regions; wherein, each pixel definition region is provided with a discontinuous region;

[0020] A pixel luminescent material is prepared on the side of the pixel definition layer away from the substrate to form a pixel luminescent layer; wherein, the pixel luminescent layer includes a charge generation layer; the charge generation layer covers the pixel opening region and extends from the pixel opening region to two pixel definition regions adjacent to the pixel opening region, and the charge generation layer of the adjacent pixel opening regions is disconnected;

[0021] A bubble structure is provided at the position corresponding to the discontinuity region in the pixel light-emitting layer, and the bubble structure is located between the side of the charge generation layer away from the substrate and the pixel cathode layer.

[0022] A metal material is deposited on the side of the pixel light-emitting layer away from the substrate to form a pixel cathode layer.

[0023] In addition, the method for manufacturing the display panel of this application may also have the following additional technical features:

[0024] In one possible example, the formation of a pixel definition layer comprising a plurality of pixel opening regions and pixel definition regions located between adjacent pixel opening regions includes:

[0025] The inorganic material within the preset area is etched to form the discontinuous region and inorganic regions located on both sides of the discontinuous region, each inorganic region containing a cavity structure.

[0026] The content ratio of inorganic materials in the cavity structure is adjusted by using a preset gas to accumulate preset free radicals in the circumferential direction of the cavity structure.

[0027] In one possible example, the step of preparing the pixel emitting material on the side of the pixel definition layer away from the substrate to form the pixel emitting layer includes:

[0028] A pixel light-emitting material is deposited on the side of the pixel definition layer away from the substrate. Based on the pixel light-emitting material and the preset polymer, a bubble structure communicating with the cavity structure and the pixel light-emitting layer are formed.

[0029] According to a third aspect of this application, a display device is provided, the display device including the display panel described in the first aspect.

[0030] Compared to the pixel cathode layer in the prior art, which is prone to puncture, the display panel, the method for manufacturing the display panel, and the display device provided in this application embodiment can use a bubble structure disposed on the side of the charge generation layer away from the substrate to separate the charge generation layer and the pixel cathode layer, thereby avoiding the situation where the pixel cathode layer easily overlaps with the charge generation layer and forms a leakage path inside the display panel (i.e., avoiding the puncture phenomenon of the pixel cathode layer).

[0031] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0032] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings:

[0033] Figure 1 A cross-sectional schematic diagram of the display panel 10 provided in an embodiment of this application;

[0034] Figure 2 One of the cross-sectional schematic diagrams of the display panel 20 provided in the embodiments of this application;

[0035] Figure 3 A second cross-sectional schematic diagram of the display panel 20 provided in an embodiment of this application;

[0036] Figure 4 A schematic flowchart illustrating the method for manufacturing the display panel 20 provided in this embodiment of the application;

[0037] Figure 5 This is one of the schematic diagrams illustrating the process of manufacturing the display panel 20 provided in the embodiments of this application;

[0038] Figure 6 This is a second schematic diagram illustrating the process of manufacturing the display panel 20 provided in this application embodiment;

[0039] Figure 7 This is the third schematic diagram illustrating the process of manufacturing the display panel 20 provided in the embodiments of this application;

[0040] Figure 8This is the fourth schematic diagram illustrating the process of manufacturing the display panel 20 provided in the embodiments of this application;

[0041] Figure 9 Fifth schematic diagram of the process for manufacturing the display panel 20 provided in this application embodiment;

[0042] Figure 10 This is the sixth schematic diagram illustrating the process of manufacturing the display panel 20 provided in the embodiments of this application;

[0043] Figure 11 A schematic diagram of the structure of a computer device provided in an embodiment of this application;

[0044] In the above image:

[0045] 10-Display panel; 101-Substrate; 102-Pixel anode layer; 103-Pixel definition layer; 104-Pixel light-emitting layer; 105-Pixel cathode layer; 1031-Pixel opening area; 1032-Pixel definition area; 1041-Charge generation layer; 10321-Discontinuous area; 10322-Blank area; 20-Display panel; 201-Substrate; 202-Pixel anode layer; 203-Pixel definition layer; 204-Pixel light-emitting layer; 205-Pixel cathode layer; 2031-Pixel opening area; 2032-Pixel definition area; 20321-Discontinuous area; 20322-Inorganic area; 2041-Charge generation layer; 206-Bubble structure; 2033-First sublayer; 2034-Second sublayer; 2035-Third sublayer; 2036-Cavity structure; 2021-Patterned area; 2022-Plain area. Detailed Implementation

[0046] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0047] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present application will now be described in detail with reference to the accompanying drawings and embodiments. Furthermore, the term "and / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The terms "first" and "second," etc., in the specification and claims of the embodiments of this application are used to distinguish different objects, not to describe a specific order of objects.

[0048] With the continuous development of display technology, silicon-based organic light-emitting diodes (OLEDs), which serve as micro-display panels, can be fabricated into OLED display devices with high pixel density and high refresh rate through silicon-based semiconductor fabrication processes. For example, such OLED display devices can be applied in the fields of virtual reality (VR) and augmented reality (AR).

[0049] Specifically, to avoid pixel crosstalk in silicon-based OLEDs, the spacing of the charge generation layers in different pixel regions can be achieved by filling the non-pixel regions between adjacent pixel regions of the silicon-based OLED.

[0050] For example, Figure 1 This is one of the cross-sectional schematic diagrams of the existing display panel 10 provided in the embodiments of this application, such as... Figure 1 As shown, the display panel 10 includes a substrate 101, a pixel anode layer 102 disposed on one side of the substrate 101, a pixel definition layer 103 disposed on the side of the pixel anode layer 102 away from the substrate 101, a pixel light-emitting layer 104 disposed on the side of the pixel definition layer 103 away from the substrate 101, and a pixel cathode layer 105 disposed on the side of the pixel light-emitting layer 104 away from the substrate 101.

[0051] For example, the display panel 10 may be a silicon-based OLED, and the substrate 101 may be a silicon wafer used to form a silicon-based OLED.

[0052] For example, the pixel definition layer 103 can be divided into multiple pixel opening regions 1031 and a pixel definition region 1032 between two adjacent pixel opening regions 1031, wherein the pixel opening region 1031 can be a pixel light-emitting region.

[0053] Specifically, an intermittent region 10321 can be set in the pixel definition area 1032 to interrupt the charge generation layer 1041 in the pixel light-emitting layer 104, thereby avoiding the pixel cross-light problem inside the display panel 10.

[0054] In one embodiment, during the fabrication of the pixel light-emitting layer 104, pixel light-emitting material can be filled in the discontinuous region 10321 to discontinuously generate the charge layer 1041.

[0055] However, when the filling effect of the aforementioned discontinuous region 10321 (i.e., the non-pixel region) is not ideal, the circumferential direction of the discontinuous region 10321 is prone to producing... Figure 1The blank area 10322 shown has a large vertical and horizontal distance.

[0056] Based on this, the pixel cathode layer 105 is prone to occurrences such as Figure 1 The distortion and bending shown causes the pixel cathode layer 105 to come into contact with the charge generation layer 1041 distributed inside the pixel light-emitting layer 104 and form a leakage path (i.e., a puncture phenomenon occurs in the pixel cathode layer 105), thereby increasing the power consumption of the display panel 10.

[0057] To address the aforementioned issues, this application proposes a display panel that utilizes a bubble structure disposed on the side of the charge generation layer away from the substrate to separate the charge generation layer from the pixel cathode layer. This prevents the pixel cathode layer from easily overlapping with the charge generation layer, thus creating a leakage path within the display panel.

[0058] Figure 2 This is one of the cross-sectional schematic diagrams of the display panel 20 provided in the embodiments of this application, such as... Figure 2 As shown, the display panel 20 includes a substrate 201, a pixel anode layer 202 disposed on one side of the substrate 201, a pixel definition layer 203 disposed on the side of the pixel anode layer 202 away from the substrate 201, a pixel light-emitting layer 204 disposed on the side of the pixel definition layer 203 away from the substrate 201, and a pixel cathode layer 205 disposed on the side of the pixel light-emitting layer 204 away from the substrate 201.

[0059] For example, the substrate 201, as the substrate material of the display panel 20, can have the characteristics of low coefficient of thermal expansion and high surface flatness, and its manufacturing material can be, for example, a silicon wafer; based on this, the display panel 20 can be a silicon-based display panel.

[0060] For example, the pixel anode layer 202 can have good transparency and conductivity, and can be fabricated on one side of the substrate 201 by photolithography.

[0061] Specifically, in the process of photolithography of OLED display panels, the pixel anode layer 202 can be used to guide positive charges (i.e., holes) into the pixel light-emitting layer 204, so as to recombine with negative charges (i.e., electrons) in the pixel light-emitting layer 204, thereby exciting the pixel light-emitting layer 204 to emit light.

[0062] For example, the pixel definition layer 203 (PDL) can be used to define the shape and size of each pixel in the display panel 20. Specifically, the pixel definition layer 203 can guide light onto the light-emitting material through a photolithography process to ensure that each pixel has a clear boundary and the correct shape.

[0063] For example, the material used to manufacture the pixel definition layer 203 can be an organic polymer material, such as polyimide (PI); or it can be an inorganic material, such as silicon-containing compounds SiO or SiON.

[0064] For example, the pixel definition layer 203 includes a plurality of pixel opening regions 2031 and pixel definition regions 2032 located between adjacent pixel opening regions 2031.

[0065] Specifically, each pixel definition area 2032 may include a discontinuous region 20321 and inorganic regions 20322 located on both sides of the discontinuous region 20321.

[0066] For example, a pixel light-emitting material can be deposited by vapor deposition on the side of the pixel opening region 2031 away from the substrate 201 to prepare the pixel light-emitting layer 204. The pixel light-emitting material can be, for example, a red pixel light-emitting material, a green pixel light-emitting material, or a blue pixel light-emitting material, and the color and position of the pixel light-emitting material are not specifically limited here.

[0067] For example, the pixel light-emitting layer 204 includes a charge generation layer 2041, which covers the pixel opening region 2031 and extends from the pixel opening region 2031 to two pixel definition regions 2032 adjacent to the pixel opening region 2031, and the charge generation layer 2041 of the adjacent pixel opening region 2031 is disconnected.

[0068] Specifically, the charge generation layer 2041 can be disconnected at the contact point between the discontinuity region 20321 and the inorganic region 20322.

[0069] Based on this, the display panel 20 can use the charge generation layer 2041 to connect multiple light-emitting layers in series, and achieve the effect of light emission superposition while realizing display colorization through the method of "white" light + three-color filter.

[0070] In one possible implementation, a bubble structure 206 is provided at the position corresponding to the discontinuity region 20321 in the pixel light-emitting layer 204, and the bubble structure 206 is located between the side of the charge generation layer 2041 away from the substrate 201 and the pixel cathode layer 205.

[0071] In this embodiment, a bubble structure 206 can be provided between the charge generation layer 2041 and the pixel cathode layer 205 to separate the distorted portion of the pixel cathode layer 205 when the pixel cathode layer 205 is distorted and bent, so as to avoid the situation where the pixel cathode layer 205 and the charge generation layer 2041 overlap and form a leakage path.

[0072] For example, one end of the bubble structure 206 can be located at the boundary between the interrupted region 20321 and the inorganic region 20322 in the pixel definition region 2032 (i.e., the end close to the substrate 201).

[0073] Specifically, the end of the bubble structure 206 closest to the substrate 201 is pointed, and the end of the bubble structure 206 furthest from the substrate 201 is rounded. The radius of the bubble structure can be, for example, 300 Å to 600 Å.

[0074] Compared to the pixel cathode layer in the prior art, which is prone to puncture, the display panel 20 provided in this application embodiment can use a bubble structure 206 disposed on the side of the charge generation layer 2041 away from the substrate 201 to separate the charge generation layer 2041 and the pixel cathode layer 205, thereby avoiding the situation where the pixel cathode layer 205 is prone to overlap with the charge generation layer 2041 and form a leakage path inside the display panel 20 (that is, avoiding the puncture phenomenon of the pixel cathode layer 205).

[0075] In another embodiment of this application, a specific configuration of the pixel definition layer 203 is also provided. For example, the inorganic region 20322 of the pixel definition region 2032 may further include a cavity structure, which may communicate with the bubble structure 206; wherein, the charge generation layer 2041 may extend from the pixel opening region 2031 into the cavity structure of the inorganic region 20322.

[0076] For example, Figure 3 This is another schematic diagram of the display panel 20 provided in the embodiments of this application, as shown below. Figure 3 As shown, the inorganic region 20322 of the pixel definition region 2032 may include a first sub-layer 2033, a second sub-layer 2034 and a third sub-layer 2035 stacked together.

[0077] Specifically, the orthographic projection pattern of the second sublayer 2034 is included in the orthographic projection patterns of the first sublayer 2033 and the third sublayer 2035, respectively, and the orthographic projection pattern of the third sublayer 2035 is included in the orthographic projection pattern of the first sublayer 2033.

[0078] For example, the materials used to prepare the first sublayer 2033, the second sublayer 2034, and the third sublayer 2035 can be silicon dioxide (SiO2), silicon nitride (SiN), and SiO2, respectively.

[0079] For example, a cavity structure 2036 may be provided on the circumferential side of the second sublayer 2034 near the discontinuity region 20321. The cavity structure 2036 communicates with the tip of the bubble structure 206.

[0080] In another embodiment of this application, a specific configuration of the pixel anode layer 202 is also provided. For example, as shown... Figure 3 As shown, the pixel anode layer 202 may include a plurality of patterned regions 2021 and a flat region 2022 located between adjacent patterned regions 2021.

[0081] For example, the orthographic pattern of the discontinuous region 20321 is contained within the orthographic pattern of the flat region 2022, and the pixel opening region 2031 is set correspondingly to the pattern region 2021.

[0082] Specifically, refer to Figure 3 Each pattern region 2021 can be set to correspond to a pixel opening region 2031 and a portion of the pixel definition region 2032, and each flat region 2022 can be set to correspond to a portion of the pixel definition region 2032 between adjacent pixel opening regions 2031.

[0083] For example, the extension length of the flat region 2022 on the side away from the substrate 201 can be greater than the extension length on the side closer to the substrate 201, that is, the orthographic projection pattern of the flat region 2022 can be trapezoidal.

[0084] Specifically, the side of the flat region 2022 away from the substrate 201 can be concave, and based on this, the side of the discontinuous region 20321 corresponding to the flat region 2022 that is close to the substrate 201 can be convex.

[0085] In another embodiment of this application, a method for manufacturing the display panel 20 is also provided. Figure 4 This is a schematic flowchart of the method for manufacturing the display panel 20 provided in the embodiments of this application, as shown below. Figure 4 As shown, the method includes the following steps:

[0086] Step 401: Lay a metal material on one side of the substrate 201 to form a pixel anode layer 202.

[0087] In one possible implementation, the pixel anode layer 202, which is flush with the side away from the substrate 201, can be prepared using the LHC process.

[0088] For example, Figure 5 This is one of the schematic diagrams illustrating the process of manufacturing the display panel 20 provided in the embodiments of this application, such as... Figure 5 As shown, a metal material can be deposited on one side of the substrate 201, and photoresist can be coated in a first preset area on the side of the metal material away from the substrate 201, so as to form a patterned area 2021 of the pixel anode layer 202 by exposure and development.

[0089] Specifically, the metal material deposited on one side of the substrate 201 may include titanium (Ti), titanium nitride (TiN), aluminum (Al), TiN, or indium tin oxide (ITO); the first preset area may correspond to the flat area 2022 of the pixel anode layer 202.

[0090] For example, Figure 6 This is a second schematic diagram of the process for manufacturing the display panel 20 provided in the embodiments of this application, as shown below. Figure 6 As shown, an inorganic film layer can be deposited in the patterned area 2021 and the blank area (i.e., the first preset area) between adjacent patterned areas 2021, and a photoresist is coated on the side of the inorganic film layer away from the substrate 201 to make the film layer flush. The photoresist and part of the inorganic material are removed by LHC etching process, thereby forming a pixel anode layer 202 containing multiple patterned areas 2021 and a flat area 2022 located between adjacent patterned areas 2021; wherein the surface of the pixel anode layer 202 on the side away from the substrate 201 is flush.

[0091] Specifically, the inorganic film layer used for coating can be SiO2, and the thickness can be 3000 Å to 6000 Å.

[0092] Step 402: Lay a whole layer of inorganic material on the side of the pixel anode layer 202 away from the substrate 201, and remove the inorganic material in the preset area to form a pixel definition layer 203 including a plurality of pixel opening regions 2031 and a pixel definition region 2032 located between adjacent pixel opening regions 2031.

[0093] For example, Figure 7 This is the third schematic diagram of the process for manufacturing the display panel 20 provided in the embodiments of this application, as shown below. Figure 7 As shown, multiple layers of inorganic materials can be deposited on the side of the pixel anode layer 202 away from the substrate 201, and photoresist can be coated on a second preset area on the side of the deposited inorganic materials away from the substrate 201, so as to form a three-layer inorganic film layer on the side of the pixel anode layer 202 away from the substrate 201 by exposure and development; wherein, the second preset area can be the pixel definition area 2032 of the pixel definition layer 203, and each pixel definition area 2032 is provided with an intermittent area 20321.

[0094] Specifically, a full layer of SiO2 can be laid first on the side of the pixel anode layer 202 away from the substrate 201, followed by a full layer of SiN, and finally another full layer of SiO2.

[0095] For example, Figure 8 This is the fourth schematic diagram of the process for manufacturing the display panel 20 provided in the embodiments of this application, as shown below. Figure 8 As shown, it can be done as follows Figure 7The inorganic film layer shown is coated with a third preset area of ​​concave photoresist on the side away from the substrate 201, and a pixel definition layer 203 is formed by exposure and development, including multiple pixel opening areas 2031 and pixel definition areas 2032 located between adjacent pixel opening areas 2031; wherein, the third preset area corresponds to the discontinuous area 20321, and based on this, the pixel definition area 2032 is provided with discontinuous areas 20321, and the two sides of each discontinuous area 20321 can be inorganic areas 20322 in the pixel definition area 2032.

[0096] Specifically, the inorganic region 20322 may include a first sub-layer 2033, a second sub-layer 2034, and a third sub-layer 2035 stacked together, wherein the first sub-layer 2033, the second sub-layer 2034, and the third sub-layer 2035 respectively correspond to Figure 7 The three inorganic membrane layers shown; and a cavity structure 2036 may be provided on the circumferential side of the second sublayer 2034 near the discontinuity region 20321.

[0097] For example, when the above-mentioned inorganic film layer is subjected to such... Figure 8 During the exposure and development process shown, the content ratio of inorganic materials in the cavity structure 2036 is adjusted by using a preset gas to deposit a preset polymer in the circumferential direction of the cavity structure 2036.

[0098] Specifically, the carbon-nitrogen ratio of inorganic materials can be adjusted using a preset gas to form carbon-nitrogen polymers.

[0099] For example, Figure 9 This is the fifth schematic diagram of the process for manufacturing the display panel 20 provided in the embodiments of this application, as shown below. Figure 9 As shown, gases such as CHF3, CF4, or O2 can be added during the etching process to adjust the C / F ratio of the inorganic material in the circumferential direction of the cavity structure 2036, so as to deposit CF-type polymers in the cavity structure 2036. Specifically, the main components of the CF-type polymers can be elements such as carbon (C), oxygen (O), fluorine (F), and silicon (Si), wherein the O content can be 10~50% and the C content can be 10~50%.

[0100] Step 403: Pixel luminescent material is prepared on the side of the pixel definition layer 203 away from the substrate 201 to form the pixel luminescent layer 204.

[0101] For example, Figure 10 This is the sixth schematic diagram of the process for manufacturing the display panel 20 provided in the embodiments of this application, as shown below. Figure 10 As shown, pixel light-emitting material can be prepared on the side of pixel definition layer 203 away from substrate 201 to form pixel light-emitting layer 204.

[0102] Specifically, refer to Figure 10Pixel luminescent material can be deposited on the side of the discontinuity region 20321, the pixel opening region 2031, and the pixel definition region 2032 away from the substrate 201.

[0103] For example, during the process of vapor deposition of the pixel light-emitting material, a bubble structure 206 communicating with the cavity structure 2036 can be formed based on the pixel light-emitting material and a preset polymer.

[0104] Specifically, during the high-temperature evaporation of the aforementioned pixel light-emitting material, the active lattice oxygen (O) of the evaporated material... 2- It can react with CF-type polymers to generate gases such as CO, CO2, and COF2, thereby forming a bubble structure 206; wherein, the evaporation temperature can be 200℃~400℃.

[0105] Step 404: Deposit a metal material on the side of the pixel light-emitting layer 204 away from the substrate 201 to form the pixel cathode layer 205.

[0106] For example, refer to Figure 10 Metal material can be deposited on the side of the pixel light-emitting layer 204 away from the substrate 201 to form the pixel cathode layer 205.

[0107] Compared to the pixel cathode layer in the prior art, which is prone to puncture, on the one hand, a bubble structure 206 disposed on the side of the charge generation layer 2041 away from the substrate 201 of the display panel 20 can be used to separate the charge generation layer 2041 and the pixel cathode layer 205, thereby avoiding the situation where the pixel cathode layer 205 easily overlaps with the charge generation layer 2041 and forms a leakage path inside the display panel 20 (i.e., avoiding the puncture phenomenon of the pixel cathode layer 205). On the other hand, a preset gas can be added during the manufacturing process of the display panel 20 to accumulate a preset polymer in the cavity structure 2036 inside the display panel 20, thereby forming a bubble structure 206 based on the preset polymer to separate the charge generation layer 2041 and the pixel cathode layer 205. This effectively solves the puncture phenomenon of the pixel cathode layer 205 while reducing the design cost of the spacer structure between the charge generation layer 2041 and the pixel cathode layer 205.

[0108] In another embodiment of this application, a display device 30 is also provided, which may include the display panel 20 in the foregoing embodiments.

[0109] In one possible implementation, the display device 30 can be used to output image information. For example, the display device 30 can display text images by controlling semiconductor light-emitting diodes; for instance, the display device 30 can be a silicon-based microdisplay device.

[0110] In another embodiment of this application, a computer device 600 is also provided, which includes a central processing unit (CPU) 601 that can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 602 or a program loaded from a storage portion 608 into a random access memory (RAM) 603. The RAM 603 also stores various programs and data required for the system's operating instructions. The CPU 601, ROM 602, and RAM 603 are interconnected via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0111] The following components are connected to the input / output (I / O) interface 605: an input section 606 including a keyboard, mouse, etc.; an output section 607 including a cathode ray tube (CRT), liquid crystal display (LCD), etc., and speakers, etc.; a storage section 608 including a hard disk, etc.; and a communication section 609 including a network interface card such as a LAN card, modem, etc. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to the input / output (I / O) interface 605 as needed. A removable medium 611, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on the drive 610 as needed so that computer programs read from it can be installed into the storage section 608 as needed.

[0112] Specifically, according to embodiments of this application, the flowchart above refers to... Figure 5 The described process can be implemented as a computer software program. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowchart. In such an embodiment, the computer program contains program code for performing the methods shown in the flowchart. In such an embodiment, the computer program can be downloaded and installed from a network via communication section 609, and / or installed from removable medium 611. When the computer program is executed by central processing unit (CPU) 601, it performs the functions defined in the system of this application.

[0113] It should be noted that the computer-readable medium shown in this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this application, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device. In this application, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium compatible with computer-readable storage media, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0114] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operational instructions of possible implementations of systems, methods, and computer program products according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two connected blocks may actually be executed substantially in parallel, or they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified functions or operational instructions, or using a combination of dedicated hardware and computer instructions.

[0115] The units or modules described in the embodiments of this application can be implemented in software or hardware. The described units or modules can also be housed in a processor; for example, a processor may be described as including a semantic extraction unit, a weight allocation unit, and a determination unit. The names of these units or modules do not necessarily constitute a limitation on the unit or module itself.

[0116] On the other hand, this application also provides a computer-readable storage medium, which may be included in the computer device described in the above embodiments, or may exist independently and not assembled into the computer device. The aforementioned computer-readable storage medium stores one or more programs that, when used by one or more processors, execute the methods described in this application. For example, it may execute... Figure 4 The steps of the method shown are as follows.

[0117] This application provides a computer program product including instructions that, when executed, cause the method described in this application to be performed. For example, it can execute... Figure 4 The steps of the method shown are as follows.

[0118] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of disclosure in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the foregoing disclosed concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

Claims

1. A display panel, characterized in that, The system includes a substrate, a pixel anode layer disposed on one side of the substrate, a pixel definition layer on the side of the pixel anode layer away from the substrate, a pixel light-emitting layer on the side of the pixel definition layer away from the substrate, and a pixel cathode layer on the side of the pixel light-emitting layer away from the substrate. The pixel definition layer includes a plurality of pixel opening regions and pixel definition regions located between adjacent pixel opening regions. The pixel light-emitting layer includes a charge generation layer. The charge generation layer covers the pixel opening regions and extends from the pixel opening regions to two pixel definition regions adjacent to the pixel opening regions, and the charge generation layers of adjacent pixel opening regions are disconnected. Each pixel definition region has an intermittent region. A bubble structure is provided at the position corresponding to the discontinuity region in the pixel light-emitting layer, and the bubble structure is located between the side of the charge generation layer away from the substrate and the pixel cathode layer.

2. The display panel according to claim 1, characterized in that, Each pixel-defined region also includes inorganic regions located on both sides of the discontinuous region; The charge generation layer extends from the pixel opening region into the cavity structure of the inorganic region, and the cavity structure communicates with the bubble structure.

3. The display panel according to claim 2, characterized in that, The inorganic region includes a first sub-layer, a second sub-layer, and a third sub-layer stacked together. The orthographic projection pattern of the second sub-layer is contained within the orthographic projection patterns of the first sub-layer and the third sub-layer, respectively. The orthographic projection pattern of the third sub-layer is contained within the orthographic projection pattern of the first sub-layer. The cavity structure is disposed on the circumferential side of the second sublayer near the discontinuity region.

4. The display panel according to claim 1, characterized in that, The pixel anode layer includes multiple patterned regions and a flat region located between adjacent patterned regions; The orthographic projection pattern of the discontinuous region is contained within the orthographic projection pattern of the flat region, and the pixel opening region is set correspondingly to the pattern region.

5. The display panel according to claim 1, characterized in that, The end of the bubble structure closest to the substrate is pointed, and the end of the bubble structure furthest from the substrate is rounded.

6. The display panel according to any one of claims 1-5, characterized in that, The radius of the bubble structure is 300 Å to 600 Å.

7. A method for manufacturing a display panel, characterized in that, The method includes: A metal material is deposited on one side of the substrate to form the pixel anode layer; An entire layer of inorganic material is deposited on the side of the pixel anode layer away from the substrate, and the inorganic material in a predetermined area is removed to form a pixel definition layer including multiple pixel opening regions and pixel definition regions located between adjacent pixel opening regions; wherein, each pixel definition region is provided with a discontinuous region; A pixel luminescent material is prepared on the side of the pixel definition layer away from the substrate to form a pixel luminescent layer; wherein, the pixel luminescent layer includes a charge generation layer; the charge generation layer covers the pixel opening region and extends from the pixel opening region to two pixel definition regions adjacent to the pixel opening region, and the charge generation layer of the adjacent pixel opening regions is disconnected; A bubble structure is provided at the position corresponding to the discontinuity region in the pixel light-emitting layer, and the bubble structure is located between the side of the charge generation layer away from the substrate and the pixel cathode layer. A metal material is deposited on the side of the pixel light-emitting layer away from the substrate to form a pixel cathode layer.

8. The method for manufacturing a display panel according to claim 7, characterized in that, The formation of the pixel definition layer, which includes multiple pixel opening regions and pixel definition regions located between adjacent pixel opening regions, includes: The inorganic material within the preset area is etched to form the discontinuous region and inorganic regions located on both sides of the discontinuous region, each inorganic region containing a cavity structure. The content ratio of inorganic materials in the cavity structure is adjusted by using a preset gas to deposit a preset polymer in the circumference of the cavity structure.

9. The method for manufacturing a display panel according to claim 8, characterized in that, The step of preparing a pixel luminescent material on the side of the pixel definition layer away from the substrate to form a pixel luminescent layer includes: A pixel light-emitting material is deposited on the side of the pixel definition layer away from the substrate. Based on the pixel light-emitting material and the preset polymer, a bubble structure communicating with the cavity structure and the pixel light-emitting layer are formed.

10. A display device, characterized in that, The display device includes a display panel as described in any one of claims 1-6.

Citation Information

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