Patterning apparatus voltage bias system for EUV lithography

Abstract

A patterning device voltage biasing system for use in a lithographic apparatus, the patterning device voltage biasing system comprising: a patterning device configured to impart a pattern to a radiation beam, the patterning device comprising a patterning surface having a pattern thereon; and a voltage source, wherein the patterning device voltage bias system is configured to enable a voltage to be applied to the patterning surface of the patterning device through the voltage source.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to EP application No. 22195470.4 filed on September 13, 2022 and European patent application No. 23176443.2 filed on May 31, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present invention relates to a pattern forming device voltage bias system for use in a lithography apparatus, a lithography apparatus comprising a pattern forming device voltage bias system, a method for reducing contamination on a pattern forming surface of a pattern forming device in a lithography apparatus, and a method for manufacturing an apparatus, the method comprising a method for reducing contamination on a pattern forming surface of a pattern forming device in a lithography apparatus. Background Art

[0004] A lithographic apparatus is a machine that applies a desired pattern to a substrate, typically to a target portion of the substrate. For example, a lithographic apparatus can be used in the manufacture of an integrated circuit (IC). In this case, a pattern forming device (also referred to as a mask or reticle) can be used to generate a circuit pattern to be formed on a separate layer of the IC. The pattern can be transferred to a target portion (e.g., a portion including one or more bare chips) on a substrate (e.g., a silicon wafer). The transfer of the pattern is typically via imaging onto a radiation-sensitive material (resist) layer provided on the substrate. Typically, a single substrate will contain a network of adjacent target portions that are continuously patterned.

[0005] Photolithography is widely recognized as a critical step in the manufacture of ICs and other devices and / or structures. However, as the size of features made using photolithography decreases, photolithography is becoming a more critical factor in the manufacture of miniature ICs and other devices and / or structures.

[0006] The theoretical estimate of the pattern printing limit can be given by the Rayleigh resolution criterion, as shown in equation (1):

[0007]

[0008] Where λ is the wavelength of the radiation used, NA is the numerical aperture of the projection system used to print the pattern, k1 is a process-dependent adjustment factor also known as the Rayleigh constant, and CD is the characteristic size (or critical dimension) of the printed feature. According to equation (1), the minimum printable size of the feature can be reduced in three ways: shortening the exposure wavelength λ, increasing the numerical aperture NA, or reducing the value of k1.

[0009] In order to shorten the exposure wavelength and thereby reduce the minimum printable size, it has been proposed to use an extreme ultraviolet (EUV) radiation source. EUV radiation is electromagnetic radiation with a wavelength in the range of 10-20 nm, for example in the range of 13-14 nm. It has also been proposed to use EUV radiation with a wavelength less than 10 nm, for example in the range of 5-10 nm, such as 6.7 nm or 6.8 nm. This radiation is called extreme ultraviolet radiation or soft x-ray radiation. For example, possible sources include laser-produced plasma sources, discharge plasma sources, or sources based on synchrotron radiation provided by electron storage rings.

[0010] After EUV radiation is generated, it is directed by a plurality of mirrors through a lithographic apparatus to a patterning surface of a patterning device, which imparts a desired pattern to the EUV radiation. As a result of the photoelectric effect, EUV radiation incident on the patterning surface causes electrons to be emitted from the surface. The patterning surface may be electrically isolated from the ground frame of the lithographic apparatus. This may be because the patterning surface is disposed on a dielectric substrate, such as an ultra-low expansion glass substrate. Therefore, the emission of electrons from the patterning surface causes the patterning surface to be positively charged.

[0011] Contaminant particles may be present in the environment surrounding the patterning device. The contaminant particles may be negatively charged by absorbing electrons emitted from the patterning surface due to the photoelectric effect and by absorbing electrons in the plasma generated by gas particles excited by EUV radiation.

[0012] Negatively charged contaminant particles are attracted to the positively charged patterning surface, which means that the contaminant particles are accelerated toward the patterning surface. Therefore, contaminant particles in the environment surrounding the patterning device are likely to be deposited on the patterning surface. The presence of contaminant particles on the patterning surface can lead to imaging errors, thereby reducing the yield of the photolithography process.

[0013] An object of the present invention is to improve the yield of EUV lithography processes by preventing contaminant particles from being deposited on a patterning surface of a patterning device. Summary of the invention

[0014] According to one aspect of the present invention, there is provided a pattern forming device voltage bias system for use in a lithography apparatus, the pattern forming device voltage bias system comprising:

[0015] a patterning device configured to impart a pattern to the radiation beam, the patterning device comprising a patterning surface having a pattern thereon; and

[0016] Voltage source,

[0017] The pattern forming device voltage bias system is configured to enable a voltage to be applied to a pattern forming surface of the pattern forming device by a voltage source.

[0018] According to another aspect of the present invention, there is provided a method of reducing contamination on a patterning surface of a patterning device in a lithographic apparatus, the method comprising:

[0019] a contacting step in which a conductive member is brought into contact with the pattern forming surface;

[0020] A voltage biasing step in which a voltage is supplied from a voltage source to the pattern forming surface via a conductive member. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, wherein corresponding reference numerals indicate corresponding parts.

[0022] Figure 1 A lithographic apparatus is schematically depicted.

[0023] Figure 2 A more detailed view of a lithographic apparatus is schematically depicted.

[0024] Figure 3 A patterning device exposed to EUV radiation is schematically depicted.

[0025] Figure 4A Depicted is a graph of the voltage of the patterned surface versus time in the absence of an applied bias voltage.

[0026] Figure 4B Depicted is a graph of the voltage of the patterned surface as a function of time under an applied bias voltage.

[0027] Figure 5A Plotted is the distance from the patterning surface versus time in the absence of an applied bias voltage.

[0028] Figure 5B Plotted is the distance from the patterning surface versus time with applied bias voltage.

[0029] Figure 6 An embodiment of a patterning device voltage biasing system in a non-contact arrangement is schematically depicted.

[0030] Figure 7 An embodiment of a patterning device voltage biasing system in a contact arrangement is schematically depicted.

[0031] Figure 8 An embodiment of a patterning device voltage biasing system in a landing arrangement is schematically depicted.

[0032] Fig. 9 Another embodiment of a patterning device voltage bias system is schematically depicted.

[0033] Fig.10 Another embodiment of a patterning device voltage bias system is schematically depicted. Fig.11 A patterning device support according to an embodiment of the invention is schematically depicted.

[0034] Fig. 12A A plan view of a patterning surface of a patterning device is depicted.

[0035] Fig. 12B Schematically depicts Fig. 12A A cross-sectional view of a pattern forming device is shown.

[0036] Fig. 12C Depicted Fig. 12A and Fig. 12B A plan view of a non-patterning surface of a patterning device is shown.

[0037] Fig.13A Depicted is a plan view of a patterning surface of a patterning device according to an embodiment of the present invention.

[0038] Fig. 13B Depicted Fig.13A A cross-sectional view of a pattern forming device is shown.

[0039] Fig.14A Depicted is a plan view of a patterning surface of a patterning device according to an embodiment of the present invention.

[0040] Fig. 14B Depicts a cross-sectional view of a patterning device, which may be Fig.14A A first implementation of a patterning device is shown.

[0041] Fig. 14C Depicts a cross-sectional view of another patterning device, which may be Fig.14A A second implementation of the patterning device is shown.

[0042] Fig.15A Depicted is a plan view of a patterning surface of a patterning device according to an embodiment of the present invention.

[0043] Fig. 15B Depicts a cross-sectional view of a patterning device, which may be Fig.15A A first implementation of a patterning device is shown.

[0044] Fig. 15C Depicts a cross-sectional view of another patterning device, which may be Fig.15A A second implementation of the patterning device is shown.

[0045] Fig.16ADepicted is a plan view of a patterning surface of a patterning device according to an embodiment of the present invention.

[0046] Fig. 16B Depicted Fig.16A A cross-sectional view of a pattern forming device is shown.

[0047] Fig. 16C Depicted Fig.16A and Fig. 16B A plan view of a non-patterning surface of a patterning device is shown.

[0048] Fig.17A Depicted is a plan view of a patterning surface of a patterning device according to an embodiment of the present invention.

[0049] Fig. 17B Depicted Fig.17A A cross-sectional view of a pattern forming device is shown.

[0050] Fig. 17C Depicted Fig.17A and Fig. 17B A plan view of a non-patterning surface of a patterning device is shown.

[0051] Fig.18A Depicted is a plan view of a patterning surface of a patterning device according to an embodiment of the present invention.

[0052] Fig.18B Depicted Fig.18A A cross-sectional view of a pattern forming device is shown.

[0053] Fig.18C Depicted Fig.18A and Fig.18B A plan view of a non-patterning surface of a patterning device is shown.

[0054] The features shown in the figures are not necessarily drawn to scale, and the sizes and / or arrangements shown are not limited. It should be understood that the drawings include optional features that may not be essential to the present invention. In addition, not all features of the device are depicted in each figure, and the figures may only show some components relevant to describing a particular feature. DETAILED DESCRIPTION

[0055] Figure 1 A lithographic apparatus 100 including a source collector module SO according to an embodiment of the present invention is schematically depicted. The apparatus 100 comprises:

[0056] - an illumination system (or illuminator) IL configured to condition the radiation beam B (eg EUV radiation).

[0057] a support structure (e.g., mask table) MT configured to support a patterning device (e.g., mask or reticle) MA and connected to a first positioner PM configured to accurately position the patterning device;

[0058] a substrate table (eg, wafer stage) WT configured to hold a substrate (eg, a resist-coated wafer) W and connected to a second positioner PW configured to accurately position the substrate; and

[0059] - a projection system (eg, a reflective projection system) PS configured to project the pattern imparted to the radiation beam B by the patterning device MA onto a target portion C of the substrate W (eg, comprising one or more dies).

[0060] The illumination system IL may include various types of optical elements, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical elements, or any combination thereof, for directing, shaping or controlling the radiation.

[0061] The support structure MT holds the patterning device MA in a manner that depends on the orientation of the patterning device, the design of the lithographic apparatus, and other conditions, such as, for example, whether the patterning device is held in a vacuum environment. The support structure MT may use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device MA. The support structure MT may be, for example, a frame or a table, which may be fixed or movable as required. The support structure MT may ensure that the patterning device MA is in a desired position, for example, relative to the projection system PS.

[0062] The term “patterning device” should be broadly interpreted as referring to any device that can be used to impart a pattern to a radiation beam B in its cross-section, such as to create a pattern in a target portion C of a substrate W. The pattern imparted to the radiation beam B may correspond to a specific functional layer in a device (such as an integrated circuit) created in the target portion C.

[0063] Examples of patterning devices include masks, programmable mirror arrays, and programmable liquid crystal display (LCD) panels. Masks are well known in lithography and include mask types such as binary, alternating phase shift, and attenuated phase shift, as well as various hybrid mask types. One example of a programmable mirror array employs a matrix arrangement of small mirrors, each of which can be individually tilted to reflect an incident radiation beam in different directions. The tilted mirrors impart a pattern in the radiation beam, which is reflected by the mirror matrix.

[0064] As with the illumination system IL, the projection system PS may include various types of optical elements, such as refractive, reflective, magnetic, electromagnetic, electrostatic or other types of optical elements, or any combination thereof, to adapt to the exposure radiation used, or to other factors, such as the use of a vacuum. It may be desirable to use a vacuum for EUV radiation, since other gases may absorb too much radiation. Therefore, with the help of vacuum walls and a vacuum pump, a vacuum environment may be provided for the entire beam path.

[0065] As described herein, the lithographic apparatus 100 is of a reflective type (eg, employing a reflective mask).

[0066] The lithographic apparatus 100 may be of a type having two (dual-stage) or more substrate tables WT (and / or two or more support structures MT). In such a "multi-stage" lithographic apparatus, additional substrate tables WT (and / or additional support structures MT) may be used in parallel, or preparatory steps may be performed on one or more substrate tables WT (and / or one or more support structures MT) while exposure is being performed using one or more other substrate tables WT (and / or one or more other support structures MT).

[0067] refer to Figure 1 , the irradiation system IL receives an extreme ultraviolet radiation beam from the source collector module SO. Methods for generating EUV light include, but are not limited to, converting a material into a plasma state having at least one element (e.g., xenon, lithium, or tin) having one or more emission lines in the EUV range. In one method, generally referred to as laser produced plasma ("LPP"), the desired plasma, such as droplets, streams, or clusters of material having the desired line-emitting element, can be generated by irradiating a fuel with a laser beam. The source collector module SO can be part of an EUV radiation system that includes a laser ( Figure 1 The resulting plasma emits output radiation, such as EUV radiation, which is collected using a radiation collector disposed in the source collector module. The laser and source collector module SO may be separate entities, such as when a CO2 laser is used to provide the laser beam for fuel excitation.

[0068] In this case, the laser is not considered to be part of the lithographic apparatus 100, and the radiation beam B is delivered from the laser to the source collector module SO with the help of a beam delivery system, which includes, for example, suitable guide mirrors and / or a beam expander. In other cases, the source may be an integral part of the source collector module SO, for example when the source is a discharge produced plasma EUV generator, usually referred to as a DPP source.

[0069] The illumination system IL may include an adjuster for adjusting the angular intensity distribution of the radiation beam. Typically, at least the outer and / or inner radial extent (typically referred to as outer σ and inner σ, respectively) of the intensity distribution in a pupil plane of the illumination system IL may be adjusted. Furthermore, the illumination system IL may include various other components, such as a facet field and pupil mirror devices. The illumination system IL may be used to adjust the radiation beam B so that it has a desired uniformity and intensity distribution in a cross section.

[0070] The radiation beam B is incident on a patterning device (e.g., a mask) MA held on a support structure (e.g., a mask stage) MT and is patterned by the patterning device MA. After reflection from the patterning device (e.g., a mask) MA, the radiation beam B passes through a projection system PS, which focuses the radiation beam B onto a target portion C of a substrate W. With the help of a second positioner PW and a position sensor PS2 (e.g., an interferometer, a linear encoder, or a capacitive sensor), the substrate table WT can be precisely moved, for example, to position a different target portion C in the path of the radiation beam B. Similarly, a first positioner PM and a further position sensor PS1 can be used to precisely position the patterning device (e.g., a mask) MA relative to the path of the radiation beam B. The patterning device (e.g., a mask) MA and the substrate W can be aligned using mask alignment marks M1, M2 and substrate alignment marks P1, P2.

[0071] The controller 500 controls the overall operation of the lithographic apparatus 100, and in particular performs the operation process further described below. The controller 500 can be embodied as a properly programmed general-purpose computer, which includes a central processing unit, volatile and non-volatile storage components, one or more input and output devices (such as a keyboard and screen), one or more network connections, and one or more interfaces to various parts of the lithographic apparatus 100. It should be understood that a one-to-one relationship between the control computer and the lithographic apparatus 100 is not required. In one embodiment of the present invention, one computer can control multiple lithographic apparatuses 100. In one embodiment of the present invention, multiple networked computers can be used to control one lithographic apparatus 100. The controller 500 can also be configured to control one or more related processing equipment and substrate processing equipment in a lithographic unit or cluster of which the lithographic apparatus 100 forms a part. The controller 500 can also be configured to be subordinate to the monitoring system of the lithographic unit or cluster and / or the overall control system of the wafer factory.

[0072] Figure 2The lithographic apparatus 100 including a source collector module SO, an illumination system IL and a projection system PS is shown in more detail. The EUV radiation emitting plasma 210 may be formed by a plasma source. The EUV radiation may be generated by a gas or vapor, such as Xe gas, Li vapor or Sn vapor, in which the radiation emitting plasma 210 is generated to emit radiation in the EUV range of the electromagnetic spectrum. In one embodiment, a plasma that excites tin (Sn) is provided to generate EUV radiation.

[0073] Radiation emitted by radiation emitting plasma 210 passes from source chamber 211 into collector chamber 212 .

[0074] The collector chamber 212 may include a radiation collector CO. Radiation passing through the radiation collector CO may be focused in a virtual source point IF. The virtual source point IF is often referred to as an intermediate focus, and the source collector module SO is arranged such that the virtual source point IF is located at or near an opening 221 in the enclosed structure 220. The virtual source point IF is an image of the radiation emitting plasma 210.

[0075] The radiation then passes through an illumination system IL which may include a faceted field mirror device 22 and a faceted pupil mirror device 24 which are arranged to provide a desired angular distribution of the unpatterned beam 21 at the patterning device MA, and a desired uniformity of radiation intensity at the patterning device MA. After reflection of the unpatterned beam 20 at the patterning device MA held by the support structure MT, a patterned beam 26 is formed and the patterned beam 26 is imaged by the projection system PS via reflective elements 28, 30 onto a substrate W held by a substrate table WT.

[0076] There may typically be more elements in the illumination system IL and the projection system PS than shown. Furthermore, there may be more mirrors than shown, for example, there may be more than 10 projection systems PS. Figure 2 More than 1-6 reflective elements are shown.

[0077] Alternatively, the source collector module SO may be part of a LPP radiation system.

[0078] like Figure 1 As depicted, in one embodiment, the lithographic apparatus 100 comprises an illumination system IL and a projection system PS. The illumination system IL is configured to emit a radiation beam B. The projection system PS is separated from the substrate table WT by an intermediate space. The projection system PS is configured to project a pattern imparted to the radiation beam B onto the substrate W. The pattern is for EUV radiation of the radiation beam B.

[0079] The space between the projection system PS and the substrate table WT may be at least partly evacuated.The intervening space may be bounded by a solid surface at the location of the projection system PS, from which the employed radiation is directed towards the substrate table WT.

[0080] Figure 3 A schematic diagram of a pattern forming device MA clamped to a support structure MT is depicted. As described above, the support structure MT may use mechanical, vacuum, electrostatic or other clamping techniques to secure the pattern forming device MA. The support structure MT may include a plurality of burls (conical protrusions) on a support surface 42 of the support structure MT that faces a non-pattern forming surface 41 of the pattern forming device MA. When the pattern forming device MA is clamped to the support structure MT, the non-pattern forming surface 41 contacts the distal ends of the plurality of burls. Each of the plurality of burls does not necessarily have to contact the non-pattern forming surface 41. The burls are arranged in a manner that allows the pattern forming device MA to be fixed to the support structure MT. Figure 3 Not shown in FIG.

[0081] Both the patterning device MA and the support structure MT may be housed within a patterning device environment 90. The patterning device environment 90 may be isolated from the external environment surrounding the lithographic apparatus 100 and / or other components within the lithographic apparatus such that gases and contaminant particles P are substantially prevented from entering the patterning device environment 90.

[0082] The patterning device environment 90 can be partially evacuated of gas. That is, the pressure within the patterning device environment 90 can be less than the ambient pressure. This is to limit the attenuation of EUV radiation as it passes through the patterning device environment 90. Even though the pressure within the patterning device 90 is less than the ambient pressure, it is not a perfect vacuum, and therefore gas particles are present in the patterning device environment 90.

[0083] Contaminant particles P may also be present in the patterning device environment 90. Although the patterning device environment 90 is isolated from the external environment and / or other components within the lithographic apparatus, some contaminant particles P may enter the patterning device environment 90 from these locations. In addition, contaminant particles P may be generated within the patterning device environment 90 by mechanisms such as abrasive wear, which occurs when there is relative motion between contacting surfaces.

[0084] In EUV lithography, the unpatterned beam 21 is incident on the patterning surface 40 of the patterning device MA. This causes electrons to be released from the patterning surface 40 by the photoelectric effect.

[0085] The patterning surface 40 can be electrically isolated or electrically floating. Therefore, the patterning surface 40 is positively charged. The patterning surface 40 can be conductive. For example, the patterning surface can be at least partially formed by metal. For example, the patterning surface can be at least partially formed by ruthenium.

[0086] EUV radiation within the patterning device environment 90 also causes the contaminant particles P to be negatively charged. This is the result of at least two main mechanisms. The first mechanism is the result of the formation of a plasma by gas molecules within the patterning device environment 90 excited by EUV radiation. Free electrons within the plasma may be absorbed by the contaminant particles P, causing these particles to become negatively charged. The second mechanism is the result of the photoelectric effect, which causes the patterning surface 40 to be positively charged. Specifically, electrons emitted from the patterning surface 40 due to the photoelectric effect may be absorbed by the contaminant particles P, causing them to become negatively charged.

[0087] Since the pattern forming surface 40 is positively charged and the contaminant particles P are negatively charged, an attractive electrostatic force is applied between the pattern forming surface 40 and the contaminant particles P. This accelerates the contaminant particles P toward the pattern forming surface 40. Therefore, the contaminant particles within the lithographic apparatus are likely to be deposited on the pattern forming surface 40.

[0088] In an EUV lithography system, EUV radiation is usually generated in pulses. That is, there are periods when EUV radiation is generated and periods when EUV radiation is not generated. In the period when EUV pulses are not generated, the pattern forming surface 40 can be discharged, that is, the size of the positive charge on the pattern forming surface 40 can be reduced. This can make the pattern forming surface 40 become approximately neutral. The discharge of the pattern forming surface 40 can be caused by the plasma formed by the gas particles excited by EUV radiation in the pattern forming device environment 90. Specifically, the electrons in the plasma can be attracted to the pattern forming surface 40, where they are absorbed by the positive ions on the pattern forming surface 40. EUV radiation pulses are usually generated at a fast frequency. For example, the frequency can be about 50kHz, about 60kHz, or about 100kHz. This means that during the EUV lithography process, the pattern forming surface 40 can cycle between positively charged and approximately neutral at a high frequency.

[0089] In order to prevent the contaminant particles P from accelerating toward the pattern forming surface 40 due to electrostatic attraction, a voltage bias system can be used, in which a bias voltage is applied to the pattern forming surface 40 of the pattern forming device. The bias voltage can be negative. That is, a bias voltage can be applied to the pattern forming surface 40 so that the pattern forming surface 40 is negatively charged, which means that the negatively charged contaminant particles P in the pattern forming device environment 90 are excluded from the pattern forming surface 40. The magnitude of the voltage applied to the pattern forming surface 40 can be greater than 0.5V, and preferably greater than 1V. This is because a voltage of this magnitude may be required to ensure that the distance between the pattern forming surface 40 and the contaminant particles P increases over time. The magnitude of the voltage applied to the pattern forming surface 40 can also be less than 10V, preferably less than 5V, and further preferably less than 3V. Voltages exceeding these values ​​may cause excessive current to be drawn through the pattern forming surface 40. This can cause the pattern forming surface 40 to heat up and deform, which can reduce the quality of the pattern projected from the pattern forming surface 40 to the substrate W.

[0090] In this application, the terms "voltage" and "bias voltage" may also be referred to as "potential" or "bias potential". The voltage may be relative to ground. The voltage may be relative to a local ground, such as a ground frame of a lithographic apparatus. For example, if a negative bias voltage is applied to a surface, this may mean that the potential of the surface is negative relative to the ground frame of the lithographic apparatus.

[0091] Figure 4A and Figure 4B The voltage of the patterning surface 40 is depicted as a function of time. Figure 4A The voltage of the patterning surface 40 in the EUV lithography process is shown, wherein the patterning surface 40 has no voltage bias. Figure 4B The voltage of the patterning surface 40 is shown, wherein the patterning surface 40 is applied with a voltage bias. Figure 4B The figures in are not directly related to the specific method used to apply the bias voltage to the pattern forming surface 40.

[0092] Figure 5A and Figure 5B The displacement of the contaminant particle P relative to the patterning surface 40 is depicted as a function of time. Figure 5A The displacement of contaminant particles P in the EUV lithography process without voltage bias on the patterning surface is shown. Figure 5B The displacement of a contaminant particle P is shown with the application of a patterning surface voltage bias. Figure 5B The figures in are not directly related to the specific method used to apply the bias voltage to the pattern forming surface 40. Figure 4A The diagram shown is based on the situation corresponding to Figure 5A The situation on which the diagram shown is based, and Figure 4B The diagram shown is based on the situation corresponding to Figure 5B The diagram shown is based on the situation. Figure 4B and Figure 5B , the bias voltage applied to the pattern forming surface 40 is a constant bias voltage of approximately -1V.

[0093] Figure 4A 1 shows that, without applying a bias voltage, the voltage of the patterning surface 40 starts at about 0 V. At t=t1, an EUV radiation pulse is generated by the lithography apparatus 100, which causes the voltage of the patterning surface 40 to increase rapidly, reaching a maximum value when the EUV radiation pulse terminates. Thereafter, the voltage of the patterning surface 40 decreases as the patterning surface discharges, reaching about 0 V at t=t2. The process is repeated when the next EUV radiation pulse is generated at t=t3.

[0094] exist Figure 5A In the embodiment of the present invention, the contaminant particle P is initially stationary in a direction perpendicular to the surface 40. When an EUV radiation pulse is initiated (t=t1), the contaminant particle P begins to accelerate toward the patterning surface 40. As the patterning surface 40 discharges, the magnitude of this acceleration decreases. After the charge of the patterning surface 40 is restored to approximately 0 V (t=t2), the contaminant particle P no longer accelerates toward the patterning surface 40, but continues to travel toward the patterning surface 40 at a constant speed. When a second EUV radiation pulse is initiated (at t=t3), the contaminant particle P begins to accelerate toward the patterning surface 40 again. Before the next EUV radiation pulse is generated, the displacement between the contaminant particle P and the patterning surface 40 becomes zero, that is, the contaminant particle 40 is deposited into the patterning surface 40.

[0095] Figure 4A and Figure 5A Only two EUV radiation pulses are depicted. After these two pulses, the contaminant particle P is deposited onto the patterning surface 40. In practice, more EUV radiation pulses may be required to sufficiently accelerate the contaminant particle P so that it travels the distance between its initial position and the patterning surface 40. However, due to the high frequency of EUV radiation pulses in a typical lithography apparatus, even if the acceleration of the contaminant particle P toward the patterning surface 40 is relatively low, the effect of the EUV radiation on the particle path varies greatly over time.

[0096] exist Figure 4B In the embodiment, the bias voltage applied to the patterning surface 40 is -1 V. Therefore, before the initiation of the first EUV radiation pulse, the voltage of the patterning surface 40 is about -1 V. When the EUV radiation pulse is initiated (t=t1), the voltage of the patterning surface 40 increases as in the case where no bias voltage is applied. Figure 4B, which causes the voltage of the patterning surface 40 to become greater than 0V (i.e., the patterning surface 40 is positively charged). However, this is not necessarily the case, and the magnitude of the negative bias voltage applied to the patterning surface 40 may be sufficient to keep the voltage of the patterning surface 40 below 0V (i.e., keep the patterning surface 40 negatively charged) for the duration of each EUV radiation pulse. The voltage of the patterning surface 40 reaches a maximum value at the end of the EUV radiation pulse. After the EUV radiation pulse, the patterning surface 40 is discharged so that the voltage of the patterning surface 40 becomes the same as the bias voltage applied to the patterning surface (at t=t2). As in the case where no bias voltage is applied to the patterning surface 40, the discharge is caused by the plasma within the patterning device environment 90. However, the discharge is also caused by the application of a negative bias voltage. As a result, the discharge rate of the patterning surface 40 is faster. Therefore, the length of time t1 to t2 (and t3 to t4) when a negative bias voltage is applied to the patterning surface 40 is less than the length of time when a negative bias voltage is not applied to the patterning surface.

[0097] exist Figure 5B , which depicts the change in the position of a contaminant particle P relative to the patterning surface 40 over time when a bias voltage is applied to the patterning surface 40. The contaminant particle P is initially stationary in a direction perpendicular to the patterning surface 40. At this time, the voltage of the patterning surface 40 is about -1V, which means that the contaminant particle P is repelled by the patterning surface 40 and is accelerated away from the patterning surface 40. When the EUV radiation pulse is initiated (at t=t1) and the voltage of the patterning surface 40 becomes positive, the particle is accelerated toward the patterning surface 40. Figure 5B In the case of the EUV radiation pulse, this causes the direction of travel of the contaminant particle P to be reversed and the particle briefly travels toward the patterning surface 40. However, this may not be the case, and the acceleration of the contaminant particle P toward the patterning surface 40 may simply cause the contaminant particle P to continue to travel away from the patterning surface 40, but at a gradually decreasing speed. In the case where the EUV radiation pulse does not cause the voltage of the patterning surface 40 to become positive, the contaminant particle will not be accelerated toward the patterning surface 40 at all. In this case, the contaminant particle P will continue to accelerate away from the patterning surface 40, but the magnitude of this acceleration will be temporarily reduced.

[0098] Back to Figure 5B In the scenario shown, as the EUV radiation pulse ends and the voltage of the patterning surface 40 becomes negative, the contaminant particle P is again accelerated away from the patterning surface 40. When a second EUV radiation pulse is initiated, the process repeats.

[0099] The time for which the pollutant particle 40 is accelerated toward the pattern forming surface 40 may be small enough so that the distance between the pollutant particle P and the pattern forming surface 40 increases with time. Therefore, the pollutant particle P is not deposited on the pattern forming surface 40.

[0100] Implementation of a patterning device voltage bias system such as Figure 6 to Figure 1 8. The pattern forming device voltage bias system includes a pattern forming device MA and a voltage source 61. The pattern forming device voltage bias system is configured so that the voltage source 61 can apply a bias voltage to the pattern forming surface 40 of the pattern forming device MA. The bias voltage can be a negative bias voltage. The embodiments described below are intended to be examples, and the present invention is not limited to applying the bias voltage to the pattern forming surface by these exact methods.

[0101] First embodiment

[0102] Figures 6 to 8 A patterning device voltage bias system 10 is depicted, comprising a patterning device MA, a voltage source 61, and a conductive member 50 electrically connected to the voltage source 61. The conductive member 50 is configured to contact a patterning surface 40 of the patterning device MA during a photolithography process so that a negative bias voltage can be applied to the patterning surface 40.

[0103] In the following description, the vertical direction refers to the direction in which the pattern forming device MA is located below the support structure MT in the vertical direction when the pattern forming device MA is supported by the support structure MT. The vertical direction may also be referred to as the first direction. The terms "radially outward" and "radially inward" are used with respect to the center of the pattern forming device MA, wherein the radial direction is perpendicular to the vertical direction.

[0104] The patterning device voltage bias system 10 may be configured so that the system may be used in a non-contact arrangement ( Figure 6 ) and contact arrangement (see Figure 7 ). In the non-contact arrangement, the conductive member 50 is at a certain distance from the pattern forming surface 40 in the vertical direction. This can prevent the negative bias voltage from being applied to the pattern forming surface 40. In the contact arrangement, the conductive member 50 is in contact with the pattern forming surface 40, so that a negative voltage can be applied to the pattern forming surface 40. The contact arrangement and the non-contact arrangement are equivalent to the first arrangement and the second arrangement of the claims, respectively.

[0105] The conductive member 50 may be configured to contact an area of ​​the pattern forming surface 40 that is not important to the pattern projected from the pattern forming device MA. That is, the conductive member 50 may be configured to contact the pattern forming surface 40 in an area where doing so will not result in a change in the pattern projected from the pattern forming surface 40. For example, this may be an area on the pattern forming surface 40 where no pattern exists.

[0106] The pattern forming device voltage bias system 10 can be arranged so that when the system is changed from a non-contact arrangement to a contact arrangement and the conductive member 50 is in contact with the pattern forming surface 40. This can cause the conductive member 50 to exert a contact force on the pattern forming surface 40. The contact force can ensure that the electrical connection between the conductive member 50 and the pattern forming surface 40 is consistent, so that the bias voltage is reliably supplied to the pattern forming surface 40 via the conductive member 50.

[0107] The conductive member 50 may be a flexible member. That is, the conductive member 50 may be elastically deformable. Figures 6 to 8 In the example shown, the conductive member 50 is a leaf spring. However, this is not necessary, and other types of conductive members 50 can also be successfully implemented. The exact material of the conductive member 50 is not particularly limited. However, the material should be conductive and capable of a certain degree of elastic deformation. In addition, the material should not generate contaminant particles when deformed.

[0108] The conductive member 50 may be disposed within the patterning device voltage bias system 10 such that a portion of the conductive member 50 is located below the patterning device MA. That is, the patterning device MA and the conductive member may overlap in a radial direction.

[0109] The conductive member 50 may be supported at the first end 52. Figure 6 In the example shown, the first end 52 of the conductive member 50 is supported by a conductive member support 53. The conductive member support 53 can fix the position of the first end 52 of the conductive member 50 relative to other components (such as the support structure MT) in the pattern forming device voltage bias system. The second end 51 located at the opposite end of the first end 152 can be configured to contact the pattern forming surface 40. The first end 52 of the conductive member 50 is located radially outside the second end 51 of the conductive member 50. The conductive member support 53 and the first end 52 of the conductive member 50 can be located radially outside the edge of the pattern forming device MA. The second end 51 of the conductive member 50 can be arranged radially inside the pattern forming device MA.

[0110] The second end 51 of the conductive member 50 may include a contact region to improve the consistency of the electrical connection between the conductive member 50 and the pattern forming surface 40. The contact region may be in the form of a chamfered protrusion. Like the conductive member 50, the contact region may also be formed of a conductive material. The contact region may be formed of the same material as the conductive member 50.

[0111] The conductive member actuator 54 may be attached to the conductive member 50 between the first end 52 and the second end 51. That is, the conductive member actuator 54 may be attached to the conductive member 50 at a position radially outside the second end 51 of the conductive member 50 and radially inside the first end 51 of the conductive member 50.

[0112] The conductive member actuator 54 may be configured to move in the vertical direction. That is, the conductive member actuator 54 may be configured to move a portion of the conductive member 50 in the vertical direction, at which portion the conductive member actuator 54 is attached to the conductive member 50. In doing so, the conductive member actuator 54 may rotate the conductive member 50 around the first end 52.

[0113] In the non-contact arrangement, the conductive member 50 can be in a non-contact position, and in the contact arrangement, the conductive member 50 can be in a contact position. The non-contact position and the contact position correspond to the first position and the second position of the claim, respectively. In order to move the conductive member 50 from the non-contact position to the contact position, the conductive member actuator 54 can be moved vertically upward to rotate the conductive member 50. Figures 6 to 8 In the schematic diagram shown, this rotation is in a counter-clockwise direction.

[0114] The pattern forming device voltage bias system 10 can be configured so that when the conductive member 50 rotates from the non-contact position to the non-contact position, the second end 51 does not slide along the pattern forming surface 40. As described above, the sliding motion causes abrasive wear, which can lead to the generation of contaminant particles. To ensure that the second end 51 does not slide along the pattern forming surface 40 during the rotation of the conductive member, the pattern forming device voltage bias system 10 can be configured so that the axis about which the second end rotates is in the plane of the pattern forming surface 40.

[0115] The conductive member support 53 may support the conductive member 50 so that the first end 52 of the conductive member 50 cannot rotate relative to the conductive member support 53. That is, the conductive member may be a cantilever. Allowing the first end 52 to rotate relative to the conductive member support 53 will result in relative movement between the conductive member 50 and the contact surface of the conductive member support 53. This sliding movement may cause abrasive wear, which may result in the generation of contaminant particles P. When the conductive member support 53 supports the conductive member 50 so that the first end 52 of the conductive member 50 cannot rotate relative to the conductive member support 53, the rotation of the conductive member 50 around the first end 52 may cause the conductive member 50 to deform. Preferably, this deformation is elastic deformation.

[0116] The displacement of the conductive member 50 between the non-contact position and the contact position can be relatively small. This is to avoid excessive deformation of the conductive member 50, which may cause the material to deteriorate due to fatigue. This may result in the generation of contaminant particles P in the pattern forming device environment 90, and ultimately lead to complete failure (i.e., fracture) of the conductive member 50. For example, the rotation angle of the conductive member around the first end may be less than 10 degrees, preferably less than 5 degrees, and preferably less than 1 degree. The rotation angle can be defined as the angle between a first line and a second line, the first line being the line connecting the first part 52 and the second part 51 when the conductive member 50 is in the non-contact position, and the second line being the line connecting the first part 52 and the second part 51 when the conductive member 50 is in the contact position.

[0117] At a certain point on the path of the conductive member 50 from the non-contact position to the contact position, the second end 51 of the conductive member 50 may contact the pattern forming surface 40. This prevents the second end 51 of the conductive member 50 from continuing to rotate in accordance with the upward movement of the conductive member actuator 54 and the continued rotation of the rest of the conductive member 50. Therefore, the second end 51 of the conductive member 50 exerts a force on the pattern forming surface 40. When the force deforms the conductive member from the non-contact position to the contact position, the direction of the force is opposite to the direction of movement of the actuator. Figures 6 to 8 In the illustrated patterning device voltage bias system 10, this is in the vertically upward direction. As described above, this force ensures that the conductive member 50 and the patterning surface 40 remain in stable contact throughout the photolithography process, which ensures that the bias voltage is always applied to the patterning surface 40.

[0118] The above-described steps, in which the pattern forming device voltage bias system 10 is transformed from a non-contact arrangement to a contact arrangement, may be referred to as a contact step. The contact step may be part of a larger pattern forming device MA installation process. Such a pattern forming device installation process may involve moving the pattern forming device MA into position relative to the support structure MT; engaging the pattern forming device clamping mechanism (i.e., a clamping step); and moving the support structure MT and the pattern forming device MA into position within the pattern forming device environment. After the support structure MT and the pattern forming device MA are moved into position, the pattern forming device voltage bias system 10 may be transformed from a non-contact arrangement to a contact arrangement. After the pattern forming device voltage bias system 10 reaches a contact arrangement, a bias voltage may be applied to the pattern forming surface 40. Providing a bias voltage from a voltage source 61 to the pattern forming surface 40 may be performed in a voltage bias step.

[0119] In the transition of the patterning device voltage bias system 10 from a non-contact arrangement to a contact arrangement, components within the patterning device environment 90 should not slide relative to each other. This is because sliding may cause abrasive wear, which may result in the generation of contaminant particles in the patterning device environment.

[0120] The conductive member 50 may be connected to a voltage source 61 via a conductive member support 53, such as Figures 6 to 8 However, this is not essential, and a separate member (eg, wiring) may be provided to the conductive member 50 so that the conductive member 50 is not connected to the voltage source 61 via the conductive member support 53 .

[0121] Between the conductive member 50 and the voltage source 61, there may be at least one of a resistor 62, an inductor, a diode, and a switch. Further details of these components are given below.

[0122] The above embodiments may further include a landing portion 57 that may support the patterning device MA in the event of a failure of the support structure MT. Failure of the support structure MT may involve, for example, a loss of power to the support structure MT, resulting in a loss of attractive force between the support structure MT and the non-patterning surface 41 of the patterning device MA. Without such attractive force, the patterning device MA may move downward, away from the patterning device fixture MT.

[0123] If the patterning device MA is allowed to move downward unhindered, it may come into contact with other components within the lithography system, such as other optical elements (e.g., mirrors 22, 24, 28). This will cause damage to the other optical elements as well as the patterning device MA itself. Figures 6 to 8 In the embodiment shown, this is prevented by the conductive member 50 and the landing portion 57 .

[0124] If the support structure MT fails when the pattern forming device voltage bias system 10 is in a non-contact arrangement, the pattern forming device MA can move freely downward until the pattern forming surface 40 contacts the conductive member 50. If the support structure MT fails when the pattern forming device voltage bias system 10 is in a contact arrangement, the pattern forming surface 40 has already contacted the conductive member 50. After the conductive member 50 and the pattern forming surface 40 contact, the conductive member 50 must be deformed in order for the pattern forming device MA to continue to move downward. Figures 6 to 8 As shown, the pattern forming device voltage bias system 10 is deformed so that the second end 51 of the conductive member 50 moves downward and the conductive member 50 rotates in a clockwise direction. This deformation means that a force is applied to the pattern forming surface 40 in a direction opposite to the deformation of the conductive member 50. That is, the conductive member 50 exerts an upward force on the pattern forming surface 40. The direction of this force is opposite to the direction of movement of the pattern forming device MA.

[0125] As the patterning device MA continues to move downwards, the deformation of the conductive member 50 increases, which increases the upward force exerted by the conductive member 50 on the patterning surface 40. This may cause the patterning device MA to slow down.

[0126] At some point, the conductive member 50 may be deformed to the extent of contacting the landing portion 57. The surface of the landing portion 57 may be approximately parallel to the patterning surface 40. The landing portion 57 may be disposed within the patterning device voltage bias system 10 such that when the patterning device MA is supported by the support structure MT, the landing portion 57 is located below the patterning surface 40. The patterning device MA and the landing portion 57 may overlap in the radial direction, and a radially outer portion of the patterning device MA may be directly below a radially inner portion of the landing portion 57. The landing portion 57 may be supported by a landing portion frame 56.

[0127] Figure 8 A pattern forming device voltage bias system 10 is shown, wherein the conductive member 50 has contacted the landing portion 57. This can be considered as a landing arrangement of the pattern forming device voltage bias system 10, wherein the conductive member 50 is in a landing position. The landing position is equivalent to the third position defined in the claims. In this position, the second end 51 of the conductive member 50 is prevented from further deformation by the landing portion 57. This means that the pattern forming device MA stops. That is, the conductive member 50 prevents the pattern forming device from moving further downward, and the landing portion 57 prevents the conductive member from moving further downward. This series of events can be referred to as a landing step. By preventing the pattern forming device MA from moving further downward, damage to elements such as the optical elements 22, 24, 28 that may be located below the pattern forming device MA is prevented.

[0128] Since the pattern forming device MA is gradually decelerated by the conductive member 50, a hard landing (in which the pattern forming device MA is almost instantly stopped by directly colliding with the landing portion 57) is avoided. This means that in the event of a failure of the support structure MT, the pattern forming device MA is less likely to be damaged. In addition, this function is provided by the same component (conductive member 50) that facilitates the application of a bias voltage to the pattern forming surface 40 of the pattern forming device MA. That is, a single component (conductive member 50) in the pattern forming device voltage bias system 10 allows the bias voltage to be applied to the pattern forming surface 40, and ensures a soft landing of the pattern forming device MA onto the landing portion 57 in the event of a failure of the support structure MT.

[0129] This mechanism of providing the patterning device MA with a soft landing on the landing portion 57 by the conductive member 50 in the event of a failure of the support structure MT is not limited to being implemented in the exact embodiments described above. For example, the mechanism can be implemented in the case where the conductive member 50 is not conductive and is not configured to apply a bias voltage to the patterning surface 40. That is, the patterning device support system can include a landing portion and a deformable member configured in the same manner as the landing portion 57 and conductive member 50 described above, but where the deformable member is not part of the patterning device voltage bias system.

[0130] Figures 6 to 8 A single landing portion 57 is depicted. However, there may be multiple landing portions 57 evenly distributed around the patterning device MA so that in the event of a failure of the support structure MT, the patterning device 57 can be supported on all sides. There may be a conductive member 50 corresponding to each landing portion 57. This ensures that the landing of the patterning device MA on the landing portion 57 is soft over the entire circumference of the patterning device MA.

[0131] When a plurality of conductive members 50 are provided in the pattern forming device voltage bias system 10, the current flowing through the pattern forming surface 40 can be distributed among the plurality of conductive members 50. Therefore, the magnitude of the current at any point on the pattern forming surface 40 is reduced. This is beneficial because the current flowing through the pattern forming surface 40 causes the pattern forming surface 40 to heat up. This can cause deformation of the pattern forming surface 40, which can reduce the quality of the pattern projected from the pattern forming surface 40 to the substrate W.

[0132] The number of landing portions 57 and conductive members 50 may not be exactly the same. For example, the number of conductive members 50 may be greater than the number of landing portions 57, or the number of landing portions 57 may be greater than the number of conductive members 50. For example, there may be four landing portions 57 (distributed circumferentially around the pattern forming device MA, each landing portion spaced 90 degrees apart), but only one conductive member 50.

[0133] Second embodiment

[0134] Fig. 9 An alternative pattern forming device voltage bias system 11 is depicted in . As in the previous embodiment, the pattern forming device voltage bias system 11 includes a pattern forming device MA having a pattern forming surface 40 and a voltage source 61. The pattern forming device voltage bias system also includes a support structure MT, which includes a plurality of protrusions 70 (e.g., conical protrusions) on a support surface 42 of the support structure MT, which faces a non-pattern forming surface 41 of the pattern forming device MA. When the pattern forming device MA is clamped to the support structure MT, the non-pattern forming surface 41 contacts the distal ends of the plurality of protrusions 70. Each of the plurality of protrusions does not necessarily contact the non-pattern forming surface 41. Typically, the distal ends of one or more of the plurality of protrusions 70 may contact the non-pattern forming surface 41 of the pattern forming device MA. The non-pattern forming surface 41 may be referred to as the back side of the pattern forming device MA.

[0135] The non-pattern forming surface 41 may be electrically conductive. For example, the patterning device MA may comprise an electrically conductive coating forming the non-pattern forming surface 41. The electrically conductive coating may be provided to allow the patterning device MA to be clamped to the support structure MT, which may be an electrostatic clamp.

[0136] The patterning device voltage bias system 11 can be configured such that the non-patterning surface 41 can be electrically connected to the voltage source 61 via the plurality of burls 70. The electrical connection between the voltage source 61 and the plurality of burls 70 can include the support surface 42 of the support structure MT being electrically connected to the voltage source 61, the plurality of burls 70 being electrically connected to the support surface 42 of the support structure MT, and the plurality of burls 70 being electrically connected to the non-patterning surface 41 of the patterning device MA. Not every burl in the plurality of burls is necessarily electrically connected to the non-patterning surface 41. Typically, one or more burls in the plurality of burls 70 can be electrically connected to the non-patterning surface 41.

[0137] Furthermore, the patterned surface 40 and the non-patterned surface 41 are electrically connected. The electrical connection between the patterned surface 40 and the non-patterned surface 41 may be via a path integrated with the patterning device MA itself. Alternatively, the electrical connection between the patterned surface 40 and the non-patterned surface 41 may be via an external path, such as an electrical wire, such as Fig. 9 shown.

[0138] With the configuration described above, a bias voltage can be applied to the pattern forming surface 40 via the supporting surface 42 of the support structure MT, one or more of the plurality of protrusions 70, the non-pattern forming surface 41 of the pattern forming device MA, and an electrical connection between the non-pattern forming surface 41 and the pattern forming surface 40.

[0139] Between the voltage source 61 and the plurality of burls 70, there may be at least one of a resistor 62, an inductor, a diode, and a switch. Additionally or alternatively, there may be at least one of a resistor 63, an inductor, a diode, and a switch between the non-patterned surface and the patterned surface. More details of these components are given below.

[0140] The patterning surface 40 and the non-patterning surface 41 may not be electrically connected to each other. The patterning surface 40 may be electrically isolated or electrically floating. In this embodiment, a bias voltage may be capacitively applied to the patterning surface 40. In order to capacitively sense the bias voltage on the patterning surface 40, a voltage may be applied to the non-patterning surface 41 (i.e., the back side of the patterning device MA) via the support surface 42 of the support structure MT and one or more of the protuberances 70 as described above. When a voltage is applied to the non-patterning surface 41, an electric field may be established between the non-patterning surface 41 and a grounding component in the lithographic apparatus. The grounding component may include a masking blade (not shown). The masking blade may be disposed adjacent to the patterning surface 40 of the patterning device MA in the lithographic apparatus. For example, a masking blade may be disposed so that it is displaced from the patterning surface 40 in the z direction. The masking blade may be configured to selectively shield the patterning device MA during exposure to protect it from the irradiation of the EUV radiation beam. The patterning surface 40 may be located in an electric field. Therefore, when a voltage is applied to the non-pattern forming surface 41 , a bias voltage may be capacitively induced in the pattern forming surface 40 .

[0141] Grounding the patterning device

[0142] The pattern forming device voltage bias system 11 can be configured so that the non-patterning surface 41 can be electrically connected to the ground 67 via one or more of the plurality of burls 70. In this case, the "ground" refers to a charge absorber that is capable of absorbing a very large amount of charge relative to the amount of charge that can accumulate on the pattern forming device MA during operation of the lithographic apparatus. The exact configuration of the ground is not particularly limited. In some embodiments, the ground can be provided by a power supply 61, which is used to provide a bias voltage to the pattern forming surface 41 of the pattern forming device MA.

[0143] Fig.10An example of a patterning device voltage bias system 11 is depicted in FIG. 1 , in which the non-patterning surface 41 can be electrically connected to ground 67 via one or more of a plurality of burls 70. When the non-patterning surface 41 is electrically connected to ground 67 via one or more of a plurality of burls 70, the patterning device MA can be discharged (i.e., the non-patterning surface 41 and / or the patterning surface 40 can be discharged).

[0144] exist Fig.10 In the illustrated pattern forming device voltage bias system 11, the non-pattern forming surface 41 can be connected to the power supply 61 and the ground 67 via a plurality of burls 70. The pattern forming device voltage bias system 11 in which the non-pattern forming surface 41 can be connected to the power supply 61 and the ground 67 via a plurality of burls 70 can include a mode change switch 65. The mode change switch 65 can be operated as a bidirectional switch. That is, the mode change switch can be configured so that at any given time, the non-pattern forming surface 41 is either (i) connected to the power supply 61 via one or more burls in the plurality of burls 70, or (ii) connected to the ground 67 via one or more burls in the plurality of burls 70. The pattern forming device voltage bias system 11 can be configured so that when the lithography apparatus performs an exposure operation, the non-pattern forming surface 41 is connected to the power supply 61 via the plurality of burls 70, and so that during loading and unloading, the non-pattern forming surface 41 is connected to the ground 67 via the plurality of burls 70.

[0145] Capacitance may exist between the above components. In particular, the capacitance between the support surface 42 of the pattern forming device holder MT and the non-patterning surface 41 of the pattern forming device MA can be considered as a variable capacitance, which varies as a function of the gap between the support surface 42 of the pattern forming device holder MT and the non-patterning surface 41 of the pattern forming device MA.

[0146] In a closed system, no charge can enter or leave the system, and for a given initial charge state, any change in the spacing between patterning device MT and patterning device MA will result in a change in the corresponding variable capacitance. In addition, this change in capacitance will also cause the potential across the capacitance to change, possibly significantly, depending on the change in spacing. In particular, for each capacitance, the relationship Q=CV must always hold (assuming no charge injection). Therefore, if the capacitance C changes, and the amount of charge Q contained in this capacitance remains constant, the potential V must be inversely proportional to the changed capacitance C. This may result in significant potential amplification.

[0147] As described above, charge may accumulate at isolated surfaces of the patterning device MA (e.g., the patterning surface 40 and the non-patterning surface 41). After the clamped patterning device MA is released from the patterning device holder MT, residual charge remains on it. The residual charge that may exist on the patterning device before the patterning device is released from the patterning device support MT may be a negative static charge on the non-patterning surface 41. This negative static charge may be caused by the negative free charges within the plasma being attracted to the non-patterning surface 41.

[0148] When the unclamped pattern forming device MA moves away from the support surface 42, the increased spacing between the support surface 42 and the non-pattern forming surface 41 causes a decrease in capacitance and an amplification of the potential. That is, given the proportional relationship between charge and potential in a closed system (i.e., Q=CV), when the capacitance changes (inversely proportional to the spacing between the parallel plates), any decrease in capacitance will cause a proportional increase in potential. Therefore, when the pattern forming device MA and the pattern forming device support MT are separated, the potential of the pattern forming device MA may rise enough to cause electrical breakdown of hydrogen. This discharge may cause damage to the pattern forming device MA, the pattern forming device holder MT and / or particle generation, resulting in subsequent defects. Therefore, it is preferred that the residual charge on the pattern forming device MA is small or non-existent before the pattern forming device MA is unloaded from the pattern forming device support MT. Similarly, it is preferred that the residual charge on the pattern forming device MA is small or non-existent before the pattern forming device MA is loaded onto the pattern forming device support MT.

[0149] Current techniques for discharging the pattern forming device MA before or during unloading may involve generating EUV radiation when the pattern forming device MA is unloaded. As described above, the presence of EUV radiation results in the presence of plasma in the surrounding environment of the pattern forming device MA. As the spacing between the pattern forming device MA and the pattern forming device support MT increases, the positive ions in the plasma are able to travel to the non-patterning surface 41, thereby discharging it. However, when the spacing is small, the positive ions cannot reach the non-patterning surface 41. By the time the spacing between the pattern forming device support MT and the non-patterning surface 41 during the unloading process is sufficient to enable the positive ions in the plasma to reach the non-patterning surface, the potential of the pattern forming device MA may have increased significantly (e.g., to several hundred V).

[0150] Another technique for reducing the risk of discharge during unloading may involve setting the potential of the electrode in the pattern forming device support MT so that its average potential during exposure is negative. In doing so, a negative potential may be capacitively induced in the non-patterning surface 41. This negative potential may repel electrons within the plasma during exposure, thereby reducing the extent of negative charge accumulation on the non-patterning surface during exposure. However, the optimal potential to be induced in the non-patterning surface 41 may vary, and this technique may not completely prevent the accumulation of negative charge on the non-patterning surface 41 in the time before unloading. That is, this technique may not completely solve the problem of electrostatic discharge during unloading of the pattern forming device MA.

[0151] like Fig.10 As described, by connecting the non-patterned surface 41 to the ground 67 via the plurality of burls 70, the non-patterned surface 41 can be effectively discharged before loading and unloading. Therefore, the risk of electrostatic discharge can be reduced.

[0152] In About Fig.10 In the described configuration, the structure of the mode change switch 65 is not particularly limited. The mode change switch 65 may include an electrical or mechanical switching component. The switching of the mode change switch 65 may be controlled by a computer program.

[0153] like Fig.10 As shown, the mode change switch 65 is a bidirectional switch that is implemented so that a bias voltage can be applied to the patterning device MA or the patterning device MA can be connected to ground. However, this is not required, and a bias voltage can be applied to both the patterning surface 40 and the patterning device connected to ground. For more details on how to achieve this, see the "Configuration of the Bulge" section below.

[0154] When the bias voltage can be applied to the pattern forming surface 40 and the pattern forming device connected to the ground at the same time, a voltage source switch can be provided between the pattern forming device MA and the voltage source 61, and a separate ground switch can be provided between the pattern forming device MA and the ground 67. However, it may not be necessary to provide a voltage source switch between the pattern forming device and the voltage source 61, and it may not be necessary to provide a ground switch between the pattern forming device MA and the ground 67.

[0155] The current limiting component 66 can be arranged in the connection between the plurality of burls 70 and the ground 67. The current limiting component 66 can be arranged between the mode change switch 65 and the ground 67. The current limiting component 66 can ensure that when the pattern forming device MA is discharged to the ground, the current in the pattern forming device MA (for example, in the non-pattern forming surface) is not too large. The presence of excessive current in the pattern forming device MA (for example, in the non-pattern forming surface 41) may cause damage to the pattern forming device MA. The current limiting component 66 can be configured so that when the pattern forming device MA is discharged to the ground, the current does not exceed 1000mA, preferably does not exceed 500mA, and more preferably does not exceed 100mA.

[0156] While it may be preferred to limit the current in the pattern forming device MA during discharge to ensure that the pattern forming device MA is not damaged, it may also be preferred to ensure that the discharge occurs quickly enough so that the unloading process is not delayed. For example, the discharge time of the pattern forming device MA is preferably less than 1 second, preferably less than 0.5 seconds, and further preferably less than 0.1 seconds.

[0157] The current limiting component 66 may include a resistor. The resistance (R2) of the resistor may be large enough to ensure that the current in the pattern forming device MA during the discharge does not damage the pattern forming device MA. In addition, the resistance (R2) of the resistor may be small enough to ensure that the time taken for the pattern forming device MA to discharge does not cause a delay in the unloading process. For example, the resistance (R2) may be greater than 1Ω, preferably greater than 10Ω, and further preferably greater than 200Ω. Desirably, the resistance may be less than 10kΩ, preferably less than 1kΩ, and further preferably less than 400Ω. If more than one resistor 66 is provided between the pattern forming surface 40 and the ground 67, the above resistance value may be applicable to the combined resistance (i.e., effective resistance) of the resistor combination. That is, the above resistance value may be applicable to the total resistance between the pattern forming surface 40 and the ground.

[0158] Alternatively or additionally, the current limiting component may include an inductor having an inductance. Where an inductor is provided, the inductance of the inductor may be greater than 1 μH, preferably greater than 1 mH, and further preferably greater than 5 mH. The inductance of the inductor may be less than 100 mH, preferably less than 50 mH, and further preferably less than 10 mH. For example, the inductance of the inductor may be about 10 mH. If more than one inductor is provided between the pattern forming surface 40 and the ground 67, the above inductance value may be applicable to the combined inductance (i.e., effective inductance) of the inductor combination. That is, the above inductance value may be applicable to the total inductance between the pattern forming surface 40 and the ground 67. The pattern forming device voltage bias system 11 may be configured such that before the pattern forming device MA is unloaded from the pattern forming device support MT (i.e., before the pattern forming device MA begins to be separated from the pattern forming device support MT), the non-pattern forming surface 41 is connected to the ground 67 via a plurality of protrusions 70. In doing so, it can be ensured that the patterning device MA is substantially fully discharged before the distance between the patterning device MA and the patterning device support MT increases. Thus, an increase in the potential of the patterning device MA during unloading can be avoided. The patterning device MA can remain connected to ground 67 while the unloading process is performed.

[0159] The patterning device voltage bias system 11 may be configured such that before the patterning device MA is loaded onto the patterning device support MT, the non-patterning surface 41 is connected to the ground 67 via the plurality of burls 70. Throughout the loading process, the patterning device MA may remain connected to the ground 67. After the patterning device MA is fully loaded onto the patterning device support MT, the function of the mode change switch may be changed. That is, after the patterning device MA is fully loaded onto the patterning device support MT, the non-patterning surface 41 may be connected to the power supply 61 so that a bias voltage may be applied.

[0160] The process of discharging the pattern forming device MA via one or more of the plurality of burls 70 has been described above in conjunction with the second embodiment, wherein a bias voltage may be applied to the pattern forming surface 41 of the pattern forming device MA via one or more of the plurality of burls 70. However, the discharge of the pattern forming device MA via one or more of the plurality of burls 70 may not be limited to being implemented in such an embodiment. For example, the discharge of the pattern forming device MA may be implemented in a configuration such as the first embodiment described above. Furthermore, in some embodiments, the discharge of the pattern forming device MA may be performed via a conductive member, such as the conductive member 50 described with respect to the first embodiment.

[0161] The following section outlines a number of other features that may be implemented in the first or second embodiments, or any other suitable method for applying a bias voltage to the patterning surface 40 of the patterning device MA.

[0162] Limiting the current through the patterning device during the EUV pulse

[0163] In some embodiments, the bias voltage may be applied continuously in a series of exposure operations performed by the lithography apparatus. That is, when the EUV pulse is off and when the EUV pulse is on, the same bias voltage may be applied to the patterning surface 40. For example, when the EUV pulse is off, a negative bias voltage may be applied to the patterning surface 40, and when the EUV pulse is on, the same negative bias voltage may be applied to the patterning surface 40.

[0164] However, during each EUV radiation pulse, a very large current may be drawn from the voltage source 61. The magnitude of this current may be large enough to damage components such as the voltage source 61. In addition, when a very large current is supplied to the patterning device MA, the patterning device MA may heat up. This may cause the patterning device MA to deform, which may cause errors in the pattern projected from the patterning device MA onto the substrate W. Therefore, it may be preferable to control or limit the current through the patterning device during the entire operation of the lithographic apparatus or at least during each radiation pulse. To achieve this, the patterning surface 40 may be connected to the voltage source 61 via at least one of a resistor 62, 63, an inductor, a diode, or a switch.

[0165] In the case where the resistors 62, 63 are arranged in the path between the voltage source 61 and the pattern forming surface 40, the magnitude of the current drawn from the voltage source 61 during the EUV radiation pulse is limited by the additional resistance within the circuit. The resistance of the resistors 62, 63 may be greater than 1Ω, preferably greater than 10Ω, and further preferably greater than 200Ω. Desirably, the resistance may be less than 10kΩ, preferably less than 1kΩ, and further preferably less than 400Ω. If more than one resistor 62, 63 is provided between the pattern forming surface 40 and the voltage source 61, the above resistance values ​​may apply to the combined resistance (i.e., effective resistance) of the resistor combination. That is, the above resistance values ​​may apply to the total resistance between the voltage source 61 and the pattern forming surface 40. In this way, an RC characteristic of about 1μs may be achieved for the circuit. The desired RC characteristic is less than about 10μs.

[0166] An inductor may be provided in the path between the voltage source 61 and the pattern forming surface 40 to replace or supplement the resistor. In the case of being provided with an inductor, the inductance of the inductor may be greater than 1μH, preferably greater than 1mH, and further preferably greater than 5mH. The inductance of the inductor may be less than 100mH, preferably less than 50mH, and further preferably less than 10mH. For example, the inductance of the inductor may be about 10mH. If more than one inductor is provided between the pattern forming surface 40 and the voltage source 61, the above inductance value may be applicable to the combined inductance (i.e., effective inductance) of the inductor combination. In other words, the above inductance value may be applicable to the total inductance between the voltage source 61 and the pattern forming surface 40.

[0167] Alternatively, a switch may be provided between the voltage source 61 and the patterning surface 40. The switch may be referred to as a timing switch. The patterning device voltage bias system may be configured such that the timing switch is opened when an EUV radiation pulse is generated, and closed when an EUV radiation pulse is not generated. That is, when the EUV pulse is turned off, a bias voltage may be provided to the patterning surface 40, and when the EUV pulse is turned on, a bias voltage may not be provided to the patterning surface 40. In this way, when an EUV radiation pulse is generated, the patterning device MA does not draw current, which means that a current surge from the voltage source 61 to the patterning surface 40 when an EUV pulse is generated can be prevented.

[0168] In order to be able to provide this function, the timing switch may be capable of operating at the same frequency as the frequency of the EUV pulse. For example, the timing switch may be capable of operating at a frequency greater than 49kHz, preferably greater than 59kHz, and further preferably greater than 99kHz. For example, the timing switch may be capable of operating at 100kHz. The timing switch may be configured such that it is controlled by a signal from another component within the lithographic apparatus 100, the signal corresponding to the turning on and off of the EUV pulse. That is, the control of the opening or closing of the timing switch may be synchronized with the turning on or off of the EUV radiation pulse.

[0169] This cycle of turning the bias voltage on and off is similar to Figure 4A-Figure 5B If the bias voltage is not applied to the patterning surface 40 when the EUV radiation pulse is turned on, the voltage increase of the patterning surface 40 during the EUV pulse can be greater than Figure 4B However, since the bias voltage can be supplied to the patterning surface 40 immediately after the EUV radiation pulse is turned off, the voltage of the patterning surface 40 will quickly decrease and become negative again. Therefore, a voltage biasing system in which the bias voltage is not supplied to the patterning surface 40 when the EUV radiation pulse is turned on will still have the effect that the distance between the contaminant particle P and the patterning surface 40 increases over time.

[0170] The resistor and / or inductor may be arranged within the pattern forming device or within an external circuit.For example, the resistor and / or inductor may be closer to the voltage source than the timing switch.

[0171] Positive bias voltage

[0172] The above-described embodiment involves applying a negative bias voltage to the pattern forming surface 40, thereby repelling negatively charged contaminant particles P from the pattern forming surface 40. However, there may be a situation where the contaminant particles in the pattern forming device environment are positively charged. In this case, a positive bias voltage may be applied to the pattern forming surface 40, so that the positively charged contaminant particles P are repelled by the positively charged pattern forming surface 40.

[0173] Embodiments also include applying a variable bias voltage.

[0174] In particular, embodiments include applying a positive voltage when the EUV pulse is on, and applying a negative bias voltage when the EUV pulse is off.

[0175] As described above, EUV-induced electron emission from the patterning surface 40 through the photoelectric effect contributes to the deposition of contaminant particles P on the patterning surface (and thereby causes imaging errors). This is because: (i) the emission of electrons causes the patterning surface 40 to be positively charged (and to a positive potential), thereby attracting negatively charged contaminant particles; and (ii) the emission of electrons adds additional electrons to the plasma within the patterning device environment 90, which can increase the number of negatively charged contaminant particles or the magnitude of the negative charge on the contaminant particles P. Therefore, by reducing or preventing the emission of electrons when the patterning surface 40 is exposed to EUV radiation, the contaminant particles P deposited on the patterning surface 40 can be reduced.

[0176] When patterning surface 40 is exposed to EUV radiation, electron emission from the patterning surface may be reduced by inducing a positive potential in patterning surface 40. Thus, patterning surface 40 may be less positively charged and may contribute fewer electrons to the plasma in patterning device environment 90.

[0177] The magnitude of the positive bias potential applied to the pattern forming surface 40 may be sufficient to prevent electron emission caused by the photoelectric effect. That is, the magnitude of the positive bias may be such that the positive potential induced at the pattern forming surface 40 is greater than the stop potential (V stop ). The maximum kinetic energy of an electron emitted by photoemission is given by equation (2), where h is Planck's constant (4.14×10 -15 eVs), f is the radiation frequency, and is the work function of the material (ie, the minimum energy required to emit an electron from the surface). The work function is a property of the material of a surface from which electrons are emitted.

[0178]

[0179] Photoemission cannot occur when the energy supplied to electrons by the electric field generated by the positive potential induced at the patterning surface 40 is greater than the maximum possible kinetic energy of emitted electrons. Therefore, the stop potential can be defined as in equation (3).

[0180]

[0181] In EUV lithography, the wavelength of the radiation may be about 13.5 nm. Therefore, the photon energy of the photons in the EUV radiation beam is about 92 eV. The work function of the patterning surface 40 may depend on the material used to form the patterning surface 40. Typically, the work function may be between 2 eV and 7 eV. If the work function is 7 eV or less, it is preferred that the potential induced on the patterning surface 40 is about 85 V or greater to substantially suppress photoemission. If the work function is 2 eV or less, it is preferred that the potential induced on the patterning surface 40 is about 90 V or greater to substantially suppress photoemission. Most of the electrons released from the patterning surface 40 when irradiated with EUV radiation typically have low energy, such as less than 10 eV. This may be because EUV photons are absorbed at an effective depth of about 10 to 100 nm. When the electrons that have absorbed the EUV photons propagate from the absorption site to the vacuum interface to the surface, they may lose energy. With this in mind, in order to significantly suppress the emission of electrons through the photoelectric effect, it is sufficient to apply a positive bias voltage greater than +50V. In this case, the positive bias voltage may be less than 100V to reduce the risk of discharge. In order to moderately suppress the emission of electrons through the photoelectric effect, it is sufficient to apply a positive bias voltage greater than 5V. In this case, the positive bias voltage may be less than 50V to further reduce the extent to which the positive bias voltage applied to the pattern forming surface causes ion physical sputtering onto a grounded surface (such as a shielding sheet). With this in mind, it is preferred that the positive bias voltage be greater than 5V and less than 50V.

[0182] The patterning device voltage bias system can be synchronized with the EUV radiation pulses generated by the lithographic apparatus to apply a negative bias voltage to the patterning surface 40 when the EUV pulse is off and to provide a positive bias voltage to the patterning surface 40 when the EUV pulse is on. The manner in which the polarity of the bias voltage is switched is not particularly limited.

[0183] Another advantage of bringing the patterning surface 40 to a positive voltage when EUV radiation is present in the lithographic apparatus is that positive ions (e.g., hydrogen ions) formed by EUV induced ionization can be repelled from the patterning surface. If the positive ions collide with the patterning surface 40, damage to the patterning surface 40 may be caused. Therefore, by bringing the patterning surface 40 to a positive bias voltage, the positive ions that collide with the patterning surface 40 can be reduced, and the positive ions that collide with the patterning surface 40 may have lower energy. This means that damage to the patterning surface 40 caused by ions is reduced.

[0184] Any suitable means may be used to apply a positive bias voltage to the pattern forming surface. The positive bias voltage may be applied in the same manner as a negative bias voltage is applied. For example, a positive bias voltage may be applied as described with respect to the first and second embodiments.

[0185] Alternatively, the patterned surface 40 may be brought to a positive voltage by limiting the current in a circuit that provides a negative bias voltage to the patterned surface 40. For example, the current in the circuit that provides the bias voltage may be limited so that the current in the circuit that provides the bias voltage is less than the current corresponding to the emission of electrons from the patterned surface 40 by the photoelectric effect. Thus, when the patterned surface 40 is exposed to EUV radiation, the voltage of the patterned surface may be defined by the current that corresponds to the emission of electrons from the patterned surface 40 by the photoelectric effect. This means that the patterned surface 40 may be brought to a positive voltage even if the power supply and the corresponding circuit arrangement continue to operate in the same manner as when a negative bias voltage is applied to the patterned surface 40.

[0186] The current in the circuit that provides the bias voltage may be limited in any suitable manner. The current in the circuit that provides the bias voltage may be limited as described above in the section "Limiting the Current Through the Patterning Device During an EUV Pulse". The degree to which the current in the circuit that provides the bias voltage is limited may vary over time and / or may be controllable. For example, the current may be more limited when the patterning surface 40 is exposed to EUV radiation than when the patterning surface 40 is not exposed to EUV radiation. This may be to bring the patterning surface 40 to a positive voltage when the patterning surface 40 is exposed to EUV radiation.

[0187] Configuration of burl

[0188] As described above, the non-patterned surface 41 may be grounded via one or more of the plurality of burls 70. The one or more of the plurality of burls may include substantially all of the burls on the support structure 70.

[0189] Preferably, the non-patterned surface 41 is grounded via a small portion of the burls 70 on the support structure. These burls may be referred to as grounded burls. The grounded burls may account for less than 10%, preferably less than 5%, and further preferably less than 1% of the total burls 70 on the support structure MT. Grounding the non-patterned device via a small portion of the burls 70 may allow the non-patterned surface to be effectively discharged without affecting the clamping of the patterning device MA to the support structure MT.

[0190] The grounding burls may be located in border regions of the support structure. For example, the grounding burls may be located in the outermost ring of burls 70. The grounding burls may be located in one or more corners of the support structure MT. Positioning the grounding burls in such locations may reduce the effect of grounding of the burls 70 on the clamping of the patterning device MA to the support structure MT, or limit the region in which the patterning device MA is clamped to the support structure MT to a region that is not important for the quality of the image projected from the patterning device MA.

[0191] Fig.11 A plan view of a support structure MT according to an embodiment of the present invention is depicted. The visible surface of the support structure MT is the support surface 42. Fig.11 As shown, the support structure is rectangular, but the present invention is not limited thereto. As previously described, the support structure MT includes a plurality of burls 70 formed on the support surface 42. The support structure MT also includes a conductive track 68 formed on the support surface 42. The conductive track 68 can be formed around the perimeter of the support surface 42. The conductive track 68 can be formed outside the burl 70.

[0192] Conductive track 68 may be connected to interface 69. Interface 69 may allow conductive track 68 to be connected to external circuitry. The external circuitry may connect the interface to ground 67.

[0193] Among the plurality of burls 70, the support structure MT may include a plurality of grounding burls (e.g., burls 70a, 70b, 70c). The grounding burls 70a, 70b, 70c may be coated with a conductive material. The conductive material may be the same material from which the conductive track is formed. The grounding burls 70a, 70b, 70c may be electrically connected to the conductive track 68. The grounding burls 70a, 70b, 70c may be electrically connected to the conductive track 68 via one or more extensions of the conductive track (e.g., extensions 68a, 68b, 68c). Fig.11 As shown, each grounding protrusion 70a, 70b, 70c is provided with an extension 68a, 68b, 68c. The extension 68a, 68b, 68c can extend inwardly from the conductive track 68 to the grounding protrusion 70a, 70b, 70c. In some embodiments, one extension 68a, 68b, 68c can connect multiple grounding protrusions 70a, 70b, 70c to the conductive track 68.

[0194] Conductive track 68 may be formed of any suitable conductive material. For example, the conductive track may be formed of titanium nitride (TiN). The conductive material may be deposited onto support surface 42 using any suitable technique. After depositing the conductive material, the conductive material may be patterned to form the shape of the conductive track 68, extensions 68a, 68b, 68c, and the coating of burl 70.

[0195] The bias voltage may be applied in the same manner. That is, the bias voltage may be applied via a plurality of bias burls (not shown). The bias burls may be connected to another conductive track via one or more extensions. The bias burls may be different from the ground burls 68a, 68b, 68c.

[0196] In some embodiments, the bias burl may be the same as the ground burl. In this case, the mode change switch may be disposed between (i) the conductive track and (ii) the voltage source and ground. Thus, depending on the setting of the mode change switch, a single subset of the burls may be able to apply a bias voltage and be connected to ground.

[0197] The configuration as described above can allow the non-pattern forming surface 41 to be continuously grounded regardless of whether a bias voltage is applied.

[0198] Configuration of patterning equipment

[0199] In this section, further details are provided on how the bias voltage is applied to the patterning surface 40 of the patterning device MA through the physical connection.

[0200] Figure 12A-12C A patterning device MA is depicted. Figure 12A-12C The patterning device MA shown may be a conventional patterning device MA. Figure 12A-12C The patterning device MA shown may be implemented in some embodiments of the present invention. Fig. 12A A plan view of patterning device MA is depicted, showing patterning surface 40 . Fig. 12B A cross-sectional view of a patterning device MA is depicted. The cross section may be taken from Fig. 12A Center line shown. Fig. 12C A plan view of the patterning device MA is depicted, showing the non-patterning surface 41 , ie the back side of the patterning device MA.

[0201] like Fig. 12BAs shown, the pattern forming device may include a plurality of portions 43a, 43b, 43c arranged in layers. The reflecting portion 43a may be conductive. The reflecting portion 43a may include a multilayer stack (not shown). The multilayer stack may be a distributed Bragg reflector. The multilayer stack may include alternating material layers. For example, the multilayer stack may include alternating molybdenum (Mo) and silicon (Si) layers, but the present invention is not limited thereto. One or more materials in the multilayer stack may be conductive. The reflecting portion 43a may also include a capping layer (not shown). The capping layer may be formed of a conductive material. For example, the capping layer may be formed of a material substantially comprising ruthenium (Ru).

[0202] The reflective portion 43a may be formed on a first surface of the core 43b. The core 43b may be a substrate of the reflective portion 43a. The core 43b may be formed of ultra-low expansion (ULE) glass. For example, the core 43b may be made of a substantially lithium aluminosilicate glass ceramic (e.g., The conductive portion 43c may be formed on the second surface of the core portion 43b.

[0203] The second surface of the core 43b may be opposite to the first surface of the core 43b. The conductive portion 43c may cover substantially the entirety of the second surface of the core 43b.

[0204] The pattern forming surface 40 may be a surface of the support structure facing away from the pattern forming device. The non-pattern forming surface 41 may be a surface of the support structure facing the pattern forming device.

[0205] Figure 12A-12C The pattern forming surface 40 shown includes a pattern forming region 45, a boundary region 46, and a peripheral region 47. The pattern forming region 45 may be located in a central region of the pattern forming surface 40. In the pattern forming region 45, the reflective portion 43a is disposed on the core 43b. The pattern forming region 45 may be a region of the pattern forming surface 40 configured to be exposed to EUV radiation and impart a pattern thereto.

[0206] The border region 46 may surround the pattern forming region 45. In the border region 46, the reflective portion 43a may not be arranged on the core portion 43b. That is, in the border region 46, the core layer 43b (specifically, the first surface of the core layer 43b) may be exposed. The border region may not reflect EUV radiation. The border region 46 may be provided to avoid undesired exposure of the region around the image region exposed on the substrate W. In some embodiments, the reflective portion 43a may be present in the border region 46, but the height is reduced.

[0207] The peripheral region 47 may surround the border region 46. In the peripheral region 47, the reflective portion 43a is disposed on the core 43b. Among the regions constituting the pattern forming surface 40, the pattern forming region 45 and the peripheral region 47 may be conductive, but the border region 46 may be a substantial electrical insulator, so that the border region 46 does not provide a direct electrical path between the peripheral region 47 and the pattern forming region 45.

[0208] exist Figure 12A-12C In the pattern forming device MA shown, the conductive layer 43c (and the non-pattern forming surface 41) can be electrically isolated from the reflective layer 43a (and the pattern forming surface 40). Figure 12A-12C The reflective portion 43a (and the pattern forming surface 40) of the pattern forming device MA shown has a bias voltage applied thereto, which may be electrically connected using a conductive member 50, as described with respect to the first embodiment. Additionally or alternatively, the bias voltage may be capacitively applied to the reflective portion 43a (and the pattern forming surface 40) by applying a voltage to the conductive portion 43c (and the non-pattern forming surface 41) via a burl 70, for example.

[0209] To manufacture Figure 12A-12C The pattern forming device shown, the reflective portion 43a can be formed on substantially all first surfaces of the core 43b. The part of the reflective portion 43a can then be selectively removed. For example, the part corresponding to the boundary area 46 of the reflective portion 43a can be removed. This can expose the first surface of the core 43b in the boundary area. Alternatively, this can reduce the height of the reflective portion 43a above the first surface of the core 43b. This can leave pattern forming area 45, boundary area 46 and peripheral area 47, as described above. The part of the reflective portion 43a can be removed by a process involving photolithography and etching.

[0210] Fig.13A and Fig. 13B An alternative patterning device MA according to an embodiment is depicted. Fig.13A A plan view of patterning device MA is depicted, showing patterning surface 40 . Fig. 13B A cross-sectional view of a pattern forming device MA is depicted. The cross-sectional view can be compared to Fig. 12B The views shown are identical. Fig.13A and Fig. 13B The patterning device MA shown may be similar to Figure 12A-12C Patterning apparatus MA as shown, except as described below.

[0211] exist Fig.13A and Fig. 13BIn the pattern forming device MA shown, the conductive portion 43b can be set to one or more edges of the pattern forming device MA. The extension of the conductive portion 43b can be called a conductive edge 44. The conductive edge 44 can extend from the reflective portion 43a to the conductive portion 43c. The conductive edge 44 can basically cover the edge of the core 43b. The conductive edge 44 can electrically connect the conductive portion 43c and the reflective portion 43a. In other words, the conductive edge 44 can connect the non-pattern forming surface 41 and the pattern forming surface 40. Specifically, the conductive edge 44 can electrically connect the conductive portion 43c and the reflective portion 43a in the peripheral area 47.

[0212] The pattern forming device MA may further include a bridge 48. The bridge 48 may electrically connect the peripheral region 47 of the reflective portion 43a and the pattern forming region 45 of the reflective portion 43a. The bridge 48 may span the boundary region 46. The bridge 48 may be a region within the boundary region 47 in which the reflective layer 43a is provided to electrically connect the peripheral region 47 and the pattern forming region 45. The bridge may be formed by adjusting the portion of the reflective portion 43a removed when the boundary region 46 is formed. Specifically, when a portion of the reflective portion 43a is removed to form the boundary region 46, a portion of the reflective portion 43a corresponding to the bridge 48 may not be removed. This means that the bridge 48 may be formed in the reflective portion 43a and is therefore formed of the same material as the pattern forming region 45 and the peripheral region 47 of the reflective portion 43a. The bridge 48 may be additionally provided with an EUV absorbing layer. The bridge 48 may include a plurality of strips connecting the pattern forming region 45 and the peripheral region 47. The width of each strip may be less than the resolution of the lithography apparatus. For example, the width of each stripe may be less than 40 nm, preferably less than 20 nm, and further preferably less than 10 nm. This can ensure that the bridge 48 does not degrade the pattern transferred from the pattern forming area 45 to the substrate W.

[0213] according to Figure 13A-13B In the configuration shown, the bias voltage can be applied to the peripheral region 47 of the reflective portion 43a from the voltage source 61 via: the support surface 42 of the support structure MT; one or more burls 70 on the support surface 42 of the support structure MT; the conductive layer 43c of the patterning device MA; the conductive edge 44. The bias voltage can be applied to the patterning region 45 of the patterning device through the same path with the addition of the bridge 48. In doing so, the bias voltage is applied to the patterning surface 40.

[0214] Use as Fig.13A and Fig. 13BThe pattern forming device MA shown can implement a current limiting component such as a resistor or inductor between the support surface 42 of the support structure MT and the voltage source 61. Figures 14-18 depict an embodiment in which the current limiting component is integrated into the pattern forming device MA. The current limiting component can be a feature formed in the reflective portion 43a and the conductive portion 43c. The current limiting component can be formed in the process of removing (for example, etching away) part of the reflective portion 43a to form, for example, the boundary area 46. Specifically, when removing part of the reflective portion 43a, the part of the conductive portion required to form the current limiting component is not removed. This means that the current limiting component 71 can be formed in the reflective portion 43a and is therefore formed of the same material as the pattern forming area 45 and the peripheral area 47 of the reflective portion 43a.

[0215] Fig.14A A plan view of a pattern forming surface 40 of a pattern forming device MA according to an embodiment is depicted, wherein a current limiting component 71 is integrated in a boundary region 46. The current limiting component 71 can be electrically connected to a reflective portion 43a in a peripheral region 47 and a reflective portion 43a in a pattern forming region 45. The size of the features constituting the current limiting component 71 can be such that these features are not imaged onto the substrate. That is, the size of the features constituting the current limiting component 71 can be smaller than the critical dimension of the lithographic apparatus. For example, the size of the features constituting the current limiting component 71 can be smaller than about 40nm, preferably smaller than 20nm, and further preferably smaller than 10nm. This can be applicable to any component or feature formed in the boundary region 46 of the reflective portion 43a.

[0216] Fig. 14B Depicted is a cross-sectional view of a first implementation of a patterning device MA having a Fig.14A The current limiting component 71 is shown in the boundary region 46 of the reflecting portion 43a. Fig. 14B The pattern forming device MA shown includes a conductive edge 44. Therefore, a bias voltage can be applied to the reflective portion 43a in the pattern forming area 45 via the non-pattern forming surface 41, the conductive edge 44, the reflective portion 43a in the peripheral area 47, and the current limiting component 71. In this way, the current in the pattern forming area 45 of the reflective portion 43a can be limited. The current limiting component positioned in this way may not limit the current in the peripheral area 47 of the reflective portion 43a. Limiting the current in the peripheral area 47 of the reflective portion 43a may not be important because deformation in the peripheral area 47 of the reflective portion 43a does not cause imaging errors.

[0217] Fig. 14C A cross-sectional view of a second embodiment of a pattern forming device MA according to an embodiment is depicted, the device having an integrated Fig.14AThe current limiting component 71 in the boundary region 46 of the reflecting portion 43a is shown. The pattern forming device MA can have Fig.14A Same floor plan shown. Fig. 14C The pattern forming device MA shown is Figure 12A-12C The patterning device MA shown is similar because Fig. 14C The pattern forming device shown does not include a conductive edge 44. That is, Fig. 14C In the pattern forming device MA shown, the reflective portion 43a can be isolated from the conductive portion 43c. Therefore, in order to apply a bias voltage to the pattern forming surface 40 (specifically, to the pattern forming area 45 of the pattern forming surface 40), the conductive member 50 can contact the reflective portion 43a. Specifically, the conductive member 50 can contact the peripheral area 47 of the reflective portion 43a. Therefore, the pattern forming area 45 of the pattern forming surface 40 can be electrically connected to the voltage source 61 via the current limiting component 71.

[0218] Fig.15A A plan view of a patterning surface 40 of a patterning device MA is depicted, the device being similar to Fig.14A The pattern forming device shown, except that the current limiting component 72 is formed in the peripheral area 47 of the reflective portion 43a, rather than in the boundary area 46 of the reflective portion 43a. To form the current limiting component 72, an additional portion of the reflective portion 43a can be removed from the peripheral area 47 of the reflective portion 43a. The bridge portion 73 can extend through the boundary area 46 to electrically connect the current limiting portion 72 to the pattern forming area 45 of the reflective portion 43a.

[0219] Fig. 15B Depicted is a cross-sectional view of a first implementation of a patterning device MA having a Fig.15A The current limiting component 72 is shown in the peripheral area 47 of the reflecting portion 43a. Fig. 15C In the pattern forming device MA shown, the reflective portion 43a can be electrically connected to the conductive portion 43c (eg, Fig. 14B The pattern forming device shown).

[0220] Fig. 15C A cross-sectional view of a second implementation of a patterning device MA is depicted, the device having an integrated Fig.15A The current limiting component 72 in the peripheral region 47 of the reflecting portion 43a is depicted. Fig. 15C In the depicted patterning device MA, the reflective portion 43a may not be electrically connected to the conductive portion 43c (eg, Fig. 14C ) in the pattern forming device shown.

[0221] Figure 16A-16CA patterning device MA is depicted wherein a current limiting component 74 is formed in the conductive portion 43c of the patterning device MA. Fig.16A depicts a plan view of a patterning surface 40 of a patterning device; Fig. 16B depicts a cross-sectional view of a patterning device MA; Fig. 16C A plan view of a non-patterning surface 41 of the patterning device MA is depicted.

[0222] like Fig.16A As shown, the patterning device MA may include a bridge 48 such that the peripheral region 46 of the reflective portion 43a is electrically connected to the patterning region 45 of the reflective portion 43a. The patterning device MA may also include a conductive edge 44.

[0223] The conductive portion 43c is patterned. That is, part of the conductive portion is absent, so that the core 43b is exposed. Specifically, part of the conductive portion 43c can be removed to form the current limiting component 74. The removal of material can be performed by a process involving photolithography and etching.

[0224] Removing material from the conductive portion 43c may be performed near one edge of the conductive portion 43c. Fig. 16C In the schematic diagram of , this is the left edge. Most of the conductive portion 43c may be unaffected by the removal of material from the conductive portion 43c. That is, the unaffected area 80 may constitute more than 90% of the non-patterned surface, preferably more than 99% of the patterned surface. This may ensure that the presence of the current limiting component 74 within the conductive portion 43c does not significantly affect the ability to clamp the non-patterned surface 41 to the support structure MT.

[0225] In embodiments such as those described above, the current limiting component may be provided in the conductive coating, or the insulating strip may be provided in the clamping coating and the current limiting component provided in the external circuit.

[0226] The insulating strip 78 may separate the unaffected area 80 from the current limiting assembly 74. The insulating strip may be an area from which the conductive portion 43c has been removed to expose the second surface of the core 43b.

[0227] The current limiting component 74 may include an input region 75, an output region 77, and one or more current limiting features 76a-76e. Each of the input region 75, the output region 77, and the one or more current limiting features 76a-76e may be formed by a conductive portion 43c. That is, the input region 75, the output region 77, and the one or more current limiting features 76a-76e may be defined by removing the conductive portion 43c from around the input region 75, the output region 77, and the one or more current limiting features 76a-76e. The one or more current limiting features 76a-76e may electrically connect the input region 75 and the output region 77. That is, in addition to the current limiting features, the conductive portion 43c between the input region 75 and the output region 77 may not exist.

[0228] One or more burls 70 configured to apply a bias voltage may contact an input region 75 of the conductive portion 43c. An output region 77 of the conductive portion 43c may be electrically connected to the conductive edge 44. Thus, a bias potential may be applied to the patterning region 45 of the reflective portion 43a via: the support surface 42 of the support structure MT; the burls 70 of the support structure MT; the input region 75 of the conductive portion 43c of the patterning device MA; the one or more current-limiting features 76a-76e of the conductive portion 43c of the patterning device MA; the output region 77 of the conductive portion 43c of the patterning device MA; the conductive edge 44; the peripheral region 47 of the reflective portion 43a; and the bridge 48.

[0229] In some embodiments, it is preferred that the magnitude of the negative bias voltage applied to the peripheral region 47 of the pattern forming surface 40 is greater than the magnitude of the negative bias voltage applied to the pattern forming region 45 of the pattern forming surface 40. Increasing the magnitude of the negative bias voltage applied to the peripheral region 47 of the pattern forming surface 40 may allow negatively charged contaminant particles to be more effectively repelled from the pattern forming surface 40. However, increasing the magnitude of the negative bias voltage applied to the pattern forming region 45 of the pattern forming surface may result in increased damage to the pattern forming region 45 of the pattern forming surface 40 through mechanisms such as injection and blistering. If such damage occurs in the peripheral region 47 of the pattern forming surface 40, such damage is not important because this region does not affect the image projected onto the substrate W. Therefore, by making the magnitude of the negative bias voltage applied to the peripheral region 47 of the pattern forming surface 40 greater than the magnitude of the negative bias voltage applied to the pattern forming region 45 of the pattern forming surface 40, negatively charged contaminant particles may be more effectively repelled without increasing damage to the pattern forming region 45 of the pattern forming surface 40. If the desired bias voltage of the pattern forming region 45 of the pattern forming surface 40 is between -1V and -10V, the desired bias voltage of the peripheral region 47 of the pattern forming surface may be between -10V and -100V, for example.

[0230] By connecting the peripheral region 47 of the reflecting portion 43a and the pattern forming region 45 of the reflecting portion 43a to different voltage sources (not shown), different bias voltages can be applied to the peripheral region 47 of the reflecting portion 43a and the pattern forming region 45 of the reflecting portion 43a. For example, the peripheral region 47 of the reflecting portion 43a can be connected to a first voltage source (not shown), and the pattern forming region 45 of the reflecting portion 43a can be connected to a second voltage source (not shown). Figure 17A-17C A patterning device MA is depicted which may be configured such that the peripheral region 47 of the reflecting portion 43a and the patterning region 45 of the reflecting portion 43a may be connected to different voltage sources. Fig.17A depicts a plan view of a patterning surface 40 of a patterning device; Fig. 17B depicts a cross-sectional view of a patterning device MA; Fig. 17C A plan view of the patterning device MA is depicted, showing the non-patterning surface 41. During loading and unloading, the second voltage source may be turned off. When the second voltage source is turned off, it may act as a ground.

[0231] As described above, patterning surface 41 may include patterning region 45, border region 46a and peripheral region 47. Additional portion 46b of peripheral region 47 of reflecting portion 43a may be removed so that discontinuity exists in peripheral region 47 of reflecting portion 43a. Bridge may extend from edge of peripheral region 47 (i.e., edge of patterning device MA) to patterning region 45 of conductive portion 43a. At edge of peripheral region 47, bridge 48 may be connected to bridge contact 49a. Bridge contact 49a, bridge 48 and patterning region 45 of reflecting portion 43a may be electrically isolated from peripheral region of reflecting portion 43a. Patterning device MA may also include peripheral contact 49b. Peripheral contact 49b may be electrically connected to peripheral region 47 of reflecting portion 43a. Bridge contact 49a and peripheral contact 49b may be formed by the same material as conductive portion 43c.

[0232] The pattern forming device MA may include two or more conductive edges 44a, 44b. Conductive edges 44a, 44b may be as described above. Conductive edges 44a, 44b may include pattern forming region conductive edges 44a and peripheral region conductive edges 44b. Pattern forming region conductive edges 44a and peripheral region conductive edges 44b may be electrically isolated from each other. Pattern forming region conductive edges 44a may be electrically connected to bridge contacts 49a. Peripheral region conductive edges 44b may be electrically connected to peripheral contacts 49b. Pattern forming region conductive edges 44a may only partially extend through the edge of the pattern forming device MA so that pattern forming region conductive edges 44a contact bridge contacts 49a but do not contact the peripheral region 47 of the reflective portion 43a.

[0233] Conductive portion 43c can be patterned as described above.Non-patterned surface 41 can include two or more insulating strips 78a, 78b.Between two insulating strips 78a, 78b, there can be an unaffected region 80 of conductive portion 43c.The unaffected region 80 of conductive portion 43c can be responsible for most of the clamping.As described above, the unaffected region 80 can constitute most of the non-patterned surface 41.On the first side of the non-patterned surface 41 (a side corresponding to the bridge patterned region conductive edge 44a and the bridge contact 49a), the first insulating strip 78a can separate the unaffected region 80 from the current limiting component.The current limiting component 74 can include an input region 75, an output region 77a and one or more current limiting features 76a-76e.As described above, each of the input region 75, the output region 77a and one or more current limiting features 76a-76e can be formed by the conductive portion 43c.One or more current limiting features 76a-76e can electrically connect the input region 75 and the output region 77a.

[0234] One or more burls 70 configured to apply a bias voltage to the patterning region 45 may contact an input region 75 of the conductive portion 43c. An output region 77a of the conductive portion 43c may be electrically connected to the patterning region conductive edge 44a. Thus, a bias potential may be applied to the patterning region 45 of the reflective portion 43a via: the support surface 42 of the support structure MT; a subset of the burls 70 of the support structure MT; an input region 75 of the conductive portion 43c of the patterning device MA; one or more current limiting features 76a-76e of the conductive portion 43c of the patterning device MA; an output region 77a of the conductive portion 43c of the patterning device MA; a patterning region conductive edge 44a; and a bridge 48.

[0235] The second insulating strip 78b may separate the unaffected region 80 of the conductive portion 43c from the input / output portion 77b. One or more burls 70 configured to apply a bias voltage to the peripheral region 47 may contact the input / output region 77b of the conductive portion 43c. The input / output region 77b of the conductive portion 43c may be electrically connected to the peripheral region conductive edge 44b. Thus, the bias voltage may be applied to the peripheral region 47 of the reflective portion 43a via: the support surface 42 of the support structure MT; a subset of the burls 70 of the support structure MT; the input / output region 77b of the conductive portion 43c of the pattern forming device MA; and the peripheral region conductive edge 44b.

[0236] The bridge contact 49 a and the peripheral region contact 49 b may be a portion of the patterning region conductive edge 44 a and the peripheral region conductive edge 44 b , respectively.

[0237] exist Figure 17A-17C In the pattern forming device MA shown, different bias voltages can be applied to the pattern forming region 45 and the peripheral region, and a current limiting component is formed in the conductive portion 43c. Figure 18A-18B In the pattern forming device MA shown in FIG. 4 , different bias voltages can be applied to the pattern forming region 45 and the peripheral region, and a current limiting component is formed in the boundary region 46 of the reflective portion 43 a. Figure 18A-18B In the illustrated patterning device MA, the current limiting component is formed in the boundary region 46 of the reflecting portion 43a. Fig.18A depicts a plan view of a patterning surface 40 of a patterning device; Fig.18B depicts a cross-sectional view of a patterning device MA; Fig.18C A plan view of patterning device MA is depicted, showing non-patterning surface 41 .

[0238] The pattern forming surface 40 may include a pattern forming region 45, a boundary region 46, and a peripheral region 47. In addition to the reflective portion 43a removed from the boundary region 46, other portions 46b of the reflective portion 43a may also be removed in the peripheral region 47. This may indicate that two or more discontinuous portions 46b exist in the peripheral region 47 of the conductive portion 43a. A bridging portion may be formed between the two discontinuous portions 46b. The bridging portion 48 may be connected to a current limiting component 71, which may be as described above. The bridging portion 48 may be electrically connected to the pattern forming region 45 of the reflective portion 43a via the current limiting portion 71.

[0239] The pattern forming device MA may include two or more conductive edges 44a, 44b. The conductive edges 44a, 44b may each be as described above. The conductive edges 44a, 44b may include a pattern forming region conductive edge 44a and a peripheral region conductive edge 44b. The pattern forming region conductive edge 44a and the peripheral region conductive edge 44b may be electrically isolated from each other. The pattern forming region conductive edge 44a may be electrically connected to the bridge 48. The peripheral region conductive edge 44b may be electrically connected to the peripheral region 47 of the reflective portion 43a. The pattern forming region conductive edge 44a may only partially extend through the edge of the pattern forming device MA so that the pattern forming region conductive edge 44a contacts 48 without contacting the peripheral region 47 of the reflective portion 43a.

[0240] The non-patterned surface 41 may include two or more insulating strips 78a and 78b, which may be as described above. Between the insulating strips 78a, 78b, there may be an unaffected area 80, which may be as described above. On one side of the non-patterned surface 41 (the side corresponding to the patterned area conductive edge 44a and the bridge 48), the insulating strip 78a may separate the unaffected area 80 from the first input / output area 77a.

[0241] One or more burls 70 configured to apply a bias voltage to the patterning region 45 may contact the first input / output region 77a of the conductive portion 43c. The first input / output region 77a of the conductive portion 43c may be electrically connected to the patterning region conductive edge 44a. Thus, a bias potential may be applied to the patterning region 45 of the reflective portion 43a via: the support surface 42 of the support structure MT; a subset of the burls 70 of the support structure MT; the first input / output region 77a of the patterning device MA; the patterning region conductive edge 44a; the bridge 48; and the current limiting component.

[0242] On the opposite side of the non-patterned surface 41, an insulating strip may separate the unaffected area 80 from the second input / output area 77b.

[0243] One or more burls 70 configured to apply a bias voltage to the peripheral region may contact the second input / output region 77b of the conductive portion 43c. The second input / output region 77b of the conductive portion 43c may be electrically connected to the peripheral region conductive edge 44b. Thus, a bias potential may be applied to the patterning region 45 of the reflective portion 43a via: the support surface 42 of the support structure MT; a subset of the burls 70 of the support structure MT; the second input / output region 77b of the patterning device MA; and the peripheral region conductive edge 44b.

[0244] In the above-described embodiments, the burls in contact with the unaffected region 80 of the conductive portion 43 c may be electrically isolated / floating or grounded.

[0245] Other features

[0246] In the foregoing description, resistance and / or inductance are described as being provided by components physically provided in the support structure MT, the pattern forming device MA or the associated circuit arrangement. However, this is not required. Alternatively, the above-mentioned resistance and / or inductance may be provided in the control system. For example, the resistance and / or inductance may be provided by the control system of the voltage source 67. This may indicate that components such as resistors and / or inductors do not need to be integrated in the support structure MT, the pattern forming device MA or the associated circuit arrangement.

[0247] In order to further reduce the number of contaminant particles P attracted to the patterning surface 40 during EUV lithography, the pressure within the patterning device environment 90 may be further reduced. This means that less plasma is generated when the EUV radiation beam passes through the space within the patterning device environment 90. Therefore, fewer contaminant particles P are negatively charged, thereby alleviating the problem of negatively charged particles P being attracted to the patterning surface 40 when the patterning surface 40 is positively charged during the EUV radiation pulse. In addition, when the pressure is reduced, it is more likely to extract the contaminant particles P generated within the patterning device environment 90. The pressure within the patterning device environment may be less than 10 Pa, preferably less than 4 Pa.

[0248] The patterning device voltage bias system described above may be incorporated into a lithographic apparatus.The lithographic apparatus may be used to manufacture ICs.

[0249] Although the use of the lithography apparatus in IC manufacturing may be specifically mentioned herein, it should be understood that the lithography apparatus described herein may have other applications. Other possible applications include the manufacture of integrated optical systems, guidance and detection patterns of magnetic domain memories, flat panel displays, liquid crystal displays (LCDs), thin film magnetic heads, etc.

[0250] Where the context permits, embodiments of the present invention may be implemented in hardware, firmware, software, or any combination thereof. Embodiments of the present invention may also be implemented by instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may include a read-only memory (ROM); a random access memory (RAM); a magnetic storage medium; an optical storage medium; a flash memory device; an electrical, optical, acoustic, or other form of propagation signal (e.g., a carrier wave, an infrared signal, a digital signal, etc.), etc. In addition, firmware, software, routines, instructions may be described herein as performing certain actions. However, it should be understood that such descriptions are merely for convenience, and that such actions are actually caused by a computing device, processor, controller, or other device that executes firmware, software, routines, instructions, etc., and doing so may cause an actuator or other device to interact with the physical world.

[0251] Although specific reference may be made herein to embodiments of the invention in the context of a lithographic apparatus, embodiments of the invention may also be used in other apparatuses. Embodiments of the invention may form part of a mask inspection apparatus, a metrology apparatus, or any apparatus that measures or processes an object, such as a wafer (or other substrate) or a mask (or other pattern forming device). These apparatuses may generally be referred to as lithographic tools.

[0252] Although specific reference may be made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention is not limited to optical lithography where the context permits. Various aspects of the invention are described in the following numbered clauses.

[0253] Although specific embodiments of the present invention have been described above, it should be understood that the present invention may be practiced in a manner other than that described. The above description is intended to be illustrative rather than limiting. Therefore, it will be appreciated by those skilled in the art that modifications may be made to the present invention described without departing from the scope of the following claims.

[0254] 1. A pattern forming device voltage bias system, the pattern forming device voltage bias system is used in a lithography apparatus, the pattern forming device voltage bias system comprising:

[0255] a patterning device configured to impart a pattern to the radiation beam, the patterning device comprising a patterning surface having a pattern thereon; and

[0256] Voltage source,

[0257] Wherein the patterning device voltage bias system is configured to enable a voltage to be applied to the patterning surface of the patterning device via the voltage source.

[0258] 2. The patterning device voltage bias system of clause 1, further comprising a conductive member electrically connected to the voltage source, wherein:

[0259] The patterning device voltage system is switchable between a first arrangement and a second arrangement;

[0260] In the first arrangement, the conductive member is in contact with the pattern forming surface so that the voltage can be applied to the pattern forming surface; and

[0261] In the second arrangement, the conductive member is a distance from the pattern forming surface.

[0262] 3. A patterning device voltage bias system according to clause 2, wherein:

[0263] The conductive member is movable between a first position and a second position;

[0264] the conductive member being in the first position in the first arrangement of the patterning device voltage bias system; and

[0265] the conductive member being in the first position in the first arrangement of the patterning device voltage bias system; and

[0266] The conductive member is in the second position in the second arrangement of the patterning device voltage bias system.

[0267] 4. The patterning device voltage biasing system of clause 3, further comprising a conductive member actuator, wherein the conductive member actuator is configured to move the conductive member between the first position and the second position.

[0268] 5. A pattern forming device voltage bias system according to any one of clauses 2 to 4, wherein the conductive member includes a first end and a second end, the conductive member is supported at the first end, and the second end includes a bevel protrusion configured to contact the pattern forming surface.

[0269] 6. A patterning device voltage bias system according to clause 5, wherein the second end of the conductive member is rotatable about the first end to move between the first position and the second position.

[0270] 7. A pattern forming device voltage bias system according to clause 6, wherein a rotation angle of the second end about the first end between the first position and the second position is less than 10 degrees, preferably less than 5 degrees, and further preferably less than 1 degree.

[0271] 8. A patterning device voltage bias system according to any one of clauses 2 to 7, wherein the conductive member is a leaf spring.

[0272] 9. A pattern forming device voltage bias system according to any one of clauses 6 to 8, wherein the rotation of the second end about the first end comprises elastic deformation of the conductive member.

[0273] 10. A patterning device voltage bias system according to any one of clauses 2 to 9, wherein the conductive member is configured to contact an area of ​​the patterning surface where no pattern is present.

[0274] 11. A pattern forming device voltage bias system according to any one of clauses 2 to 10, further comprising a pattern forming device holder configured to clamp the pattern forming device by applying an attractive force on a non-pattern forming surface of the pattern forming device, wherein the non-pattern forming surface is a surface opposite to the pattern forming surface.

[0275] 12. A patterning device voltage bias system according to any one of clauses 2 to 10, wherein:

[0276] The first direction is a direction perpendicular to the patterning surface and away from the patterning device holder;

[0277] The patterning device voltage bias system further comprises a landing portion, wherein the landing portion is arranged such that when the patterning device is clamped by the patterning device holder, the patterning surface is spaced apart from the landing portion with a displacement in the first direction.

[0278] 13. A patterning device voltage biasing system according to clause 12, wherein the conductive member is movable to a third position in which the conductive member is in contact with the landing portion.

[0279] 14. A patterning device voltage bias system according to any one of clauses 1 to 13, wherein the conductive member is connected to the voltage source via a resistor or an inductor.

[0280] 15. A pattern forming device according to any one of clauses 1 to 13, wherein the reflecting part of the pattern forming device includes a pattern forming area and a peripheral area, the conductive member is configured to contact the peripheral area of ​​the reflecting part, and the pattern forming area of ​​the reflecting part is electrically isolated from the peripheral area of ​​the reflecting part, and a resistor or an inductor is arranged between the peripheral area of ​​the reflecting part and the pattern forming area of ​​the reflecting part.

[0281] 16. A patterning device voltage bias system according to any one of clauses 2 to 15, wherein the conductive member is connected to the voltage source via a diode.

[0282] 17. A patterning device voltage bias system according to any one of clauses 2 to 16, wherein the conductive member is connected to the voltage source via a switch.

[0283] 18. A patterning device voltage bias system according to clause 17, wherein the switch is capable of opening and closing at a frequency greater than 49 kHz, preferably greater than 59 kHz, further preferably greater than 99 kHz.

[0284] 19. A patterning device voltage bias system according to clause 17 or 18, wherein the frequency at which the switch is opened and closed is synchronized with a generation frequency of a radiation beam in the lithographic apparatus.

[0285] 20. A patterning device voltage bias system according to any one of clauses 2 to 19, wherein there are a plurality of conductive members distributed circumferentially around the patterning device.

[0286] 21. A patterning device voltage biasing system according to any one of clauses 12 to 20, wherein there are a plurality of landing members distributed circumferentially around the patterning device.

[0287] 22. The patterning device voltage bias system of clause 1, wherein:

[0288] The pattern forming device also includes a non-pattern forming surface opposite to the pattern forming surface;

[0289] The patterning device voltage biasing system further includes a patterning device holder, the patterning device holder including a plurality of burls, wherein a distal end of one or more burls of the plurality of burls contacts the non-patterning surface of the patterning device;

[0290] At least a portion of the non-patterned surface is electrically connectable to the voltage source via one or more of the plurality of burls; and

[0291] The pattern forming surface and the non-pattern forming surface are electrically connected.

[0292] 23. The patterning device voltage bias system of clause 1, wherein:

[0293] The pattern forming device further comprises a non-pattern forming surface on a side of the pattern forming device opposite the pattern forming surface, wherein the pattern forming surface and the non-pattern forming surface are substantially electrically isolated from each other;

[0294] The patterning device voltage bias system further includes a patterning device holder, the patterning device holder including a plurality of burls, wherein a distal end of one or more burls of the plurality of burls is arranged to contact the non-patterning surface of the patterning device;

[0295] One or more of the burls are configured to electrically connect the non-patterned surface to the voltage source.

[0296] 24. The patterning device voltage biasing system of clause 22, wherein the patterning surface and the voltage source are connected via a first current limiting component.

[0297] 25. A patterning device voltage bias system according to clauses 22 to 24, wherein the patterning surface and the voltage source are connected via a timed switch.

[0298] 26. A pattern forming device voltage bias system according to clause 25, wherein the pattern forming device voltage bias system is configured so that the switch can be opened and closed at a frequency greater than 49 kHz, preferably greater than 59 kHz, further preferably greater than 99 kHz.

[0299] 27. A pattern forming device voltage bias system according to clause 25 or 26, wherein the frequency at which the timing switch is opened and closed is synchronized with the generation frequency of the radiation beam in the lithographic device, so that the pattern forming surface is electrically connected to the voltage source between radiation pulses.

[0300] 28. The patterning device voltage biasing system of clause 24, wherein the first current limiting component is disposed between the plurality of burls and the voltage source.

[0301] 29. A pattern forming device voltage bias system according to clause 24, wherein the first current limiting component is formed in the non-pattern forming surface of the pattern forming device, outside the pattern forming area, the pattern forming surface of the pattern forming device.

[0302] 30. A voltage bias system for a pattern forming device according to claim 29, wherein the reflecting part of the pattern forming device includes a pattern forming area and a peripheral area, and the pattern forming area of ​​the reflecting part is electrically isolated from the peripheral area of ​​the reflecting part, and the first current limiting component is arranged between the peripheral area of ​​the reflecting part and the pattern forming area of ​​the reflecting part.

[0303] 31. A patterning device according to any of the preceding clauses, wherein the non-patterning surface is electrically connectable to ground via one or more of the plurality of burls.

[0304] 32. A pattern forming device voltage bias system according to claim 31, wherein the pattern forming device voltage bias system further comprises a mode change switch, wherein the mode change switch is configured such that the non-pattern forming surface is (i) connected to the power supply via one or more of the plurality of protrusions, or (ii) connected to the ground via one or more of the plurality of protrusions.

[0305] 33. A patterning device voltage biasing system according to clause 31 or 32, wherein the non-patterning surface is electrically connectable to ground via a second current limiting component.

[0306] 34. A pattern forming device voltage system according to clause 33, wherein the second current limiting component is configured so that when the pattern forming device is discharged to ground, the current in the pattern forming device does not exceed 1000mA, preferably does not exceed 500mA, and further preferably does not exceed 100mA.

[0307] 35. A pattern forming device voltage bias system according to clause 33 or 34, wherein the second current limiting component comprises a resistor having a resistance greater than 1Ω, preferably greater than 10Ω, further preferably greater than 200Ω, and less than 10kΩ, preferably less than 1kΩ, further preferably less than 400Ω.

[0308] 36. The patterning device voltage biasing system of clause 33, wherein the second current limiting component comprises an inductor.

[0309] 37. A patterning device voltage bias system according to any one of clauses 33 to 36, wherein the second current limiting component is disposed between the plurality of burls and the ground.

[0310] 38. A pattern forming device voltage bias system according to any one of clauses 29 to 32, wherein the second current limiting component is formed in a reflective portion of the pattern forming device or a conductive portion of the pattern forming device.

[0311] 39. A pattern forming device voltage bias system according to 38, wherein the reflecting part of the pattern forming device includes a pattern forming area and a peripheral area, and the pattern forming area of ​​the reflecting part is electrically isolated from the peripheral area of ​​the reflecting part, and the second current limiting component is arranged between the peripheral area of ​​the reflecting part and the pattern forming area of ​​the reflecting part.

[0312] 40. A pattern forming device voltage bias system according to any one of clauses 31 to 39, wherein the pattern forming device voltage bias system is configured such that the non-pattern forming surface is connected to ground via one or more of the plurality of protrusions while the pattern forming device is loaded onto and / or unloaded from the pattern forming device holder.

[0313] 41. A pattern forming device voltage bias system according to any of the preceding clauses, wherein the bias voltage is negative.

[0314] 42. The pattern forming device voltage bias system according to any of the preceding clauses further includes a controller, which is configured to control the bias voltage to be positive during the time when the lithography device generates EUV radiation pulses, and to control the bias voltage to be negative between the times when the lithography device generates EUV radiation pulses.

[0315] 43. A pattern forming device voltage bias system according to any of the preceding clauses, wherein the voltage source is configured to supply a negative bias voltage greater than 0.5V, preferably greater than 1V, less than 10V, preferably less than 5V, and further preferably less than 3V to the pattern forming surface, and / or the voltage source is configured to supply a positive bias voltage greater than 1V and preferably greater than 5V, less than 100V, and preferably less than 50V to the pattern forming surface.

[0316] 44. A pattern forming device voltage bias system according to any of the preceding clauses, further comprising a pattern forming device environment in which the pattern forming device is located, wherein the pressure within the pattern forming device environment is less than 10 Pa, preferably less than 4 Pa.

[0317] 45. A lithographic apparatus comprising a patterning device voltage bias system according to any of the preceding clauses.

[0318] 46. ​​A method of reducing contamination on a patterning surface of a patterning device in a lithographic apparatus, the method comprising:

[0319] a contacting step of bringing a conductive member into contact with the pattern forming surface;

[0320] A voltage biasing step in which a voltage is supplied from a voltage source to the pattern forming surface via a conductive member.

[0321] 47. The method of clause 46, wherein the contacting step comprises moving the conductive member from a first position to a second position.

[0322] 48. A method according to clause 46 or 47, wherein:

[0323] The conductive member includes a first end and a second end;

[0324] The conductive member is supported at the first end;

[0325] The second end portion includes a sloped protrusion configured to contact the pattern forming surface; and

[0326] The contacting step includes rotating the second end portion about the first end portion.

[0327] 49. The method according to clause 48, wherein in the contacting step, the rotation of the second end portion about the first end portion is less than 10 degrees, preferably less than 5 degrees, and further preferably less than 1 degree.

[0328] 50. The method of clause 48 or 49, wherein the conductive member is a leaf spring, and the rotation of the first end about the second end comprises elastic deformation of the leaf spring.

[0329] 51. A method according to any one of clauses 46 to 50, further comprising a clamping step, in which the pattern forming device is clamped to a pattern forming device support.

[0330] 52. The method according to clause 51, further comprising a landing step, in which:

[0331] The patterning device is released from the patterning device support; and

[0332] The conductive member moves from the first position or the second position to a third position, wherein in the third position, the conductive member contacts the landing portion.

[0333] 53. The method of clause 52, wherein the movement of the conductive member to the third position comprises rotation of the second end about the first end in a direction opposite to the direction of the rotation from the first position to the second position.

[0334] 54. A method according to any one of clauses 46 to 53, wherein the conductive member is connected to the voltage source via a timing switch, and the voltage biasing step comprises opening and closing the timing switch at a frequency according to the generation frequency of the radiation beam in the lithography device, so that the voltage is provided to the pattern forming surface between radiation pulses.

[0335] 55. The method according to any one of clauses 46 to 54 further includes: discharging the pattern forming device by connecting the pattern forming device to the ground via one or more of a plurality of protrusions when the pattern forming device is loaded onto the pattern forming device holder and / or when the pattern forming device is unloaded from the pattern forming device holder.

[0336] 56. A method of reducing contamination on a patterning surface of a patterning device in a lithographic apparatus, the method comprising:

[0337] clamping the patterning device with a patterning device support, wherein a non-patterning surface of the patterning device contacts one or more of a plurality of burls disposed on a surface of the patterning device support and the non-patterning surface is opposite to the patterning surface; and

[0338] A voltage is provided from a voltage source to the patterning surface of the patterning device via the one or more of the plurality of burls and the non-patterning surface.

[0339] 57. The method of clause 56, wherein the patterned surface and the non-patterned surface are electrically connected.

[0340] 58. The method of clause 56, wherein the pattern forming surface is electrically isolated from the non-pattern forming surface, and providing the voltage to the pattern forming surface comprises capacitively providing the voltage to the pattern forming surface.

[0341] 59. A method according to clauses 56 to 58, wherein the pattern forming surface is electrically connected to the voltage source via a timing switch, and providing the voltage to the pattern forming surface comprises opening and closing the switch at a frequency controlled according to the frequency of generating the radiation beam in the lithography device, so that the voltage is provided to the pattern forming surface between radiation pulses.

[0342] 60. The method according to clauses 56 to 59 further includes: discharging the pattern forming device by connecting the pattern forming device to ground via one or more of the plurality of protrusions when the pattern forming device is loaded onto the pattern forming device holder and / or when the pattern forming device is unloaded from the pattern forming device holder.

[0343] 61. A method according to clause 60, wherein the discharge of the pattern forming device and the supply of the voltage to the pattern forming surface are controlled so that the current in the pattern forming surface does not exceed 1000mA, preferably does not exceed 500mA, and further preferably does not exceed 100mA.

[0344] 62. The method of any one of clauses 46 to 61, further comprising limiting current in the patterning surface using a first current limiting component disposed between the voltage source and the patterning surface.

[0345] 63. The method of any one of clauses 46 to 62, further comprising limiting current in the patterning surface using a second current limiting component disposed between ground and the patterning surface.

[0346] 64. A method according to any one of clauses 46 to 63, wherein the pattern forming device is located in a pattern forming device environment, and the method further comprises a step of reducing the pressure within the pattern forming device environment to less than 10Pa, preferably less than 4Pa.

[0347] 65. A method according to any of clauses 46 to 64, wherein the bias voltage is negative.

[0348] 66. A method according to any of clauses 46 to 65, wherein the bias voltage is positive during the time when the lithographic apparatus generates EUV radiation pulses and the bias voltage is negative between the times when the lithographic apparatus generates EUV radiation pulses.

[0349] 67. A method according to any one of clauses 46 to 66, wherein the magnitude of the voltage supplied to the pattern forming surface is greater than 0.5V, preferably greater than 1V, less than 10V, preferably less than 5V, and further preferably less than 3V.

[0350] 68. A method of manufacturing a device comprising the method of reducing contamination on a patterning surface of a patterning apparatus according to any of clauses 46 to 67.

Claims

1. A pattern forming device voltage bias system, the pattern forming device voltage bias system is used in a lithography apparatus, the pattern forming device voltage bias system comprising: a patterning device configured to impart a pattern to the radiation beam, the patterning device comprising a patterning surface having a pattern thereon; as well as Voltage source, Wherein the patterning device voltage bias system is configured to enable a voltage to be applied to the patterning surface of the patterning device via the voltage source.

2. The pattern forming device voltage bias system of claim 1 , further comprising a conductive member electrically connected to the voltage source, wherein: The patterning device voltage system is switchable between a first arrangement and a second arrangement; In the first arrangement, the conductive member is in contact with the pattern forming surface so that the voltage can be applied to the pattern forming surface; as well as In the second arrangement, the conductive member is a distance from the pattern forming surface.

3. The patterning device voltage biasing system of claim 2, wherein: The conductive member is movable between a first position and a second position; the conductive member being in the first position in the first arrangement of the patterning device voltage bias system; as well as The conductive member is in the second position in the second arrangement of the patterning device voltage bias system.

4. The patterning device voltage biasing system of claim 3, further comprising a conductive member actuator, wherein the conductive member actuator is configured to move the conductive member between the first position and the second position.

5. A pattern forming device voltage bias system according to any one of claims 2 to 4, wherein the conductive member includes a first end and a second end, the conductive member is supported at the first end, and the second end includes a bevel protrusion configured to contact the pattern forming surface.

6. The patterning device voltage biasing system of claim 5, wherein the second end of the conductive member is rotatable about the first end to move between the first position and the second position.

7. A pattern forming device voltage bias system according to claim 6, wherein a rotation angle of the second end around the first end between the first position and the second position is less than 10 degrees, preferably less than 5 degrees, and further preferably less than 1 degree.

8. A patterning device voltage bias system according to any one of claims 2 to 7, wherein the conductive member is a leaf spring.

9. A patterning device voltage biasing system according to any one of claims 6 to 8, wherein the rotation of the second end portion about the first end portion comprises elastic deformation of the conductive member.

10. A patterning device voltage biasing system according to any one of claims 2 to 9, wherein the conductive member is configured to contact an area of ​​the patterning surface where no pattern is present.

11. The pattern forming device voltage bias system according to any one of claims 2 to 10, further comprising a pattern forming device holder configured to clamp the pattern forming device by applying an attractive force on a non-pattern forming surface of the pattern forming device, wherein the non-pattern forming surface is a surface opposite to the pattern forming surface.

12. A patterning device voltage biasing system according to any one of claims 2 to 10, wherein: The first direction is a direction perpendicular to the patterning surface and away from the patterning device holder; The patterning device voltage bias system further comprises a landing portion, wherein the landing portion is arranged such that when the patterning device is clamped by the patterning device holder, the patterning surface is spaced apart from the landing portion with a displacement in the first direction.

13. The pattern forming device voltage biasing system of claim 12, wherein the conductive member is movable to a third position in which the conductive member contacts the landing portion.

14. A patterning device voltage bias system according to any one of claims 1 to 13, wherein the conductive member is connected to the voltage source via a resistor or an inductor.

15. A pattern forming device according to any one of claims 1 to 13, wherein the reflecting part of the pattern forming device includes a pattern forming area and a peripheral area, the conductive member is configured to contact the peripheral area of ​​the reflecting part, the pattern forming area of ​​the reflecting part is electrically isolated from the peripheral area of ​​the reflecting part, and a resistor or an inductor is arranged between the peripheral area of ​​the reflecting part and the pattern forming area of ​​the reflecting part.

16. A patterning device voltage biasing system according to any one of claims 2 to 15, wherein the conductive member is connected to the voltage source via a diode.

17. A patterning device voltage biasing system according to any one of claims 2 to 16, wherein the conductive member is connected to the voltage source via a switch.

18. The patterning device voltage bias system according to claim 17, wherein the switch can be opened and closed at a frequency greater than 49 kHz, preferably greater than 59 kHz, further preferably greater than 99 kHz.

19. A pattern forming device voltage bias system according to claim 17 or 18, wherein the frequency at which the switch is opened and closed is synchronized with the generation frequency of the radiation beam in the lithographic apparatus so that the conductive member is connected to the voltage source between radiation pulses.

20. A patterning device voltage biasing system according to any one of claims 2 to 19, wherein there are a plurality of conductive members distributed circumferentially around the patterning device.

21. A patterning device voltage biasing system according to any one of claims 12 to 20, wherein there are a plurality of landing members distributed circumferentially around the patterning device.

22. The patterning device voltage biasing system of claim 1, wherein: The pattern forming device also includes a non-pattern forming surface opposite to the pattern forming surface; The patterning device voltage biasing system further includes a patterning device holder, the patterning device holder including a plurality of burls, wherein a distal end of one or more burls of the plurality of burls is in contact with the non-patterning surface of the patterning device; At least a portion of the non-patterned surface is electrically connectable to the voltage source via one or more of the plurality of burls; and The pattern forming surface and the non-pattern forming surface are electrically connected.

23. The patterning device voltage biasing system of claim 1, wherein: The pattern forming device further comprises a non-pattern forming surface on a side of the pattern forming device opposite the pattern forming surface, wherein the pattern forming surface and the non-pattern forming surface are substantially electrically isolated from each other; The patterning device voltage bias system further includes a patterning device holder, the patterning device holder including a plurality of burls, wherein a distal end of one or more burls of the plurality of burls is arranged to contact the non-patterning surface of the patterning device; One or more of the burls are configured to electrically connect the non-patterned surface to the voltage source.

24. The patterning device voltage biasing system of claim 22, wherein the patterning surface and the voltage source are connected via a first current limiting component.

25. A patterning device voltage biasing system according to claims 22 to 24, wherein the one or more burls and the voltage source are connected via a timing switch.

26. A pattern forming device voltage bias system according to claim 25, wherein the pattern forming device voltage bias system is configured so that the switch can be opened and closed at a frequency greater than 49 kHz, preferably greater than 59 kHz, and further preferably greater than 99 kHz.

27. A pattern forming device voltage bias system according to claim 25 or 26, wherein the frequency at which the timing switch is opened and closed is synchronized with the generation frequency of the radiation beam in the lithographic device, so that the pattern forming surface is electrically connected to the voltage source between radiation pulses.

28. The patterning device voltage biasing system of claim 24, wherein the first current limiting component is disposed between the plurality of burls and the voltage source.

29. The pattern forming device voltage bias system of claim 24, wherein the first current limiting component is formed in the non-pattern forming surface of the pattern forming device, outside a pattern forming area, the pattern forming surface of the pattern forming device.

30. A pattern forming device voltage bias system according to claim 29, wherein the reflecting part of the pattern forming device includes the pattern forming area and a peripheral area, and the pattern forming area of ​​the reflecting part is electrically isolated from the peripheral area of ​​the reflecting part, and the first current limiting component is arranged between the peripheral area of ​​the reflecting part and the pattern forming area of ​​the reflecting part.

31. A patterning device according to any preceding claim, wherein the non-patterning surface is electrically connectable to ground via one or more of the plurality of burls.

32. A pattern forming device voltage bias system according to claim 31, wherein the pattern forming device voltage bias system further comprises a mode change switch, wherein the mode change switch is configured so that the non-pattern forming surface is (i) connected to the power supply via one or more of the plurality of protrusions, or (ii) connected to the ground via one or more of the plurality of protrusions.

33. A patterning device voltage biasing system according to claim 31 or 32, wherein the non-patterning surface is electrically connectable to ground via a second current limiting component.

34. A pattern forming device voltage system according to claim 33, wherein the second current limiting component is configured so that when the pattern forming device is discharged to ground, the current in the pattern forming device does not exceed 1000mA, preferably does not exceed 500mA, and further preferably does not exceed 100mA.

35. A pattern forming device voltage bias system according to claim 33 or 34, wherein the second current limiting component comprises a resistor, the resistance of which is greater than 1Ω, preferably greater than 10Ω, further preferably greater than 200Ω, and less than 10kΩ, preferably less than 1kΩ, further preferably less than 400Ω.

36. The patterning device voltage biasing system of claim 33, wherein the second current limiting component comprises an inductor.

37. The patterning device voltage biasing system of any one of claims 33 to 36, wherein the second current limiting component is disposed between the plurality of burls and the ground.

38. A pattern forming device voltage bias system according to any one of claims 29 to 32, wherein the second current limiting component is formed in a reflective portion of the pattern forming device or a conductive portion of the pattern forming device.

39. A pattern forming device voltage bias system according to 38, wherein the reflecting part of the pattern forming device includes a pattern forming area and a peripheral area, and the pattern forming area of ​​the reflecting part is electrically isolated from the peripheral area of ​​the reflecting part, and the second current limiting component is arranged between the peripheral area of ​​the reflecting part and the pattern forming area of ​​the reflecting part.

40. A pattern forming device voltage bias system according to any one of claims 31 to 39, wherein the pattern forming device voltage bias system is configured such that the non-pattern forming surface is connected to the ground via one or more of the plurality of protrusions while the pattern forming device is loaded onto and / or unloaded from the pattern forming device holder.

41. A patterning device voltage bias system according to any one of the preceding claims, wherein the bias voltage is negative.

42. The pattern forming device voltage bias system according to any of the preceding claims further comprises a controller, which is configured to control the bias voltage to be positive during the time when the lithography device generates EUV radiation pulses, and to control the bias voltage to be negative between the times when the lithography device generates EUV radiation pulses.

43. A pattern forming device voltage bias system according to any one of the preceding claims, wherein the voltage source is configured to supply a negative bias voltage having a magnitude greater than 0.5V, preferably greater than 1V, less than 10V, preferably less than 5V, and further preferably less than 3V to the pattern forming surface, and / or the voltage source is configured to supply a positive bias voltage having a magnitude greater than 1V and preferably greater than 5V, less than 100V, and preferably less than 50V to the pattern forming surface.

44. A pattern forming device voltage bias system according to any one of the preceding claims, further comprising a pattern forming device environment in which the pattern forming device is located, wherein the pressure within the pattern forming device environment is less than 10Pa, preferably less than 4Pa.

45. A lithographic apparatus comprising a patterning device voltage biasing system according to any one of the preceding claims.

46. ​​A method of reducing contamination on a patterning surface of a patterning device in a lithographic apparatus, the method comprising: a contacting step of bringing a conductive member into contact with the pattern forming surface; A voltage biasing step in which a voltage is supplied from a voltage source to the pattern forming surface via a conductive member.

47. The method of claim 46, wherein the contacting step comprises moving the conductive member from a first position to a second position.

48. The method of claim 46 or 47, wherein: The conductive member includes a first end and a second end; The conductive member is supported at the first end; The second end portion includes a sloped protrusion configured to contact the pattern forming surface; and The contacting step includes rotating the second end portion about the first end portion.

49. The method of claim 48, wherein in the contacting step, the rotation of the second end portion about the first end portion is less than 10 degrees, preferably less than 5 degrees, and further preferably less than 1 degree.

50. The method of claim 48 or 49, wherein the conductive member is a leaf spring, and the rotation of the first end about the second end comprises elastic deformation of the leaf spring.

51. A method according to any one of claims 46 to 50, further comprising a clamping step, in which the patterning device is clamped to a patterning device support.

52. The method according to claim 51 further comprises a landing step, in which: The patterning device is released from the patterning device support; and The conductive member moves from the first position or the second position to a third position, wherein in the third position, the conductive member contacts the landing portion.

53. The method of claim 52, wherein the movement of the conductive member to the third position comprises rotation of the second end about the first end in a direction opposite to a direction of the rotation from the first position to the second position.

54. A method according to any one of claims 46 to 53, wherein the conductive member is connected to the voltage source via a timing switch, and the voltage biasing step includes opening and closing the timing switch at a frequency according to the generation frequency of the radiation beam in the lithography device, so that the voltage is provided to the pattern forming surface between radiation pulses.

55. The method according to any one of claims 46 to 54, further comprising: When the patterning device is loaded onto the patterning device holder and / or when the patterning device is unloaded from the patterning device holder, the patterning device is discharged by connecting the patterning device to the ground via one or more of the plurality of burls.

56. A method of reducing contamination on a patterning surface of a patterning device in a lithographic apparatus, the method comprising: clamping the patterning device with a patterning device support, wherein a non-patterning surface of the patterning device contacts one or more of a plurality of burls disposed on a surface of the patterning device support and the non-patterning surface is opposite to the patterning surface; as well as A voltage is provided from a voltage source to the patterning surface of the patterning device via the one or more of the plurality of burls and the non-patterning surface.

57. The method of claim 56, wherein the patterned surface and the non-patterned surface are electrically connected.

58. The method of claim 56, wherein the patterning surface is electrically isolated from the non-patterning surface, and providing the voltage to the patterning surface comprises capacitively providing the voltage to the patterning surface.

59. A method according to claims 56 to 58, wherein the one or more protrusions are electrically connected to the voltage source via a timing switch, and providing the voltage to the pattern forming surface includes opening and closing the switch at a frequency controlled according to the frequency of generating the radiation beam in the lithography device, so that the voltage is provided to the pattern forming surface between radiation pulses.

60. The method of claims 56 to 59, further comprising: When the patterning device is loaded onto the patterning device holder and / or when the patterning device is unloaded from the patterning device holder, the patterning device is discharged by connecting the patterning device to ground via one or more of the plurality of burls.

61. A method according to claim 60, wherein the discharge of the pattern forming device and the supply of the voltage to the pattern forming surface are controlled so that the current in the pattern forming surface does not exceed 1000mA, preferably does not exceed 500mA, and further preferably does not exceed 100mA.

62. The method of any one of claims 46 to 61 further comprising limiting current in the patterning surface using a first current limiting component disposed between the voltage source and the patterning surface.

63. The method of any one of claims 46 to 62, further comprising limiting current in the patterning surface using a second current limiting component disposed between ground and the patterning surface.

64. A method according to any one of claims 46 to 63, wherein the pattern forming device is located in a pattern forming device environment, and the method further comprises a step of reducing the pressure within the pattern forming device environment to less than 10Pa, preferably less than 4Pa.

65. A method according to any one of claims 46 to 64, wherein the bias voltage is negative.

66. A method according to any one of claims 46 to 65, wherein the bias voltage is positive during the time when the lithographic apparatus generates EUV radiation pulses, and the bias voltage is negative between the times when the lithographic apparatus generates EUV radiation pulses.

67. A method according to any one of claims 46 to 66, wherein the magnitude of the voltage supplied to the pattern forming surface is greater than 0.5V, preferably greater than 1V, less than 10V, preferably less than 5V, and further preferably less than 3V.

68. A method of manufacturing a device comprising the method of reducing contamination on a patterning surface of a patterning device according to any one of claims 46 to 67.

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