Method and system for processing control flow structure in data parallel architecture

Abstract

Methods, systems, and apparatus are provided for processing a control flow structure in a data parallel architecture. According to a first aspect, a method is provided. In one embodiment, the method includes a processing unit (PU) receiving a program for execution. The method also includes applying, by the PU, a branching scheme to the program to obtain data regarding a control flow structure of the program. The method also includes determining, by the PU, one or more control flow structures for the program to predict based at least in part on the retrieved data. The method also includes applying, by the PU, prediction to the one or more control flow structures of the program.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of and priority to U.S. Patent Application No. 17 / 886,795, filed on August 12, 2022, entitled “METHODS AND SYSTEMS FOR HANDLING CONTROL FLOW STRUCTURES IN DATA-PARALLEL ARCHITECTURES,” the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present invention relates to the field of data parallel architecture, and in particular to a method and system for processing control flow structures in a data parallel architecture. Background Art

[0004] In multithreaded processors such as graphics processing units (GPUs), dynamic control flow structures in a program can be handled by either a prediction-only approach or a branch-only approach. Some recent prior art techniques for handling control flow focus on a prediction-only approach. While prediction may be faster than branching, in some cases, such as complex control flow structures, prediction may result in high overhead or even register spills. On the other hand, branching may have its own limitations due to the limited number of divergence pc ram (DPC) units required to record and resolve divergences.

[0005] Therefore, there is a need for methods and systems for processing control flow structures in data parallel architectures that obviate or reduce one or more limitations of the prior art. Summary of the invention

[0006] The present invention provides a method, system and apparatus for processing control flow structures in a data parallel architecture. According to a first aspect, a method is provided. The method includes a processing unit (PU) receiving a program for execution. The method also includes the PU applying a branching scheme to the program to obtain data about the control flow structure of the program. The method also includes the PU determining one or more control flow structures to be predicted of the program based at least in part on the acquired data. The method may also include the PU applying prediction to the one or more control flow structures of the program. The method may improve performance by applying a combination of prediction and branching to the same program.

[0007] The PU determining, at least in part based on the acquired data, one or more control flow structures of the program to be predicted may include: the PU determining the innermost convergence region of the program having the highest divergence depth. The PU applying prediction to the one or more control flow structures of the program may include: the PU applying prediction to the innermost convergence region of the program having the highest divergence depth. The PU applying prediction to the innermost convergence region of the program having the highest divergence depth may include applying free prediction. The method may also improve performance through free prediction, thereby avoiding the need for thread warp registers.

[0008] The PU determining the innermost convergence region of the program having the highest divergence depth may include determining one of: an if-pattern control flow structure and an if-else-pattern control flow structure.

[0009] The PU determining, at least in part based on the acquired data, one or more control flow structures to be predicted of the program may also include: the PU determining, in descending order of highest divergence depth, one or more candidate regions of the program.

[0010] The PU applying prediction to the one or more control flow structures of the program may also include: the PU applying prediction to each of the one or more candidate regions. The method may further improve performance by selectively applying prediction to regions with the highest divergence depth.

[0011] The PU determining one or more candidate regions of the program in descending order of highest divergence depth may include: for each candidate region of the one or more candidate regions, if prediction is applied to each candidate region, determining that a scalar register pressure associated with the PU is lower than a threshold pressure of the PU. The method may improve performance and reduce overhead by ensuring that warp registers do not overflow.

[0012] The PU determines one or more candidate regions of the program in descending order of highest divergence depth, which may include determining one or more of the following: an if-pattern control flow structure, an if-else-pattern control flow structure, and a loop-pattern control flow structure. The method may improve performance by selecting regions for prediction based on defined patterns.

[0013] Determining, by the PU at least in part based on the acquired data, one or more control flow structures of the program to be predicted may include: the PU analyzing a scalar register pressure associated with the PU to determine one or more candidate regions of the program to be predicted based on a threshold pressure of the PU and the highest divergence depth.

[0014] The PU applying prediction to the one or more control flow structures of the program may include: the PU applying prediction to the determined one or more candidate regions of the program. The method may improve performance by applying prediction based on selected regions.

[0015] Analyzing the scalar register pressure to determine one or more candidate regions may include, for each candidate region of the one or more candidate regions, determining that the scalar register pressure is below the threshold pressure if the prediction applies to the candidate region. The method may improve performance and reduce overhead by ensuring that warp registers do not overflow.

[0016] Analyzing the scalar register pressure to determine one or more candidate regions may also include: the PU determining the one or more candidate regions in order of highest divergence depth of the program from high to low. The method may further improve performance by selectively applying prediction to the region with the highest divergence depth.

[0017] Analyzing the scalar register pressure to determine one or more candidate regions of the program may also include determining one or more of: an if-pattern control flow structure, an if-else-pattern control flow structure, and a loop-pattern control flow structure. The method may improve performance by selecting regions for prediction based on defined patterns.

[0018] According to another aspect, an apparatus is provided. The apparatus includes means for performing one or more of the methods described herein.

[0019] According to another aspect, another device is provided, which includes: a memory for storing a program; a processor for executing the program stored in the memory, and when the program stored in the memory is executed, the processor is used to perform one or more of the methods described herein.

[0020] According to another aspect, a computer readable medium is provided, the computer readable medium storing a program code executed by a device, the program code being used to perform one or more of the methods described herein.

[0021] According to another aspect, a chip is provided, wherein the chip includes a processor and a data interface, and the processor reads instructions stored in a memory by using the data interface to execute one or more of the methods described herein.

[0022] Embodiments have been described above in conjunction with aspects of the present invention, and these embodiments may be implemented based on these aspects. It will be appreciated by those skilled in the art that embodiments may be implemented in conjunction with the aspects in which they are described, but may also be implemented together with other embodiments of this aspect. When the embodiments are mutually exclusive or contradictory, this will be apparent to those skilled in the art. Some embodiments may be described in conjunction with an aspect, but may also be applicable to other aspects, which will be apparent to those skilled in the art. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Further features and advantages of the present invention will become apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0024] Figure 1A A structured control flow graph (CFG) according to one aspect is shown.

[0025] Figure 1B An unstructured (or unstructured) CFG according to one aspect is shown.

[0026] Figure 2A An example of a divergent CFG according to one aspect is shown.

[0027] Figure 2B Another example of a divergent CFG according to one aspect is shown.

[0028] Figure 3A The convergence region of a structured CFG according to one aspect is shown.

[0029] Figure 3B The convergence region of an unstructured CFG according to one aspect is shown.

[0030] Figure 4 The innermost convergence region of a CFG according to one aspect is shown.

[0031] Figure 5 An if-pattern control flow structure according to one aspect is shown.

[0032] Figure 6 A loop-pattern control flow structure according to one aspect is shown.

[0033] Fig. 7A An if-else pattern control flow structure of an unstructured CFG according to one aspect is shown.

[0034] Figure 7B An if-else pattern control flow structure of a structured CFG according to one aspect is shown.

[0035] Fig. 8A Exemplary instructions of an if-pattern control flow structure according to one aspect are shown.

[0036] Figure 8B Exemplary instructions of a loop-pattern control flow structure according to one aspect are shown.

[0037] Figure 8C Exemplary instructions of an if-else pattern control flow structure according to one aspect are shown.

[0038] Fig. 9 A method for determining one or more regions for prediction according to one aspect is shown.

[0039] Fig.10 A method according to one aspect is shown.

[0040] Fig.11 It is an apparatus according to one aspect that can perform any or all operations of the above methods and features described explicitly or implicitly in this document.

[0041] It should be noted that throughout the drawings, like features are identified by like reference numerals. DETAILED DESCRIPTION

[0042] In a multithreaded processor (e.g., a graphics processing unit (GPU)), dynamic control flow structures in a program can be handled by two approaches, namely, branching and prediction. Prediction can refer to a software-based scheme, for example, in a compiler, to support divergent code (e.g., if-else statements, loops). When using prediction, the compiler may need to calculate and manage an active channel mask for which threads are active at each stage of the divergent code.

[0043] Branching may refer to a hardware-based scheme for supporting divergent code. When taking a branch, the compiler may only need to insert Branch, Merge, and EJECT instructions at the appropriate locations, while the hardware can dynamically manage the active channel mask. The branching method may use a hardware branch unit to handle dynamic control flow. The hardware branch unit may use one or more divergent pc arms (DPCs) to dynamically record and resolve divergences. In some aspects, the number of DPC units may be limited. Those skilled in the art will appreciate that the more DPC units used in a program, the fewer concurrent thread warps the hardware can initiate.

[0044] Those skilled in the art will appreciate that in a data parallel architecture, multiple threads can run simultaneously. The channel mask can be used to indicate which threads are active in each stage of program execution.

[0045] Some prior art techniques for processing control flow structures in data parallel architectures focus on exploring new designs and proposals for new methods based on prediction. However, no matter how efficient these prediction-based solutions are, there may be situations where hardware-based solutions may be more efficient. For example, in some cases, prediction-based solutions may generate higher overhead, in which case hardware-based solutions may be a better choice. Therefore, aspects of the present invention may provide a solution that efficiently combines prediction-based solutions and hardware-based solutions to improve the performance of control flow structures. For example, in some aspects, a combination of software-based and hardware-based solutions may be used efficiently to improve performance. A control flow structure may refer to the execution order of a set of basic blocks representing different source codes. A basic block may refer to an instruction sequence, which is a straight line code sequence with no branches or jumps in between. In some aspects, a branch or jump may be the last instruction of a basic block. Divergent source code may refer to code that diverges or splits the path of a program into two or more paths (e.g., if statements, if-else statements, loops, etc.).

[0046] Those skilled in the art will appreciate that various aspects of the present invention may be applied to a hardware architecture that supports a combination of these two solutions.

[0047] The performance of hardware (branching) and software (prediction) approaches to handling control flow structures is analyzed. In addition, new prediction-based approaches are investigated for handling control flow structures in data-parallel architectures.

[0048] Some aspects may provide a systematic approach to determining when to use a prediction scheme for certain control flow blocks throughout a program. Thus, some aspects may determine when using a prediction scheme may be beneficial or improve performance.

[0049] According to some aspects, the performance of the entire program can be improved based on selectively applying a prediction scheme or a branching scheme to each control flow block within the entire program. In some aspects, the improved performance can be applied to programs on all data parallel architectures (e.g., GPUs).

[0050] As described herein, the prior art has focused solely on designing new prediction-only schemes for control flow structures. For simple control flow structures, prediction schemes may run more efficiently than hardware schemes, however, prediction-only schemes may have high overhead when calculating and managing channel masks for complex control flow structures. In these high-overhead cases, using prediction-only schemes may be inefficient compared to simpler hardware schemes (branches).

[0051] Some aspects of the invention may involve combining branching and prediction schemes to improve the performance of any control flow structure.In some aspects, the control flow structure can be analyzed, and one or more prediction schemes can be selectively applied to a series of control flow structures that can provide performance benefits.

[0052] In some aspects, a branching scheme can initially be applied to a control flow structure of a program. Then, in some aspects, according to the method, a specific data structure for applying the prediction scheme can be determined. Determining a specific data structure for applying the prediction scheme can improve the performance of the hardware.

[0053] System architectures or scenarios to which various aspects of the present invention may be applied include data parallel architectures that support combining branching and prediction schemes into the same program.

[0054] Those skilled in the art will appreciate that GPUs currently on the market allow the selection of a branch-only approach or a prediction-only approach to support the control flow structure of a program. One aspect of the present invention may provide an alternative that supports combining two approaches (e.g., branching and prediction) for the same program at the same time.

[0055] For complex programs, a scheme that supports both branching and prediction can provide improved performance over either of the two schemes (branching and prediction). Due to the potential benefits of applying both schemes to the same program, in the future, GPUs (or other data parallel architecture hardware) are likely to support combining branching and prediction for the same program.

[0056] According to one aspect, the assembly generated by the compiler of the data parallel architecture such as GPU can be as follows. In some aspects, the innermost convergence region with an if-pattern (e.g., If_endif pattern) control flow structure or an if-else pattern (e.g., if_else_endif pattern) control flow structure can be predicted with save_P0 or restore_P0 like a special register. In addition, one or more candidate regions with WGPR pressure within a threshold and with a defined pattern can be predicted. For example, one or more candidate regions can have a pattern similar to one of the following: an if-pattern control flow structure, an if-else pattern control flow structure, or a loop-pattern control flow structure. In some aspects, the remaining control flow blocks can be implemented with a branching scheme.

[0057] In some aspects, the prediction method may be faster than the branch method. The prediction method is a software solution in which the compiler can explicitly manage the prediction mask to handle dynamic control flow. In some aspects, the prediction may require the use of scalar registers to store the channel mask (active thread) before the prediction and restore the channel mask after the prediction. It will be appreciated by those skilled in the art that improper use of the prediction method may cause scalar register overflow.

[0058] Existing hardware may not support prediction and branching for the same program. Some aspects may determine a combination of prediction and branching for a program based on the control flow structure of the program, which may improve performance.

[0059] In the context of parallel programming in the presence of multiple threads, for example, in a GPU, a prediction scheme or a branching scheme may be selected to support different control flow structures in the program.

[0060] In branches (which is a hardware solution), the hardware can maintain the DPC level. Each divergent stage in the program may increase the DPC level accordingly. The increased DPC level may result in increased costs and decreased performance. Those skilled in the art will appreciate that the number of parallel threads may depend on the DPC level, and therefore, the higher the DPC level, the lower the parallelism that may exist in the GPU. Therefore, it may be desirable to minimize the DPC level to allow for increased parallelism and performance in a data parallel architecture.

[0061] Prediction is a software scheme where the software (compiler) can keep track of the currently active thread that is executing one or more current code blocks, and further keep track of the remaining active threads. The compiler may rely on a limited number of registers (called WGPRs, warp registers, or scalar registers) to perform its functions. Therefore, maximizing the use of the limited registers before any overflow occurs is desirable for performance.

[0062] In some aspects, limited register usage can be maximized by uniquely selecting one or more control flow structures for application prediction. For example, the selection of control flow structures can be based on one or more of the following: their commonality in different programs; their cost, such as the number of registers that may be required for application prediction; other relevant considerations for improving performance. In some aspects, control flow structures that can meet such requirements for improving performance can include one or more of the following: if-pattern, if-else-pattern, loop pattern, and other control flow structures that can be determined to meet the criteria.

[0063] Combining prediction with branching can improve performance in some ways. By maximizing the use of scalar registers when applying prediction, the lower the DPC level that may be fetched when applying the branch.

[0064] According to one aspect, a method is provided. The method may include analyzing a control flow structure of a program. In some aspects, analyzing the control flow structure of a program may include applying a branching scheme to the control flow structure in the program. In some aspects, by applying the branching scheme to the control flow structure in the program, relevant data related to the program may be determined. In some aspects, the relevant data may include a divergence depth of the control flow structure, which may also indicate a critical path.

[0065] The method may also include estimating scalar register pressure to ensure proper usage. In some aspects, estimating scalar pressure to ensure proper usage may also include ensuring that using predictions on such control flow blocks does not result in scalar register overflow. In some aspects, the method may also include determining or finding a critical path for control flow. In some aspects, the method may also include selectively using branches and predictions to optimize performance of control flow structures throughout the program.

[0066] In some respects, before applying branch scheme or prediction scheme, it may be necessary to perform some general analysis to determine which blocks (e.g., control flow structure) of the program will be conducive to applying the prediction instruction. Some general analysis can include one or more of the following: divergent depth analysis, convergence region determination and innermost convergence region determination. In some respects, when performing these analyses, the branch scheme can be applied to all regions of the program initially. In some respects, applying the branch scheme to all regions of the program can include initially adding branch instructions to all regions of the program. In some respects, branch instructions can be added to all regions of the program quickly and efficiently.

[0067] Using the results of these analyses, one or more control flow structures for applying the prediction can be determined. In some aspects, after determining the one or more control flow structures to be predicted, the prediction scheme can be applied to the determined one or more control flow structures. In some aspects, applying the prediction scheme to the determined one or more control flow structures can include adding prediction instructions to regions associated with the determined one or more control flow structures. In some aspects, adding prediction instructions to regions associated with the determined one or more control flow structures can include replacing or changing branch instructions (originally added) of regions associated with the determined one or more control flow structures with prediction instructions.

[0068] Thus, in some aspects, branching and prediction can be applied to selected areas of the same program. Branching can be applied to a first area of ​​the program and prediction can be applied to a second area of ​​the program. In some aspects, the second area of ​​the program can include one or more areas associated with one or more control flow structures determined to be beneficial for applying prediction as described herein. In some aspects, the first area of ​​the program can include all areas of the program except the second area.

[0069] In some aspects, a block may be divergent if it has multiple successors. In some aspects, a block may be convergent relative to a divergent block if a block (convergent block) subsequently dominates a divergent block.

[0070] Given any basic block in a control flow graph, on any path from an entry block (inclusive) to a basic block (exclusive) (where each block is visited once), the maximum number of one or more divergent blocks visited can be defined as the divergence depth of the basic block. The terms "inclusive" and "exclusive" as used herein can refer to the inclusion or exclusion of one or more exit paths of a block used to determine the divergence depth of a block of interest (e.g., a basic block), respectively. The term "inclusive" means that one or more exit paths of a block are considered when calculating the divergence depth of a basic block. While the term "exclusive" means that one or more exit paths of a block are not considered when calculating the divergence depth of a basic block. For example, in order to determine the divergence depth of a basic block at a certain position in the control flow structure of a program, the divergence depth calculation can start from the entry block. The divergence depth of the basic block can be calculated by considering one or more exit paths of the entry block. For example, if the exit path of the entry block diverges (e.g., multiple exit paths), the divergence depth can be increased by 1, while if the exit path of the entry block does not diverge (e.g., one exit path), the divergence depth remains unchanged. The same approach may be taken for one or more blocks between the entry block and the basic block. At a basic block, calculating the divergence depth of the basic block may not take into account one or more exit paths, because any divergence at the basic block may result in a higher divergence depth than the correct value. Other examples of divergent control flow graphs are described herein.

[0071] Figure 1A A structured control flow graph (CFG) according to one aspect is shown. CFG 120 can be viewed as a representation of divergent flow. In CFG 120, left path 121 can lead to a divergent block, baseblock (bb) 101, and right path 122 can lead to its convergent block bb 103. In one aspect, bb 100 can represent an if-pattern control flow structure, such as an if statement indicating a condition, such that if the condition is true or valid, path 121 can be obtained, and if the condition is false or invalid, path 123 can be obtained. This if-pattern control flow structure can increase the divergence depth at bb 101 and correspondingly increase the DPC level by 1. Similarly, bb 101 can represent a second level of divergence, such as another if-pattern control flow structure.

[0072] In one aspect, a path may initially or at an initial block 100 have a divergence depth of 0. In the figure, the divergence depth is represented by "dd". For example, at bb 101 and bb 102, the path leading to the divergent blocks may increase its divergence depth. Similarly, the path leading to the convergent blocks may decrease its divergence depth, for example, at bb 103 and 104. Thus, the divergence depth at bb 101 may be 1, the divergence depth at bb 102 may be 2, the divergence depth at bb 103 may be 1, and the divergence depth at block 104 may be 0. As shown, convergent block bb 103 may converge relative to divergent block bb 101, and similarly, block 104 may converge relative to divergent block bb 100.

[0073] In CFG 120, bb 102 has the highest or largest divergence depth among these blocks. The divergence depth at bb 102 is 2, which can correspond to two levels of DPC. In one aspect, the level of the DPC associated with CFG 120 can be reduced by applying prediction to selected control flow structures. In one aspect, the innermost control flow structure including bb 101, bb 102, and bb 103 can be selected to apply prediction. The innermost control flow structure may be the least expensive of the control flow structures in terms of registers required for prediction. By applying prediction to bb 101, bb 102, and bb 103, one level of divergence can be handled, thereby reducing the DPC level by 1, which may not be the case if only branches are applied.

[0074] Figure 1BAn unstructured (or unstructured) CFG according to one aspect is shown. Unstructured CFG 130 can be viewed as another representation of divergent flow. In unstructured CFG 130, the successor of a block may or may not be a convergent block. In one aspect, bb 105 can represent an if-else-pattern control flow structure such that bb 106 can represent a successor block of the "if" portion of the if-else-pattern, and bb107 can represent a successor block of the "else" portion of the if-else-pattern. In one aspect, successor blocks bb 106 and 107 can be merged at bb 108, as shown.

[0075] In some aspects, if the successor of a block is not a convergent block, the divergence depth of the successor block can be increased by 1. For example, bb106 and bb 107 are successors of bb 105, but are not convergent blocks. The divergence depths at bb 106 and 107 are both 1, increasing by 1 from the divergence depth at bb105. In some aspects, if the successor block is a convergent block, its divergence depth may be the same as the entry block it converges. For example, bb 108 is a convergent block that converges the divergence generated by bb 105. Therefore, bb 108 reduces the divergence by the amount generated by bb 105, which is 1 in this example. Therefore, the divergence depth of bb 108 is the same as the divergence depth of bb 105, both of which are 0.

[0076] In some aspects, a block (e.g., bb 108), while converging relative to block bb 105, may be divergent, with two paths emerging from the block (diverging to block bb 109 and block bb 110). In the case of bb 108, its divergence depth may be determined based on its corresponding divergent block (e.g., bb 105). In some aspects, a block (e.g., bb 110) may be a successor block of multiple divergent blocks (e.g., bb 108 and bb 109), and thus the divergence depth of the successor block bb 110 may be determined based on the higher divergence depth among the multiple predecessor divergent blocks. In the case of bb 110, its divergence depth may be 2, increasing by 1 from the divergence depth of bb 109 (having a higher divergence depth than bb 108). In some aspects, a block (e.g., bb 112) may be a convergent block relative to multiple divergent blocks (e.g., bb 108 and bb 109). In the case of bb 112, its divergence depth may be determined based on the lower divergence depths among the multiple preceding divergence blocks. Thus, the divergence depth of bb 112 may be 0, which is the divergence depth of bb 108 (which has a lower divergence depth than bb 109).

[0077] Figure 2AAn example of a divergent CFG according to one aspect is shown. CFG 220 can be similar to CFG 120, except for block bb 202 and block bb 203. In CFG 220, bb 202 is a divergent block as a result of loop 221. In some aspects, the loop can have a counter that operates according to a condition (e.g., a maximum exit count). The loop may increase the divergence of the associated block. Therefore, bb 202 can have an increased divergence depth of 3. Therefore, bb 203 can be a convergent block relative to both bb 201 and bb 202, and have a divergence depth of 1, similar to the divergence depth of bb 201. In the case of bb 204, the block can converge relative to bb 200 and have a divergence depth of 0, similar to the divergence depth of bb 200.

[0078] Figure 2B Another example of a divergent CFG according to one aspect is shown. In one aspect, CFG 230 may include loop 231 that diverges from bb 208 and diverges to bb 206 as shown. Since bb 206 is a successor block of divergent blocks bb 205 and bb 208, bb 206 may have a divergence depth of 2, as shown. bb 207 is a successor block of divergent bb 206 and therefore has a divergence depth of 3. bb 208 is a convergence block relative to bb 206 and is a successor block of convergence block 207, and therefore, bb 208 has a divergence depth of 2. bb 209 is a convergence block of both bb 208 and bb 205 and has a divergence depth of 0.

[0079] According to some aspects, a convergent region may refer to a path from a convergent block to its corresponding one or more divergent blocks. In some aspects, a convergent region may include all blocks along the path from a convergent block to a corresponding divergent block. Figure 3A and Figure 3B Also shown are some examples of convergence regions according to some aspects.

[0080] Figure 3A 320 can be similar to Figure 1A CFG 120. In one aspect, CFG 320 may include convergence regions 332 and 334 as shown. Convergence region 332 may include divergence blocks bb301, bb302, and convergence block bb303. Convergence region 334 may include divergence block bb300, convergence block bb304, and convergence region 332.

[0081] Figure 3B 330 may be similar to Figure 1BCFG 130. In one aspect, CFG 330 may include convergence regions 332 and 334. Convergence region 332 may include divergent blocks bb 305, bb 306, bb 307, and convergence block bb 308 (converging with respect to bb 305). Convergence region 334 may include divergent block bb 308, divergent block bb 309, bb 310, bb 311, and convergence block 312 (converging with respect to bb 308 and 309). In some aspects, a convergence region (e.g., 334) may include more than one divergent block (e.g., bb 308 and bb 309).

[0082] In some aspects, a corresponding divergent block in a convergent region may have the same or higher divergent depth than a convergent block in a convergent region. For example, a corresponding divergent block may have a loop that increases the divergent depth of the block and results in a higher divergent depth than a corresponding convergent block in a convergent region.

[0083] In some aspects, a convergent region can refer to a path from a convergent block to its corresponding divergent block, with the same divergent depth or a higher depth (e.g., if it is a loop region), and one or more blocks therein. In some aspects, with respect to a convergent region, only convergent blocks can jump out of the region (have paths outside the region), while blocks outside the region can only jump to divergent blocks.

[0084] In some aspects, for a convergent region, only the convergent blocks (typically the bottom blocks in the convergent region) may have paths outside of the region or exit the region. Similarly, the divergent blocks (typically the top blocks) may have paths entering the region from outside the region (via the divergent blocks). Any intermediate blocks in the convergent region may have no paths entering the region or exiting the region.

[0085] In some aspects, prediction can be combined with branching to improve performance. In some aspects, prediction can be applied to the innermost convergent region of a program. Thus, the innermost convergent region of a program can be determined to apply prediction. In some aspects, the prediction applied to the innermost region can be based on free prediction.

[0086] Those skilled in the art will appreciate that free prediction may refer to a form of prediction that avoids using warp registers to store prediction masks. Therefore, free prediction may not use warp registers, while other methods may require the use of warp registers. Avoiding the use of warp registers further improves performance by allowing warp registers to be used in regions (e.g., convergence regions and candidate regions, rather than the innermost convergence region).

[0087] In some aspects, free prediction can be based on special instructions that operate like a stack. The stack can be used to remember the prediction mask, thereby avoiding the use of the thread warp registers that store the active thread. Therefore, free prediction can further improve performance by using a stack-store-pop mechanism to save a level of prediction masks (i.e., store and restore the prediction lane mask).

[0088] Figure 4 4 shows the innermost convergence region of a CFG according to one aspect. In one aspect, CFG 420 can be similar to Figure 3A CFG 420. In one aspect, CFG 420 may include convergence regions 432 and 434 as shown. Convergence region 432 may include divergence blocks bb401, bb402, and convergence block bb403 (converging with respect to bb401). Convergence region 434 may include divergence block bb400, convergence block bb404, and convergence region 432.

[0089] In some aspects, if a convergence region has only one convergence block, the convergence region can be innermost and the convergence block can be the innermost convergence block. For example, convergence region 432 can be the innermost convergence region of CFG 420 because the region has only one convergence block, such as bb 403. Therefore, convergence block bb 403 can be the innermost convergence block of CFG 420. In some aspects, a divergent block (e.g., bb 401) in the innermost convergence region can be considered an innermost divergent block.

[0090] In some aspects, if a divergent block is in the innermost convergent region, the divergent block can be the innermost, with a divergent depth that is the same as or higher than the divergent depth of the convergent block (e.g., if the divergent depth has a loop). In some aspects, a convergent region may have a higher divergent depth in the program.

[0091] As described herein, in some aspects, an innermost convergent region of a program may be determined to apply prediction according to a free prediction method. After determining the innermost convergent region and applying free prediction thereto, in some aspects, one or more candidate regions of the program may be determined for prediction. In some aspects, the prediction applied to the one or more candidate regions may rely on or use warp registers.

[0092] In some aspects, one or more candidate regions of a program may be determined in order of highest divergence depth from high to low. In some aspects, the divergence depth of each subsequent candidate region in the determined one or more candidate regions may be equal to or less than the divergence depth of the determined previous candidate region. In some aspects, the divergence depth of the first candidate region in the determined one or more candidate regions may be equal to or less than the divergence depth of the innermost convergence region (highest divergence depth). The divergence depth of the second candidate region in the determined one or more candidate regions may be equal to or less than the divergence depth of the first candidate region. The number of determined candidate regions may be determined based on a threshold pressure. In some aspects, if a prediction is applied to each candidate region, the scalar register pressure of the associated processing unit is lower than a threshold pressure, each candidate region in the one or more candidate regions may be determined. As described herein, the threshold pressure may refer to the pressure at which a register may overflow.

[0093] In some aspects, one or more candidate regions of a program may be determined for prediction based on one or more of: a threshold pressure and a highest divergence depth of the program. In some aspects, each of the one or more candidate regions may be determined if the scalar register pressure is below the threshold pressure. In some aspects, the one or more candidate regions may be determined in order of highest divergence depth of the program from high to low.

[0094] In some aspects, determining one or more regions to predict (including an innermost convergence region and one or more candidate regions) can be based on determining a control flow structure including a most nested function (or a most nested control flow structure).

[0095] In some aspects, one or more candidate regions for prediction can be determined based on regions that can maximize performance while keeping prediction overhead low. In some aspects, one or more candidate regions can include one or more of the following: if-pattern (e.g., If_endif mode) control flow structure, if-else-pattern (e.g., if_else_endif mode) control flow structure, and loop-pattern control flow structure. Therefore, in some aspects, one or more candidate regions can be determined based on the three types of regions described.

[0096] Figure 5An if-pattern control flow structure according to one aspect is shown. In some aspects, the if-pattern control flow structure 500 may include a convergence block 506 that converges two paths that diverge from the divergence block 502. In some aspects, the two paths that diverge from the divergence block 502 may include a direct path to the convergence block 506 and an indirect path to the convergence block 506, where the indirect path may pass through a regular block or convergence region, such as the if-body block 504. In some aspects, the divergence depth of the divergence block 502 may be the same as the divergence depth of the convergence block 506. In some aspects, the two paths diverge from

[0097] Figure 6 A loop-pattern control flow structure according to one aspect is shown. In one aspect, the loop pattern control flow structure 600 may include one or more of the following: a loop header 602, a loop body 604, a loop latch 606, and a landing bb 608. In one aspect, the landing block in the loop-pattern control flow structure 600 may be a convergence block after executing the loop bb. In one aspect, the loop latch block 606 may be a divergent block. In some aspects, the loop latch 606 may have a trailing edge pointing to the loop header 602. In some aspects, the loop header 602 may be a regular block. In some aspects, the loop body 604 may be a regular block or a convergence region.

[0098] In some aspects, loop header 602 may indicate a set of conditions that, if true, may allow the program to continue to loop body 604. Once the set of conditions is no longer true, the program may continue to landing bb 608. In some aspects, loop latch 606 may determine whether the conditions in loop header 602 remain true to loop the program back to loop header 602 or exit the loop to landing bb 608.

[0099] Fig. 7A An if-else pattern control flow structure of an unstructured CFG according to one aspect is shown. In one aspect, the if-else pattern control flow structure 750 may include a convergence block 758 that converges two paths diverging from a divergence block 7522. In some aspects, each of the two paths diverging from the divergence block 752 can be an indirect path through a regular block or a convergence region. For example, in the if-else pattern control flow structure 750, one path can pass through the if-body block 754 and the other path can pass through the else-body block 756, as shown.

[0100] Figure 7BAn if-else pattern control flow structure of a structured CFG according to one aspect is shown. In some aspects, the if-else pattern control flow structure 700 may include one or more divergent blocks 702 and 706, one or more convergent blocks 706 and 710, as shown. In some aspects, one or more divergent blocks 702 and 706 in the structured CFG may exist or may be executed one after another (or sequentially) as shown.

[0101] In some aspects, the if-else mode control flow structure of the structured CFG 700 may sequentially include a first convergence region 720 and a second convergence region 730. In one aspect, the first convergence region 720 may include a first divergence block 702 that diverges two paths to a first convergence block 706. The two paths diverging from the divergence block 702 may include a direct path to the convergence block 706 and an indirect path to the convergence block 706, wherein the indirect path may pass through a regular block or a convergence region, such as the if-body block 504.

[0102] In some aspects, the second convergence region 730 may include a second diverging block 706 that diverges two paths to a second convergence block 710. The two paths diverging from the diverging block 706 may include a direct path to the convergence block 710 and an indirect path to the convergence block 710, wherein the indirect path may pass through a regular block or convergence region, such as an else-body block 708.

[0103] Thus, in some aspects, in the if-else mode control flow structure of structured CFG 700, the control flow structure may initially converge on the if-body region (e.g., if-body 704) at, for example, block 706, before entering the else-body region (e.g., block 708). Thereafter, the control flow structure may converge on the else-body region, e.g., else-body block 708, at, for example, block 710.

[0104] Fig. 8A An exemplary instruction of an if-pattern control flow structure according to one aspect is shown. The if-pattern exemplary instruction 800 may correspond to Figure 5 The if-pattern control flow structure 500. The if-pattern exemplary instruction 800 may refer to an instruction that a compiler may generate, such as an if statement.

[0105] In one aspect, the if-pattern exemplary instruction 800 may include one or more of the following: a divergence block 802, an if-body block 804, and an end block or convergence block 806. In one aspect, at block 802, the instruction "w0=p0" may indicate to save all channel masks (i.e., save all active threads). In addition, at block 802, a set of conditions may be stored in a second thread warp register. In one aspect, p0 may control which threads are active, and based on p0, the active threads may be set to or compared to these conditions. For one or more active threads for which the condition is true, the if-body block 804 may follow. For one or more active threads for which the condition is not true, the end block 806 may follow. At the end block 806, the prediction mask may be restored so that all threads that were active before the if-pattern control flow structure 800 are then reactivated after processing the if-pattern control flow structure.

[0106] In some aspects, an if-pattern control flow structure, such as the if-pattern exemplary instruction 800, may require two warp registers for prediction. In some aspects, the number of warp registers required to predict a control flow structure may be based on the level of divergence (number of nested blocks) that the control flow structure may have. The more nested the control flow structure is, the more warp registers may be required to predict the control flow structure.

[0107] Figure 8B An exemplary instruction of a loop-pattern control flow structure according to one aspect is shown. The loop-pattern exemplary instruction 810 may correspond to Figure 6 The loop-pattern control flow structure 600 of the embodiment of the present invention. In one aspect, the loop-pattern exemplary instruction 810 may include one or more of the following: a loop preamble 812, a loop body 814, a loop latch 816, and a landing or end block 818. In some aspects, based on a set of conditions set in the loop latch, the path can lead to the end block 818 or loop back to the loop body 814, as shown in the figure. In one aspect, the loop preamble block 812 can indicate that all channel masks (active threads) are saved. In one aspect, based on the conditions set in the loop latch 816, one or more active threads can perform or execute operations according to the loop body 814 and the loop latch 816. At the end box 818, the prediction mask can be restored. In some aspects, the loop-pattern control flow structure, such as the loop-pattern exemplary instruction 810, may require three thread warp registers for prediction.

[0108] Figure 8CAn exemplary instruction of an if-else pattern control flow structure according to one aspect is shown. The if-else pattern exemplary instruction 820 may correspond to Fig. 7A The if-ese control flow structure 750. In one aspect, the if-else-pattern exemplary instruction 820 may include one or more of the following: a divergence block 822, an if-body block 824, an else-block 826, and an end block or convergence block 828. In one aspect, the divergence block 822 may indicate that all channel masks (active threads) are saved and a set of conditions are stored (stored in thread warp registers). For one or more active threads where the condition is true, the if-body block 824 may be followed. For one or more active threads, if the condition is not true, the else-body block 826 may be followed. The end block or convergence block 828 may converge the paths from the if-body block 824 and the else-body block 826. In addition, at the end block 828, the prediction mask may be restored. In some aspects, the if-else-pattern control flow structure, such as the if-else-pattern exemplary instruction 820, may require three thread warp registers for prediction.

[0109] In some aspects, determining the innermost convergent region and one or more candidate regions can be based on a critical path of the program. In some aspects, the critical path can refer to a path taken or traversed by all divergent blocks and their corresponding convergent blocks that may obtain the highest divergence depth in the entire program.

[0110] According to one aspect, the innermost convergent block with the maximum divergence depth can be on the critical path. The innermost convergent block with the maximum divergence depth can be represented as bb. In some aspects, if a convergent block (which can be represented as bb') with a divergence depth of 0 immediately post-dominates bb on any path from bb' (inclusive) to bb (inclusive), the convergence block is on the critical path. The term "inclusive" used herein when referring to bb' and bb means that the divergence depths of bb' and bb are included in the analysis used to determine the critical path. Correspondingly, divergent blocks that converge with those convergence blocks on the critical path and have the same divergence depth can be on the critical path.

[0111] In one aspect, reference Figure 1A , bb 103 is the innermost convergent block and may be on a critical path associated with CFG 120. In addition, bb 104 may refer to a convergent block with a divergence depth of 0, which may directly post-dominate bb 103. Therefore, bb 104 may also be on a critical path associated with CFG 120. The critical path associated with CFG 120 may also include divergent blocks (e.g., bb 101 is a corresponding divergent block of convergent block 103, and bb 100 is a corresponding divergent block of convergent block 104).

[0112] Therefore, predictions applied to selected areas can be combined with branches to improve performance. Determining an area of ​​a program for prediction may involve one or more operations. In one aspect, a branching scheme may initially be applied to the control flow structure of the program. In some aspects, the maximum divergence depth of a program may be calculated as the DPC level of the program. In one aspect, a compiler may determine one or more blocks or areas to be predicted for reducing the DPC level. In some aspects, the innermost divergent block with an if-pattern or if-else pattern may be given the highest priority for prediction. In some aspects, a scalar register pressure analysis may be performed to determine one or more candidate areas to be predicted. In some aspects, a scalar register pressure analysis may determine the maximum and minimum number of divergent blocks to be predicted. In some aspects, the priority of the prediction may be based on a critical path. For example, a higher priority of prediction may be given to a divergent block located on a critical path where the divergence depth is maximized.

[0113] As described herein, the prediction applied to the innermost convergence region can be based on free prediction. In some aspects, one or more instructions including save_p0, neg_p0, and pop_p0 can be used to save a level of p0 (prediction channel mask) on the stack. In some aspects, these instructions may be faster than using scalar registers. Therefore, in some aspects, one or more of save_p0, neg_p0, and pop_p0 can be used to predict the innermost convergence region indicating an if-pattern or if-else pattern control flow structure. Using these instructions to predict the innermost convergence region can improve performance because this method does not require the use of scalar registers.

[0114] In some aspects, one or more candidate regions for applying prediction based on one or more scalar registers may refer to a non-innermost region on a critical path. In some aspects, the one or more candidate regions may include one or more of the following: an if-pattern control flow structure, an if-else-pattern control flow structure, and a loop-pattern control flow structure. In some aspects, the one or more candidate regions may be determined based on a scalar register limit so that as many candidate regions as possible may be selected to perform prediction before the scalar register limit is reached (i.e., to avoid scalar register overflow).

[0115] Fig. 9A method for determining one or more regions for prediction according to one aspect is shown. In one aspect, method 900 may include calculating a highest divergence depth D of the program at 902. In some aspects, method 900 may also include: at 904, for each convergence block bb having a divergence depth D, where D>=0, determining a corresponding divergence block bb' of the same divergence depth D. In some aspects, if the highest divergence depth is less than 0, the method may end at 910.

[0116] In some aspects, when the highest divergence depth D>=0 is determined, method 900 may also include: at 906, checking the path from divergent block bb' to convergent block bb to determine whether there are any candidate regions and constructing convergent regions. In some aspects, the candidate regions may include one or more of the following: if-pattern control flow structures, if-else mode control flow structures, and loop-pattern control flow structures. If such a candidate pattern is not determined, the method may return to the operation performed at 904, where D=D-1.

[0117] In some aspects, if a candidate region is determined at 906, the method may further include, at 908, applying a prediction if the candidate region is innermost or if register pressure in the region is within a threshold. In some aspects, if the candidate region is innermost, the applied prediction may be based on a free prediction. In some aspects, if the candidate region is non-innermost and the register pressure is within a threshold, the applied prediction may use one or more warp registers. After applying the prediction, the method 900 may return to the operation performed at 904, D=D-1.

[0118] As described herein, in some aspects, control flow blocks or structures on a critical path of a program may be analyzed for predictive applicability. In some aspects, the predictive applicability of a control flow block may be based on one or more patterns, such as if-pattern, if-else-pattern, and loop-pattern. In some aspects, predictive applicability may also be based on register pressure, such that if the register pressure is within a threshold, the prediction may be applied to the control flow block. Determining whether register pressure is within a threshold may involve estimating register pressure based on applying a prediction on the control flow block, and if the estimated register pressure is within a threshold, the prediction may be applied to the control flow block. In some aspects, a threshold may refer to a value or a reference above which a thread warp register may overflow. In some aspects, a structured pattern may be determined based on the methods and conditions described so as to improve performance compared to a full branch or full prediction scheme.

[0119] Fig.10A method according to one aspect is shown. In one aspect, method 1000 may be performed by a processing unit (e.g., a GPU). In one aspect, the method may include: at 1002, receiving a program for execution. The method may also include: at 1004, analyzing the program to obtain data about control flow structures of the program. The method may also include: at 1008, determining one or more control flow structures of the program to be predicted based at least in part on the acquired data. The method may also include: at 1014, applying the prediction to one or more control flow structures of the program.

[0120] In some aspects, analyzing a program to obtain data about a control flow structure may include analyzing one or more regions of the program or the divergence depth of the control flow structure. In some aspects, analyzing a program to obtain data about a control flow structure may include determining one or more of the following: an innermost convergence region, a convergence region, and a critical path. In some aspects, analyzing a program to obtain data about a control flow structure of a program may include: at 1006, applying a branching scheme to the program. In some aspects, applying a branching scheme to a program includes adding branch instructions to all regions (control flow structures) of the program. In some aspects, based at least in part on the acquired data, determining one or more control flow structures of a program to be predicted may include: at 1010, determining the innermost convergence region of the program with the highest divergence depth. In some aspects, applying a prediction to one or more control flow structures of a program may include: at 1016, applying a prediction to the innermost convergence region of the program with the highest divergence depth.

[0121] In some aspects, applying prediction to the innermost convergent region of the program with the highest divergence depth may include applying a free prediction scheme. In some aspects, determining the innermost convergent region of the program with the highest divergence depth may include determining one of: an if-pattern control flow structure and an if-else-pattern control flow structure.

[0122] In some aspects, determining one or more control flow structures to be predicted for a program based at least in part on the acquired data may also include: at 1012, determining one or more candidate regions of the program in order of highest divergence depth from high to low. In some aspects, the divergence depth of each subsequent candidate region determined may be equal to or less than the divergence depth of the previous candidate region determined. In some aspects, the divergence depth of a first candidate region among the one or more determined candidate regions may be equal to or less than the divergence depth of the innermost convergence region (highest divergence depth). The divergence depth of a second candidate region among the one or more determined candidate regions may be equal to or less than the divergence depth of the first candidate region. The number of determined candidate regions may be determined based on a threshold pressure.

[0123] In some aspects, applying the prediction to one or more control flow structures of the program may also include, at 1018 , applying the prediction to each candidate region of the one or more candidate regions.

[0124] In some aspects, determining one or more candidate regions of the program in order of highest divergence depth from high to low may also include: for each candidate region of the one or more candidate regions, if the prediction is applied to each candidate region, determining that a scalar register pressure associated with the PU is lower than a threshold pressure of the PU.

[0125] In some aspects, determining one or more candidate regions of the program in order of highest divergence depth from highest to lowest may include determining one or more of: an if-pattern control flow structure, an if-else-pattern control flow structure, and a loop-pattern control flow structure.

[0126] In some aspects, determining one or more control flow structures of the program to predict based at least in part on the acquired data may include analyzing a scalar register pressure associated with the PU to determine one or more candidate regions of the program to predict based on a threshold pressure and a highest divergence depth of the PU.

[0127] In some aspects, analyzing the scalar register pressure to determine the one or more candidate regions may include: for each candidate region of the one or more candidate regions, if the prediction applies to the candidate region, determining that the scalar register pressure is below a threshold pressure. In some aspects, analyzing the scalar register pressure to determine the one or more candidate regions may include: determining the one or more candidate regions in order of highest divergence depth of the program from highest to lowest.

[0128] In some aspects, analyzing scalar register pressure to determine one or more candidate regions of the program may include determining one or more of: an if-pattern control flow structure, an if-else-pattern control flow structure, and a loop-pattern control flow structure.

[0129] In some aspects, applying prediction to one or more control flow structures of the program may include applying prediction to the determined one or more candidate regions of the program.

[0130] In some aspects, applying prediction to one or more control flow structures of a program may include adding prediction instructions to regions associated with the one or more control flow structures. In some aspects, applying prediction to one or more control flow structures of a program may include replacing branch instructions associated with the one or more control flow structures with the prediction instructions.

[0131] Thus, in some aspects, branching and prediction can be applied to selected areas of the same program. Branching can be applied to a first area of ​​the program and prediction can be applied to a second area of ​​the program. In some aspects, the second area of ​​the program can include one or more areas associated with one or more control flow structures determined to be beneficial for applying prediction as described herein. In some aspects, the first area of ​​the program can include all areas of the program except the second area.

[0132] In some aspects, branching and prediction can be applied to the same program to allow for improved performance of programs with control flow structures. In some aspects, the innermost convergent region with an if-pattern control flow structure or an if-else pattern control flow structure can be predicted. In some aspects, these innermost convergent regions can be based on free predictions. For example, due to the save_p0 and restore_p0 special registers, an innermost if-pattern control flow structure or an innermost if-else pattern control flow structure can be freely predicted. The use of free predictions can further improve the performance of the program. In some aspects, the register pressure associated with the candidate region can be estimated or calculated to ensure that the prediction of the candidate region does not cause overflow. In some aspects, the divergence depth of the control flow structure can be analyzed to determine the critical path of the program. The critical path of the program can be used to determine one or more candidate regions for prediction, which further reduces the DPC level.

[0133] One or more aspects described herein can be applied to any data parallel architecture that supports SIMD mode (single instruction, multiple data). For example, one or more aspects described herein can be applied to all next generation GPUs that allow branching schemes and prediction schemes to be combined for the same program. The aspects described herein can also be applied to data parallel architectures that execute, process or run divergent codes, such as GPUs. In addition, one or more aspects can be applied to compiler design and implementation of these data parallel architectures.

[0134] Fig.11 It is an apparatus according to one aspect that can perform any or all of the operations of the above methods and features described explicitly or implicitly herein. In some aspects, those skilled in the art can understand that the apparatus 1100 can refer to a data parallel architecture, a processing unit, a GPU, etc. In some aspects, the apparatus 1100 can be used to implement one or more aspects described herein.

[0135] As shown, the device 1100 may include a processor 1110 (e.g., a central processing unit (CPU) or a special processor, such as a graphics processing unit (GPU), or other such processor unit), a memory 1120, a non-transitory mass storage 1130, an input / output interface 1140, a network interface 1150, and a transceiver 1160, all of which are communicatively coupled via a bidirectional bus 1170. According to certain aspects, any or all of the elements shown may be used, or only a subset of the elements shown may be used. In addition, the device 1100 may include multiple instances of certain elements, such as multiple processors, multiple memories, or multiple transceivers. In addition, elements of the hardware device may be directly coupled to other elements without a bidirectional bus. In addition to or in place of processors and memories, other electronic components such as integrated circuits may be used to perform the desired logical operations.

[0136] The memory 1120 may include any type of non-transitory memory, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), read-only memory (ROM), or any combination thereof. The mass storage element 1130 may include any type of non-transitory storage device, such as a solid-state disk, a hard disk drive, a disk drive, an optical drive, a USB drive, or any computer program product for storing data and machine executable program code. According to certain aspects, the memory 1120 or the mass storage 1130 may record therein statements and instructions executable by the processor 1110 for performing any of the above-described method operations.

[0137] One or more aspects of the present invention may be implemented using electronic hardware, software, or a combination thereof. Some aspects may be implemented by one or more computer processors executing program instructions stored in a memory. Some aspects may be implemented in part or in whole in hardware, for example, using one or more field programmable gate arrays (FPGAs) or application specific integrated circuits (ASICs) to quickly perform processing operations.

[0138] It should be understood that although specific aspects of the technology are described herein for illustrative purposes, various modifications may be made without departing from the scope of the technology. Therefore, the specification and drawings are simply regarded as an illustration of the invention as defined by the appended claims, and are contemplated to cover any and all modifications, variations, combinations or equivalents that fall within the scope of the invention. Specifically, providing a computer program product, a program element, or a program storage device such as a magnetic or optical wire, tape or optical disk for storing machine-readable signals for controlling the operation of a computer according to the method of the present technology, and / or for constructing some or all of its components according to the system of the present technology is within the scope of the present technology.

[0139] The actions associated with the methods described herein may be implemented as coded instructions in a computer program product. In other words, a computer program product is a computer readable medium on which software codes are recorded to perform the methods when the computer program product is loaded into a memory and executed on a microprocessor of a wireless communication device.

[0140] In addition, each operation of the method can be performed on any computing device (e.g., personal computer, server, PDA, etc.), and can be performed according to one or more program elements, modules or objects or a part of one or more program elements, modules or objects generated from any programming language (e.g., C++, Java, etc.). In addition, each operation or a file or object that implements each operation, etc. can be performed by dedicated hardware or a circuit module designed for this purpose.

[0141] Although a description is provided herein, some aspects may be implemented only by hardware, or by software and a necessary general hardware platform. Based on this understanding, the technical solution of the present invention may be embodied in the form of a software product. The software product may be stored in a non-volatile or non-transient storage medium, which may be a compact disc read-only memory (CD-ROM), a USB flash drive, or a removable hard disk. The software product includes a plurality of instructions that enable a computer device (a personal computer, a server, or a network device) to perform a method according to one or more aspects described herein. For example, such execution may correspond to a simulation of the logical operations described herein. Additionally or alternatively, the software product may include a plurality of instructions that enable a computer device to perform operations for configuring or programming a digital logic device according to one or more aspects described herein.

[0142] Although some aspects have been described with reference to specific features and embodiments, it is apparent that various modifications and combinations are possible without departing from the scope of the invention. Accordingly, the specification and drawings are to be regarded simply as illustrations of the invention as defined by the appended claims, and are contemplated to cover any and all modifications, variations, combinations or equivalents that fall within the scope of the invention.

Claims

1. A method, characterized in that include: The processing unit (PU) receives the program for execution; The PU applies a branching scheme to the program to obtain data about a control flow structure of the program; The PU determines, based at least in part on the acquired data, one or more control flow structures of the program to be predicted; The PU applies prediction to the one or more control flow structures of the program.

2. The method according to claim 1, characterized in that The PU determines, at least in part based on the acquired data, one or more control flow structures of the program to be predicted, including: The PU determines the innermost convergence region of the program having the highest divergence depth.

3. The method according to claim 2, characterized in that The PU applies predictions to the one or more control flow structures of the program including: The PU applies prediction to the innermost convergence region of the process having the highest divergence depth.

4. The method according to claim 3, characterized in that Applying, by the PU, prediction to the innermost convergence region of the program having the highest divergence depth comprises applying a free prediction scheme.

5. The method according to claim 2, characterized in that: The PU determining the innermost convergence region of the program having the highest divergence depth includes determining one of: an if-pattern control flow structure and an if-else-pattern control flow structure.

6. The method according to claim 1, characterized in that The PU determining, based at least in part on the acquired data, one or more control flow structures of the program to be predicted further comprises: The PU determines one or more candidate regions of the program in descending order of highest divergence depth.

7. The method according to claim 6, characterized in that The PU applying prediction to the one or more control flow structures of the program further comprises: The PU applies prediction to each candidate region of the one or more candidate regions.

8. The method according to claim 6, characterized in that The PU determines, in descending order of the highest divergence depth, one or more candidate regions of the program including: For each candidate region of the one or more candidate regions, it is determined that a scalar register pressure associated with the PU is below a threshold pressure of the PU if prediction applies to the each candidate region.

9. The method according to claim 6, characterized in that The PU determines, in descending order of highest divergence depth, one or more candidate regions of the program, including determining one or more of the following: if-pattern control flow structure; if-else-pattern control flow structure; loop-pattern control flow structure.

10. The method according to claim 2, characterized in that The PU determines, at least in part based on the acquired data, one or more control flow structures of the program to be predicted, including: The PU analyzes a scalar register pressure associated with the PU to determine one or more candidate regions of the program to predict based on a threshold pressure of the PU and the highest divergence depth.

11. The method according to claim 10, characterized in that The PU applies predictions to the one or more control flow structures of the program including: The PU applies prediction to the determined one or more candidate regions of the program.

12. The method according to claim 10, characterized in that Analyzing the scalar register pressure to determine one or more candidate regions includes: For each candidate region of the one or more candidate regions, if the prediction applies to the candidate region, it is determined that the scalar register pressure is below the threshold pressure.

13. The method according to claim 10, characterized in that Analyzing the scalar register pressure to determine one or more candidate regions includes: The PU determines the one or more candidate regions in descending order of the highest divergence depth of the program.

14. The method according to claim 10, characterized in that Analyzing the scalar register pressure to determine one or more candidate regions of the program includes determining one or more of the following: if-pattern control flow structure; if-else-pattern control flow structure; loop-pattern control flow structure.

15. A device, characterized in that: include: at least one processor and at least one machine-readable medium storing executable instructions that, when executed by the at least one processor, cause a processing unit to: receiving a program for execution; applying a branching scheme to the program to obtain data about a control flow structure of the program; determining one or more control flow structures of the program to be predicted based at least in part on the acquired data; Prediction is applied to the one or more control flow structures of the program.

16. The device according to claim 15, characterized in that: Based at least in part on the acquired data, determining one or more control flow structures of the program to be predicted includes: determining an innermost convergent region of the program having a highest divergence depth; Applying prediction to the one or more control flow structures of the program includes applying prediction to the innermost convergent region of the program having the highest divergence depth.

17. The device according to claim 16, characterized in that: Determining the innermost convergent region of the program having the highest divergence depth includes determining one of: an if-pattern control flow structure and an if-else-pattern control flow structure; Applying prediction to the innermost convergence region of the procedure having the highest divergence depth includes applying a free prediction scheme.

18. The device according to claim 15, characterized in that: Determining one or more control flow structures of the program to be predicted based at least in part on the acquired data further comprises: determining one or more candidate regions of the program in descending order of highest divergence depth; for each candidate region of the one or more candidate regions, determining that a scalar register pressure associated with the PU is below a threshold pressure of the PU if prediction applies to the each candidate region; Applying prediction to the one or more control flow structures of the program further comprises: applying prediction to each of the one or more candidate regions; The one or more candidate regions of the program include one or more of the following: an if-pattern control flow structure, an if-else-pattern control flow structure, and a loop-pattern control flow structure.

19. The device according to claim 15, characterized in that: Determining one or more control flow structures of the program to predict based at least in part on the acquired data includes: analyzing a scalar register pressure associated with the PU to determine one or more candidate regions of the program to predict based on a threshold pressure of the PU and the highest divergence depth; Applying prediction to the one or more control flow structures of the program includes applying prediction to the determined one or more candidate regions of the program.

20. The device according to claim 19, characterized in that: Analyzing the scalar register pressure to determine one or more candidate regions includes: for each candidate region of the one or more candidate regions, determining that the scalar register pressure is below the threshold pressure if the prediction applies to the candidate region; Determining the one or more candidate regions in descending order of the highest divergence depth of the program; The one or more candidate regions of the program include one or more of the following: an if-pattern control flow structure, an if-else-pattern control flow structure, and a loop-pattern control flow structure.

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