A chip bonding apparatus and method
By directly identifying the markings on chips and wafers using an infrared vision system and controller, the error problem caused by calibration wafers has been solved, achieving high-precision and high-efficiency chip bonding and improving equipment capacity.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- PIOTECH (HAINING) SEMICON EQUIP CO LTD
- Filing Date
- 2024-11-07
- Publication Date
- 2026-04-24
Smart Images

Figure CN119495604B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the technical field of semiconductor processing, and specifically to a chip bonding apparatus, a chip bonding method, and a computer-readable storage medium. Background Technology
[0002] In the chip-to-wafer bonding process, the conventional approach uses a calibration plate with reference points attached to a nozzle as an intermediate medium. This calibration plate can be etched with high-precision patterns. Two vision systems are then used to identify the chip to be bonded and the calibration plate, as well as the target wafer and the calibration plate, respectively. Afterward, the chip and wafer are transformed into the same calibration plate coordinate system, thereby achieving high-precision alignment and bonding between the chip and the wafer.
[0003] However, the solutions employed in the aforementioned existing technologies have several problems. First, using a calibration plate as an intermediate medium can easily introduce additional errors. Second, because chips come in a wide variety of sizes, ranging from 1mm×1mm to 26mm×33mm, different sized chips require different sized bonding head nozzles for adsorption. Therefore, each bonding head nozzle needs a dedicated calibration plate, which is very costly. Finally, using a calibration plate as an intermediate positioning medium requires two positioning steps: one between the chip and the calibration plate, and another between the wafer and the calibration plate. This increases the bonding process and time, leading to reduced equipment throughput.
[0004] To address the aforementioned problems in existing technologies, there is an urgent need in the field for a chip bonding technology that can avoid the additional errors caused by using calibration wafers as intermediate media during the bonding process, improve bonding accuracy, simplify the bonding process, thereby increasing bonding efficiency and boosting equipment productivity. Summary of the Invention
[0005] The following provides a brief overview of one or more aspects to offer a basic understanding of them. This overview is not an exhaustive summary of all conceived aspects, nor is it intended to identify key or decisive elements of all aspects, nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed descriptions that follow.
[0006] To overcome the aforementioned deficiencies in the prior art, the present invention provides a chip bonding apparatus, a chip bonding method, and a computer-readable storage medium, which can avoid the additional errors caused by using a calibration chip as an intermediate medium during the bonding process, improve bonding accuracy, simplify the bonding process, thereby improving bonding efficiency and increasing equipment capacity.
[0007] Specifically, the chip bonding apparatus provided according to a first aspect of the present invention includes: a bonding head for adsorbing a chip to be bonded and adjusting its orientation; an infrared vision system for penetrating the chip to acquire images of a first mark on its back and a second mark at a target bonding position of the chip; and a controller configured to: acquire an image with the first mark and the second mark via the infrared vision system; parse the image to determine the orientation of the first mark and the second mark in the image; adjust the orientation of the bonding head according to the orientation difference between the first mark and the second mark in the image to align the chip with the target bonding position; and bond the chip to the target bonding position via the bonding head.
[0008] Furthermore, in some embodiments of the present invention, the depth of field of the infrared vision system is less than the distance from the chip to the target bonding position. The infrared vision system first focuses on the first mark to acquire a first image containing the first mark, and then focuses on the second mark to acquire a second image containing the second mark, so that the controller can determine the pose of the first mark in the first image and the pose of the second mark in the second image, respectively.
[0009] The depth of field of the infrared vision system is greater than or equal to the distance from the chip to the target bonding position. The infrared vision system acquires a third image that simultaneously contains the first mark and the second mark, so that the controller can simultaneously determine the pose of the first mark and the second mark in the third image.
[0010] Furthermore, in some embodiments of the present invention, the controller is further configured to:
[0011] When the distance from the chip to the target bonding position is greater than the depth of field of the infrared vision system, the infrared vision system is controlled to acquire the first image and the second image respectively, so as to coarsely adjust the pose of the bonding head according to the pose of the first mark in the first image and the pose of the second mark in the second image; the bonding head is controlled to raise and lower the chip to move closer to the target bonding position; and after the distance from the chip to the target bonding position is less than or equal to the depth of field of the infrared vision system, the infrared vision system is controlled to acquire a third image that simultaneously contains the first mark and the second mark, so as to finely adjust the pose of the bonding head according to the pose of the first mark and the second mark in the third image.
[0012] Furthermore, in some embodiments of the present invention, the infrared vision system further includes an adjustment module for focusing the first mark and / or the second mark respectively to acquire a clear image of them.
[0013] Furthermore, in some embodiments of the present invention, the back side of the chip is provided with a plurality of first marks, and the target bonding position is correspondingly provided with a plurality of second marks. The controller is further configured to: determine the translation adjustment amount of the bonding head in the X and Y directions in the horizontal plane based on the positional difference between at least one first mark and its corresponding second mark in the image; determine the rotation adjustment amount of the bonding head in the Rz direction in the horizontal plane based on the positional difference between the plurality of first marks and its corresponding plurality of second marks in the image; and adjust the pose of the bonding head based on the translation adjustment amount and the rotation adjustment amount so that the chip is aligned with the target bonding position.
[0014] Furthermore, in some embodiments of the present invention, it further includes: a translation adjustment mechanism connected to the controller, for adjusting the position of the bonding head in the horizontal plane according to the translation adjustment amount; and a rotation adjustment mechanism connected to the controller, for adjusting a first posture of the bonding head in the horizontal plane according to the rotation adjustment amount.
[0015] Furthermore, in some embodiments of the present invention, the detection surface of the infrared vision system is parallel to the plane where each of the second marks is located, and the controller is further configured to: parse the image to determine a first imaging length of one of the first marks in the X direction and a second imaging length of the other first mark in the X direction, wherein the two first marks are distributed along the Y direction and have the same true length; determine a first tilt angle of the back surface of the chip relative to the plane where each of the second marks is located based on the difference between the first imaging length and the second imaging length, and the spacing between the two first marks along the Y direction; and determine a first tilt adjustment amount of the bonding head in the Rx direction based on the first tilt angle.
[0016] Furthermore, in some embodiments of the present invention, the controller is further configured to: parse the image to determine a third imaging length of one of the first marks in the Y direction and a fourth imaging length of the other first mark in the Y direction, wherein the two first marks are distributed along the X direction and have the same true length; determine a second tilt angle of the back surface of the chip relative to the plane where each of the second marks is located based on the difference between the third imaging length and the fourth imaging length, and the spacing between the two first marks along the X direction; and determine a second tilt adjustment amount of the bonding head in the Ry direction based on the second tilt angle.
[0017] Furthermore, in some embodiments of the present invention, a tilt adjustment mechanism is further included, connected to the controller, for leveling the bonding head according to the first tilt adjustment amount and / or the second tilt adjustment amount.
[0018] Furthermore, in some embodiments of the present invention, the infrared vision system includes multiple detection modules, each used to acquire images of at least one of the first markers and at least one of the second markers.
[0019] Furthermore, in some embodiments of the present invention, a lifting mechanism is further included, for lifting the bonding head to bring the bonding head closer to the target bonding position and bonding the chip to the target bonding position.
[0020] Furthermore, in some embodiments of the present invention, the target bonding location includes a pre-reserved patch area on the wafer to be bonded, and the chip bonding device further includes: a wafer chuck for adsorbing the wafer to cooperate with the bonding head to bond the chip to the pre-reserved patch area thereon.
[0021] Furthermore, the chip bonding method described above according to the second aspect of the present invention includes the following steps:
[0022] The chip to be bonded is adsorbed by the bonding head of the chip bonding apparatus provided in the first aspect of the present invention; the infrared vision system of the chip bonding apparatus penetrates the chip to acquire an image of a first mark on its back and a second mark at the target bonding position of the chip; the image is analyzed to determine the pose of the first mark and the second mark in the image; the pose of the bonding head is adjusted according to the pose difference between the first mark and the second mark in the image so that the chip is aligned with the target bonding position; and the chip is bonded to the target bonding position via the bonding head.
[0023] Furthermore, according to a third aspect of the present invention, a computer-readable storage medium is provided having computer instructions stored thereon. When the computer instructions are executed by a processor, the chip bonding method described above according to the third aspect of the present invention is implemented. Attached Figure Description
[0024] The above-described features and advantages of the present invention will be better understood after reading the following detailed description of embodiments of the present disclosure in conjunction with the accompanying drawings. In the drawings, components are not necessarily drawn to scale, and components having similar related properties or features may have the same or similar reference numerals.
[0025] Figure 1A schematic diagram of the structure of a chip bonding apparatus provided according to some embodiments of the present invention is shown;
[0026] Figure 2 A flowchart of a chip bonding method provided according to some embodiments of the present invention is shown;
[0027] Figure 3 A schematic flowchart of a chip pickup process provided according to some embodiments of the present invention is shown;
[0028] Figure 4 A schematic diagram of a chip interconnection structure provided according to some embodiments of the present invention is shown;
[0029] Figure 5 The diagram shows a top-view perspective of the first and second marks before and after repositioning, according to some embodiments of the present invention.
[0030] Figure 6 A schematic diagram of a chip at a first tilt angle, according to some embodiments of the present invention, is shown; and
[0031] Figure 7 A schematic diagram of a chip bonding apparatus according to some embodiments of the present invention is shown, illustrating the structure of a chip bonding apparatus for bonding a chip to a target bonding location.
[0032] Figure label:
[0033] 100 Chip bonding device;
[0034] 110 bonding head;
[0035] 120 Infrared Vision System;
[0036] 210 chip;
[0037] 220 wafers;
[0038] 211, 212 First marker;
[0039] 221 Second mark;
[0040] 230 images;
[0041] Steps S210 to S250;
[0042] 310 chip vision stage; and
[0043] 320 Pick-up Head. Detailed Implementation
[0044] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Although the description of the present invention is presented in conjunction with preferred embodiments, this does not mean that the features of the invention are limited to these embodiments. On the contrary, the purpose of describing the invention in conjunction with embodiments is to cover other options or modifications that may be derived based on the claims of the present invention. To provide a thorough understanding of the invention, many specific details will be included in the following description. The invention may also be implemented without using these details. Furthermore, to avoid confusion or obscuring the focus of the invention, some specific details will be omitted in the description.
[0045] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0046] Furthermore, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," and "vertical" used in the following description should be understood as the orientations shown in the relevant paragraphs and accompanying drawings. These relative terms are for illustrative purposes only and do not imply that the described apparatus must be manufactured or operated in a specific orientation, and therefore should not be construed as limiting the invention.
[0047] It is understood that although terms such as "first," "second," and "third" may be used herein to describe various components, regions, layers, and / or parts, these components, regions, layers, and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers, and / or parts. Therefore, the first components, regions, layers, and / or parts discussed below may be referred to as second components, regions, layers, and / or parts without departing from some embodiments of the present invention.
[0048] As mentioned above, the existing solutions have several problems. First, using a calibration plate as an intermediate medium can easily introduce additional errors. Second, because chips come in a wide variety of sizes, ranging from 1mm×1mm to 26mm×33mm, different sized chips require different sized bonding head nozzles for adsorption. Therefore, each bonding head nozzle needs a dedicated calibration plate, which is very costly. Finally, using a calibration plate as an intermediate positioning medium requires two positioning processes (one for the chip and one for the wafer and the calibration plate), increasing the bonding process and time, thus reducing equipment throughput.
[0049] To address the aforementioned problems in the prior art, this invention provides a chip bonding apparatus, a chip bonding method, and a computer-readable storage medium, which can avoid the additional errors caused by using a calibration chip as an intermediate medium during the bonding process, improve bonding accuracy, simplify the bonding process, thereby improving bonding efficiency and increasing equipment capacity.
[0050] In some non-limiting embodiments, the chip bonding apparatus provided in the first aspect of the present invention can be used to implement the chip bonding method provided in the second aspect of the present invention. Specifically, in some non-limiting embodiments, the computer-readable storage medium provided in the third aspect of the present invention stores computer instructions thereon. When the computer instructions are executed by a processor, they can be used to implement the chip bonding method provided in the second aspect of the present invention.
[0051] The working principle of the above-described chip bonding apparatus will be described below with reference to some embodiments of chip bonding methods. Those skilled in the art will understand that these embodiments of chip bonding methods are merely non-limiting implementations provided by the present invention, intended to clearly demonstrate the main concepts of the invention and provide specific solutions convenient for public implementation, rather than limiting all operating methods or functions of the chip bonding apparatus. Similarly, the chip bonding apparatus is also only one non-limiting implementation provided by the present invention and does not limit the entities that can implement the steps in these chip bonding methods.
[0052] Please refer to Figure 1 , Figure 1 A schematic diagram of a chip bonding apparatus provided according to some embodiments of the present invention is shown.
[0053] like Figure 1As shown, in some embodiments of the present invention, the chip bonding apparatus 100 mainly includes: a bonding head 110, an infrared vision system 120, and a controller (not shown in the figures). The bonding head 110 can be used to attract the chip 210 to be bonded and adjust its pose. The infrared vision system 120 can provide infrared light that can penetrate the chip 210 and acquire images of the first marks 211, 212 on the back of the chip and the second mark 221 of the target bonding position of the chip through two sets of cameras. Optionally, the infrared vision system 120 can move together with the bonding head 110, or the bonding head 110 can move independently.
[0054] The bonding process in this invention is primarily applicable to chip-to-wafer bonding. Chip-to-wafer bonding is a novel high-dimensional 3D packaging solution that enables higher-density chip integration, allowing memory chips to be mounted on a wafer substrate. Therefore, as... Figure 1 As shown, the bonding target of chip 210 can be wafer 220. In this case, the target bonding location of chip 210 can include a pre-reserved mounting area on the wafer 220 to be bonded, for chip 210 to perform bonding. Typically, the mounting area on wafer 220 is fixed. Therefore, after the bonding head 110 picks up chip 210, it needs to move it to align each chip 210 to the pre-reserved mounting location on wafer 220 for each chip, corresponding to the chip-to-wafer bonding process provided by this invention. The mounting area can include a plurality of second marks 221.
[0055] Because the infrared vision system 120 in this embodiment can provide penetrating infrared light, it can directly see the reference markers hidden on the back of the chip 210 and the front of the wafer 220. Therefore, it can locate the markers on the back of the chip and the front of the wafer without the need for a calibration chip as an intermediate medium, thereby improving positioning accuracy. Furthermore, by eliminating the calibration chip, the application of the nozzle becomes more flexible, and costs can be reduced while bonding efficiency is improved.
[0056] The controller in the chip bonding apparatus 100 can be used to implement multiple steps in the chip bonding method provided in the second aspect of the present invention. Specifically, please refer to... Figure 2 , Figure 2 A flowchart of a chip bonding method provided according to some embodiments of the present invention is shown.
[0057] like Figure 2 As shown, in some embodiments of the present invention, the chip bonding method may include the following steps. First, step S210 may be performed: the chip to be bonded is adsorbed via the bonding head of the chip bonding device.
[0058] Specifically, you can refer to Figure 3 , Figure 3 A schematic flowchart of a chip pickup process according to some embodiments of the present invention is shown. Figure 3 As shown, in some embodiments, the outline of the chip 210 to be bonded can be identified first by the wafer vision stage 310, wherein the back side of the chip 210 may include first marks 211 and 212. Then, the controller can control the pick-up head 320 to move above the chip 210 and pick up the chip 210. Optionally, the pick-up head 320 can pick up one of several chips on the UV film by vacuum adsorption. Since the front side of the chip 210 is a surface with circuitry, the pick-up head 320 can preferably use a non-contact adsorption method to adsorb the front side of the chip 210, so as not to damage or affect the circuitry on the front side during the pick-up of the chip 210.
[0059] Since the pickup head 320 picks up the chip 210 from the UV film, it picks up the front side (i.e. the bonding side) of the chip 210, which cannot be directly bonded to the wafer 220, a handover is required to flip the front side of the chip 210 over so that it can be bonded to the wafer 220.
[0060] Specifically, please see Figure 4 , Figure 4 A schematic diagram of a chip interconnection structure provided according to some embodiments of the present invention is shown. For example... Figure 4 As shown, the pickup head 320, which holds the chip 210 to be bonded, is moved above the receiving position of the bonding head 110, and then the pickup head 320 transfers the chip 210 to the bonding head 110. Since the bonding head 110 adsorbs the back side of the chip 210, and its surface does not have circuitry, the chip can be adsorbed using a vacuum adsorption method.
[0061] Then, step S220 can be performed: through the infrared vision system of the chip bonding device, the chip is penetrated to acquire images of the first mark on its back and the second mark of the target bonding position of the chip.
[0062] Specifically, in some embodiments, returning Figure 1 As shown, the bonding head 110 carries the chip 210 to a position below the mounting area of the wafer 220. The infrared vision system 120 may include multiple detection modules (not shown in the figures), which can be used to acquire images of at least one first mark 211 and / or 212, and at least one second mark 221, respectively. The controller can acquire images with the first marks 211, 212, and second mark 221 via the infrared vision system 120.
[0063] In some preferred embodiments, the infrared vision system 120 may include an adjustment module (not shown in the attached figures) for focusing the first markers 211, 212 and / or the second marker 221 respectively to acquire clear images of them. Based on this, the controller can perform a real-time online distribution adjustment alignment scheme according to the depth of field of the infrared vision system 120 and the distance from the chip 210 to the target bonding position on the wafer 220.
[0064] Specifically, in one embodiment, when the depth of field of the infrared vision system 120 is less than the distance from the chip 210 to the target bonding position on the wafer 220, the controller can control the infrared vision system 120 to first focus on the first marks 211 and 212 on the back side of the chip 210 to acquire a first image containing the first marks 211 and 212. Then, it focuses on the second mark 221 on the bonding surface (front side) of the wafer 220 to acquire a second image containing the second mark 221, so that the controller can determine the poses of the first marks 211 and 212 in the first image and the pose of the second mark 221 in the second image, respectively.
[0065] Furthermore, in embodiments where the distance from the chip 210 to the target bonding position is greater than the depth of field of the infrared vision system 120, i.e., the target bonding position on the chip 210 and / or wafer 220 is outside the depth of field, the first and / or second images acquired by the infrared vision system 120 are relatively blurry. In response, the controller can control the infrared vision system 120 to acquire the first and second images respectively, so as to coarsely adjust the pose of the bonding head 110 based on the poses of the first markers 211 and 212 in the first image and the pose of the second marker 221 in the second image.
[0066] The controller can control the bonding head 110 to move (usually up) the chip 210 so that the chip 210 is close to the target bonding position until the depth of field of the infrared vision system 120 is greater than or equal to the distance from the chip 210 to the target bonding position on the wafer 220, that is, the target bonding position on the chip 210 and / or the wafer 220 is within the depth of field.
[0067] In another embodiment, when the depth of field of the infrared vision system 120 is greater than or equal to the distance from the chip 210 to the target bonding position on the wafer 220, the first image and / or the second image acquired by the infrared vision system 120 are relatively clear. In this regard, the controller can control the infrared vision system 120 to acquire a third image that simultaneously includes the first markers 211 and 212 and the second marker 221, so that the controller can simultaneously determine the poses of the first markers 211, 212 and the second marker 221 in the third image.
[0068] Furthermore, in an embodiment where the distance from the chip 210 to the target bonding position is less than or equal to the depth of field of the infrared vision system 120, the controller can control the infrared vision system 120 to acquire a third image that simultaneously includes the first markers 211, 212 and the second marker 221, so as to finely adjust the pose of the bonding head 110 according to the pose of the first markers 211, 212 and the second marker 221 in the third image.
[0069] Through the two embodiments described above, by coarsely adjusting the pose of the bonding head 110, the amount of adjustment required for subsequent fine-tuning can be reduced, thereby improving the real-time performance of alignment. Furthermore, the depth-of-field requirements of the infrared vision system can be lowered, thus reducing the hardware cost of fine-tuning. In addition, by finely adjusting the pose of the bonding head 110, the positions of the first markers 211 and 212 and the second marker 221 in the same image coordinate system can be obtained. This reduces the need for secondary coordinate transformation calculations, eliminating the need for two independent calibrations and positioning of the chip 210 and the wafer 220. This enables real-time, higher-precision alignment, thereby simultaneously improving alignment efficiency and accuracy.
[0070] Next, step S230 can be performed: parse the image to determine the pose of the first and second markers in the image.
[0071] Specifically, you can refer to the following: Figure 5 , Figure 5 The diagram shows a top-view view of the first and second marks before and after repositioning, according to some embodiments of the present invention.
[0072] like Figure 5 As shown, in some embodiments, the controller can determine the amount of translation adjustment of the bonding head 110 in the X and Y directions in the horizontal plane based on the positional difference between at least one first mark 211 (or first mark 212) and its corresponding second mark 221 in the image 230.
[0073] Furthermore, the controller can also determine the rotational adjustment amount of the bonding head 110 in the Rz direction in the horizontal plane based on the positional differences of multiple first marks 211, 212 and their corresponding multiple second marks 221 in the image 230. That is, the angular error of the chip 210 can be determined by positioning two marks on the chip 210, so that the subsequent bonding head 110 can move independently to adjust the angular error of the chip 210, and then be aligned and bonded with the wafer.
[0074] In some preferred embodiments, the detection surface of the infrared vision system 120 may be parallel to the plane containing each of the second marks 221 in the wafer 220. Specifically, please refer to... Figure 6 , Figure 6A schematic diagram of a chip at a first tilt angle, provided according to some embodiments of the present invention, is shown.
[0075] like Figure 6 As shown, by analyzing image 230, the controller can determine the first imaging length h1 of a first mark 211 in the X direction and the second imaging length h2 of another first mark 212 in the X direction. The two first marks 211 and 212 are distributed along the Y direction, i.e., arranged one after the other, and have the same actual length. Then, based on the difference between the first imaging length h1 and the second imaging length h2, and the spacing between the two first marks 211 and 212 along the Y direction, the first tilt angle of the back surface of the chip 210 relative to the plane where each of the second marks 221 is located can be determined. Figure 6 The first tilt angle can be understood as the chip 210 being uneven in the front-to-back direction, with the front lower and the back higher. Then, based on the obtained first tilt angle, the first tilt adjustment amount of the bonding head 110 in the Rx direction can be determined.
[0076] Furthermore, by analyzing image 230, the controller can determine the third imaging length h3 of a first mark 211 in the Y direction and the fourth imaging length h4 of another first mark 212 in the Y direction. The two first marks 211 and 212 are distributed along the X direction, i.e., arranged left and right, and have the same actual length. Then, based on the difference between the third imaging length h3 and the fourth imaging length h4, and the spacing between the two first marks 211 and 212 along the X direction, a second tilt angle of the back surface of chip 210 relative to the plane where each second mark 221 is located can be determined. The second tilt angle can be understood as chip 210 being uneven in the left-right direction. Then, based on the obtained second tilt angle, a second tilt adjustment amount of bonding head 110 in the Ry direction can be determined.
[0077] Please continue to return Figure 2 Next, step S240 can be executed: adjust the pose of the bonding head according to the pose difference between the first mark and the second mark in the image so that the chip is aligned with the target bonding position.
[0078] Specifically, in some embodiments, the chip bonding apparatus 100 may include a translation adjustment mechanism and a rotation adjustment mechanism (not shown in the figures), wherein both the translation adjustment mechanism and the rotation adjustment mechanism can be connected to a controller. Figure 5 As shown, the controller can macroscopically adjust the pose of the bonding head 110 according to the translation and rotation adjustment amounts obtained above, so that the chip 210 is aligned with the target bonding position. The controller can adjust the position (x, y) of the bonding head 110 in the horizontal plane through the translation adjustment mechanism. The controller can adjust the first pose θ of the bonding head 110 in the horizontal plane through the rotation adjustment mechanism according to the rotation adjustment amount obtained above.
[0079] Furthermore, in some preferred embodiments, the chip bonding apparatus 100 may also include a tilt adjustment mechanism (not shown in the figures), which can be connected to a controller. The controller can finely adjust the bonding head 110 according to the first tilt adjustment amount and / or the second tilt adjustment amount obtained above, thereby improving the parallelism between the upper plane (back side) of the chip 210 and the lower plane (bonding surface) of the wafer 220, and thus improving the accuracy of the overall marking alignment.
[0080] Please continue to return Figure 2 Finally, step S250 can be executed: the chip is bonded to the target bonding position via the bonding head.
[0081] Specifically, please see Figure 7 , Figure 7 A schematic diagram of a chip bonding apparatus according to some embodiments of the present invention is shown, illustrating the structure of a chip bonding apparatus for bonding a chip to a target bonding location.
[0082] like Figure 7 As shown, in some embodiments, the chip bonding apparatus 100 may further include a wafer chuck (not shown in the figures), which can be used to hold the wafer 220 with its bonding surface (front side) facing down, so as to cooperate with the bonding head 110 to bond the chip 210 to the reserved mounting area on it. Optionally, the chip bonding apparatus 100 may further include a lifting mechanism (not shown in the figures), which can be used to drive the bonding head 110 to move in the z-axis direction, that is, to lift the bonding head 110, so that the bonding head 110 can approach the target bonding position and bond the chip 210 to the target bonding position. Finally, after completing the bonding of the chip 210 to the wafer 220, the bonding head 110 descends to avoid obstruction, so that the bonded chip and wafer can be processed subsequently.
[0083] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.
[0084] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the various illustrative components, blocks, modules, circuits, and steps are described above in a generalized manner in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the invention.
[0085] The various illustrative logic modules and circuits described in conjunction with the embodiments disclosed herein may be implemented or performed using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but in alternatives, it may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors cooperating with a DSP core, or any other such configuration.
[0086] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of both. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor such that the processor can read and write information to / from the storage medium. In an alternative, the storage medium may be integrated into the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In an alternative, the processor and storage medium may reside as discrete components in the user terminal.
[0087] In one or more exemplary embodiments, the described functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software as a computer program product, the functionality may be stored or transmitted as one or more instructions or code on or through a computer-readable medium. A computer-readable medium includes both computer storage media and communication media, encompassing any medium that facilitates the transfer of a computer program from one location to another. A storage medium may be any available medium accessible to a computer. By way of example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disc storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and is accessible to a computer. Any connection is also legitimately referred to as a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of a medium. As used in this article, disk and disc include compact discs (CDs), laser discs, optical discs, digital multi-purpose discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media.
[0088] In summary, the present invention provides a chip bonding apparatus, a chip bonding method, and a computer-readable storage medium, which can avoid the additional errors caused by using a calibration chip as an intermediate medium during the bonding process, improve bonding accuracy, simplify the bonding process, thereby improving bonding efficiency and increasing equipment capacity.
[0089] The prior description of this disclosure is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A chip bonding apparatus, characterized in that, include: A bonding head is used to pick up the chip to be bonded and adjust its position. An infrared vision system is used to penetrate the chip to acquire images of a first mark on its back and a second mark at a target bonding location on the chip, wherein the detection surface of the infrared vision system is parallel to the plane containing each of the second marks; and The controller is configured to: acquire an image with the first mark and the second mark via the infrared vision system; parse the image to determine the poses of the first mark and the second mark in the image; determine at least a rotation adjustment amount of the bonding head in the Rz direction in the horizontal plane and a first tilt adjustment amount of the bonding head in the Rx direction based on the pose difference between the first mark and the second mark in the image; adjust the orientation of the bonding head at least based on the rotation adjustment amount and the first tilt adjustment amount to align the chip with the target bonding position; and bond the chip to the target bonding position via the bonding head.
2. The chip bonding apparatus as described in claim 1, characterized in that, The depth of field of the infrared vision system is less than the distance from the chip to the target bonding position. The infrared vision system first focuses on the first mark to acquire a first image containing the first mark, and then focuses on the second mark to acquire a second image containing the second mark, so that the controller can determine the pose of the first mark in the first image and the pose of the second mark in the second image, respectively. The depth of field of the infrared vision system is greater than or equal to the distance from the chip to the target bonding position. The infrared vision system acquires a third image that simultaneously contains the first mark and the second mark, so that the controller can simultaneously determine the pose of the first mark and the second mark in the third image.
3. The chip bonding apparatus as described in claim 2, characterized in that, The controller is further configured to: When the distance from the chip to the target bonding position is greater than the depth of field of the infrared vision system, the infrared vision system is controlled to acquire the first image and the second image respectively, so as to coarsely adjust the pose of the bonding head according to the pose of the first mark in the first image and the pose of the second mark in the second image. Control the bonding head to raise and lower the chip to approach the target bonding position; as well as After the distance from the chip to the target bonding position is less than or equal to the depth of field of the infrared vision system, the infrared vision system is controlled to acquire a third image that simultaneously contains the first mark and the second mark, so as to finely adjust the pose of the bonding head according to the pose of the first mark and the second mark in the third image.
4. The chip bonding apparatus as described in claim 2, characterized in that, The infrared vision system also includes an adjustment module for focusing the first marker and / or the second marker respectively to acquire clear images of them.
5. The chip bonding apparatus as described in claim 1, characterized in that, The back of the chip is provided with multiple first marks, and the target bonding location is correspondingly provided with multiple second marks. The controller is further configured to: Based on the positional difference between at least one first mark and its corresponding second mark in the image, the translational adjustment amount of the bonding head in the X and Y directions in the horizontal plane is determined; Based on the positional differences between the plurality of first marks and their corresponding plurality of second marks in the image, the rotational adjustment amount of the bonding head in the Rz direction in the horizontal plane is determined; as well as The orientation of the bonding head is adjusted according to the translation adjustment amount and the rotation adjustment amount so that the chip is aligned with the target bonding position.
6. The chip bonding apparatus as described in claim 5, characterized in that, Also includes: A translation adjustment mechanism, connected to the controller, is used to adjust the position of the bonding head in the horizontal plane according to the translation adjustment amount; as well as A rotation adjustment mechanism, connected to the controller, is used to adjust the first posture of the bonding head in the horizontal plane according to the rotation adjustment amount.
7. The chip bonding apparatus as described in claim 5, characterized in that, The controller is further configured to: The image is analyzed to determine a first imaging length of one of the first markers in the X direction and a second imaging length of the other first marker in the X direction, wherein the two first markers are distributed along the Y direction and have the same true length; Based on the difference between the first imaging length and the second imaging length, and the spacing between the two first marks along the Y direction, a first tilt angle of the back surface of the chip relative to the plane containing each of the second marks is determined; and Based on the first tilt angle, determine the first tilt adjustment amount of the bonding head in the Rx direction.
8. The chip bonding apparatus as described in claim 7, characterized in that, The controller is also configured to: The image is analyzed to determine a third imaging length of one of the first markers in the Y direction and a fourth imaging length of the other first marker in the Y direction, wherein the two first markers are distributed along the X direction and have the same true length; Based on the difference between the third and fourth imaging lengths, and the spacing between the two first marks along the X direction, a second tilt angle of the back surface of the chip relative to the plane containing each of the second marks is determined; and Based on the second tilt angle, the second tilt adjustment amount of the bonding head in the Ry direction is determined.
9. The chip bonding apparatus as described in claim 8, characterized in that, Also includes: A tilt adjustment mechanism, connected to the controller, is used to level the bonding head according to the first tilt adjustment amount and / or the second tilt adjustment amount.
10. The chip bonding apparatus as described in claim 5, characterized in that, The infrared vision system includes multiple detection modules, each used to acquire images of at least one of the first markers and at least one of the second markers.
11. The chip bonding apparatus as claimed in claim 1, characterized in that, Also includes: A lifting mechanism is used to lift the bonding head so that the bonding head is close to the target bonding position and to bond the chip to the target bonding position.
12. The chip bonding apparatus as described in claim 1, characterized in that, The target bonding location includes a pre-reserved patch area on the wafer to be bonded, and the chip bonding apparatus further includes: A wafer chuck is used to hold the wafer in place so that the bonding head can bond the chip to a pre-reserved mounting area thereon.
13. A chip bonding method, characterized in that, Includes the following steps: The chip to be bonded is adsorbed via the bonding head of the chip bonding apparatus as described in any one of claims 1 to 12; The infrared vision system of the chip bonding device penetrates the chip to capture images of a first mark on its back and a second mark at the target bonding position of the chip. The image is analyzed to determine the poses of the first and second markers within the image; Based on the pose difference between the first and second markers in the image, the pose of the bonding head is adjusted so that the chip is aligned with the target bonding position; as well as The chip is bonded to the target bonding position via the bonding head.
14. A computer-readable storage medium storing computer instructions thereon, characterized in that, When the computer instructions are executed by the processor, the chip bonding method as described in claim 13 is implemented.
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