Method and apparatus for intra reference sample interpolation filter switching

Abstract

A method of intra reference sample filter switching for intra prediction includes determining an intra prediction mode and an aspect ratio of a block to be predicted, and selecting an interpolation filter or a reference sample smoothing filter based on the intra prediction mode and the aspect ratio.

Description

[0001] This application is a divisional application. The application number of the original application is 201980062258.5, and the original application date is September 23, 2019. The entire contents of the original application are incorporated into this application by reference. Technical Field

[0002] The present disclosure relates to the technical field of image and / or video encoding and decoding, and more particularly to a method and apparatus for aspect ratio dependent filtering for intra-frame prediction. Background Art

[0003] Digital video has been widely used since the introduction of DVD discs. Before transmission, the video is encoded and sent using a transmission medium. The viewer receives the video and decodes and displays it using a viewing device. Over the years, video quality has improved, for example, due to higher resolutions, color depths, and frame rates. This has led to larger data streams, which are nowadays often delivered via the Internet and mobile communication networks.

[0004] However, since high-resolution videos usually have more information, more bandwidth is required. To reduce bandwidth requirements, video coding standards involving video compression have been introduced. When encoding a video, the bandwidth requirements (or corresponding memory requirements in the case of storage) are reduced. Usually, this reduction comes at the expense of quality. Therefore, video coding standards try to find a balance between bandwidth requirements and quality.

[0005] High efficiency video coding (HEVC) is an example of a video coding standard generally known to those skilled in the art. In HEVC, a coding unit (CU) is divided into a plurality of prediction units (PU) or a plurality of transform units (TU). The next generation standard of versatile video coding (VVC) is the latest joint video project jointly worked on by the ITU-T video coding experts group (VCEG) and the ISO / IEC moving picture experts group (MPEG) standardization organization in a partnership, known as the joint video exploration team (JVET). VVC is also known as the ITU-T H.266 / next generation video coding (NGVC) standard. In VVC, it deletes the concept of multiple partition types, that is, the separation of the concepts of CU, PU, ​​and TU is deleted, except for CUs whose size exceeds the maximum transform length, and supports greater flexibility in the shape of CU partitions.

[0006] The processing of these coding units (CUs), also called blocks, depends on their size, spatial location, and the coding mode specified by the encoder. Depending on the prediction type, the coding modes can be divided into two categories: intra prediction mode and inter prediction mode. Intra prediction mode uses samples of the same picture (also called frame or image) to generate reference samples to calculate the predicted values ​​of the samples of the reconstructed block. Intra prediction is also called spatial prediction. Inter prediction mode is designed for temporal prediction and uses reference samples of the previous or next picture to predict the samples of the block of the current picture.

[0007] The choice of interpolation filter is coordinated with the decision of primary reference side selection. Currently, both decisions rely on the comparison of intra prediction modes with the diagonal (45 degree) direction. Summary of the invention

[0008] An apparatus and method for intra-frame prediction are disclosed. The apparatus and method use an alternative direction to threshold an intra-frame prediction mode during an interpolation filter or smoothing filter selection process. Specifically, the direction corresponds to the angle of the main diagonal of a block to be predicted.

[0009] This embodiment proposes a mechanism for selecting different reference sample filters to take into account the orientation of the block. Specifically, the width and height of the block are checked independently, so that different reference sample filters are applied to reference samples located on different sides of the block to be predicted.

[0010] Implementation of this embodiment is described in the claims and the following description.

[0011] The scope of protection is defined by the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In the following, exemplary embodiments are described in more detail with reference to the accompanying drawings, in which:

[0013] Figure 1 A schematic diagram illustrating an example of a video encoding and decoding system 100 is shown.

[0014] Figure 2 A schematic diagram illustrating an example of a video encoder 200 is shown.

[0015] Figure 3 A schematic diagram illustrating an example of a video decoder 300 is shown.

[0016] Figure 4 A schematic diagram illustrating the proposed 67 intra prediction modes is shown.

[0017] Figure 5 An example of a QTBT is shown.

[0018] Figure 6 The orientation of the rectangular blocks is shown.

[0019] Figure 7 is an embodiment of using an alternative direction to threshold the intra prediction mode during the interpolation filter selection process.

[0020] Figure 8 This is an embodiment of using different interpolation filters depending on which side the reference sample used belongs to.

[0021] Fig. 9 is a schematic diagram illustrating an exemplary structure of the device. DETAILED DESCRIPTION

[0022] In the following description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific aspects in which the embodiments may be arranged.

[0023] For example, it should be understood that disclosures related to a described method may also be true for a corresponding device or system configured to perform the method, and vice versa. For example, if a specific method step is described, a corresponding device may include a unit for performing the described method step, even if the unit is not explicitly described or illustrated in the figure. In addition, it should be understood that the features of the various exemplary aspects described herein may be combined with each other unless otherwise specifically noted.

[0024] Video coding generally refers to processing a sequence of pictures that form a video or video sequence. In the field of video coding and in this application, the terms picture, image or frame can be used / applied synonymously. Each picture is usually divided into a set of non-overlapping blocks. The encoding / decoding of pictures is usually performed at the block level, where, for example, inter-frame prediction or intra-frame prediction is used to generate a prediction block to subtract the prediction block from the current block (currently processed / to be processed block) to obtain a residual block, and the residual block is further transformed and quantized to reduce the amount of data to be sent (compressed), and on the decoder side, the inverse process is applied to the coded / compressed block to reconstruct the block (video block) for representation.

[0025] Figure 1 1 is a block diagram illustrating an exemplary video encoding and decoding system 100 that can utilize the techniques described in this disclosure, including techniques for encoding and decoding boundary partitions. System 100 is applicable not only to video encoding and decoding, but also to picture encoding and decoding. Figure 1 As shown, system 100 includes a source device 102 that generates encoded video data that is decoded at a later time by a destination device 104 . Figure 2 The illustrated video encoder 200 is an example of the video encoder 108 of the source device 102 . Figure 3 The illustrated video decoder 300 is an example of a video decoder 116 of a destination device 104. The source device 102 and the destination device 104 may include any of a wide variety of devices, including desktop computers, notebook (i.e., laptop) computers, tablet computers, set-top boxes, telephone handsets such as so-called "smart" phones, so-called "smart" tablets, televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some cases, the source device 102 and the destination device 104 may be equipped for wireless communication.

[0026] The destination device 104 may receive the encoded video data to be decoded via the link 112. The link 112 may include any type of medium or device capable of moving the encoded video data from the source device 102 to the destination device 104. In one example, the link 112 may include a communication medium to enable the source device 102 to directly send the encoded video data to the destination device 104 in real time. The encoded video data may be modulated according to a communication standard such as a wireless communication protocol and sent to the destination device 104. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include a router, a switch, a base station, or any other device for facilitating communication from the source device 102 to the destination device 104.

[0027] Alternatively, the encoded data may be output from the output interface 110 to a storage device ( Figure 1 100 ). Similarly, the encoded data may be accessed from the storage device via input interface 114. The destination device 104 may access the stored video data from the storage device via streaming or downloading. The techniques of the present disclosure need not be limited to wireless applications or settings. The techniques may be applied to video encoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, streaming video transmission (e.g., via the Internet), encoding of digital video stored on a data storage medium, decoding of digital video stored on a data storage medium, or other applications. In some examples, the system 100 may be configured to support one-way or two-way video transmission to support applications such as video streaming, video playback, video broadcasting, and / or video telephony.

[0028] exist Figure 1 In the example of , source device 102 includes video source 106, video encoder 108 and output interface 110. In some cases, output interface 110 may include a modulator / demodulator (modem) and / or a transmitter. In source device 102, video source 106 may include, for example, the following sources: a video capture device, such as a camera, a video archive containing previously captured video, a video feed interface receiving video from a video content provider, and / or a computer graphics system for generating computer graphics data as source video, or a combination of such sources. As an example, if video source 106 is a camera, source device 102 and destination device 104 may form a so-called camera phone or video phone. However, the technology described in the present disclosure may be generally applicable to video encoding, and may be applicable to wireless and / or wired applications.

[0029] Captured, pre-captured, or computer-generated video may be encoded by video encoder 108. The encoded video data may be sent directly to destination device 104 via output interface 110 of source device 102. The encoded video data may also (or alternatively) be stored on a storage device for subsequent access by destination device 104 or other devices for decoding and / or playback.

[0030] Destination device 104 includes input interface 114, video decoder 116, and display device 118. In some cases, input interface 114 may include a receiver and / or a modem. Input interface 114 of destination device 104 receives encoded video data via link 112. The encoded video data transmitted via link 112 or provided on a storage device may include various syntax elements generated by video encoder 108 for use by a video decoder, such as video decoder 116, to decode the video data. These syntax elements may be included with the encoded video data sent over a communication medium, stored on a storage medium, or stored in a file server.

[0031] Display device 118 may be integrated with destination device 104 or external to destination device 104. In some examples, destination device 104 may include an integrated display device and be further configured to interface with an external display device. In other examples, destination device 104 may be a display device. Typically, display device 118 displays decoded video data to a user and may include any of a variety of display devices such as a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or other types of display devices.

[0032] The video encoder 108 and the video decoder 116 may operate according to any type of video compression standard, including but not limited to MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4, Part 10, advanced video coding (AVC), high efficiency video coding (HEVC), ITU-T H.266 / Next Generation Video Coding (NGVC) standards.

[0033] It is generally contemplated that the video encoder 108 of the source device 102 may be configured to encode video data in accordance with any of these current or future standards. Similarly, it is also generally contemplated that the video decoder 116 of the destination device 104 may be configured to decode video data in accordance with any of these current or future standards.

[0034] The video encoder 108 and the video decoder 116 can each be implemented as any of a variety of suitable encoder circuits, such as one or more microprocessors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA), discrete logic, software, hardware, firmware, or any combination thereof. When these techniques are partially implemented in software, the device may store instructions for the software in a suitable non-temporary computer-readable medium and use one or more processors to execute the instructions in hardware to perform the techniques of the present disclosure. Each of the video encoder 108 and the video decoder 116 can be included in one or more encoders or decoders, any of which can be integrated as part of a combined encoder / decoder (CODEC) in a corresponding device.

[0035] In the video coding specification, a video sequence generally includes a series of pictures. However, it should be noted that the present disclosure is also applicable to fields where interlaced scanning is applied. The video encoder 108 may output a bitstream including a bit sequence forming a representation of a coded picture and associated data. The video decoder 116 may receive the bitstream generated by the video encoder 108. In addition, the video decoder 116 may parse the bitstream to obtain syntax elements from the bitstream. The video decoder 116 may reconstruct the picture of the video data based at least in part on the syntax elements obtained from the bitstream. The process of reconstructing the video data may generally be reciprocal to the process performed by the video encoder 108.

[0036] Figure 2 A schematic diagram illustrating an example of a video encoder 200 is shown. The video encoder 200 is applied not only to video encoding, but also to picture encoding. The video encoder 200 includes an input for receiving an input block of a frame or picture of a video stream and an output for generating a coded video bitstream. The video encoder 200 is suitable for applying prediction, transformation, quantization and entropy coding to a video stream. Transformation, quantization and entropy coding are performed by a transform unit 201, a quantization unit 202 and a coding unit 203, respectively, to generate a coded video bitstream as an output.

[0037] The video stream corresponds to a plurality of frames, where each frame is divided into blocks of a certain size that are intra- or inter-coded. Blocks of, for example, the first frame of the video stream are intra-coded by an intra-frame prediction unit 209. Intra-frames are coded using only information within the same frame, so that they can be decoded independently and entry points for random access can be provided in the bitstream. Blocks of other frames of the video stream are inter-coded by an inter-frame prediction unit 210: information from coded frames (called reference frames) is used to reduce temporal redundancy, so that each block of an inter-coded frame is predicted from a block of the same size in a reference frame. The mode selection unit 208 is adapted to select whether a block of a frame is processed by an intra-frame prediction unit 209 or an inter-frame prediction unit 210.

[0038] In order to perform inter-frame prediction, the encoded reference frame is processed by an inverse quantization unit 204, an inverse transform unit 205, and a filtering unit 206 (optional) to obtain a reference frame, which is then stored in a frame buffer 207. Specifically, these units may process a reference block of the reference frame to obtain a reconstructed reference block. The reconstructed reference block is then reassembled into the reference frame.

[0039] The inter-frame prediction unit 210 includes as input the current frame or picture to be inter-coded and one or more reference frames or pictures from the frame buffer 207. The inter-frame prediction unit 210 applies motion estimation and motion compensation. Motion estimation is used to obtain a motion vector and a reference frame based on a certain cost function. Then, motion compensation describes the current block of the current frame according to the transformation of the reference block of the reference frame to the current frame. The inter-frame prediction unit 210 outputs a prediction block for the current block, wherein the prediction block minimizes the difference between the current block to be coded and its prediction block, i.e., minimizes the residual block. The minimization of the residual block is based on a rate-distortion optimization process, for example.

[0040] Then, the difference between the current block and its predicted block, ie, the residual block, is transformed by a transform unit 201. The transform coefficients are quantized and entropy encoded by a quantization unit 202 and an encoding unit 203. The encoded video bitstream includes intra-frame coded blocks and inter-frame coded blocks.

[0041] Figure 3 A schematic diagram illustrating an example of a video decoder 300 is shown. The video decoder 300 is not only applied to video decoding, but also to picture decoding. The video decoder 300 comprises, among other things, a frame buffer 307, an inter-frame prediction unit 310. The frame buffer 307 is adapted to store at least one reference frame obtained from a coded video bitstream. The inter-frame prediction unit 310 is adapted to generate a prediction block of a current block of a current frame from a reference block of a reference frame.

[0042] The decoder 300 is adapted to decode the encoded video bitstream generated by the video encoder 200, and both the decoder 300 and the encoder 200 generate the same prediction. The characteristics of the frame buffer 307 and the inter-frame prediction unit 310 are similar to those of the video encoder 200. Figure 2 The features of the frame buffer 207 and the inter-frame prediction unit 210 are similar.

[0043] Specifically, the video decoder 300 includes units that are also present in the video encoder 200, such as an inverse quantization unit 304, an inverse transform unit 305, a filtering unit 306 (optional), and an intra-frame prediction unit 309, which correspond to the inverse quantization unit 204, the inverse transform unit 205, the filtering unit 206, and the intra-frame prediction unit 209 of the video encoder 200, respectively. The decoding unit 303 is adapted to decode the received encoded video bitstream and obtain quantized residual transform coefficients accordingly. The quantized residual transform coefficients are fed to the inverse quantization unit 304 and the inverse transform unit 305 to generate a residual block. The residual block is added to the prediction block, and the final addition is fed to the filtering unit 306 to obtain a decoded video. The frames of the decoded video can be stored in a frame buffer 307 and used as reference frames for inter-frame prediction.

[0044] The video encoder 200 can divide the input video frame into blocks before encoding. The term "block" in the present disclosure is used for any type of block or any depth block, for example, the term "block" includes but is not limited to a root block, a block, a sub-block, a leaf node, etc. The blocks to be encoded do not necessarily have the same size. A picture can include blocks of different sizes, and the block grids of different pictures of a video sequence can also be different.

[0045] According to the HEVC / H.265 standard, 35 intra-frame prediction modes can be used. Figure 4 As shown, the set includes the following modes: planar mode (intra-frame prediction mode index is 0), DC mode (intra-frame prediction mode index is 1) and directional (angle) mode, which covers a range of 180° and has Figure 4 The black arrows in the figure show the range of intra prediction mode index values ​​from 2 to 34. To capture arbitrary edge directions present in natural video, the number of directional intra modes is extended from 33 used in HEVC to 65. Other directional modes are Figure 4 In the example, the planar mode and the DC mode remain unchanged. It is worth noting that the range covered by the intra prediction mode can be greater than 180°. Specifically, the 62 directional modes with index values ​​3 to 64 cover a range of about 230°, i.e., several pairs of modes have opposite directionality. In the case of the HEVC reference model (HM) and the JEM platform, Figure 4As shown, only one pair of angle modes (i.e., modes 2 and 66) have opposite directionality. For constructing a prediction, conventional angle modes take reference samples and (if necessary) filter them to obtain a sample prediction. The number of reference samples required to construct a prediction depends on the length of the filter used for interpolation (e.g., the lengths of bilinear and cubic filters are 2 and 4, respectively).

[0046] In VVC, a partitioning mechanism based on both quadtree and binary tree is used, called QTBT. Figure 5 As depicted, QTBT partitioning can provide not only square blocks but also rectangular blocks. Of course, the cost of QTBT partitioning is some signaling overhead and increased computational complexity on the encoder side compared to the traditional quadtree-based partitioning used in the HEVC / H.265 standard. However, QTBT-based partitioning has better segmentation characteristics, so its coding efficiency is significantly improved compared to the traditional quadtree.

[0047] In this document, the terms "vertically oriented block" and "horizontally oriented block" apply to rectangular blocks generated by the QTBT framework. These terms have the same meaning as Figure 6 The same meaning as shown.

[0048] The present invention proposes a mechanism for selecting different reference sample filters to take into account the orientation of the block. Specifically, the width and height of the block are checked independently, so that different reference sample filters are applied to reference samples located on different sides of the block to be predicted. In addition, the present invention proposes a mechanism for selecting different reference sample filters based on the aspect ratio and intra prediction mode of the block to be predicted.

[0049] In the review of the prior art, it is described that the selection of the interpolation filter is coordinated with the decision of the primary reference side selection. Currently, both decisions rely on the comparison of the intra prediction mode with the diagonal (45 degree) direction.

[0050] However, it can be noted that this design has a serious drawback for thin blocks. Observe that even if the shorter side is selected as the primary reference using the pattern comparison criterion, most of the predicted pixels will still be derived from reference samples on the longer side (shown as the dashed area).

[0051] The present invention proposes to use an alternative direction to threshold the intra prediction mode in the interpolation filter selection process. Specifically, the direction corresponds to the angle of the main diagonal of the block to be predicted. For example, for blocks of size 32×4 and 4×32, Figure 7As shown, the threshold mode m used to determine the reference sample filter is defined. T .

[0052] The specific value of the threshold intra prediction angle can be calculated using the following formula:

[0053]

[0054] Where W and H are the width and height of the block respectively.

[0055] Another implementation of this embodiment is to use different interpolation filters depending on which side the reference sample used belongs to. Figure 8 Shown in.

[0056] A straight line with an angle corresponding to the intra direction m divides the prediction block into two regions. Samples belonging to different regions are predicted using different interpolation filters.

[0057] Table 1 gives (for a set of intra prediction modes defined in BMS1.0) m T Example values ​​of and the corresponding angles. Figure 7 As shown, the angle α is shown.

[0058] Table 1. (For a set of intra prediction modes defined in BMS1.0) m T Example value of

[0059]

[0060] Different interpolation filters are used to predict samples within a block, where the interpolation filter used to predict the samples is selected based on the aspect ratio of the block to be predicted and the intra prediction mode. The interpolation filter can be selected specifically based on the block shape, horizontal or vertical direction, and intra prediction mode angle.

[0061] This embodiment can also be applied to the stage of reference sample filtering. Specifically, the reference sample smoothing filter (e.g., for intra-frame prediction) can be determined using similar rules described above for the interpolation filter selection process. For example, the smoothing filter can be selected based on the aspect ratio of the block to be predicted and the intra-frame prediction mode. In particular, the smoothing filter can be selected based on the shape of the block, the horizontal or vertical orientation, and the intra-frame prediction mode angle.

[0062] A set of conditions that determine whether to filter the reference sample is controlled by a mode-dependent intra smoothing (MDIS) technique. For example, a set of conditions may include an MDIS condition. Depending on the width and height of the prediction block, it may be decided whether to apply the

[121] filter to the reference sample. The MDIS decision may also be used to switch between interpolation filters. For example, when the MDIS condition is true, a Gaussian filter is selected for interpolation. Otherwise, i.e., when the MDIS condition is not true, a cubic filter is used.

[0063] The MDIS condition can be checked by performing the following steps:

[0064] Step 1: By calculating (log 2 (W)+log 2 (H))>>1 to determine the table index. Specifically, the index is determined based on the aspect ratio of the block to be predicted.

[0065] Step 2: Find the absolute value of the difference between the intra prediction mode and the horizontal intra prediction mode and the absolute value of the difference between the intra prediction mode and the vertical intra prediction mode. Select the minimum value between the absolute values ​​of these differences. Specifically, select a minimum value from the absolute values ​​of the two differences.

[0066] Step 3: Compare the value determined in the previous step (i.e., the minimum value) with the value obtained from the table using the index calculated in step 1. For example, the value can be obtained from the following table:

[0067]

[0068]

[0069] The proposed invention suggests modifying the above MDIS condition check in order to take into account non-square blocks. Specifically, an offset value is added to the value obtained in step 3, i.e. to the value obtained from the table. The value obtained from the table can be modified according to the offset value to obtain a threshold value. This threshold value can then be compared with the minimum value determined in step 2, instead of directly comparing the obtained value with the minimum value determined in step 2. It is worth noting that the MDIS condition is true if the minimum value determined in step 2 is greater than the threshold value determined in the modified step 3. The offset value is applied to the obtained value if all of the following checks are successful, in particular the offset value is not zero:

[0070] a. Check whether the short side of a block, especially the block to be predicted, is at least twice shorter than the long side.

[0071] b. Check if the short side length of the block exceeds a threshold. The threshold length can be set to 2, 4, 8, or 16.

[0072] c. Check whether the intra prediction mode direction is between the horizontal intra prediction mode and the vertical intra prediction mode.

[0073] d. If the block width is greater than the block height, check whether the intra prediction mode is less than DIA_IDX+dirOffset, that is, less than the sum of the diagonal intra prediction mode (see Table 1) and the direction offset, otherwise, check whether the intra prediction mode is greater than DIA_IDX+dirOffset. The value of dirOffset can be predetermined (for example, set to 5), or it can also depend on the aspect ratio of the block (for example, for aspect ratios 1:2, 1:4, 1:8, 1:16, the value of dirOffset will be assigned to 5, 6, 7, 7 accordingly).

[0074] If all of these checks succeed and the block width is greater than the block height, the value obtained in step 3 is reduced by a predetermined offset value (e.g., equal to dirOffset or equal to abs(dirOffset)). If all of these checks succeed and the block width is less than the block height, the value obtained in step 3 is increased by a predetermined offset value (e.g., equal to dirOffset or equal to abs(dirOffset)).

[0075] Fig. 9 1100 is a block diagram of an apparatus (or device) 1100 that can be used to implement various embodiments. For example, the apparatus 1100 can be used to implement the above-mentioned mechanism of the present invention. The apparatus 1100 can be configured to determine the intra-frame prediction mode and the aspect ratio of the block to be predicted, and select an interpolation filter or a smoothing filter based on the determined intra-frame prediction mode and the determined aspect ratio. Specifically, the apparatus 1100 can be configured to determine an MDIS condition according to the intra-frame prediction mode and the aspect ratio of the block to be predicted, and then select an interpolation filter or a smoothing filter based on the determined MDIS condition. The apparatus 1100 can be as follows Figure 1 The source device 102 shown, or Figure 2 The video encoder 200 shown, or Figure 1 The destination device 104 shown, or Figure 3The video decoder 300 shown. In addition, the device 1100 can host one or more of the described elements. In some embodiments, the device 1100 is equipped with one or more input / output devices, such as speakers, microphones, mice, touch screens, keypads, keyboards, printers, displays, etc. The device 1100 may include one or more central processing units (CPUs) 1510, memory 1520, mass storage 1530, video adapters 1540, and I / O interfaces 1560 connected to a bus. The bus is one or more of any type of bus architecture, including a memory bus or memory controller, a peripheral bus, a video bus, etc.

[0076] CPU 1510 may have any type of electronic data processor. Memory 1520 may have or be any type of system memory, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), read-only memory (ROM), or a combination thereof, etc. In one embodiment, memory 1520 may include a ROM used at startup and a DRAM for program and data storage used when executing a program. In an embodiment, memory 1520 is non-volatile. Mass storage 1530 includes any type of storage device that stores data, programs, and other information, and makes the data, programs, and other information accessible via a bus. Mass storage 1530 includes, for example, one or more of a solid-state drive, a hard disk drive, a magnetic disk drive, an optical disk drive, and the like.

[0077] The video adapter 1540 and the I / O interface 1560 provide interfaces to couple external input and output devices to the apparatus 1100. For example, the apparatus 1100 can provide a SQL command interface to a client. As shown, examples of input and output devices include any combination of a display 1590 coupled to the video adapter 1540 and a mouse / keyboard / printer 1570 coupled to the I / O interface 1560. Other devices can be coupled to the apparatus 1100, and additional or fewer interface cards can be used. For example, a serial interface card (not shown) can be used to provide a serial interface for a printer.

[0078] The device 1100 also includes one or more network interfaces 1550, which include wired links such as Ethernet cables, and / or wireless links to access nodes or one or more networks 1580. The network interface 1550 allows the device 1100 to communicate with remote units through the network 1580. For example, the network interface 1550 can provide communication to a database. In one embodiment, the device 1100 is coupled to a local area network or a wide area network for data processing and communication with remote devices such as other processing units, the Internet, remote storage facilities, etc.

[0079] A piecewise linear approximation is introduced to calculate the values ​​of the weighting coefficients required to predict the pixels within a given block. On the one hand, compared with direct weighting coefficient calculation, the piecewise linear approximation significantly reduces the computational complexity of the distance weighted prediction mechanism; on the other hand, compared with the simplification of the prior art, it helps to achieve higher accuracy of the weighting coefficients.

[0080] This embodiment can be applied to other bidirectional and position-dependent intra prediction techniques (e.g., different modifications of PDPC) and mechanisms that blend different parts of a picture using weighting coefficients that depend on the distance from one pixel to another (e.g., some blending methods in image processing).

[0081] The implementation of the subject matter and operation described in the present disclosure can be implemented by digital electronic circuits, or by computer software, firmware or hardware, including the structures disclosed in the present disclosure and their structural equivalents or one or more combinations thereof. The implementation of the subject matter described in the present disclosure can be implemented as one or more computer programs, that is, one or more modules of computer program instructions encoded on a computer storage medium for execution by a data processing device or for controlling the operation of a data processing device. Alternatively or additionally, the program instructions can be encoded on an artificially generated propagation signal, for example, a machine-generated electrical signal, optical signal or electromagnetic signal, which is generated to encode information for transmission to a suitable receiver device for execution by a data processing device. A computer storage medium, for example, a computer-readable medium, can be a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination of one or more thereof, or included in a computer-readable storage device, a computer-readable storage substrate, a random or serial access memory array or device, or a combination of one or more thereof. In addition, although a computer storage medium is not a propagation signal, a computer storage medium can be a source or destination of computer program instructions encoded in an artificially generated propagation signal. The computer storage medium may also be, or be included in, one or more separate physical and / or non-transitory components or media (eg, multiple CDs, disks, or other storage devices).

[0082] In some implementations, the operations described in the present disclosure may be implemented as a hosted service provided on a server in a cloud computing network. For example, a computer-readable storage medium may be logically grouped and accessible within a cloud computing network. A server within a cloud computing network may include a cloud computing platform for providing cloud-based services. The terms "cloud," "cloud computing," and "cloud-based" may be used interchangeably as appropriate without departing from the scope of the present disclosure. A cloud-based service may be a hosted service provided by a server and delivered to a client platform over a network to enhance, supplement, or replace an application executed locally on a client computer. Circuits may use cloud-based services to quickly receive software upgrades, applications, and other resources that may otherwise take a long time to deliver the resources to the circuit.

[0083] A computer program (also referred to as a program, software, software application, script, or code) may be written in any form of programming language, including compiled or interpreted languages, declarative or procedural languages, and may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, object, or other unit suitable for use in a computing environment. A computer program may, but need not, correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files storing one or more modules, subroutines, or portions of code). A computer program may be deployed to execute on one computer or on multiple computers that are located on one site or distributed on multiple sites and interconnected by a communications network.

[0084] The processes and logic flows described in the present disclosure may be performed by one or more programmable processors executing one or more computer programs to perform actions by operating on input data and generating output. The processes and logic flows may also be performed by, and the apparatus may also be implemented as, special purpose logic circuitry (e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit)).

[0085] Processors suitable for executing computer programs include any one or more processors of general and special microprocessors and digital computers of any kind. Usually, the processor will receive instructions and data from a read-only memory or a random access memory or both. The basic element of a computer is a processor for performing actions according to instructions and one or more memory devices for storing instructions and data. Usually, a computer will also include or be operably coupled to receive data from one or more large-capacity storage devices for storing data or transfer data to one or more large-capacity storage devices for storing data, such as disks, magneto-optical disks or optical disks. However, a computer does not need to have such a device. In addition, a computer can be embedded in another device, such as a mobile phone, a personal digital assistant (PDA), a mobile audio or video player, a game console, a global positioning system (GPS) receiver, or a portable storage device (such as a universal serial bus (USB) flash drive), just to name a few. Devices suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and storage devices, including, for example: semiconductor memory devices, such as EPROM, EEPROM and flash memory devices; magnetic disks, such as internal hard disks or removable disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and the memory may be supplemented by, or incorporated in, special purpose logic circuits.

[0086] Although the present disclosure contains many specific implementation details, these should not be interpreted as limitations on any implementation or the scope of what may be claimed, but rather as descriptions of features of a particular implementation that are specific to a particular implementation. Certain features described in the present disclosure in the context of separate implementations may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented in multiple implementations individually or in any suitable sub-combination. Moreover, although features may be described above as functioning in certain combinations and even initially claimed for these features, in some cases one or more features from a claimed combination may be deleted from the combination, and a claimed combination may point to a sub-combination or a variant of a sub-combination.

[0087] Similarly, although operations are depicted in a particular order in the accompanying drawings, this should not be understood as requiring that the operations be performed in the particular order shown or in a sequential order, or that all of the operations shown be performed to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the above implementations should not be understood as requiring such separation in all implementations, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged into multiple software products.

[0088] Thus, a particular implementation of the subject matter has been described. Other implementations are within the scope of the appended claims. In some cases, the actions recited in the claims can be performed in a different order and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the particular order or sequential order shown to achieve the desired results. In certain implementations, multitasking and parallel processing may be advantageous.

Claims

1. A method for switching an intra-frame reference sample filter for intra-frame prediction, characterized in that: The method comprises: Determine the intra prediction mode and the aspect ratio of the block to be predicted, and Determining a mode-dependent intra-frame smoothing MDIS condition based on the intra-frame prediction mode and the aspect ratio; Based on the MDIS condition, an interpolation filter or a reference sample smoothing filter is selected for intra prediction.

2. The method according to claim 1, characterized in that: The determining of the MDIS condition based on the intra prediction mode and the aspect ratio comprises: Determining an index based on the aspect ratio of the block to be predicted; selecting a minimum value from among an absolute value of a difference between the intra prediction mode and a horizontal intra prediction mode and an absolute value of a difference between the intra prediction mode and a vertical intra prediction mode; Get a value from the table using said index; obtaining a threshold value based on the value; and The minimum value is compared to the threshold value, wherein if the minimum value is greater than the threshold value, then the MDIS condition is true.

3. The method according to claim 1 or 2, characterized in that: The aspect ratio is determined based on the width and height of the block to be predicted.

4. The method according to claim 3, wherein: The aspect ratio is determined by: R A =log2(W)-log2(H), where W and H are the width and height of the block to be predicted respectively.

5. The method according to any one of claims 1 to 4, wherein: The interpolation filter includes a cubic interpolation filter or a Gaussian interpolation filter.

6. The method according to claim 5, comprising: If the MDIS condition is true, the cubic interpolation filter is selected, and If the MDIS condition is not true, the Gaussian interpolation filter is selected.

7. An encoder (20), comprising: one or more processors; as well as A non-transitory computer-readable storage medium coupled to the one or more processors and storing a program executed by the one or more processors, wherein when executed by the one or more processors, the program configures the encoder to perform the method according to any one of claims 1 to 6.

8. A decoder (30), comprising: one or more processors; as well as A non-transitory computer-readable storage medium coupled to the one or more processors and storing a program executed by the processors, wherein when executed by the one or more processors, the program configures the decoder to perform the method according to any one of claims 1 to 6. 9 . A computer-readable storage medium comprising a program, which, when executed by one or more processors, causes the one or more processors to perform the method according to claim 1 .

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