Method, device, equipment, medium and product for optimizing multi-task processing of single-chip microcomputer
By periodically triggering the interrupt processing function in the microcontroller, polling the task list and determining the processing method based on the task time-consuming, the problem of slow response caused by the long-term task occupies CPU resources, and efficient multi-task processing and fast response are achieved.
Patent Information
- Application Number
- CN202411567087.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-05
- Publication Date
- 2025-02-25
AI Technical Summary
In microcontrollers, long-term tasks may occupy a large amount of CPU resources, resulting in the system's slow response or inability to respond to other important interrupt events in a timely manner.
Through the clock periodic trigger interrupt processing function, poll the registration task list to determine the target task that meets the preset conditions. If the task takes less than the preset time, execute the task directly and exit the interrupt processing function. If the task takes more than or equal to the preset time, split the task into multiple subtasks, mount it into the subtask queue, and execute the subtask by the main loop function when the system is idle.
Optimize the task allocation and execution process to ensure timely response to all interrupts and emergencies, effectively utilize the system's idle resources to process long-term tasks, significantly improving the overall performance and response speed of the system during multi-task processing.
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Figure CN119512709A_ABST
Abstract
Description
Technical Field
[0001] The embodiments of the present invention relate to the field of automatic control technology, and in particular to a method, device, equipment, medium and product for optimizing multi-tasking processing of a single-chip microcomputer. Background Art
[0002] In embedded systems, microcontrollers (MCUs) are core components that perform multiple functions. As functional requirements increase, they are often faced with the need to manage multiple concurrent tasks. Current MCUs usually rely on hardware interrupts to drive the entire task scheduling process for multi-tasking. However, when faced with time-consuming tasks, such tasks may occupy a large amount of CPU resources, resulting in slow system response or even failure to respond to other important interrupt events in a timely manner. Summary of the invention
[0003] The embodiments of the present invention provide a method, device, equipment, medium and product for optimizing multi-tasking of a single-chip microcomputer, so as to avoid the problem of slow response caused by some tasks occupying CPU resources for a long time.
[0004] In a first aspect, an embodiment of the present invention provides a method for optimizing multi-tasking processing of a single-chip microcomputer, the method comprising:
[0005] The interrupt processing function is triggered periodically by the clock;
[0006] Polling the registered task list through the interrupt processing function to determine the target task that meets the first preset condition;
[0007] If the task time of the target task is less than the preset time, the target task is executed and the interrupt processing function is exited;
[0008] If the task duration of the target task is greater than or equal to the preset duration, the target task is split into multiple subtasks, mounted in the subtask queue and the interrupt processing function is exited, so as to execute the subtasks in the subtask queue in the system idle state through the main loop function.
[0009] Optionally, executing the subtasks in the subtask queue in a system idle state through the main loop function includes:
[0010] Determine whether the subtask queue is empty;
[0011] If not, a target subtask that meets the second preset condition is determined from the subtask queue and executed.
[0012] Optionally, the first preset condition and the second preset condition have the highest priority and the longest waiting time.
[0013] Optionally, after polling the registered task list through the interrupt processing function to determine the target task that meets the first preset condition, the method further includes:
[0014] Setting the state of the target task to a running state;
[0015] After executing the target task, the method further includes:
[0016] Setting the state of the target task to a paused state;
[0017] After splitting the target task into multiple subtasks and mounting them into the subtask queue, the method further includes:
[0018] If all subtasks of the target task have been completed, the state of the target task is set to a paused state.
[0019] Optionally, the method further includes:
[0020] If the status of all tasks in the registered task list is a paused state, the system enters a dormant state.
[0021] Optionally, the period of the clock is 1 millisecond.
[0022] In a second aspect, an embodiment of the present invention further provides a device for optimizing multi-tasking processing of a single-chip microcomputer, the device comprising:
[0023] Interrupt trigger module, used to trigger interrupt processing function periodically through clock;
[0024] A task determination module, used for polling the registered task list through the interrupt processing function to determine a target task that meets a first preset condition;
[0025] A task execution module, configured to execute the target task and exit the interrupt processing function if the task duration of the target task is less than a preset duration;
[0026] The task mounting module is used to split the target task into multiple subtasks, mount them into the subtask queue and exit the interrupt processing function if the task time of the target task is greater than or equal to the preset time, so as to execute the subtasks in the subtask queue in the system idle state through the main loop function.
[0027] In a third aspect, an embodiment of the present invention further provides a computer device, the computer device comprising:
[0028] one or more processors;
[0029] A memory for storing one or more programs;
[0030] When the one or more programs are executed by the one or more processors, the one or more processors implement the method for optimizing multi-tasking processing of a single-chip microcomputer provided by any embodiment of the present invention.
[0031] In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method for optimizing multi-tasking processing of a single-chip microcomputer provided by any embodiment of the present invention.
[0032] In a fifth aspect, an embodiment of the present invention further provides a computer program product, which includes a computer program, and when the program is executed by a processor, it implements the method for optimizing multi-tasking processing of a single-chip microcomputer provided by any embodiment of the present invention.
[0033] An embodiment of the present invention provides a method for optimizing multi-task processing of a single-chip microcomputer. First, an interrupt processing function is triggered periodically by a clock. Each time the interrupt processing function is triggered, a target task that meets a first preset condition is determined by polling a registered task list through the interrupt processing function. If the task time of the target task is less than a preset time, the interrupt processing function is exited after the target task is executed. If the task time of the target task is greater than or equal to the preset time, the target task is split into multiple subtasks and mounted into a subtask queue before exiting the interrupt processing function. On the other hand, the main loop function executes the subtasks in the subtask queue when the system is idle. The method for optimizing multi-tasking of a single-chip microcomputer provided in an embodiment of the present invention determines the task processing mode based on the task duration. When the task duration is short, it is directly executed through the interrupt processing function, and when the task duration is long, it is split and stored, and gradually processed through the main loop function when the system is idle. The task allocation and execution process is optimized, and it can ensure timely response to all interrupts and emergency events. At the same time, the idle resources of the system are effectively used to process tasks that take a long time, which significantly improves the overall performance and response speed of the system during multi-tasking, thereby avoiding the slow response problem caused by some tasks occupying CPU resources for a long time, and enhancing the stability and reliability of the system. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] Figure 1 A flowchart of a method for optimizing multi-tasking processing of a single-chip microcomputer provided in Embodiment 1 of the present invention;
[0035] Figure 2 A schematic diagram of the structure of a device for optimizing multi-tasking processing of a single-chip microcomputer provided in the second embodiment of the present invention;
[0036] Figure 3 This is a schematic diagram of the structure of a computer device provided in Embodiment 3 of the present invention. DETAILED DESCRIPTION
[0037] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.
[0038] It should be mentioned before discussing the exemplary embodiments in more detail that some exemplary embodiments are described as processes or methods depicted as flow charts. Although the flow charts describe the steps as sequential processes, many of the steps therein can be implemented in parallel, concurrently or simultaneously. In addition, the order of the steps can be rearranged. The process can be terminated when its operation is completed, but can also have additional steps not included in the accompanying drawings. The process can correspond to a method, function, procedure, subroutine, subprogram, etc.
[0039] Embodiment 1
[0040] Figure 1 This is a flow chart of a method for optimizing multi-tasking of a single-chip microcomputer provided in the first embodiment of the present invention. This embodiment is applicable to the case of effectively scheduling time-consuming tasks on a single-chip microcomputer. The method can be executed by the device for optimizing multi-tasking of a single-chip microcomputer provided in the embodiment of the present invention. The device can be implemented by hardware and / or software, and can generally be integrated into a computer device, specifically a single-chip microcomputer. Figure 1 As shown, the specific steps include:
[0041] S11, triggering the interrupt processing function periodically through the clock.
[0042] S12: polling a registered task list through the interrupt processing function to determine a target task that meets a first preset condition.
[0043] S13: If the target task takes less time than a preset time, execute the target task and exit the interrupt processing function.
[0044] S14. If the task duration of the target task is greater than or equal to the preset duration, the target task is split into multiple subtasks, mounted into a subtask queue and the interrupt processing function is exited, so as to execute the subtasks in the subtask queue in the system idle state through the main loop function.
[0045] Specifically, the single-chip microcomputer program is provided with a main loop function and an interrupt processing function. The interrupt processing function can interrupt the interrupt or regular business process that is being executed with a lower priority than the interrupt processing function, such as the main loop function. When the interrupt processing function is processed, it can return to the position where the main loop function is interrupted to continue execution. In the single-chip microcomputer, the clock can be used to periodically trigger the interrupt processing function to interrupt the execution of the main loop function, thereby realizing the periodic scheduling of tasks. Optionally, the period of the clock is 1 millisecond.
[0046] After the interrupt handling function is triggered, the current registered task list can be polled to determine the target task that meets the first preset condition from the registered tasks, wherein the first preset condition can be set according to actual needs, and can specifically include waiting time conditions and / or priority conditions, etc. Optionally, the first preset condition is the highest priority and the longest waiting time. Before the system runs, the system environment can be initialized first, and a registered task list (List) can be established, each of which contains multiple tasks (Task). When the interrupt handling function is triggered, all registered task lists can be polled first to determine the target task list with the longest waiting time, and then the task with the highest priority (such as TaskA) can be selected from the target task list as the target task.
[0047] After determining the target task in the interrupt handling function, the time consumption of the target task can be evaluated first to determine whether the task consumption is less than the preset duration. If the task consumption is less than the preset duration, the target task can be run in the interrupt handling function, and the interrupt handling function can be exited after the task is completed. Among them, when running the target task, it will not be interrupted by the interrupt handling function triggered by other clocks. If the task consumption is greater than or equal to the preset duration, the target task can be decomposed into multiple subtasks (SubTask), and these subtasks can be mounted in the subtask queue (WorkSet). At the same time, the index of each subtask can be recorded, and the interrupt handling function will be exited after the subtask mounting is completed.
[0048] During the system idle operation, the main loop function can run uninterruptedly to execute the subtasks in the subtask queue. During the operation of the main loop function, if the interrupt processing function is triggered, the operation of the main loop function will be interrupted, and the operation of the main loop function will continue after exiting the interrupt processing function. That is, the main loop function needs to execute the subtasks in the subtask queue in the system idle state (that is, the state of not processing interrupts).
[0049] Optionally, executing the subtasks in the subtask queue in a system idle state through the main loop function includes: determining whether the subtask queue is empty; if not, determining a target subtask that meets a second preset condition from the subtask queue and executing it.
[0050] Specifically, the main loop function can select a subtask from the subtask queue to execute each time, and loop this operation. Then each loop can first determine whether the subtask queue is empty. If so, it means that there is no subtask that needs to be executed temporarily, and you can directly enter the next loop at this time. If not, you can determine from the subtask queue that the target subtask that currently meets the second preset condition is executed, and you can enter the next loop after completing the target subtask and releasing it. The second preset condition can be set according to actual needs, and can specifically include waiting time conditions and / or priority conditions, etc., so as to ensure that the execution order of tasks can be reasonably arranged when the system is idle. Optionally, the second preset condition is that the priority is the highest and the waiting time is the longest.
[0051] On the basis of the above technical solution, optionally, after polling the registered task list through the interrupt processing function to determine the target task that meets the first preset condition, it also includes: setting the state of the target task to a running state; after executing the target task, it also includes: setting the state of the target task to a paused state; after splitting the target task into multiple subtasks and mounting them into a subtask queue, it also includes: if all subtasks of the target task have been completed, setting the state of the target task to a paused state.
[0052] Specifically, each bit of a number of bytes can be used to record the status of the corresponding task or subtask, and a task status table can be generated so that the system can process according to the task status table. Among them, the status of a task or subtask can include a running state (Running) and a suspended state (Suspend). During the operation of the system, when the operation interrupt processing function selects a certain target task, the state of the target task in the task status table can be set to a running state. Then it can be checked whether the target task has related subtasks. If there are no related subtasks, that is, the task time of the target task is less than the preset duration, then the state can be set to a suspended state after completing the execution of the target task. If there are related subtasks, that is, the task time of the target task is greater than or equal to the preset duration, it can be determined in real time according to the task status table whether all related subtasks have been completed. If all related subtasks have been completed, the state of the target task can be set to a suspended state, otherwise it remains in a running state. In addition, when the interrupt handling function is running and a target task is selected again, it can first check whether there are any related subtasks that have not been completed, that is, there may be subtasks mounted by the same target task selected last time that have not been completed. If so, the execution of the current target task can be directly ended, the interrupt handling function can be exited, and the previous main loop operation can be continued to wait for the next interrupt scheduling. If not, and the task time of the current target task is greater than or equal to the preset duration, the related subtasks can be remounted.
[0053] Further optionally, the method also includes: if the status of all tasks in the registered task list are in a paused state, then the system enters a sleep state. Specifically, when the system enters an idle state and there are no other active tasks, the status of all tasks in the registered task list can be checked based on the task status table. If the status of all tasks is in a paused state, the system can enter a sleep state, otherwise it can continue to wait for the next inspection cycle. In the prior art, when it is necessary to enter a sleep mode, there is often a lack of resource protection and hardware resources are directly released, which may cause abnormal situations due to incomplete data preservation. The method for optimizing multi-tasking of a single-chip microcomputer provided in this embodiment decides whether to enter a sleep mode through state determination, and further improves the reliability of task scheduling of the single-chip microcomputer in a multi-tasking environment.
[0054] The technical solution provided by the embodiment of the present invention first triggers the interrupt processing function periodically through the clock, and each time the interrupt processing function is triggered, the target task that meets the first preset condition is determined by polling the registered task list through the interrupt processing function. If the task time of the target task is less than the preset time, the interrupt processing function is executed and then exited. If the task time of the target task is greater than or equal to the preset time, the target task is split into multiple subtasks and mounted in the subtask queue and then exits the interrupt processing function. On the other hand, the main loop function will execute the subtasks in the subtask queue in the idle state of the system. By determining the task processing method based on the task time, when the task time is short, it is directly executed through the interrupt processing function, and when the task time is long, it is split and stored, and the main loop function is gradually processed when the system is idle, the task allocation and execution process is optimized, and it can ensure timely response to all interruptions and emergency events. At the same time, the idle resources of the system are effectively used to process the tasks that take up a long time, which significantly improves the overall performance and response speed of the system during multi-task processing, thereby avoiding the slow response problem caused by some tasks occupying CPU resources for a long time, and enhancing the stability and reliability of the system.
[0055] Embodiment 2
[0056] Figure 2 This is a schematic diagram of the structure of the device for optimizing single-chip multi-task processing provided in the second embodiment of the present invention. The device can be implemented by hardware and / or software, and can generally be integrated into a computer device to execute the method for optimizing single-chip multi-task processing provided in any embodiment of the present invention. Figure 2 As shown, the device comprises:
[0057] An interrupt trigger module 21, used to periodically trigger an interrupt processing function through a clock;
[0058] A task determination module 22, configured to poll the registered task list through the interrupt processing function to determine a target task that meets a first preset condition;
[0059] The task execution module 23 is used to execute the target task and exit the interrupt processing function if the task time of the target task is less than the preset time;
[0060] The task mounting module 24 is used to split the target task into multiple subtasks and mount them into the subtask queue if the task duration of the target task is greater than or equal to the preset duration, and exit the interrupt processing function, so as to execute the subtasks in the subtask queue in the system idle state through the main loop function.
[0061] The technical solution provided by the embodiment of the present invention first triggers the interrupt processing function periodically through the clock, and each time the interrupt processing function is triggered, the target task that meets the first preset condition is determined by polling the registered task list through the interrupt processing function. If the task time of the target task is less than the preset time, the interrupt processing function is executed and then exited. If the task time of the target task is greater than or equal to the preset time, the target task is split into multiple subtasks and mounted in the subtask queue and then exits the interrupt processing function. On the other hand, the main loop function will execute the subtasks in the subtask queue in the idle state of the system. By determining the task processing method based on the task time, when the task time is short, it is directly executed through the interrupt processing function, and when the task time is long, it is split and stored, and the main loop function is gradually processed when the system is idle, the task allocation and execution process is optimized, and it can ensure timely response to all interruptions and emergency events. At the same time, the idle resources of the system are effectively used to process the tasks that take up a long time, which significantly improves the overall performance and response speed of the system during multi-task processing, thereby avoiding the slow response problem caused by some tasks occupying CPU resources for a long time, and enhancing the stability and reliability of the system.
[0062] On the basis of the above technical solution, optionally, the task mounting module 24 includes:
[0063] A subtask queue determination unit, used to determine whether the subtask queue is empty;
[0064] The target subtask execution unit is used to determine and execute the target subtask that meets the second preset condition from the subtask queue if no.
[0065] On the basis of the above technical solution, optionally, the first preset condition and the second preset condition have the highest priority and the longest waiting time.
[0066] On the basis of the above technical solution, optionally, the device for optimizing multi-tasking processing of a single-chip microcomputer further includes:
[0067] A first state setting module, configured to set the state of the target task to a running state after the registered task list is polled by the interrupt processing function to determine the target task that meets the first preset condition;
[0068] A second state setting module, used for setting the state of the target task to a paused state after the target task is executed;
[0069] The third state setting module is used for setting the state of the target task to a paused state if all subtasks of the target task have been completed after the target task is split into multiple subtasks and mounted into the subtask queue.
[0070] On the basis of the above technical solution, optionally, the device for optimizing multi-tasking processing of a single-chip microcomputer further includes:
[0071] The system sleep module is used to enter the system sleep state if the states of all tasks in the registered task list are in the pause state.
[0072] Based on the above technical solution, optionally, the period of the clock is 1 millisecond.
[0073] The device for optimizing multi-tasking of a single-chip microcomputer provided in the embodiment of the present invention can execute the method for optimizing multi-tasking of a single-chip microcomputer provided in any embodiment of the present invention, and has the corresponding functional modules and beneficial effects of the execution method.
[0074] It is worth noting that in the above-mentioned embodiment of the device for optimizing multi-tasking processing of a single-chip microcomputer, the various units and modules included are divided only according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.
[0075] Embodiment 3
[0076] Figure 3 The schematic diagram of the structure of the computer device provided for the third embodiment of the present invention shows a block diagram of an exemplary computer device suitable for implementing the implementation mode of the present invention. Figure 3 The computer device shown is only an example and should not limit the functions and scope of use of the embodiments of the present invention. Figure 3 As shown, the computer device includes a processor 31, a memory 32, an input device 33 and an output device 34; the number of processors 31 in the computer device can be one or more. Figure 3 Taking a processor 31 as an example, the processor 31, memory 32, input device 33 and output device 34 in the computer device can be connected through a bus or other means. Figure 3 The example of connecting through bus is taken in the following.
[0077] The memory 32 is a computer-readable storage medium that can be used to store software programs, computer executable programs and modules, such as program instructions / modules corresponding to the method for optimizing multi-tasking of single-chip microcomputers in the embodiment of the present invention (for example, the interrupt trigger module 21, the task determination module 22, the task execution module 23 and the task mounting module 24 in the device for optimizing multi-tasking of single-chip microcomputers). The processor 31 executes various functional applications and data processing of the computer device by running the software programs, instructions and modules stored in the memory 32, that is, realizing the above-mentioned method for optimizing multi-tasking of single-chip microcomputers.
[0078] The memory 32 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system and at least one application required for a function; the data storage area may store data created according to the use of the computer device, etc. In addition, the memory 32 may include a high-speed random access memory, and may also include a non-volatile memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some instances, the memory 32 may further include a memory remotely arranged relative to the processor 31, and these remote memories may be connected to the computer device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.
[0079] The input device 33 may be used to set relevant preset parameters, and generate key signal input related to user settings and function control of the computer device, etc. The output device 34 may include a display screen, which may be used to display task execution results, etc. to the user.
[0080] Embodiment 4
[0081] Embodiment 4 of the present invention further provides a storage medium containing computer executable instructions, wherein the computer executable instructions are used to execute a method for optimizing multi-tasking of a single-chip microcomputer when executed by a computer processor, the method comprising:
[0082] The interrupt processing function is triggered periodically by the clock;
[0083] Polling the registered task list through the interrupt processing function to determine the target task that meets the first preset condition;
[0084] If the task time of the target task is less than the preset time, the target task is executed and the interrupt processing function is exited;
[0085] If the task duration of the target task is greater than or equal to the preset duration, the target task is split into multiple subtasks, mounted in the subtask queue and the interrupt processing function is exited, so as to execute the subtasks in the subtask queue in the system idle state through the main loop function.
[0086] The storage medium may be any of various types of memory devices or storage devices. The term "storage medium" is intended to include: installation media, such as CD-ROM, floppy disk or tape device; computer system memory or random access memory, such as DRAM, DDR RAM, SRAM, EDO RAM, Rambus RAM, etc.; non-volatile memory, such as flash memory, magnetic media (such as hard disk or optical storage); registers or other similar types of memory elements, etc. The storage medium may also include other types of memory or combinations thereof. In addition, the storage medium may be located in the computer system in which the program is executed, or may be located in a different second computer system, which is connected to the computer system via a network (such as the Internet). The second computer system may provide program instructions to the computer for execution. The term "storage medium" may include two or more storage media that may reside in different locations (e.g., in different computer systems connected via a network). The storage medium may store program instructions (e.g., embodied as a computer program) that may be executed by one or more processors.
[0087] Of course, the computer executable instructions of a storage medium containing computer executable instructions provided by an embodiment of the present invention are not limited to the method operations described above, and can also execute related operations in the method for optimizing multi-tasking processing of a single-chip microcomputer provided by any embodiment of the present invention.
[0088] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, which carry computer-readable program code. Such propagated data signals may take a variety of forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination of the above. Computer-readable signal media may also be any computer-readable medium other than a computer-readable storage medium, which may send, propagate, or transmit a program for use by or in conjunction with an instruction execution system, apparatus, or device.
[0089] The program code embodied on the computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
[0090] Through the above description of the implementation methods, the technicians in the relevant field can clearly understand that the present invention can be implemented by means of software and necessary general hardware, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as a computer floppy disk, read-only memory (ROM), random access memory (RAM), flash memory (FLASH), hard disk or optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, server, or network device, etc.) to execute the methods described in each embodiment of the present invention.
[0091] In specific applications in single-chip microcomputers, the selected storage medium can be embedded or external. For example, embedded storage media usually use internal ROM, internal RAM or internal Flash memory, etc., and external storage media usually use external Flash memory, EEPROM, SD card or MicroSD card, etc. Furthermore, in some application scenarios, network storage can also be used. The single-chip microcomputer system can be connected to the network and obtain programs or data from other systems on the network.
[0092] Embodiment 5
[0093] Embodiment 5 of the present invention further provides a computer program product, which includes a computer program (also referred to as code, instruction), which can be stored in a computer-readable storage medium. When the computer program is executed by a processor, it is used to execute the method for optimizing multi-tasking processing of a single-chip microcomputer provided in any of the above embodiments, and has the corresponding beneficial effects of the execution method.
[0094] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims
1. A method for optimizing multi-tasking of a single-chip microcomputer, characterized in that: include: The interrupt processing function is triggered periodically by the clock; Polling the registered task list through the interrupt processing function to determine the target task that meets the first preset condition; If the task time of the target task is less than the preset time, the target task is executed and the interrupt processing function is exited; If the task duration of the target task is greater than or equal to the preset duration, the target task is split into multiple subtasks, mounted in the subtask queue and the interrupt processing function is exited, so as to execute the subtasks in the subtask queue in the system idle state through the main loop function.
2. The method for optimizing single-chip microcomputer multitasking according to claim 1, characterized in that: The executing of the subtasks in the subtask queue in the system idle state by the main loop function includes: Determine whether the subtask queue is empty; If not, a target subtask that meets the second preset condition is determined from the subtask queue and executed.
3. The method for optimizing single-chip microcomputer multitasking according to claim 2, characterized in that: The first preset condition and the second preset condition have the highest priority and the longest waiting time.
4. The method for optimizing single-chip microcomputer multitasking according to claim 1, characterized in that: After polling the registered task list through the interrupt processing function to determine the target task that meets the first preset condition, the method further includes: Setting the state of the target task to a running state; After executing the target task, the method further includes: Setting the state of the target task to a paused state; After splitting the target task into multiple subtasks and mounting them into the subtask queue, the method further includes: If all subtasks of the target task have been completed, the state of the target task is set to a paused state.
5. The method for optimizing single chip microcomputer multitasking according to claim 4, characterized in that: The method further comprises: If the status of all tasks in the registered task list is a paused state, the system enters a dormant state.
6. The method for optimizing single-chip microcomputer multitasking according to claim 1, characterized in that: The period of the clock is 1 millisecond.
7. A device for optimizing multi-tasking of a single-chip microcomputer, characterized in that: include: Interrupt trigger module, used to trigger interrupt processing function periodically through clock; A task determination module, used for polling the registered task list through the interrupt processing function to determine a target task that meets a first preset condition; A task execution module, configured to execute the target task and exit the interrupt processing function if the task duration of the target task is less than a preset duration; The task mounting module is used to split the target task into multiple subtasks, mount them into the subtask queue and exit the interrupt processing function if the task time of the target task is greater than or equal to the preset time, so as to execute the subtasks in the subtask queue in the system idle state through the main loop function.
8. A computer device, characterized in that: include: one or more processors; A memory for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method for optimizing multi-tasking processing of a single-chip microcomputer as described in any one of claims 1-6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the method for optimizing multi-tasking processing of a single-chip microcomputer as described in any one of claims 1 to 6 is implemented.
10. A computer program product, comprising a computer program, characterized in that When the computer program is executed by a processor, the computer program implements the method for optimizing multi-tasking of a single-chip microcomputer as claimed in any one of claims 1 to 6.
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