Data transmission processing method and device, electronic equipment and storage medium
By using the first process to obtain the memory space created by the second process and create a memory pool in communication technology, the business impact caused by memory recycling after the process is abnormally exited is solved, and the efficiency of inter-process communication and business stability are achieved.
Patent Information
- Application Number
- CN202411545797.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-31
- Publication Date
- 2025-02-25
AI Technical Summary
In communication technology, after the process exits abnormally, the IP library is not notified to stop accessing memory, resulting in memory being recycled by the kernel, and IP accesses illegal addresses, affecting the normal operation of the business.
The memory space created by the second process is obtained through the first process, a memory pool is created for storing data, and when the second process exits abnormally, the data transmission channel is closed through the first process based on the virtual function device information.
It realizes the efficiency and reliability of inter-process communication, promptly handles abnormal situations, and ensures the continuity and stability of business execution.
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Figure CN119512783A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to but is not limited to the field of communication technology, and in particular to a data transmission processing method, device, electronic device and storage medium. Background Art
[0002] With the development of communication technology, after the process is started, the Internet Protocol (IP) library for interconnecting networks will also be started. The process will create its own memory pool. However, after the process exits abnormally, the IP library is not told to stop accessing the memory. The memory will be reclaimed by the kernel. After the memory is reclaimed, the IP accesses illegal addresses, affecting the normal operation of the business. Summary of the invention
[0003] In view of this, embodiments of the present application provide a data transmission processing method, device, electronic device, and storage medium.
[0004] The technical solution of the embodiment of the present application is implemented as follows:
[0005] In a first aspect, an embodiment of the present application provides a method for processing data transmission, the method comprising: obtaining a memory space created by a second process through a first process; the first process is a process created by the second process; when the second process starts the first process, creating a memory pool through the first process based on the memory space; the memory pool is used to store data transmitted by the second process, and the first process and the second process communicate by sharing the address of the memory pool; executing a business through the second process based on the address of the memory pool; in the process of the second process executing the business, determining whether the second process exits normally; in the case where the second process exits abnormally, closing the data transmission channel on the corresponding virtual function device through the first process based on the virtual function device information corresponding to the second process.
[0006] In a second aspect, an embodiment of the present application provides a data transmission processing device, the device comprising:
[0007] An acquisition module, configured to acquire a memory space created by a second process through a first process; the first process is a process created by the second process;
[0008] a first creation module, configured to create a memory pool based on the memory space through the first process when the second process starts the first process; the memory pool is used to store data transmitted by the second process, and the first process and the second process communicate by sharing an address of the memory pool;
[0009] An execution module, configured to execute a service based on the address of the memory pool through the second process;
[0010] A first determination module, used to determine whether the second process exits normally during the process of the second process executing the service;
[0011] The first closing module is used to close the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process through the first process when the second process exits abnormally.
[0012] In a third aspect, an embodiment of the present application provides an electronic device, including a memory and a processor, wherein the memory stores a computer program that can be executed on the processor, and when the processor executes the program, some or all of the steps in the above method are implemented.
[0013] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements some or all of the steps in the above method when executed by a processor.
[0014] It should be understood that the above general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the technical solutions of the present application. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present application and are used together with the specification to illustrate the technical solution of the present application.
[0016] Figure 1 A schematic diagram of an implementation flow of a data transmission processing method provided in an embodiment of the present application;
[0017] Figure 2 A schematic diagram of a system framework provided in an embodiment of the present application;
[0018] Figure 3 A schematic diagram of an implementation flow of another data transmission processing method provided in an embodiment of the present application;
[0019] Figure 4 A schematic diagram of an implementation flow of a kernel driver creating a VF and initializing PCIe resources provided in an embodiment of the present application;
[0020] Figure 5 A schematic diagram of the structure of a data transmission processing device provided in an embodiment of the present application;
[0021] Figure 6 A hardware entity schematic diagram of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0022] In order to make the purpose, technical solutions and advantages of the present application clearer, the technical solutions of the present application are further elaborated in detail below in conjunction with the drawings and embodiments. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.
[0023] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0024] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present application are merely to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present application described here can be implemented in an order other than that illustrated or described here.
[0025] It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical terms and scientific terms) used herein have the same meaning as the general understanding of those skilled in the art in the field to which the embodiments of the present application belong. It should also be understood that terms such as those defined in general dictionaries should be understood to have meanings consistent with the meanings in the context of the prior art, and will not be interpreted with idealized or overly formal meanings unless specifically defined as here.
[0026] The method provided in the embodiment of the present application can be executed by an electronic device, wherein the electronic device can be a laptop, a tablet computer, a desktop computer, a set-top box, a mobile device (for example, a mobile phone, a portable music player, a personal digital assistant, a dedicated messaging device, a portable gaming device) and other types of terminals, and can also be implemented as a server. The server can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communications, middleware services, domain name services, security services, content delivery networks (CDNs), and big data and artificial intelligence platforms.
[0027] The present application embodiment provides a method for processing data transmission, such as Figure 1 As shown, the data transmission processing method includes the following steps S101 to S105, wherein:
[0028] Step S101, acquiring a memory space created by a second process through a first process; the first process is a process created by the second process;
[0029] Here, the first process is a process created by the second process, which may mean: in the operating system, there is a process (called the second process), which starts and creates another process (called the first process), that is, the first process is a slave process and the second process is the master process.
[0030] Here, the memory space may be created by some virtualization technology (e.g., container technology, virtual machine technology, etc.) or an application programming interface (API) provided by the operating system. The memory space may be stored in a specified shared directory, which is a known location in the file system and can be accessed by both the first process and the second process.
[0031] In some implementations, in the shared directory, the second process has created a file in a memory space, and the first process needs to open the file and read the content therein, so as to obtain the memory space created by the second process.
[0032] It should be noted that the file content may include the size of the memory space, the type of memory space (for example, 1 Giga Byte (GB) or 2 Mega Byte (MB)) and the physical memory descriptor. The physical memory descriptor includes the segment base address, segment limit, segment attributes, etc. The segment base address indicates the starting physical address of the segment, the segment limit indicates the length of the memory occupied by the program segment or data segment, and the segment attribute indicates the access rights of the segment.
[0033] Step S102, when the second process starts the first process, creating a memory pool based on the memory space through the first process;
[0034] Here, the memory pool is used to store data transmitted by the second process, and the first process and the second process communicate through the address of the shared memory pool, that is, the second process can write data to the memory pool, and the first process can read data from the memory pool, and vice versa.
[0035] In some implementations, after the second process starts the first process, the first process uses the acquired memory space to create a memory pool, and the created memory pool is used to store data that the second process will transmit to the first process.
[0036] Step S103, executing a service based on the address of the memory pool through the second process;
[0037] In some implementations, the second process executes service logic based on the address of the memory pool, and the service may include writing, reading, or other operations on data.
[0038] Step S104, during the process of the second process executing the service, determining whether the second process exits normally;
[0039] In some implementations, while the second process is executing a service, the system monitors the status of the second process, particularly whether it exits normally.
[0040] Step S105: When the second process exits abnormally, the first process closes the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process.
[0041] Here, the abnormal exit of the second process may refer to: the second process does not end its execution according to its preset normal flow or logic, which is usually related to the process being forced to terminate due to some exception or error. The abnormal exit of the second process may include: the second process crashes, is forced to terminate, receives an abnormal signal, etc.
[0042] Here, the virtual function device information corresponding to the second process generally refers to: information about virtual devices associated with the second process and provided by virtualization technology or a specific software framework. These virtual devices can be virtualized versions of hardware devices or purely software-simulated devices, which are designed to provide functional interfaces similar to real hardware devices in operating systems or applications.
[0043] Specifically, the virtual function device information corresponding to the second process may include a device identifier (for example, a bus device function (BDF) number), a device type, a device configuration, a device status, etc.; wherein the device identifier is a unique identifier of the virtual device, which is used to distinguish different virtual devices in the system, and the BDF number is generally used to identify peripheral component interconnect express (PCIe) devices; the device type is used to indicate the type of the virtual device, for example, a network device, a storage device, an input / output device, etc.; the device configuration may refer to the configuration information of the virtual device, for example, the IP address of the network device, the media access control (MAC) address, the read and write speed, etc.; the device status may refer to the current status of the virtual device, for example, whether it is enabled, whether it is connected, whether there is an error, etc.
[0044] Here, the data transmission channel on the virtual function device may refer to: a logical connection or path established in a virtualized environment to achieve efficient and secure data transmission between different virtual function devices or between a virtual function device and a physical device. This channel uses virtualization technology and is built on the physical network infrastructure to provide virtual function devices with communication functions similar to a dedicated network.
[0045] In some embodiments, if the second process suddenly stops running due to an internal error (e.g., a memory access violation, a null pointer reference, etc.) or an external factor (e.g., a hardware failure, a power problem, etc.), that is, the second process crashes, then the first process will close the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process (e.g., information about a hardware device or software-simulated device associated with the second process).
[0046] In some implementations, if the second process is forcibly ended due to a request from a user or system administrator, that is, the second process is forcibly terminated, the first process will close the data transmission channel on the corresponding virtual function device according to the virtual function device information corresponding to the second process.
[0047] In some embodiments, if the second process receives an exception signal (for example, an illegal instruction signal) that it cannot handle, causing it to be unable to continue execution normally, that is, the second process receives an exception signal, then the first process will close the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process.
[0048] In the embodiment of the present application, on the one hand, the first process and the second process communicate through the address of the shared memory pool, which simplifies the complexity of inter-process communication, thereby improving the efficiency and reliability of communication; on the other hand, in the process of the second process executing the business, by monitoring the state of the second process, abnormal situations can be discovered and handled in time. If the second process exits abnormally, the first process can close the corresponding data transmission channel according to the virtual function device information to ensure the continuity and stability of business execution.
[0049] In some embodiments, the implementation of step S102 “creating a memory pool based on the memory space by the first process” may include the following steps S1021 to S1022, wherein:
[0050] Step S1021, mapping the address of the memory space to the first process through the first process to obtain a mapped memory space;
[0051] In some implementations, first, the first process obtains the memory space created by the second process; then, the first process maps the address of the memory space to its own address space. This means that the first process can now access this memory space through its own address space without additional system calls or network transmission. This mapping process usually involves the participation of the operating system kernel to ensure the correctness and security of the address mapping.
[0052] Step S1022: determining, through the second process, part of the mapped memory space as the memory pool.
[0053] Here, the memory pool can be a pre-allocated and managed memory area for storing and transmitting data. The size and location of the memory pool can be configured and adjusted according to specific business needs.
[0054] In some implementations, after the memory space is mapped to the address space of the first process, the second process selects a portion of the mapped memory space as a memory pool. In this way, the first process and the second process can share the address of the memory pool to achieve efficient data transmission and inter-process communication.
[0055] In an embodiment of the present application, by mapping the address of the memory space to the first process and then determining part of the space as a memory pool by the second process, the second process can dynamically allocate and adjust the size of the memory pool according to actual needs, thereby improving the flexibility of memory space usage.
[0056] In some embodiments, the implementation of step S105 "closing the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process by the first process" may include the following steps S1051 to S1054, wherein:
[0057] Step S1051, accessing a register file based on the virtual function device information through the first process to determine a virtual address corresponding to the virtual function device; the register file includes a virtual address mapped to a physical address of a register of the virtual function device;
[0058] Here, the register file may be a high-speed storage unit inside the processor for storing temporary data such as operands, instruction addresses, etc. In a virtualized environment, the register file may contain information about registers of virtual function devices, such as the physical addresses and mapped virtual addresses of the registers of the virtual function devices.
[0059] In some implementations, first, the first process obtains virtual function device information, which may include the type, identifier, configuration parameters, etc. of the virtual function device, and the virtual function device information is the basis for determining the virtual address; then, by accessing the register file, detailed information about the register of the virtual function device is obtained. The register file may contain multiple entries, each entry corresponding to a register of a virtual function device; finally, by searching the relevant entries in the register file, the first process can determine the virtual address corresponding to the virtual function device. This virtual address is the address used to access the register of the virtual function device at the software level.
[0060] It should be noted that the entries in the register file contain not only virtual addresses, but also physical address mapping information. This is because the virtual address ultimately needs to be converted to a physical address in order to perform the corresponding operation on the physical hardware. However, in this particular operation, we may only focus on the determination of the virtual address without involving the conversion of the physical address.
[0061] Step S1052, determining, by the first process, a physical address of a register corresponding to the virtual address based on the virtual address and a mapping relationship; wherein the mapping relationship is used to represent a mapping relationship between the physical address of the register and the virtual address of the slave process;
[0062] Here, virtual address can refer to: In a virtualized environment, each virtual environment has its own address space. These addresses are called virtual addresses. Virtual addresses are used to reference resources such as memory and registers at the software level. Physical address can refer to: the actual address used to locate resources such as memory and registers at the hardware level. The mapping relationship defines the conversion rules from virtual addresses to physical addresses. In a virtualized environment, the operating system or virtualization software maintains this mapping relationship to ensure that access requests in the virtual environment can be correctly mapped to the physical hardware.
[0063] In some implementations, the first process can convert the virtual address into a physical address of a corresponding register according to the virtual address and the mapping relationship. In this way, the mapping relationship is not only used to convert the virtual address into a physical address, but also ensures that the process running in the virtual environment can correctly access and control the virtual function device.
[0064] Step S1053, determining a reset register corresponding to the virtual function device based on the physical address and address offset of the register by the first process;
[0065] Here, address offset is used to locate a specific memory location or register by adding an offset to a known base address. Reset register is a special register used to control the reset operation of electronic devices. When an electronic device needs to be reset to its initial state, it can be achieved by writing a specific value to the reset register.
[0066] In some implementations, by combining the physical address and address offset of the register, the first process can calculate the exact physical address of the reset register, thereby determining the reset register corresponding to the virtual function device.
[0067] Step S1054: Reset the reset register through the first process to close the data transmission channel on the corresponding virtual function device.
[0068] Here, the reset operation may refer to: performing a specific write operation on the reset register to trigger a reset process of the reset register.
[0069] In some implementations, by performing a write operation on the reset register through the first process, the data transmission channel on the corresponding virtual function device will be closed, which means that the electronic device will stop sending and receiving data.
[0070] In an embodiment of the present application, a register file is accessed through a first process, and a virtual address is determined based on virtual function device information, and then a physical address is further found through a mapping relationship, and finally a reset register is located. This enables precise control and management of the state of the virtual function device, and can prevent unauthorized access or operation, thereby improving the security of the system.
[0071] In some embodiments, the implementation of step S104 "determining whether the second process exits normally" may include the following steps S1041 to S1043, wherein:
[0072] Step S1041, creating a configuration file based on a data plane development kit framework through the second process;
[0073] Here, the Data Plane Development Kit (DPDK) is a high-performance packet processing framework that is commonly used for software development of network devices. It provides direct access to hardware and optimized packet processing capabilities. Configuration files are often used to store settings and parameters for applications or systems.
[0074] In some implementations, the second process creates a configuration file according to the data plane development kit framework when running, and the configuration file may include the application status, configuration parameters, or other important information.
[0075] Step S1042, detecting the existence status of the configuration file through the callback function registered by the first process;
[0076] Here, a callback function can be a function called through a function pointer, which allows a function to be automatically called when a specific event occurs.
[0077] In some embodiments, when the callback function is triggered, it checks whether the configuration file exists. For example, if the configuration file exists and meets expectations (e.g., file size, content format, etc.), the callback function may return a status code or signal indicating success. If the configuration file does not exist, is damaged or cannot be accessed, the callback function may return an error status code or trigger an exception handling process.
[0078] Step S1043: Determine whether the second process exits normally based on the existence status of the configuration file.
[0079] Here, the existence state of the configuration file includes the configuration file existence and the configuration file non-existence.
[0080] In some implementations, the first process can infer the state of the second process based on the existence of the configuration file. If the configuration file exists, the second process exits normally; if the configuration file does not exist, the second process exits abnormally.
[0081] In an embodiment of the present application, a configuration file is created by a second process, and the existence status of the configuration file is detected by a callback function registered by the first process, which means that there is no need to modify the code or logic of the second process to add additional monitoring functions, thereby reducing unnecessary resource consumption.
[0082] In some embodiments, the implementation of step S1043 "determining whether the second process exits normally based on the existence status of the configuration file" may include the following steps S111 to S112, wherein:
[0083] Step S111, when the existence status representation of the configuration file does not exist, determining that the second process exits abnormally;
[0084] In some embodiments, when the existence status of the configuration file is not present, it means that the second process fails to create or update the configuration file as expected before exiting. This situation may be caused by a variety of reasons, for example, the second process crashes, terminates abnormally, or fails to execute the code segment for creating the configuration file for some reason. Therefore, in this case, it can be determined that the second process exits abnormally.
[0085] Step S112: if the existence status representation of the configuration file exists, determine that the second process exits normally.
[0086] In some implementations, if the existence status of the configuration file is existence, it means that the second process has successfully created the configuration file before exiting, and may have updated its content as expected. Therefore, in this case, it can be determined that the second process exits normally.
[0087] In the embodiment of the present application, the exit status of the second process is determined by the existence status of the configuration file, which can reduce misjudgment to a certain extent. Because the existence of the configuration file is usually closely related to certain key operations of the process (for example, initialization, configuration update, etc.), the existence status of the configuration file can more accurately reflect the operation status of the process.
[0088] In some embodiments, the data transmission processing method may further include the following steps S121 to S124, wherein:
[0089] Step S121, adding a read-write lock to the configuration file through the first process; the read-write lock is used by the first process to read data from the configuration file, and is used by the second process to write data to the configuration file; the configuration file is used to determine whether the second process exits;
[0090] Here, the read-write lock is used to coordinate the access of the first process and the second process to the configuration file. The first process uses the read lock when it needs to read the configuration file, and the second process uses the write lock when it needs to update the configuration file.
[0091] In some implementations, the first process adds a read-write lock to the configuration file, which means that the first process will be responsible for controlling access to the configuration file to ensure that data inconsistency does not occur when reading or writing data.
[0092] Step S122, adding a write lock to the configuration file through the callback function registered by the first process;
[0093] In some implementations, when the first process needs to determine whether the second process has exited, it will attempt to add a write lock to the configuration file through the registered callback function. This is because if the second process is running and may update the configuration file, it should hold the write lock. Therefore, if the first process can successfully obtain the write lock, this may mean that the second process has exited or no longer holds the write lock.
[0094] Step S123, in the case where adding a write lock fails, determining that the second process exists;
[0095] In some implementations, if the first process fails when attempting to increase the write lock (ie, the write lock is already held by another process), it may be determined that the second process still exists because the second process may be using the write lock to update a configuration file.
[0096] Step S124: When adding the write lock successfully, determine that the second process exits.
[0097] In some implementations, if the first process successfully increases the write lock, then it can be inferred that the second process may have exited because the second process no longer holds the write lock.
[0098] In the embodiment of the present application, by attempting to add a write lock to the configuration file through the callback function registered by the first process, it is possible to accurately determine whether the second process exists. If adding the write lock fails, it means that the second process may be using the write lock for a write operation, so it can be determined that the second process exists; if adding the write lock succeeds, it may mean that the second process has exited or no longer holds the write lock, so it can be inferred that the second process may have exited.
[0099] In some embodiments, the data transmission processing method may further include the following steps S131 to S132, wherein:
[0100] Step S131, when the second process exits normally, resetting the accelerator card hardware through the second process;
[0101] Here, an accelerator card is a hardware device that is usually used to accelerate specific computing tasks, such as graphics processing, data processing, etc. It may be an independent circuit board connected to the computer's motherboard through a slot, or it may be a functional module integrated into the processor or other components.
[0102] In some implementations, when the second process exits normally, the second process is responsible for resetting the accelerator card, for example, by sending a specific command or signal to the accelerator card to ensure that the accelerator card is in a clean and consistent state when it is used next time.
[0103] Step S132: after the accelerator card hardware completes the reset operation, closing the first process through the second process.
[0104] In some implementations, after the accelerator card hardware is reset, the second process executes an operation to close the first process. There may be many reasons why the second process closes the first process, such as the task of the first process has been completed, or the interaction between the first process and the accelerator card hardware has been completed and the first process is no longer needed to continue running. In addition, closing the first process may also be to release system resources and improve the overall performance of the system.
[0105] In the embodiment of the present application, resetting the accelerator card hardware through the second process can ensure that the accelerator card hardware is in a clean and consistent state when it is used next time, thereby improving the reliability and stability of hardware resources.
[0106] In the fifth generation mobile communication technology (5th Generation Mobile Communication Technology, 5G) baseband processing unit (Base Band Unit, BBU), the amount of data exchanged between the fronthaul service and the backhaul service is greater than that of the fourth generation mobile communication technology (4G). Therefore, in order to achieve large bandwidth and low latency data interaction, based on the PCIe accelerator card hardware, the Data Plane Development Kit (Data Plane Development Kit, DPDK) framework is used to interact between BBU and external data through user-mode driver in a zero-copy manner. It should be noted that the fronthaul service mainly carries mobile communication services, such as voice calls, text messages and mobile data services (such as Internet access, application use, etc.), and the data flow of the fronthaul service is from mobile devices (such as mobile phones, tablets, etc.) to the mobile network. The backhaul service is mainly used for uplink data transmission, for example, users upload data to the Internet or cloud servers, and the data flow of the backhaul service is from the mobile network to the core network or cloud servers. The zero-copy method means that after the data is read from the disk to the kernel space, it can be transferred from the kernel space to the memory space of the application without being copied to the user space first.
[0107] The embodiment of the present application provides a system framework, such as Figure 2As shown, the system architecture includes a user space (Userspace) 21, a kernel space (Kernel space) 22, a peripheral component interconnection fast bus 23 and hardware (Hardware) 24, wherein the user space 21 includes a fronthaul service software 211, a backhaul service software 212, a daemon process (i.e., the first process mentioned above) 213, a register file 214, and a data plane development kit 215, wherein the data plane development kit 215 includes a data plane development kit library (libdpdk) 2151 and a polling mode driver (Poll Mode Driver, PMD) 2152; the kernel space 22 includes a network device driver (netdev driver) 221 and a driver (vfio-pci) 222; the hardware 24 includes an accelerator card 241, and the accelerator card 241 includes a base address register (Base Address Register 0, BAR0) 2411, a protocol core 2412 (Internet Protocol core, IP core) for interconnecting networks, a field programmable gate array (Field-Programmable GateArray, FPGA) 2413 and an optical port ( Figure 2 6 optical ports are shown in FIG.
[0108] It should be noted that libdpdk is the memory required by the business. It provides some interfaces to connect PMD and drive hardware. The resources requested by physical devices are independent, and the resources requested by virtual devices are shared. The resources of the same physical device can be shared by multiple virtual resources, which can widen the port.
[0109] Based on the above system framework, the BBU's fronthaul service software and backhaul service software will interact with the accelerator card with large bandwidth and high speed. However, due to the complexity of the software business logic and the large number of tasks, it is difficult to ensure that the software will not exit abnormally. In addition, since the DPDK user-mode driver is a link library, it will also exit abnormally with the software, resulting in the failure to reset the PCIe accelerator card resources normally. The data channel of the corresponding service on the accelerator card cannot stop and continue to perform direct memory access (DMA), so that the IP core inside the FPGA cannot obtain the corresponding memory information when reading data, resulting in a PCIe completion timeout error. In addition, the FPGA's ready signal (data transmission signal) may be pulled low for a long time, causing the entire PCIe link to hang, and the BBU cannot work after restarting.
[0110] It should be noted that after the software is started, the IP library is started, and the software exits abnormally without telling the IP library to stop. The memory will still be controlled, but after the software exits, the memory will be recycled by the kernel. After recycling, illegal addresses will be accessed, resulting in the PCIe accelerator card resources not being reset normally. The optical port in the PCIe accelerator card hardware refers to a port with a high-speed fiber optic network interface. This type of port uses 10 Gigabits per second (Gbps, G), 25G, 40G and 100G optical ports as the main force. Different optical ports realize optical-electrical signal conversion through external hot-swappable optical modules, and then transmit data over long distances through optical fibers.
[0111] netdev provides a series of application programming interfaces (APIs) and data structures to implement communication and interaction between the network device driver and the operating system core. In addition, netdev also includes a series of network protocol stacks and network function modules. These modules interact with the network device driver through the netdev interface to implement the transmission, processing and routing of network data. vfio-pci is a driver in the Linux kernel that allows these devices to access hardware through the virtual function input and output (Virtual Function I / O, VFIO) driver in user mode. In kernel space, there is a physical function (PF) (i.e. Figure 2 PF0 to PF2) and virtual functions (Virtual Function, VF) (i.e. Figure 2 VF0 to VF3 in the figure).
[0112] In the related art, a delay detection circuit is added to the PCIe acceleration card. When the software exits abnormally, if the IP reads the memory data for a timeout, the delay detection circuit detects the delay signal and then sends a PCIe RESET signal to stop and reset the FPGA, thereby realizing the recovery of the entire PCIe link when the software is abnormal. The above method has the following disadvantages: 1) In the delay detection circuit PCIe link solution, although the PCIe link recovery function is realized, after using the single root I / O virtualization (SR-IOV) function to create different VFs, the link recovery of a specific VF channel cannot be performed, resulting in the need to restart the services of other VF channels on the PCIe acceleration card. 2) PCIe link recovery involves resetting the FPGA hardware and restarting the services on the entire PCIe acceleration card, so that the PCIe link recovery time is long, the BBU needs to pull up many services, and the services cannot be quickly restored in the 5G system. 3) The complexity of hardware design and the cost of hardware are increased.
[0113] In the related art, there is no slave process, and the master process will create a memory pool by itself. This memory pool is used to store carriers for transmitting data information. When using a carrier to transmit data, a memory buffer (mbuf) will be taken from the memory pool. In the application embodiment, by allowing the slave process to apply for mbuf, these memories can be saved when the master process exits abnormally, and the kernel will not be allowed to recycle them, so that PCIe errors will not occur. The slave process and the master process share a memory pool. The slave process does not do any business. The slave process creates the memory pool and gives it to the master process for use. However, after the master process exits abnormally, the memory pool will not be released immediately. It needs to wait until the slave process is reset and exits before it is released. The slave process will exit together with the master process and finally release the memory pool.
[0114] The embodiment of the present application provides another method for processing data transmission, which starts a daemon process (slave process) when the business software (main process) is started. The slave process, based on the DPDK framework, shares the VF device information and large page memory space after the main process is initialized. The slave process creates a memory pool based on the memory space and passes the address of the memory pool to the main process. When the main process interacts with business data through DMA, it creates an information carrier mbuf based on the memory pool; the slave process keeps the memory pool space and registers a timer callback function, which periodically detects whether the main process exists. When the main process exits abnormally, the callback function of the slave process triggers the PCIe resource reset function. The reset function accesses the BAR0 register file (for example, the register address) through the VF device information of the main process, and finds the reset register through the address offset, and quickly initiates the recovery of the PCIe link.
[0115] The present application embodiment provides another data transmission processing method, such as Figure 3 As shown, the following steps are included:
[0116] Step 301, the main process (i.e. the second process mentioned above) is started;
[0117] Step 302, the main process creates a config file (i.e., the above configuration file), initializes VF device information and large page memory space (i.e., the above memory space) based on the DPDK framework;
[0118] Step 303, the master process starts the slave process (i.e. the first process mentioned above);
[0119] Step 304, starting from the process;
[0120] Step 305, the slave process shares the VF device information and large page memory space initialized by the master process;
[0121] Step 306, registering a timer callback function from the process;
[0122] Step 307, creating a memory pool (mempool) from the process based on the large page memory space;
[0123] Step 308, the main process obtains the address of the memory pool;
[0124] Step 309, the main process executes the business logic;
[0125] Step 310, based on the existence of the config file, determine whether the main process exits normally; if yes, that is, the config file exists, the main process exits normally, and the process goes to step 311; if no, that is, the config file does not exist, the main process exits abnormally, and the process goes to step 313;
[0126] Step 311, the main process releases PCIe resources;
[0127] Step 312, the master process closes the slave process;
[0128] Step 313, triggering the callback function from the process to detect the config file;
[0129] Step 314, the slave process accesses the base address register file through the VF device information and mmap;
[0130] Step 315, determine the reset register address of the VF from the process, write the corresponding value to stop the DMA of the IP, and restore the PCIe link.
[0131] It should be noted that both the above steps 314 and 315 require a PCIe resource reset function.
[0132] In the embodiment of the present application, the business software (main process) is started, and a config file is created in a shared directory based on the DPDK framework, and the VF device and large page memory are initialized (a page table is created for each process to map the virtual address to the physical address), wherein a read-write lock is added to the config file, which can only be written by the main process and read by the slave process, and is used to record the information of the business process initialization memory, and store the large page memory information in the shared directory. The main process pulls up the daemon process (slave process), and the slave process also obtains the BDF number information of the VF device based on the DPDK framework, and obtains the large page memory information created by the main process through the shared directory, wherein the large page memory information includes the memory size, large page type (1GB or 2MB), and physical memory descriptor (for example, the segment base address (Base) indicates the starting physical address of the segment, the segment limit (Limit) indicates the length of the memory occupied by the program (or data) segment, and the segment attribute (Attr) describes the access rights of the segment and other attributes, etc.). The slave process registers a timer callback function to detect whether the main process exists, and then creates a memory pool based on the obtained large page memory information, and communicates with the main process to share the address of the memory pool. When the main process is doing business, the slave process periodically checks the config file to determine whether the main process is alive. The config file will be recycled by the kernel after the main process exits. For example, if the config is read-write locked by the main process, the slave process will periodically check and try to add a write lock to the config file by calling the froc function. If the write lock fails, it proves that the main process is alive, and if the write lock succeeds, it means that the main process is not alive. If the main process exits normally, the PCIe resources are reset and the slave process is closed; otherwise, the callback function is triggered and the PCIe resource reset function is called. The reset function accesses the BAR0 register file resource0 mapped by the kernel driver through the main process VF device information, and then determines the reset register address of the VF based on the virtual address of the file mmap and the address offset, writes the corresponding value to stop the DMA behavior of the IP, and quickly restores the PCIe link. Among them, the kernel driver has mapped the corresponding virtual function base address register (Virtual Function BaseAddress Registers, VF BAR Registers) address space to the file in advance when the VF is created.
[0133] It should be noted that in the kernel, each process has its own virtual address space. This virtual address refers to the virtual address in the slave process. There is only one physical address, but multiple virtual addresses. The slave process in the user space cannot directly access the physical address. In Linux, a process needs to access the physical address through the virtual address, then use mmap to tell the central processing unit (CPU) to get the physical address through mmap, and then access the register file. What the slave process sees is that there is a mapping relationship between the virtual addresses.
[0134] The present application embodiment provides a kernel driver to create a VF and initialize PCIe resources, such as Figure 4 As shown, the following steps are included:
[0135] Step 401, start the Linux system;
[0136] Step 402, start the accelerator card kernel driver and bind the corresponding PF;
[0137] Here, after the Linux system is started, the accelerator card kernel driver is enabled and bound to the corresponding PF.
[0138] Step 403, creating VFs on each PF based on the SR-IOV function;
[0139] Step 404, the kernel driver initializes each VFPCIe structure information, and maps the PCIe structure information to registers and other resources to a file;
[0140] Here, after VF is created, the kernel driver is loaded, the kernel driver initializes the PCIe structure information of each VF and maps the information to the system directory / sys / bus / pci / devices / BDF, which contains the mapped BAR0 register file resource0
[0141] Step 405, bind the corresponding VF device to the vfio-pci driver;
[0142] Here, bind the VF device to the vfio-pci driver to bypass the kernel.
[0143] Step 406: The upper layer software transmits data based on VF DMA.
[0144] Here, the main process can operate the physical device to perform DMA transfer data.
[0145] Compared with the related art, the embodiments of the present application have the following advantages:
[0146] 1. After the upper-layer software exits abnormally, the PCIe link can be quickly restored to avoid PCIe errors and PCIe link hangs.
[0147] 2. By sharing large page memory through the master and slave processes, the slave process maintains the large page memory information, which does not affect the data transmission performance, avoids PCIe errors and PCIe link hangs, and can quickly restore the PCIe link.
[0148] 3. Based on the BAR register file mapped by the kernel driver, the reset register is accessed through the virtual address and offset address of mmap when an exception occurs, and the specified VF is reset, avoiding the overall reset affecting the business functions of other VFs, so that the BBU can quickly restore the business process.
[0149] 4. By detecting the status of the main process, the PCIe resources of the specified VF are quickly reset based on the mapped register file when an exception occurs.
[0150] 5. Multiple VFs created based on the kernel driver SR-IOV function can reset PCIe resources for specific VFs that exit abnormally without affecting the normal interactive business data of other VFs.
[0151] 6. After an exception occurs in the software, the problematic business process can be quickly restored separately, and the BBU does not need to process the business processes of other VFs on the PCIe accelerator card.
[0152] 7. Compared with hardware solutions, there is no need to change the hardware, which reduces the complexity of hardware design and saves costs.
[0153] Based on the above embodiments, the present application provides a data transmission processing device, such as Figure 5 As shown, the data transmission processing device 500 includes:
[0154] An acquisition module 510 is configured to acquire a memory space created by a second process through a first process; the first process is a process created by the second process;
[0155] A first creation module 520 is configured to create a memory pool based on the memory space through the first process when the second process starts the first process; the memory pool is used to store data transmitted by the second process, and the first process and the second process communicate by sharing an address of the memory pool;
[0156] An execution module 530, configured to execute a service based on the address of the memory pool through the second process;
[0157] A first determination module 540 is used to determine whether the second process exits normally during the process of the second process executing the service;
[0158] The first closing module 550 is used to close the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process through the first process when the second process exits abnormally.
[0159] In some embodiments, the first creation module 520 includes: a mapping unit, used to map the address of the memory space to the first process through the first process to obtain the mapped memory space; a first determination unit, used to determine part of the space in the mapped memory space as the memory pool through the second process.
[0160] In some embodiments, the first shutdown module 550 includes: a second determination unit, used to access the register file through the first process based on the virtual function device information, and determine the virtual address corresponding to the virtual function device; the register file includes the virtual address mapped to the physical address of the register of the virtual function device; a third determination unit, used to determine the physical address of the register corresponding to the virtual address through the first process based on the virtual address and the mapping relationship; wherein the mapping relationship is used to characterize the mapping relationship between the physical address of the register and the virtual address of the slave process; a fourth determination unit, used to determine the reset register corresponding to the virtual function device based on the physical address and address offset of the register through the first process; a shutdown unit, used to reset the reset register through the first process to close the data transmission channel on the corresponding virtual function device.
[0161] In some embodiments, the first determination module 540 includes: a creation unit, used to create a configuration file based on the data plane development kit framework through the second process; a detection unit, used to detect the existence status of the configuration file through the callback function registered by the first process; and a fifth determination unit, used to determine whether the second process exits normally based on the existence status of the configuration file.
[0162] In some embodiments, the fifth determination unit includes: a first determination subunit, used to determine that the second process exits abnormally when the existence status representation of the configuration file does not exist; and a second determination subunit, used to determine that the second process exits normally when the existence status representation of the configuration file exists.
[0163] In some embodiments, the data transmission processing device 500 also includes: a first adding module, used to add a read-write lock to the configuration file through the first process; the read-write lock is used by the first process to read data in the configuration file, and is used by the second process to write data in the configuration file; the configuration file is used to determine whether the second process exits; a second adding module, used to add a write lock to the configuration file through a callback function registered by the first process; a second determination module, used to determine that the second process exists when the addition of the write lock fails; a third determination module, used to determine that the second process exits when the addition of the write lock succeeds.
[0164] In some embodiments, the data transmission processing device 500 also includes: a reset module, which is used to reset the acceleration card hardware through the second process when the second process exits normally; and a second closing module, which is used to close the first process through the second process after the acceleration card hardware completes the reset operation.
[0165] The description of the above device embodiment is similar to the description of the above method embodiment, and has similar beneficial effects as the method embodiment. For technical details not disclosed in the device embodiment of the present application, please refer to the description of the method embodiment of the present application for understanding.
[0166] It should be noted that in the embodiment of the present application, if the above method is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on such an understanding, the technical solution of the embodiment of the present application is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, which is stored in a storage medium, including a number of instructions to enable an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a U disk, a mobile hard disk, a read-only memory (ROM), a disk or an optical disk. In this way, the embodiment of the present application is not limited to any specific combination of hardware and software.
[0167] An embodiment of the present application provides an electronic device, including a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and the processor implements the above method when executing the computer program.
[0168] The embodiment of the present application provides a computer-readable storage medium on which a computer program is stored, and the computer program implements the above method when executed by a processor. The computer-readable storage medium may be transient or non-transient.
[0169] The embodiment of the present application provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and when the computer program is read and executed by a computer, some or all of the steps in the above method are implemented. The computer program product can be implemented specifically by hardware, software or a combination thereof. In an optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (Software Development Kit, SDK) and the like.
[0170] It should be noted that the embodiment of the present application provides a hardware entity of an electronic device, such as Figure 6 As shown, the hardware entity of the electronic device 600 includes: a processor 601, a communication interface 602 and a memory 603, wherein: the processor 601 generally controls the overall operation of the electronic device 600. The communication interface 602 enables the electronic device to communicate with other terminals or servers through a network. The memory 603 is configured to store instructions and applications executable by the processor 601, and can also cache data to be processed or processed by the processor 601 and each module in the electronic device 600 (for example, image data, audio data, voice communication data and video communication data), which can be implemented by flash memory (FLASH) or random access memory (Random Access Memory, RAM). Data transmission can be performed between the processor 601, the communication interface 602 and the memory 603 through a bus 605.
[0171] It should be noted here that the description of the above storage medium and device embodiments is similar to the description of the above method embodiments, and has similar beneficial effects as the method embodiments. For technical details not disclosed in the storage medium and device embodiments of this application, please refer to the description of the method embodiments of this application for understanding.
[0172] It should be understood that "one embodiment" or "an embodiment" mentioned throughout the specification means that specific features, structures or characteristics related to the embodiment are included in at least one embodiment of the present application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. In addition, these specific features, structures or characteristics can be combined in one or more embodiments in any suitable manner. It should be understood that in various embodiments of the present application, the size of the serial number of each step / process mentioned above does not mean the order of execution, and the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiment of the present application. The serial numbers of the embodiments of the present application mentioned above are for description only and do not represent the advantages and disadvantages of the embodiments.
[0173] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.
[0174] In the several embodiments provided in the present application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as: multiple units or components can be combined, or can be integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the components shown or discussed can be through some interfaces, and the indirect coupling or communication connection of the devices or units can be electrical, mechanical or other forms.
[0175] The units described above as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units; they may be located in one place or distributed on multiple network units; some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.
[0176] In addition, all functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be a separate unit, or two or more units may be integrated into one unit; the above-mentioned integrated units may be implemented in the form of hardware or in the form of hardware plus software functional units.
[0177] A person skilled in the art can understand that all or part of the steps of implementing the above method embodiment can be completed by hardware related to program instructions, and the aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it executes the steps of the above method embodiment; and the aforementioned storage medium includes: mobile storage devices, read-only memories (ROM), magnetic disks or optical disks, etc., various media that can store program codes.
[0178] Alternatively, if the above-mentioned integrated unit of the present application is implemented in the form of a software function module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can essentially or in other words, the part that contributes to the relevant technology can be embodied in the form of a software product, which is stored in a storage medium and includes a number of instructions for an electronic device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the methods described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as mobile storage devices, ROMs, magnetic disks, or optical disks.
[0179] The above is only an implementation method of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application.
Claims
1. A method for processing data transmission, the method comprising: Obtain the memory space created by the second process through the first process; The first process is a process created by the second process; In the case where the second process starts the first process, a memory pool is created based on the memory space by the first process; the memory pool is used to store data transmitted by the second process, and the first process and the second process communicate by sharing an address of the memory pool; Executing a service based on the address of the memory pool through the second process; During the process of the second process executing the service, determining whether the second process exits normally; In the case where the second process exits abnormally, the first process closes the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process.
2. The method according to claim 1, wherein the step of creating a memory pool based on the memory space through the first process comprises: Mapping the address of the memory space to the first process through the first process to obtain a mapped memory space; Part of the mapped memory space is determined as the memory pool through the second process.
3. The method according to claim 1, wherein closing the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process through the first process comprises: Accessing a register file based on the virtual function device information through the first process to determine a virtual address corresponding to the virtual function device; the register file includes a virtual address mapped to a physical address of a register of the virtual function device; Determining, by the first process, a physical address of a register corresponding to the virtual address based on the virtual address and a mapping relationship; wherein the mapping relationship is used to represent a mapping relationship between the physical address of the register and the virtual address of the slave process; Determining, by the first process, a reset register corresponding to the virtual function device based on the physical address and the address offset of the register; The reset register is reset through the first process to close the data transmission channel on the corresponding virtual function device.
4. The method according to claim 1, wherein determining whether the second process exits normally comprises: Creating a configuration file based on a data plane development kit framework through the second process; Detecting the existence status of the configuration file through a callback function registered by the first process; Based on the existence status of the configuration file, determine whether the second process exits normally.
5. The method according to claim 4, wherein determining whether the second process exits normally based on the existence status of the configuration file comprises: In a case where the existence status representation of the configuration file does not exist, determining that the second process exits abnormally; In a case where the existence status representation of the configuration file exists, it is determined that the second process exits normally.
6. The method according to claim 4 or 5, further comprising: Adding a read-write lock to the configuration file through the first process; The read-write lock is used by the first process to read data from the configuration file, and is used by the second process to write data into the configuration file; the configuration file is used to determine whether the second process exits; Adding a write lock to the configuration file through a callback function registered by the first process; In case adding the write lock fails, determining that the second process exists; When adding the write lock successfully, it is determined that the second process exits.
7. The method according to any one of claims 1 to 6, further comprising: When the second process exits normally, resetting the accelerator card hardware through the second process; After the accelerator card hardware completes the reset operation, the first process is closed through the second process.
8. A data transmission processing device, the device comprising: An acquisition module, used for acquiring the memory space created by the second process through the first process; The first process is a process created by the second process; a first creation module, configured to create a memory pool based on the memory space through the first process when the second process starts the first process; the memory pool is used to store data transmitted by the second process, and the first process and the second process communicate by sharing an address of the memory pool; An execution module, configured to execute a service based on the address of the memory pool through the second process; A first determination module, used to determine whether the second process exits normally during the process of the second process executing the service; The first closing module is used to close the data transmission channel on the corresponding virtual function device based on the virtual function device information corresponding to the second process through the first process when the second process exits abnormally.
9. An electronic device comprising a memory and a processor, wherein the memory stores a computer program executable on the processor, and the processor implements the steps of the method according to any one of claims 1 to 7 when executing the program.
10. A computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the method according to any one of claims 1 to 7.